JP2018133476A - Thyristor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a thyristor.SOLUTION: A thyristor includes a cathode layer formed on a front surface side of a semiconductor substrate and having a first conductivity type, a first base layer provided on the back side of the cathode layer and having a second conductivity type different from the first conductivity type, a second base layer provided on the back side of the first base layer in the semiconductor substrate and having a first conductivity type, an anode layer provided on the back side of the second base layer in the semiconductor substrate and having a second conductivity type, and a control unit that controls on/off of the thyristor by controlling the withdrawal of holes from the first base layer.SELECTED DRAWING: Figure 1A

Description

  The present invention relates to a thyristor.

Conventionally, a gate-controlled thyristor that forms a channel by applying a voltage to a gate electrode and controls on / off is known (see, for example, Patent Document 1).
Patent Document 1 JP 2000-311998 A

  However, the conventional thyristor is not sufficiently reduced in on-voltage, and further reduction in on-voltage is desired.

  In the first aspect of the present invention, the cathode layer formed on the front surface side of the semiconductor substrate and having the first conductivity type, and provided on the back surface side of the cathode layer in the semiconductor substrate, A first base layer having a different second conductivity type, and a semiconductor substrate, provided on the back side of the first base layer, and a second base layer having the first conductivity type and a back surface of the second base layer in the semiconductor substrate. Provided is a thyristor comprising an anode layer having a second conductivity type provided on the side, and a controller that controls on / off of the thyristor by controlling extraction of holes from the first base layer. The control unit may include a plurality of gate trenches extending in the first direction and arranged in a second direction perpendicular to the first direction on the front surface side of the semiconductor substrate. The control unit is provided on the front surface side of the semiconductor substrate, and is provided between a pair of gate trench portions provided adjacent to each other in the second direction among the plurality of gate trench portions. A contact portion of two conductivity types may be provided.

  The controller may turn off the thyristor by extracting holes from the first base layer. In addition, the control unit may turn on the thyristor by accumulating holes in the first base layer without extracting holes from the first base layer.

  The controller may inject electrons from the cathode layer to the anode layer through the second base layer and accumulate holes from the anode layer to the first base layer when the thyristor is turned on.

  The contact portion and the cathode layer may be set to a cathode potential.

  The cathode layer may be thinner than the first base layer.

  The length in the first direction of the cathode layer may be shorter than the length in the first direction of one gate trench portion in the plurality of gate trench portions.

  The length in the first direction of the cathode layer may be longer than the length in the first direction of one gate trench portion in the plurality of gate trench portions.

  The plurality of gate trench portions may include one set of gate trench portions provided adjacent to each other in the second direction and another set of gate trench portions provided adjacent to each other in the second direction. One set of gate trench portions and another set of gate trench portions adjacent in the second direction may be provided side by side in the second direction.

  The plurality of gate trench portions may include one set of gate trench portions provided adjacent to each other in the second direction and another set of gate trench portions provided adjacent to each other in the second direction. One set of gate trenches and another set of gate trenches adjacent in the second direction may be provided shifted in the first direction.

  The plurality of gate trench portions may have an L-shaped structure extending in the second direction in addition to the first direction.

  The contact portion is provided to be recessed with respect to an end portion in the first direction of the pair of gate trench portions in a plan view between the pair of gate trench portions provided adjacently among the plurality of gate trench portions. May be.

  The summary of the invention does not enumerate all the features of the present invention. In addition, a sub-combination of these feature groups can also be an invention.

An example of the perspective view of the thyristor 100 which concerns on Example 1 is shown. An example of the top view of thyristor 100 concerning Example 1 is shown. An example of the thyristor 100 during the gate-off operation is shown. An example of the thyristor 100 during the gate-on operation is shown. An example of a top view of the thyristor 100 is shown. The structure of the thyristor 500 which concerns on the comparative example 1 is shown. An example of the perspective view of the thyristor 100 which concerns on Example 2 is shown. An example of the top view of the thyristor 100 which concerns on Example 2 is shown. An example of the top view of the thyristor 100 concerning Example 3 is shown. An example of the top view of the thyristor 100 which concerns on Example 4 is shown. An example of the operation of the thyristor 100 is shown. An example of the operation of the thyristor 100 is shown.

  Hereinafter, the present invention will be described through embodiments of the invention, but the following embodiments do not limit the invention according to the claims. In addition, not all the combinations of features described in the embodiments are essential for the solving means of the invention.

[Example 1]
FIG. 1A shows an example of a perspective view of a thyristor 100 according to the first embodiment. FIG. 1B illustrates an example of a top view of the thyristor 100 according to the first embodiment. The thyristor 100 includes a cathode layer 12, a second base layer 14, a contact portion 15, a first base layer 16, an anode layer 18, and a gate trench portion 30 formed on the semiconductor substrate 10. The thyristor 100 has a PNPN structure. In this specification, the first conductivity type is assumed to be n-type, and the second conductivity type is assumed to be p-type. However, these conductivity types may be interchanged.

  The gate trench portion 30 has a trench insulating film formed along the inner wall of the trench, and a gate conductive portion formed inside the trench insulating film. For example, the gate conductive portion is polycrystalline silicon. The gate conductive portion is set to the gate potential. In this example, a plurality of gate trench portions 30 are provided on the front surface side of the semiconductor substrate 10. The gate trench part 30 penetrates the cathode layer 12 and the first base layer 16 from the front surface side of the semiconductor substrate 10 and reaches the second base layer 14.

  The gate trench portion 30 is formed by extending in a predetermined extending direction (that is, the Y-axis direction). In this example, the plurality of gate trench portions 30 are arranged in the arrangement direction (that is, the X-axis direction) perpendicular to the extending direction. In this specification, the extending direction is a direction in which the gate trench portion 30 extends in parallel with the front surface of the semiconductor substrate 10. The arrangement direction is a direction that is parallel to the front surface of the semiconductor substrate 10 and orthogonal to the extending direction of the gate trench portion 30. The stretching direction is an example of a first direction. The arrangement direction is an example of the second direction.

  The plurality of gate trench portions 30 are provided side by side in the arrangement direction. The plurality of gate trench portions 30 are arranged by repeating a region having a narrow interval between trenches and a region having a wide interval between trenches. The plurality of gate trench portions 30 include one set of gate trench portions and another set of gate trench portions. One set of gate trench portions 30 and another set of gate trench portions 30 adjacent in the arrangement direction are provided side by side in the arrangement direction. The region where the interval between the trenches is narrow is a region sandwiched between the trenches of the pair of gate trench portions 30. A region having a wide interval between trenches is a region sandwiched between one set of gate trench portions 30 and another set of gate trench portions 30.

  The cathode layer 12 is provided on the front surface side of the semiconductor substrate 10. The cathode layer 12 has the first conductivity type. The cathode layer 12 of this example has an n + type impurity concentration. A cathode electrode may be formed on the front surface side of the cathode layer 12. Thereby, the cathode layer 12 is set to the cathode potential K. The cathode layer 12 in this example is thinner than the first base layer 16.

  The area of the cathode layer 12 may be arbitrarily set according to the required characteristics of the thyristor 100. In one example, the length of the cathode layer 12 in the extending direction is arbitrarily set according to the required characteristics of the thyristor 100. The length in the extending direction of the cathode layer 12 is shorter than the length in the extending direction of one gate trench portion 30 in the plurality of gate trench portions 30. The length of the cathode layer 12 in the extending direction may be longer than the length of the plurality of gate trench portions 30 in the arrangement direction.

  The first base layer 16 is provided on the front surface side of the semiconductor substrate 10. In one example, the first base layer 16 is formed by ion-implanting impurities from the front surface side of the semiconductor substrate 10. At least a part of the first base layer 16 is provided on the back side of the cathode layer 12. The first base layer 16 has a second conductivity type. The first base layer 16 of this example has a p-type impurity concentration.

  The second base layer 14 is provided on the back side of the first base layer 16. The second base layer 14 has the first conductivity type. The second base layer 14 of this example has an n− type impurity concentration. For example, when the semiconductor substrate 10 has the first conductivity type, the semiconductor substrate 10 may be used as the second base layer 14 as it is.

  The contact portion 15 is provided on the front surface side of the semiconductor substrate 10. The contact portion 15 is provided between a pair of gate trench portions 30 provided adjacent to each other in the arrangement direction among the plurality of gate trench portions 30. In one example, the contact portion 15 is formed by ion-implanting impurities from the front surface side of the semiconductor substrate 10. Contact portion 15 has the second conductivity type. The contact portion 15 of this example has a p + type impurity concentration. A cathode electrode may be formed on the front surface side of the contact portion 15. Thereby, the contact portion 15 is set to the cathode potential K.

  The anode layer 18 is provided on the back side of the semiconductor substrate 10. The anode layer 18 of this example is provided on the back side of the first base layer 16. The anode layer 18 has a second conductivity type. The anode layer 18 of this example has a p + type impurity concentration. An anode electrode may be formed on the back side of the anode layer 18. Thereby, the anode layer 18 is set to the anode potential A.

  Here, the gate trench portion 30 and the contact portion 15 are an example of a control portion that controls on / off of the thyristor 100. The control unit controls on / off of the thyristor 100 by controlling extraction of holes from the first base layer 16. For example, the control unit turns off the thyristor 100 by extracting holes from the first base layer 16. Further, the controller turns on the thyristor 100 by accumulating holes in the first base layer 16 without extracting holes from the first base layer 16. When the thyristor 100 is turned on, the control unit causes the cathode layer 12 to inject electrons into the anode layer 18 through the second base layer 14 and accumulates holes from the anode layer 18 into the first base layer 16.

  In particular, the contact portion 15 is recessed with respect to an end portion in the extending direction of the gate trench portion 30 in a plan view between a pair of adjacent gate trench portions 30 among the plurality of gate trench portions 30. Is provided. Thereby, the contact part 15 is controlled whether or not the carriers accumulated in the first base layer 16 are extracted.

  FIG. 2A shows an example of the thyristor 100 during the gate-off operation. In the case of gate-off, the carrier of the semiconductor substrate 10 is discharged to the cathode electrode by the contact portion 15. In one example, the case of gate-off is a case where the gate voltage of the gate trench portion 30 is low. The case of gate-off may include a case where a voltage low enough to allow carriers to be discharged to the cathode electrode by the contact portion 15 is applied to the gate trench portion 30. That is, the case of gate off may include not only the case where the gate voltage is low, but also the case where the voltage based on the gate voltage is substantially low. Here, the gate voltage at which carriers are discharged to the cathode electrode by the contact portion 15 varies depending on the interval between the plurality of gate trench portions 30, the concentration of the contact portion 15, and the like. An arrow in FIG. 2A indicates a path through which the carrier goes around the gate trench portion 30 and is discharged to the contact portion 15.

  FIG. 2B shows an example of the thyristor 100 during the gate-on operation. When the gate is on, a potential barrier due to the gate potential is generated around the gate trench portion 30. In one example, the case where the gate is on is a case where the gate voltage of the gate trench portion 30 is high. The case of gate-on may include a case where a potential barrier due to the gate potential is generated around the gate trench portion 30 and a voltage high enough to prevent carriers from being discharged to the contact portion 15 is applied to the gate trench portion 30. For example, when a potential barrier due to the gate potential occurs, the holes in the semiconductor substrate 10 are suppressed from being discharged to the contact portion 15. As a result, the potential of the first base layer 16 rises, and the PN junction between the cathode layer 12 and the first base layer 16 becomes a forward bias. When the PN junction composed of the first base layer 16 and the cathode layer 12 is forward biased, the thyristor 100 is turned on. Here, the voltage that is so high that carriers are not discharged to the contact portion 15 differs depending on the interval between the plurality of gate trench portions 30, the concentration of the contact portion 15, and the like.

  Further, when the gate voltage of the gate trench portion 30 becomes low, carriers accumulated in the first base layer 16 are discharged, so that the thyristor 100 is turned off. As described above, the first base layer 16 has a cathode potential during the gate-off operation and a floating potential during the gate-on operation. Note that an inversion layer is formed at the interface between the first base layer 16 and the gate trench portion 30 in a region where the trench interval of the gate trench portion 30 is wide. The formed inversion layer injects electrons into the anode layer 18 through the second base layer 14, and holes are injected from the anode layer 18 into the first base layer 16 accordingly.

  As described above, the thyristor 100 of this example controls the on / off operation by controlling the accumulation of carriers in the first base layer 16. That is, the thyristor 100 is turned on when holes are accumulated in the first base layer 16 and the PN junction between the cathode layer 12 and the first base layer 16 is forward biased. On the other hand, the thyristor 100 is turned off when holes accumulated in the first base layer 16 are discharged from the cathode layer 12 to the cathode electrode and the potential of the first base layer 16 is lowered.

  FIG. 3 shows an example of a top view of the thyristor 100. In this example, an example of a method for designing the thyristor 100 will be described. The lengths Da to Dg represent typical dimensions of the thyristor 100 structure. In this example, the thyristor 100 according to the first embodiment will be described using one adjacent set of gate trench portions 30a and 30b and another adjacent set of gate trench portions 30c and 30d. The gate trench portions 30a and 30b and the gate trench portions 30c and 30d in this example have the same structure and size.

  The length Da indicates an interval (mesa width) between the pair of gate trench portions 30. The length Da in this example indicates the interval between the gate trench portion 30a and the gate trench portion 30b. The length Da is set to a length capable of controlling the extraction of holes to the contact portion 15 by applying a gate voltage to the gate trench portion 30. That is, the length Da is set to such a length that a potential barrier is generated when the gate trench portion 30 is turned on, and injection of holes into the contact portion 15 can be suppressed. The interval between the pair of gate trench portions 30 is, for example, 0.01 μm to 3 μm, more preferably 0.1 μm to 0.5 μm.

  The length Db indicates the width in the arrangement direction of the gate trench portions 30. The length Db in this example indicates the width in the arrangement direction of the gate trench portions 30b. In this example, the widths in the arrangement direction of the gate trench portions 30a, 30b, 30c, and 30d are equal. The length Db may be determined according to a semiconductor manufacturing process or the like.

  The length Dc indicates a distance between one set of adjacent gate trench portions 30 and another set of gate trench portions 30. In this example, an interval between one set of gate trench portions 30a and 30b and another set of gate trench portions 30c and 30d is shown. More specifically, the interval between the gate trench portion 30b and the gate trench portion 30c is shown.

  The length Dd indicates the distance between the end portion of the gate trench portion 30a in the extending direction and the end portion of the contact portion 15 in the extending direction. That is, the length Dd indicates the amount of depression with respect to the pair of gate trench portions 30a and 30b of the contact portion 15 in plan view. By adjusting the length Dd, the extraction of carriers accumulated in the first base layer 16 is controlled.

  The length De indicates the length of the contact portion 15 in the extending direction. The length De may be determined according to the relationship with the length of the gate trench portion 30 in the extending direction. The area of the contact portion 15 may be changed according to the length De, and the characteristics of the thyristor 100 may be adjusted.

  The length Df indicates the distance between the end portion of the gate trench portion 30b in the extending direction and the end portion of the cathode layer 12 in the extending direction. The length Df in this example indicates the distance between the positive end of the gate trench part 30b in the Y-axis direction and the positive end of the cathode layer 12 in the Y-axis direction. The length Df contributes to the ease of accumulation and discharge of carriers accumulated in the first base layer 16. For example, by increasing the length Df, holes can be easily accumulated in the first base layer 16 but are difficult to be discharged. On the other hand, by shortening the length Df, it becomes difficult to accumulate holes in the first base layer 16, but it is easy to discharge.

  The length Dg indicates the length of the cathode layer 12 in the extending direction. The area ratio between the first base layer 16 and the cathode layer 12 in plan view changes according to the size of the length Dg. The on-voltage of the thyristor 100 may be adjusted according to the area ratio between the first base layer 16 and the cathode layer 12. For example, by increasing the area ratio of the cathode layer 12 to the first base layer 16, the on-voltage of the thyristor 100 is reduced.

[Comparative Example 1]
FIG. 4 shows a configuration of a thyristor 500 according to the first comparative example. The thyristor 500 includes a semiconductor substrate 510, a buffer layer 512, a base layer 516, a gate electrode 520, an emitter electrode 522, and a collector electrode 524. The thyristor 500 of this example has a PNPN quadruple structure between the emitter electrode 522 and the collector electrode 524. When a gate voltage is applied to the gate electrode 520, a channel is formed in a region between the gate electrode 520 and the insulating film. Thereby, the thyristor of the thyristor 500 is turned on. In the thyristor 500 according to the comparative example 1, since the channel becomes a resistance, the on-voltage may not be sufficiently reduced.

[Example 2]
FIG. 5A illustrates an example of a perspective view of the thyristor 100 according to the second embodiment. FIG. 5B illustrates an example of a top view of the thyristor 100 according to the second embodiment. In the thyristor 100 of this example, the region where the cathode layer 12 is formed is different from that of the thyristor 100 according to the first embodiment. In this example, points different from the first example will be particularly described.

  The thyristor 100 has a wider area where the cathode layer 12 is formed than the thyristor 100 according to the first embodiment. In other words, on the front surface of the semiconductor substrate 10, the region where the cathode layer 12 which is the n + region is formed is wider than the region where the first base layer 16 which is the p region is formed. For example, the length in the extending direction of the cathode layer 12 is longer than the length in the extending direction of one gate trench portion 30 in the plurality of gate trench portions 30. The cathode layer 12 of this example is formed in a stripe shape in the extending direction of the gate trench portion 30. Since the thyristor 100 of this example has a larger n + region per unit area than that of the first embodiment, the on-voltage can be reduced.

  As described above, the thyristor 100 may arbitrarily set the ratio of the region where the cathode layer 12 and the first base layer 16 are formed. For example, the thyristor 100 adjusts the ratio of the cathode layer 12 and the first base layer 16 according to the required on-voltage value. That is, the specific shape of the cathode layer 12 is not limited to this example.

[Example 3]
FIG. 6 illustrates an example of a top view of the thyristor 100 according to the third embodiment. The thyristor 100 of this example is different from the thyristor 100 according to the first and second embodiments in the arrangement of the gate trench portions 30. In the thyristor 100 of this example, the arrangement of one set of gate trench portions 30 is different from that of the thyristor 100 according to the second embodiment. In the present example, differences from the second embodiment will be particularly described.

  The arrangement of the pair of gate trench portions 30 is arbitrarily determined in consideration of the structure of the gate trench portion 30 and the on / off controllability of the thyristor 100. In the plurality of gate trench portions 30 of this example, one set of gate trench portions 30 and another set of gate trench portions 30 adjacent in the arrangement direction are provided shifted in the extending direction. As a result, the plurality of gate trench portions 30 of this example are arranged more evenly on the front surface of the semiconductor substrate 10 than in the case of the first and second embodiments. Therefore, the thyristor 100 of this example easily pulls out the carriers accumulated in the first base layer 16. Therefore, the thyristor 100 is easily turned off.

[Example 4]
FIG. 7 illustrates an example of a top view of the thyristor 100 according to the fourth embodiment. In the thyristor 100 of this example, the shape of the gate trench portion 30 is different from that of the thyristor 100 according to the second embodiment. In the present example, differences from the second embodiment will be particularly described.

  The plurality of gate trench portions 30 have an L-shaped structure in plan view. The plurality of gate trench portions 30 of this example have an L-shaped structure extending in the arrangement direction in addition to the extending direction. The four L-shaped gate trench portions 30 are arranged so that the L-shaped corners face the center of the four gate trench portions 30. The thyristor 100 of this example is easier to turn off because the gate trench portions 30 are arranged more evenly than in the case of the second embodiment. The gate trench portion 30 of this example is provided so that the length in the X-axis direction is equal to the length in the Y-axis direction. However, the gate trench portion 30 may be provided so that the length in the X-axis direction is different from the length in the Y-axis direction.

  FIG. 8A shows an example of the operation of the thyristor 100. FIG. 8B shows an example of the operation of the thyristor 100. The vertical axis represents any one of the gate voltage Vg, the collector voltage Vc, and the collector current Ic, and the horizontal axis represents the time t. The gate voltage Vg, the collector voltage Vc, and the collector current Ic are indicated by a solid line, a chain line, and a dotted line, respectively. 8A and 8B show simulation results of the thyristor 100. FIG. 8A and 8B, the interval (mesa width) between the pair of gate trench portions 30 is 0.2 μm.

  When the gate voltage Vg is turned on, the collector voltage Vc decreases and the collector current Ic flows. On the other hand, when the gate voltage Vg is turned off, the collector voltage Vc increases and the collector current Ic is cut off. That is, it has been confirmed that the thyristor 100 is turned on and off by the on / off control of the gate voltage Vg.

  As described above, the thyristor 100 controls on / off by controlling extraction of holes accumulated in the first base layer 16. As a result, the thyristor 100 of this example can reduce the on-voltage compared to the case where the inversion layer generated by the gate control is used as a channel. The thyristor 100 of this example may be applied to a power semiconductor device used for a power conversion device.

  As mentioned above, although this invention was demonstrated using embodiment, the technical scope of this invention is not limited to the range as described in the said embodiment. It will be apparent to those skilled in the art that various modifications or improvements can be added to the above-described embodiment. It is apparent from the description of the scope of claims that the embodiments added with such changes or improvements can be included in the technical scope of the present invention.

  The order of execution of each process such as operations, procedures, steps, and stages in the apparatus, system, program, and method shown in the claims, the description, and the drawings is particularly “before” or “prior to”. It should be noted that the output can be realized in any order unless the output of the previous process is used in the subsequent process. Regarding the operation flow in the claims, the description, and the drawings, even if it is described using “first”, “next”, etc. for convenience, it means that it is essential to carry out in this order. It is not a thing.

DESCRIPTION OF SYMBOLS 10 ... Semiconductor substrate, 12 ... Cathode layer, 14 ... 2nd base layer, 15 ... Contact part, 16 ... 1st base layer, 18 ... Anode layer, 30 ... Gate trench part, 100 ... Thyristor, 500 ... Thyristor, 512 ... Buffer layer, 510 ... Semiconductor substrate, 516 ... Base layer, 520 ... Gate electrode, 522 ... Emitter electrode 524 ... Collector electrode

Claims (11)

A cathode layer formed on the front surface side of the semiconductor substrate and having a first conductivity type;
A first base layer provided on a back side of the cathode layer and having a second conductivity type different from the first conductivity type in the semiconductor substrate;
In the semiconductor substrate, a second base layer provided on the back side of the first base layer and having the first conductivity type;
An anode layer having the second conductivity type provided on a back surface side of the second base layer in the semiconductor substrate;
A control unit for controlling on / off of the thyristor by controlling extraction of holes from the first base layer, and
The controller is
A plurality of gate trench portions extending in a first direction and arranged in a second direction perpendicular to the first direction on the front surface side of the semiconductor substrate;
The second conductive material provided between a pair of gate trench portions provided on the front surface side of the semiconductor substrate and adjacent to the second direction among the plurality of gate trench portions. A thyristor comprising a contact portion of a mold. The controller is
Turning off the thyristor by extracting holes from the first base layer;
The thyristor according to claim 1, wherein the thyristor is turned on by accumulating holes in the first base layer without extracting holes from the first base layer. The controller is
The electron is injected from the cathode layer to the anode layer through the second base layer and the holes are accumulated from the anode layer to the first base layer when the thyristor is turned on. Thyristor. The thyristor according to any one of claims 1 to 3, wherein the contact portion and the cathode layer are set to a cathode potential. The thyristor according to any one of claims 1 to 4, wherein a thickness of the cathode layer is thinner than a thickness of the first base layer. The length in the said 1st direction of the said cathode layer is shorter than the length in the said 1st direction of the one gate trench part in these gate trench parts. Thyristor. The length in the said 1st direction of the said cathode layer is longer than the length in the said 1st direction of the one gate trench part in these gate trench parts. Thyristor. The plurality of gate trench portions include one set of gate trench portions provided adjacent to the second direction and another set of gate trench portions provided adjacent to the second direction. ,
The one set of gate trench portions and the other set of gate trench portions adjacent to each other in the second direction are provided side by side in the second direction. The thyristor described in 1. The plurality of gate trench portions include one set of gate trench portions provided adjacent to the second direction and another set of gate trench portions provided adjacent to the second direction. ,
The one set of gate trench portions and the other set of gate trench portions adjacent to each other in the second direction are provided so as to be shifted in the first direction. The thyristor described in 1. The thyristor according to any one of claims 1 to 7, wherein the plurality of gate trench portions have an L-shaped structure extending in the second direction in addition to the first direction. The contact portion is between the pair of gate trench portions provided adjacent to each other among the plurality of gate trench portions, with respect to an end portion in the first direction of the pair of gate trench portions in a plan view. The thyristor according to claim 1, wherein the thyristor is provided so as to be recessed.

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