JP2000311998A - Insulated gate turn-off thyristor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To obtain a high power switching device possessing sufficient reverse- blocking characteristics. SOLUTION: An insulated gate turn-off thyristor is formed by combining a thyristor with an IGBT in a following manner. An IGBT composed of a P-base 24, a P+ 27, an upper angular N+ 26, and a cathode 28 and a thyristor composed of a P-base 32, a P+ 34, and an oxide film 36 are each provided on a device base composed of an anode electrode 30, a P+ layer 22, and an N-drift 20 sandwiching a deep trench gate 40 inbetween. When a sufficient voltage is applied to the gate electrode 44, a current is made to flow from a cathode to an anode passing through the IGBT and a shallowly doped channel P 80 located under the trench gate to turn on the thyristor, and when a gate voltage drops, a channel resistance increases, the thyristor is turned off, and only an IGBT current flows. When a gate voltage drops, furthermore, the IGBT is stopped, and a device is prevented from being abruptly turned on or off.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION

The present invention relates to the field of semiconductor switching devices, and more particularly to switching devices used in high power switching circuits.

[0002]

2. Description of the Related Art There is an ever increasing need for semiconductor devices to withstand high currents and / or high voltages. In many applications, for example, pulse width modulated motor control circuits require high power switching devices. Many devices have been developed to provide the high current and reverse blocking characteristics required for high power switches. While available devices provide various performance levels for the key parameters of interest, such as forward voltage drop, reverse blocking voltage, and maximum controllable current density, each has some drawbacks as well.

One of such devices is an insulated gate bipolar transistor (IGBT). An IGBT having a trench gate structure has outperformed the performance of a standard IGBT, and one such structure is shown in FIG. P ++, N buffer and N-
A drift layer is stacked on the collector terminal C.
Each IGBT structure is assembled on these common base layers by adding P-base and P + regions on the N- drift layer and N + regions in contact with the P + and P-base regions. The emitter terminals E are P + and N
+ Both sides are touched. Similar structures are regularly spaced across the device, with each structure separated by a trench gate 10. The trench gate consists of an oxide layer 12, recessed into the N- drift layer, and contacts the N + and P- base regions of the adjacent structure. The trench is typically filled with a conductive material and the electrodes contact the conductive material to provide a gate connection G. This device is H.-R.
Chang and B. Baliga, "500-V n-channel insulated gate bipolar transistor with trench gate structure", IEEE Journal of Electron Devices, No. 3.
6, No. 9, September 1989, pp. 1824-1828
In more detail.

[0004] In operation, a positive voltage is applied to the gate terminal. This forms an N-type inversion layer over the P- base region, allowing electrons to pass from the N + region to the N-
It can flow to the drift layer. These electrons provide the necessary base drive to turn on the PNP transistor formed between collector C and emitter E. P +
The + layer responds by injecting holes into the N- drift layer, so that current can flow from C to E. Increasing the gate voltage increases the inversion channel mobility, thereby increasing the injection of electrons and holes into the N-drift layer and lowering its "on" resistance. To turn off the IGBT, the gate voltage is made zero or negative, and the inversion channel is removed, thereby removing the base drive of the transistor.

Since the IGBT includes a basic bipolar transistor structure, its voltage versus current curve includes a current saturation region, ie, the region through which the current through the device is limited to a particular maximum regardless of the voltage applied thereto. Including. Because of this region, the device can be prevented from being destroyed in the event of a short circuit. This feature is lacking in other high power switching devices such as thyristors, which require a snubber circuit to limit the current in case of a short circuit.

[0006] However, IGBTs have several disadvantages, which make them unsuitable for some applications. Since the structure is essentially a gain transistor, there is some recombination in the N-drift region, which causes the device to exhibit a high forward voltage drop (V _FD ). I
Another disadvantage of GBTs is that they "latch up"
At that point, it is no longer under control of the gate voltage. This occurs when the current through the P-base region is too high,
The N + / P- base junction of the device becomes forward biased, thereby causing the device to operate as a thyristor. In this mode, device conduction cannot be controlled by the gate voltage.

Another type of high-power switching device is the MOS-controlled thyristor (MCT), which is described, for example, by V. Temple in "A New Class of MOS-Controlled Thyristors-Power Devices", the I.I.
It is described in EEE Society Journal, ED-33, No. 10, October 1986, pp. 1609-1618. This device is formed by forming a lateral MOSFET in the P-base region, thereby introducing a MOS controlled short between the N + emitter of the thyristor and the P-base region. When a positive voltage is applied to the gate of the MOSFET, the thyristor turns on. When a negative voltage is applied to the gate, a conduction path is formed between the N + emitter and the P- base region. Since this current path has a lower resistance than that through the N + emitter / P-base junction, the current flowing through the thyristor will flow through the conduction path, eventually turning off the thyristor.

[0008] As a thyristor, MCT is the above-mentioned IGB.
Although having a lower V _FD than T, this device has several disadvantages. Multi-cell devices (for example, J.Ba
liga's "Power Semiconductor Devices", PWS Publishing (1996), pp. 519-523) typically include a plurality of structures of the type described above, which provide a P-base region with a surface under the gate electrode. Next to the "turn-on cell" formed by the To obtain a large "maximum controllable current density", ie, the highest current density that can be turned off by applying a gate voltage, the turn-off channel must have a low resistance. However, the turn-off channel requires a large area, thereby limiting the area that can be used for the turn-on cell, and demanding a balance between the turn-on and turn-off performance of the MCT.

Another disadvantage of the MCT is caused by the local nature of the turn-on gate, which results in a non-uniform distribution in current density when the MCT is operating in the on state. This causes non-uniform turn-on characteristics. In addition, since it operates as a thyristor when turned on, the MCT has no current saturation region. In addition, non-uniform P-base regions make MCT fabrication difficult.

[0010] Yet another high power switching device is a base resistance controlled thyristor (BRT).
This is described, for example, in pages 526-530 of the aforementioned document of Baliga.
It is described in. P + "Diverter" area is PNPN
Formed adjacent to the P-base region of the thyristor structure;
The MOS gate electrode spans the P-base, N-drift and P + diverter regions of the device. When a positive gate voltage is applied, an inversion channel is formed between the N + and N- drift regions, turning on the thyristor. When a negative gate voltage is applied, a channel is formed between the P-base and P + diverter regions, turning off the current from the PNP transistor of the thyristor and turning off the thyristor.

However, BRT has several disadvantages. Since the device must include both turn-on and turn-off regions, the width of the cell is very large. To reduce the channel width, the current density of the turn-off channel is limited, thereby limiting the turn-off function of the device. Furthermore, since the device operates as a simple thyristor when on, there is no current saturation region and an external limiting circuit must be used to prevent damage in the event of a short circuit.

[0012]

SUMMARY OF THE INVENTION An "insulated gate turn-off thyristor" (IGTO) is provided which overcomes the above problems. IGT
O is particularly suitable for high power switching applications, providing easy gate voltage control of switching, low V _FD , high maximum control current density, and large safe operating area (SOA).

The new structure has two main variants. One has current saturation capability and the other has no current saturation capability. IGTOs with current saturation capability begin with an N- drift layer on a P + layer. The IGBT structure is formed on this base. Specifically, a P- base region (including a shallow P + region that provides ohmic contact to the P- base) on the N- drift layer and an N + region on the P- base region are added. One electrode contacts the P + layer to form the anode, and the other electrode contacts the P + ohmic contact and the N + region to form the cathode. A thyristor structure is also formed on the P + / N- drift base. Specifically, a P- base and an N + region are added on the N- drift layer. It is separated from the cathode by an oxide layer on the N + region of the thyristor. The trench gate structure is recessed in the N- drift layer between the IGBT structure and the thyristor structure and separates the IGBT P- base and N + regions from the thyristor P- base and N + regions. The trench is filled with a conductive material, the connection of which provides a gate terminal.

If the positive gate voltage is sufficient, an inversion and accumulation channel is formed, whereby electrons flow to the N- drift layer and short the respective N + regions of the IGBT and thyristor, turning both devices on and off. Become.
During the on state, most of the current flows through the thyristor structure,
Gives a lower V _FD than that of the IGBT alone. When the voltage across the device is comparable to the gate voltage,
The storage channel is removed and the operation of the thyristor ends.
Alternatively, the operation of the thyristor can be terminated by lowering the gate voltage, thereby increasing the resistance of the storage and inversion channels. When the channel resistance is dominant, the anode current flows only through the low resistance path of the IGBT, and the operation of the thyristor stops. But I
The GBT conduction continues, which provides current saturation capability. A plurality of I's, each separated by a trench gate
The GBT structure and the thyristor structure alternate to form a device capable of carrying a high current.

IGTOs without current saturation capability have the same P
+ / N- drift base is used. The P-base region is N-
A thyristor structure is formed on top of the drift layer by forming a PNP transistor structure (having a shallow P + region that provides ohmic contact to the P- base) and adding a P- base and an N + region. The electrode is N of the thyristor
The cathode is formed in contact with both the + region and the P + ohmic contact of the transistor. Contact with the P + layer forms the anode. The trench gate structure described above separates the transistor and thyristor structures and provides a gate connection.

When a positive gate voltage is applied to the device, an inversion channel is formed across the P-base region of the thyristor, providing base drive to allow conduction of both the thyristor and transistor structures. Applying a negative gate voltage creates a channel that shorts the respective P-base regions of the thyristor and transistor, thereby terminating thyristor operation and switching off the device. The thyristor structure is dominant in the device, and its V _FD is much lower than IGBT or IGTO with current saturation capability as described above. But,
As a result of this primary, the device has no current saturation capability. A plurality of transistor structures and thyristor structures, each separated by a trench gate, are staggered to form a device capable of carrying high current.

Both of the devices described above can be easily manufactured using conventional techniques. Further features and advantages of the present invention will become apparent to those skilled in the art from the following detailed description, taken in conjunction with the accompanying drawings.

[0018]

DETAILED DESCRIPTION OF THE INVENTION Two variations of a high power switching device, referred to herein as an insulated gate turn-off thyristor (IGTO), are described, one with current saturation capability and the other without.

One embodiment of an insulated gate turn-off thyristor (IGTO) having current saturation capability is shown in FIG. The base of the device is the N- drift layer 2 on the P + layer 22.
Consists of zero. Two types of structures are assembled on this base. That is, an insulated gate bipolar transistor (IG
BT) and a thyristor are created. The IGBT structure is formed by adding a P- base region 24 on the N- drift layer, and the upper corner of the P- base region is set to an N + region 26.
Is occupied. Shallow P + region 2 on P- base region 24
7 provides ohmic contact to the P-base. The electrode 28 is I
Contact both the P + ohmic contact and the N + region of the GBT. Electrode 30 contacts the P + layer. Electrodes 28 and 30 serve as the cathode K and anode A, respectively, of the device. Here, “+” (that is, P + or N +) indicates a carrier concentration of 1 × 10 ¹⁸ / cm ³ or more, and “−” indicates a carrier concentration of less than 5 × 10 ¹⁶ / cm ³ .

The thyristor structure has a P-type
-Formed on the P + / N- drift base by stacking the base region 32 and the N + region 34; An oxide layer 36 is formed over the N + region of the thyristor and separates from the cathode.

The trench gate structure is recessed in the N- drift layer 20 between the IGBT and the thyristor structure, separating the IGBT P-base and N + regions from the thyristor P-base and N + regions. The trench gate structure includes a pair of oxide walls 38 and an oxide bottom surface 40 and is filled with a conductive material 42 to provide a planar device surface. Electrode 4
4 provides a gate terminal G in contact with the conductive material. Conductive material 42 is heavily doped donor polysilicon because it easily fills the trench. However, any other material that can fill the trench and provide excellent conductivity can be used.

The mechanism by which the device is switched on is shown in FIG. A positive voltage is applied to the gate terminal G. Thereby, the inversion channel 50 over the P-base regions of the IGBT structure and the thyristor structure, respectively.
And 52 are formed. If the gate voltage is greater than the voltage across the device anode and cathode ( _VAC ), a storage channel 54 is also formed, which spans the N-drift layer between P-base regions 24 and 32.

The inversion channel 50 causes electrons to flow from the N + region of the IGBT to the N− drift layer (indicated by the arrow 56), and the IGBT and thyristor PN
Base drive is provided to both P transistor portions. In response, holes are injected from the anode into the N- drift layer (arrow 57). The injected holes are collected at the cathode across the N-drift layer (indicated by arrow 58) and current flows through the device.

With storage channel 54, a conduction path is provided through inversion channels 50 and 52 and storage channel 54 so that electrons flow between the N + region of the IGBT and the floating N + layer of the thyristor structure (arrows). 60). Thereby, IG
The potential of the N + region 26 of the BT is changed to the N + region 34 of the thyristor.
to go into. When the base drive through channel 50 is large enough to forward bias the N + / P-base junction of the thyristor, the thyristor turns on. This allows current to flow from the anode to the cathode through the thyristor structure, through the thyristor's P-base and N + layers, and then through the inversion channel 52, storage channel 54, inversion channel 50 and N + region 26 to the cathode K. (Indicated by arrow 62).

The resistance of the conduction path through the thyristor structure is I
Because it is smaller than that of the GBT, the device forward voltage drop V _FD is higher than that of the thyristor alone, but is typically about 1 volt lower than that of the IGBT (Ｂ4.5 volts to ５5.5 volts). ).

The device has current saturation capability, which is 2
This can be achieved in two ways. One approach is to lower the gate voltage, which increases the resistance of the storage and inversion channels. When the resistance of the channel predominates, the anodic current mainly flows through the lower resistance path of the IGBT and the thyristor stops operating. But,
Conduction of the IGBT continued, if V _AC is accustomed sufficiently high, IG
BT enters the current saturation region.

Another time the device enters its current saturation region
One method is illustrated in FIG. As the anode voltage increases, the potential of the N- drift layer in the region of the storage channel 54 increases. When V _AC becomes comparable to the gate voltage V _G, accumulation channel 54 is removed, the depletion region 7
0 is created, which extends from the P-base region 24 to the P-base region 32. This extinguishes the conduction path 60 that connected the thyristor structure to the cathode, and the operation of the thyristor stops. However, the gate voltage V
_G as long as greater than V _T, the electrons continue given through the inversion channel 50 N-drift region 20, current IGB
Continue to flow from the anode to the cathode via T. When V _AC becomes very high by the short-circuit for example, IGBT enters the current saturation region, preventing the failure by limiting the device current.

The device is switched off by bringing the gate voltage V _G below zero. As a result, the inversion channel 50 disappears and the base drive of the IGBT is also eliminated,
This turns off the IGBT, bringing the device conduction to zero. The device is preferably turned off by making the gate voltage negative, reducing the possibility of the device being accidentally turned on by noise.

The current-voltage boundary at which a power switching device can operate without catastrophic failure is defined as a safe operating area (SOA). Referring again to FIG. 2, the SOA of the IGTO with current saturation capability can be improved by adding a shallow, slightly doped P region 80 to the N-drift layer opposite the bottom of the trench. This P region is wide enough to cover the corners of the trench (where the vertical walls of the trench connect to its horizontal bottom), but shallow enough (preferably <1 μm thick) to avoid lateral diffusion. The charge injected into the P region must be sufficient so that the peak electric field is in the P region 80, not the oxide. Typically 3 × 10 ¹²
/ Cm ² or more is suitable. The use of such a P region protects the trench oxide from the high peak electric fields that the device experiences during blocking mode. These high electric fields can cause premature destruction of the device. Since oxide corners are particularly susceptible to premature breakdown voltage, P region 80 should span both corners of the trench if sufficient protection is needed.

The IGTO having the current saturation capability shown in FIGS. 2-4 has a PNP IGBT structure and a PNPN.
Although shown to include a thyristor structure, the device can easily use a structure of the opposite polarity as well.
Such a device is shown in FIG. Here, the base includes the P- drift layer 100 on the N + layer 102, the contact of which forms the cathode K of the device. The IGBT structure is formed by adding an N- base region 104 on the P- drift layer and has a P + region 106 on the N- base. The shallow N + region 107 on the N- base region 104 is N
-Providing ohmic contact to the base. The anode electrode A contacts both the N + ohmic contact and the P + region.
The thyristor structure has an N-base region 1 on a P-drift layer.
08 and the P + region 110. The trench gate and gate connection G are as described above, but the conductive material filling the trench is preferably polysilicon heavily doped with acceptors. The device functions essentially the same as the device of FIG. 2, but requires a negative gate voltage to form the necessary channel to switch the device on.

In order to create an actual device capable of carrying high currents, a plurality of the IGBT, thyristor and insulated gate structures described above require P + / N−
Staggered over the drift base. One embodiment of such a multi-cell device is shown in FIG. Here, the trench IGBT (120) and thyristor (122) structures are regularly spaced within the base consisting of the N- drift layer 126 on the P + layer 124. Insulated trench gate structure 128 is IGB
It is provided between each pair of T and / or thyristor structures.

The floating N + layer of each thyristor structure helps the device of FIG. 6 to provide excellent SOA.
The width of each trench gate affects the device's SOA and its conductivity. A wide trench gate width results in a low peak field, which provides a high SOA. However, conductivity is generally sacrificed when wide trenches are used. With the floating N + layer of each thyristor structure, the present invention enables both high SOA and excellent conductivity to be achieved. Because the N of each thyristor
The + layer is floating because it is covered by an oxide layer, which essentially spans the distance between each IGBT structure, serves a particularly large effective trench width, and results in a high SOA.

As shown in FIG. 6, the oxide layer on thyristor structure 122 does not extend all the way back to the structure. Each P-base region of the structure reaches the surface in a region beyond the oxide layer and is connected to a common cathode. While this arrangement provides excellent SOA, a fully functioning device can alternatively be configured as shown in FIG. Here, the oxide layer on thyristor structure 122a extends to the back of the structure, the P-base region does not reach the surface, and no connection to the thyristor structure is made.

[0034] The IGBT and thyristor structures can be staggered in any desired manner to tailor the performance of the device for a particular application. For example, two thyristor structures can be created between each IGBT structure. This gives a lower forward voltage drop than the device has the same two number structure, but reduces the effectiveness of the current saturation function. Similarly, two IGs between each thyristor
A BT can be created to increase the current saturation capability of the device. However, _VFD is somewhat higher.

The shape of the staggered structure is not limited.
As shown in FIGS. 6 and 7, the structure may be trench-shaped. One possible alternative embodiment is shown in the plan view of FIG. 8 (the anode, cathode and gate electrodes are not shown for brevity). Here, the columnar IGBT structure 130 is staggered with the columnar thyristor structure 132 and there are two thyristor structures between each IGBT structure pair. Each IGBT structure is as described above. A shallow P + region 134 that provides ohmic contact to a P− base region (not shown) is formed on the P + / N− drift base 136 with an N + region 138 in the P− base region. Each thyristor structure is also as described above. P-base region 140 and N +
Region 142 is provided on P + / N− drift base 136. The insulated trench gate structure is formed by a horizontal oxide bottom (not shown) surrounding each pillar IGBT and thyristor structure with oxide walls 144 and crossing the region between the oxide walls.

The structure shown in FIG. 8 is merely an example, and other structural shapes and ratios (number of IGBT structures / number of thyristor structures) may be used to provide a functional device.
Can be used. 6 and 7 are preferred. Because it is easy to manufacture, it offers excellent performance. Although not shown, the multi-cell device has the opposite polarity (eg, FIG. 5)
And a lightly doped shallow N region below the bottom of the trench.
Improve.

An IGTO without current saturation capability is shown in FIG. The structure of this device is similar to that of IGTO with current saturation capability described above, but with some notable differences. As indicated above, the device is created on a base consisting of the N− drift layer 200 on the P + layer 202. The electrode in contact with the P + layer serves as the anode A of the device. The PNP bipolar transistor structure has a P-base region 20 on the N-drift layer 200.
4 and the P-base region 204
A shallow P + region 205 is formed thereon to provide ohmic contact to the P- base. The thyristor structure is formed by adding a P- base region 206 and an N + region 208 on the N- drift layer. The electrode contacts both the P + ohmic contact 205 of the transistor and the N + layer 208 of the thyristor. These electrodes are connected together to form a common cathode connection K. The trench gate is recessed in the P- base region of the transistor structure and in the N- drift layer between the P- base and N + regions of the thyristor structure.
The trench gate comprises a pair of oxide walls 210 and an oxide bottom surface 212 and is filled with a conductive material 214 (preferably heavily doped polysilicon) and includes a gate electrode G in contact with the conductive material. As described above in connection with the IGTO having current saturation capability, a shallow slightly doped P region 216 opposite the bottom of the trench.
Can be added to the N-drift layer to protect the trench oxide from the high peak electric fields that the device experiences during blocking mode. Region 216 should be wide enough to cover the corners of the trench, but preferably shallow enough to avoid lateral diffusion.

The mechanism by which the device is switched on is shown in FIG. A positive voltage is applied to the gate terminal G. As a result, the thyristor P-
An inverted N-channel 220 over the base layer 206 is formed. The inverted N-channel 220 causes electrons to flow from the N + region of the thyristor to the N- drift layer (indicated by arrow 222), providing base drive to both the transistor and thyristor structures. In response, holes are injected from the anode into the N-drift layer (arrow 22).
4). Assuming that the anode is sufficiently positive with respect to the cathode, the thyristor and transistor structure is turned on,
Through the thyristor structure (shown by arrow 226) and through the transistor structure (shown by arrow 228), conduction from the anode to the cathode is enabled. The thyristor operation causes the N-drift layer to overflow with electrons and holes, lowering its resistance and improving the conduction of both the transistor and the thyristor structure.

When the device is on, current flows through both the PNP transistor structure and the thyristor structure.
Since the resistance on the thyristor side is much smaller than that on the transistor side, the thyristor structure dominate when the device is conducting. As a result, the V
_FD is similar to thyristor alone. The superiority of the thyristor structure allows multi-cell implementations of the device (described below) to have higher current densities and uniform turn-on characteristics.

In the on state, the transistor structure of the device carries only a small portion of the device current. However, transistors play a major role in turning off. The turn-off mechanism is shown in FIG. A negative voltage is applied to the gate electrode, which removes the inverted N-channel 220 across the P-base region 206,
An inverted P-channel 232 is formed over the N-drift region adjacent to the gate oxide. Inversion channel 220
Removes the base drive of the PNP transistor of the device and stops conduction of the device through path 228. Channel 232 provides a conductive path (indicated by arrow 234) and the thyristor P-base layer 206
From the P-base layer 204 of the transistor to reduce the base drive of the thyristor NPN transistor. When the current is sufficiently branched and the base drive is sufficiently depleted, the thyristor operation stops. Thus, the device provides a given and effective turn-off mechanism with low V _FD of the thyristor. Manufactured by conventional means, the MOS trench structure allows for a high channel density, so that the device can have a high turn-off current capability. However, thyristor structures do not have current saturation capability because they dominate the device.

The IGTO can be realized with a structure of opposite polarity as shown in FIG. Here, the N + layer 240 and the P− drift layer 242 form a base, and the N− base region 244 on the P− drift layer forms an NPN transistor (N−
Form a N-base (2 with a shallow N + region 245 to provide ohmic contact to the base) on the P- drift layer.
46) and P + (248) regions form a thyristor structure. The connection to N-base region 244 and P + region 248 forms the anode A of the device. The electrode in contact with the N + layer serves as cathode K. The conductive material and the oxide walls and bottom of the trench gate structure are the same as described above. However, the conductive material filling the trench is preferably polysilicon heavily doped with acceptors. With this structure, a negative gate voltage is used to turn on the device and a positive voltage is used to switch off.

As described in connection with IGTOs having current saturation capability, actual IGTO devices capable of carrying large currents require multi-cell implementations, and transistor and thyristor structures require the P + / N- drift base of the device. Over each other. One possible multi-cell implementation is shown in FIG. Here, the trench transistor (250) and thyristor (252) structures are periodically spaced within the base of the N− drift layer 256 on the P + layer 254. An insulating trench gate structure 258 is provided between each transistor and / or thyristor structure pair.

Multi-cell IGT without current saturation capability
An alternative embodiment of O is shown in FIG. Here, the P- base region of thyristor structure 252a reaches the surface of the device, and the common cathode is the N + and P- of each thyristor.
Connected to both base areas. With this structure, FIG.
A somewhat better SOA is provided than the third device.

IGT having current saturation capability as described above
Like O, the transistor and thyristor structures can be staggered in any desired manner so that device performance is tailored to a particular application. Further, the shape of the staggered structure is not limited. As shown in FIGS. 13 and 14, the structure may be trench-shaped. One possible alternative embodiment is shown in the plan view of FIG. 15 (the anode, cathode and gate electrodes are not shown for clarity). Here, square bar transistor structures 260 are staggered with square bar thyristor structures 262, with one thyristor structure positioned between each pair of transistor structures. Each transistor structure is as described above, with a shallow P + region 264 providing ohmic contact to a P- base region (not shown)
/ N- formed on the drift base 266. Each thyristor structure is also as described above, with the P-base region (not shown) and the N + region 268 being P + / N
-Formed on the drift base 266; The insulated trench gate structure is formed by a horizontal oxide bottom surface (not shown) surrounding each square rod transistor and thyristor structure with oxide walls 270 and spanning the area between the oxide walls.

The structure shown in FIG. 15 is merely an example, and many other structural shapes and ratios (number of transistor structures / number of thyristor structures) can be used to provide a functional device. . FIG. 13 and FIG.
4 are preferred. Because it is simple to manufacture, it offers excellent performance. Although not shown, the multi-cell device (with respect to FIG. 12) can be implemented with an opposite polarity structure, enhancing the device's SOA with a lightly doped shallow N region below the trench bottom.

The described device can be manufactured on a punch-through wafer (EPI), and the drift layer is formed on the bulk substrate material with two doping layers with the correct doping level and the desired thickness. including. This is shown in FIG.
Includes a lightly doped P-drift layer and a heavily doped P-buffer layer. Devices can also be fabricated on non-punch-through (NPT) wafers, where the drift region, eg, a P-drift layer such as layer 242 in FIG. 12, is a bulk substrate material and
The + region (N + layer 240 in this example) is a very thin layer (preferably less than 0.5 μm) of phosphorous or arsenic doped material implanted from the back. Several factors should be considered in determining which wafer type to use. EPI wafers are more expensive than NPT wafers, but provide a lower forward voltage drop because the epitaxial layer has a controlled thickness and doping concentration. NPT-based devices have lower electron injection efficiencies (if configured according to FIG. 5 or 12),
It has a lower hole injection efficiency than an EPI-based device (if configured according to FIG. 2 or FIG. 9) and can be used to manipulate the stored charge to provide better switching characteristics. . In contrast, lifetime control is used to adjust the stored charge in EPI-based devices. The blocking voltage of the device is affected by the doping level and thickness of the drift layer. 60
Doping levels and thicknesses sufficient to provide a blocking voltage of 0 volts or more are preferred.

The performance of the IGTO depends on the width and depth of the trench gate, with or without current saturation capability.
Further, it is affected by the mesa width of the transistor structure and the thyristor structure. About 2-3 μm trench width, about 3
A mesa width of -4 [mu] m and a trench depth of about 4-5 [mu] m are preferred, as they provide practical but excellent performance for manufacturing.

In an IGTO having no current saturation capability, when the transistor is turned off, that is, when a negative gate voltage is applied, the inversion channel formed between the P-base regions of the transistor structure and the thyristor structure should be as short as possible. good. If the channel is short, each P-
The resistance of the path between the base regions will be lower, improving the current turn-off capability and increasing the maximum controllable current of the device.

While a particular embodiment of the present invention has been shown and described, various modifications and alternative embodiments will occur to those skilled in the art. Accordingly, the invention is not limited except as by the appended claims.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view of an IGBT structure known in the prior art.

FIG. 2 shows an IGT having current saturation capability according to the present invention.
It is sectional drawing of O.

FIG. 3 shows the mechanism switched on, FIG.
3 is a sectional view of the device of FIG.

FIG. 4 is a cross-sectional view of the device of FIG. 2, showing the current saturation capability of the device.

FIG. 5 is a cross-sectional view of an alternative embodiment of an IGTO having current saturation capability.

FIG. 6 is a perspective view of an embodiment of a multiple cell implementation of an IGTO having a current saturation capability.

FIG. 7 is a perspective view of an alternative embodiment of a multiple cell implementation of an IGTO having current saturation capability.

FIG. 8 is a plan view of an embodiment of a multiple cell implementation of an IGTO having current saturation capability.

FIG. 9 shows an IG without current saturation capability according to the present invention.
It is sectional drawing of TO.

FIG. 10 is a cross-sectional view of the device of FIG. 9, showing the mechanism switched on.

FIG. 11 is a cross-sectional view of the device of FIG. 9, showing the mechanism switched off.

FIG. 12 is a cross-sectional view of an alternative embodiment of an IGTO without current saturation capability.

FIG. 13 is a perspective view of an embodiment of a multiple cell implementation of an IGTO without current saturation capability.

FIG. 14 is a perspective view of an alternative embodiment of a multiple cell implementation of an IGTO without current saturation capability.

FIG. 15 is a plan view of an embodiment of a multiple cell implementation of an IGTO without current saturation capability.

[Explanation of symbols]

20 N− drift layer, 22 P + layer, 24 P− base region, 26 N + region, 27 shallow P + region, 28
Electrodes, 30 electrodes, 32 P-base region, 34 N +
Region, 36 oxide layer, 38 oxide wall, 40 oxide bottom surface, 42 conductive material, 44 electrode, 80 shallow P region.

Claims (34)

[Claims] An insulated gate turn-off thyristor (IGTO) having current saturation capability, comprising a device base, wherein the device base contacts a P + layer, an N- drift layer on the P + layer, and the P + layer. A first electrode providing an anode of the device; an insulated gate bipolar transistor (IGBT) structure on the base including a P + layer and an N- drift layer on the base; and contacting the IGBT structure and the device A second electrode that provides a cathode of: a thyristor structure on the base including the base P + layer and an N− drift layer; an oxide layer on the thyristor structure separating the thyristor structure from the cathode; And an insulated gate disposed in a trench shape in the base between the IGBT structure and the thyristor structure. Wherein the insulated gate wall contacts the IGBT structure and the thyristor structure, and further transmits a voltage applied to the upper surface of the trench to the wall, wherein the conductive material in the trench is in contact with the conductive material. A third electrode providing a gate connection of the device, wherein a positive voltage is applied to the gate connection to form a channel to provide a conduction path between the IGBT and the thyristor structure; If the voltage between them is high enough, one of the
The T structure is turned on, and the conduction path allows the thyristor structure to be turned on, so that current flows between the anode and cathode connections and the resistance of the conduction path is increased, thereby increasing the thyristor structure Off, and if the gate voltage drops or if the difference between the gate voltage and the voltage between the anode and cathode connections is small enough, the current between the anode and cathode connections will only flow through the IGBT structure and will be zero or negative. An insulated gate turn-off thyristor, wherein a gate voltage turns off the transistor structure and terminates device conduction. 2. An insulated gate turn-off thyristor (IGTO) having current saturation capability, comprising an insulated gate bipolar transistor (IGBT) structure, wherein said IGBT structure has a P + layer, an N- drift layer on said P + layer, A first P- base region on the N- drift layer; a shallow P + region on the first P- base region for providing ohmic contact to the first P- base region; A first N + region on a first P- base region; and a first electrode contacting both the shallow P + region and the first P- base region to provide a cathode connection for the device. Including a thyristor structure,
The thyristor structure includes the P + layer, the N- drift layer on the P + layer, a second P- base region on the N- drift layer, and a second P- base region on the second P- base region. Isolating the N + region from the second N + region from the cathode connection;
A first oxide layer on the second N + region; and a recess in the N- drift layer between the N + and P- base regions of the IGBT structure and the N + and P- base regions of the thyristor structure. An insulated gate disposed in a trench shape, wherein the insulated gate is the first N +
Region, the first P- base region, the N- drift layer, the second P- base region, and the second N +
A second oxide layer in contact with a region, the second oxide layer forming a wall and a bottom surface of the trench, and applying a voltage applied to a top surface of the trench to the second oxide layer A conductive material in the trench; a second electrode in contact with the conductive material to provide a gate connection for the device; and contacting the P + layer opposite the N- drift region;
A third electrode providing an anode connection for the device, wherein a positive voltage is applied to the gate connection to each of the first and second electrodes.
And a first and second inversion channel over the second P- base region and a storage channel over the N- drift layer between the inversion channels, wherein the inversion channel and the storage channel are the first and second N + Providing a conduction path between the regions, wherein if the voltage between the anode and cathode connections is sufficiently high, the first inversion channel turns on the IGBT structure and the conduction path turns on the thyristor structure. Make it possible
This causes a current to flow between the anode and cathode connections, increasing the resistance of the conduction path, thereby turning off the thyristor structure and reducing the gate voltage or between the gate voltage and the anode and cathode connections. The current between the anode and cathode connections flows only through the IGBT structure when the difference between them is small enough, and a zero or negative gate voltage turns off the transistor structure and terminates device conduction; Turn-off thyristor. 3. The insulated gate has first and second substantially vertical walls contacting the IGBT structure and the thyristor structure, respectively, and a substantially horizontal bottom surface between the vertical walls contacting the N-drift region. The device contacts the horizontal bottom surface on the opposite side of the conductive material in the trench and straddles the corner formed at the junction of the vertical wall and the bottom surface, and raises the corner when the device is in the blocking mode. 3. The insulated gate turn-off thyristor of claim 2, further comprising a shallow P region that protects from a peak electric field. 4. The insulated gate turn-off thyristor according to claim 3, wherein said shallow P region has a thickness of less than 1 μm. 5. The insulated gate turn-off thyristor of claim 3, wherein the shallow P region is injected with a charge sufficient to prevent a peak electric field from reaching the second oxide layer. 6. The charge is at least 3 × 10 ¹² / cm
It is ^2, the insulated gate turn-off thyristor according to claim 4. 7. The insulated gate turn-off thyristor includes a plurality of the IGBT structures, a plurality of the thyristor structures, and a plurality of the insulated gate structures penetrating into the N-drift layer, each of the insulated gate structures. Is positioned between each pair of said IGBT structures, each pair of said thyristor structures, or each pair of said IGBT structure and said thyristor structure;
The thyristor structure having the isolation N + region is an IGB
3. The insulated gate turn-off thyristor of claim 2, wherein the insulated gate turn-off thyristor provides a greater effective trench width between the T structures, thereby improving the safe operating area (SOA) of the insulated gate turn-off thyristor. 8. The insulated gate turn-off thyristor according to claim 2, wherein said conductive material is heavily doped donor polysilicon. 9. The N- drift layer of claim 2, wherein the N- drift layer is a bulk substrate material, and the P + layer is implanted on the back side of the N- drift layer and has a thickness of less than 0.5 µm. Insulated gate turn-off thyristor. 10. The N-drift layer has a thickness of 600.
3. The insulated gate turn-off thyristor of claim 2, wherein said thyristor is sufficient to provide a blocking voltage to said device above volts. 11. An insulated gate turn-off thyristor (IGTO) having current saturation capability, comprising an insulated gate bipolar transistor (IGBT) structure, wherein the insulated gate bipolar transistor has an N + layer, and a P− drift on the N + layer. A first N- base region on the P- drift layer; a shallow N + region on the first N- base region for providing ohmic contact to the first N- base region. A first P + region on the first N- base region; and a first electrode contacting both the shallow N + region and the first N- base region to provide an anode connection for the device. And further comprising a thyristor structure,
The thyristor structure includes the N + layer, the P- drift layer on the N + layer, a second N- base region on the P- drift layer, and a second N- base region on the second N- base region. Separating a P + region and the second P + region from the anode connection;
A first oxide layer on the second P + region and further recessed in the P- drift layer between the P + and N- base regions of the IGBT structure and the P + and N- base regions of the thyristor structure. , An insulated gate arranged in a trench shape, wherein the insulated gate is the first P +
A second oxide layer in contact with a region, the first N- base region, the P- drift layer, the second N- base region, and the second P + region. A layer forming walls and a bottom surface of the trench, and further conducting a voltage applied to a top surface of the trench to the second oxide layer; a conductive material in the trench; contacting the conductive material; A second electrode that provides a gate connection for the device, and a third electrode that contacts the N + layer on the opposite side of the P- drift region to provide a cathode connection for the device. Are applied to the gate connections, respectively.
And a first and second inversion channel over the second N-base region and a storage channel over the P-drift layer between the inversion channels, wherein the inversion and storage channel are the first and second P + Providing a conduction path between the regions, if the voltage between the anode and cathode connections is sufficiently high, the first inversion channel allows the IGBT structure to turn on and the conduction path allows the thyristor structure to turn on Whereby current flows between the anode and cathode connections,
The resistance of the conduction path is increased, thereby turning off the thyristor structure, and if the gate electrode decreases or if the difference between the gate electrode and the voltage between the anode and cathode connections is small enough, the anode and cathode The current between the connections flows only through the IGBT structure,
An insulated gate turn-off thyristor, wherein a zero or positive gate voltage turns off the transistor structure and terminates device conduction. 12. The insulated gate turn-off thyristor of claim 11, wherein said conductive material is polysilicon heavily doped with acceptors. 13. An insulated gate turn-off thyristor (IGTO) having a current saturation capability, comprising: a P + layer; an N− drift layer on the P + layer; and a plurality of insulated gate bipolar transistors (IGB).
T) structure, wherein each of the IGBT structures is
A first P- base region on the drift layer; a shallow P + region on the first P- base region for providing ohmic contact to the first P- base region; A first N + region on a base region; and a first electrode contacting both the shallow P + region and the first P- base region to provide a cathode connection for the device; Are connected to each other to form a common cathode connection, and further include a plurality of thyristor structures, each of the thyristor structures including a second P-base region on the N-drift layer; A second N + region on a P- base region; and a first oxide layer on the second N + region separating the second N + region from the common cathode connection; IGBT structure and said compound Several thyristor structures penetrate each other into the N-drift layer and further comprise a plurality of insulated gates, each of the insulated gates
The N + and P− base regions of the IGBT structure and the N + and P− base regions of the IGBT structure, the N + and P− base regions of the IGBT structure, and the N + and P− base regions of the IGBT structure and the thyristor are arranged in a trench shape recessed in the N− drift layer. Isolated from the other of the N + and P- base regions of the structure, each of the insulated gates is a second oxide contacting the N + and P- base regions of the structure separated by the gate and the N- drift layer. A conductive material in the trench, the second oxide layer forming a wall and a bottom surface of the trench, and transmitting a voltage applied to a top surface of the trench to the second oxide layer. A second electrode that contacts the conductive material to provide a gate connection for the device, wherein each of the gate connections is connected to A third electrode that forms a gate connection and further contacts the P + layer opposite the N-drift region to provide an anode connection for the device, wherein a positive voltage is applied to the common gate connection. Forming an inversion channel over each of the first and second P- base regions and a storage channel over the N- drift layer between the inversion channels, wherein the inversion and storage channel is the first and second N + regions. , And if the voltage between the anode and the common cathode connection is high enough,
A GBT structure is turned on, and the conduction path allows the thyristor structure to be turned on, thereby causing current to flow between the anode and common cathode connection and increasing the resistance of the conduction path, thereby increasing the thyristor structure. Is off, and if the gate voltage decreases or if the difference between the gate voltage and the voltage between the anode and cathode connections is sufficiently small, the current between the anode and the common cathode flows only through the IGBT structure; An insulated gate turn-off thyristor, wherein a zero or negative gate voltage turns off the transistor structure and terminates device conduction. 14. The device according to claim 14, wherein the device is on a die and the P
14. The insulated gate turn-off thyristor of claim 13, wherein a + layer and said N- drift layer run the length and width of said die. 15. The IGBT structure and the thyristor structure are trench-shaped and extend the length of the die.
15. The insulated gate turn-off thyristor of claim 14, wherein the thyristor is regularly spaced across the width of the die. 16. The insulation of claim 13, wherein a portion of each said second P-base region reaches a device surface and is connected to said common cathode connection to enhance a safe operating area of said insulated gate turn-off thyristor. Gate turn-off thyristor. 17. The insulated gate turn-off thyristor of claim 13, wherein no portion of all of the second P-base regions reach the device surface or are not connected to the common cathode connection. 18. An insulated gate turn-off thyristor (I)
GTO), comprising a device base, the device base including a P + layer, an N- drift layer on the P + layer, and a first electrode contacting the P + layer and providing an anode of the device. Contacting the transistor and the thyristor structure, further comprising: a PNP transistor structure on the base, including the base layer; a thyristor structure on the base, including the base layer;
A second electrode providing a cathode of the device; and an insulated gate disposed in a trench shape recessed in the base between the transistor structure and the thyristor structure, wherein the walls of the insulated gate comprise the transistor structure and the thyristor. A conductive material in the trench that contacts the structure and further transmits a voltage applied to the top surface of the trench to the wall; and a third electrode that contacts the conductive material and provides a gate connection of the device. A positive voltage is applied to said gate connection to form an inverted N-channel, enabling said thyristor and said PNP transistor structure to be turned on when the voltage between said anode and cathode connections is high enough; Current flows through the thyristor and the PNP transistor structure to the anode and the capacitor. A negative voltage is applied to the gate connection to remove the N-channel and form an P-channel to diverge current from the thyristor structure to the transistor structure; An insulated gate turn-off thyristor, thereby turning off the thyristor and the PNP transistor structure to terminate device conduction. 19. An insulated gate turn-off thyristor (I)
GTO), comprising a PNP bipolar transistor structure, wherein the PNP bipolar transistor structure is P +
A N- drift layer on the P + layer; a first P- base region on the N- drift layer; and a first P- base region for providing ohmic contact to the first P- base region. A shallow P + region on the P- base region, further comprising a thyristor structure, wherein the thyristor structure comprises: the P + layer; the N- drift layer on the P + layer; A first electrode comprising: a P- base region; and an N + region on the second P- base region, further contacting the shallow P + region and the N + region to provide a cathode connection for the device. The shallow P + and P- base regions of the PNP transistor structure and the N + regions and P of the thyristor structure.
An insulating gate disposed in a torrent shape recessed in the N- drift layer between the base regions, wherein the insulating gate is the shallow P + region, the first P- base region,
The drift layer, the second P- base region and the N
A second oxide layer in contact with the positive region, a conductive material in the trench for transmitting a voltage applied to the top surface of the trench to the second oxide layer, the device in contact with the conductive material, A second electrode that provides a gate connection for the device, and a third electrode that contacts the P + layer opposite the N- drift region and provides an anode connection for the device. Applied to a gate connection to form an inverted N-channel across the second P-base region, thereby turning on the thyristor and the PNP transistor structure when the voltage across the anode and cathode connections is high enough; This allows current to flow between the anode and cathode connections through the thyristor and the PNP transistor structure, Forms an inverted P-channel applied to the gate connection across the N-drift region between the first and second P-base regions, and directs current from the second P-base region to the first P-base region. An insulated gate turn-off thyristor that branches to the P-base region of the thyristor structure and thereby turns off the thyristor structure and the PNP transistor structure to terminate device conduction. 20. A substantially horizontal bottom surface between first and second substantially vertical walls contacting the PNP transistor structure and the thyristor structure, respectively, and the vertical wall contacting the N-drift region. And contacting the horizontal bottom surface on the opposite side of the trench from the conductive material and straddling a corner formed at the junction of the vertical wall and the bottom surface, the device having the corner in the blocking mode. 20. The insulated gate turn-off thyristor of claim 19, including a shallow P region to protect the thyristor from high peak electric fields. 21. The insulated gate turn-off thyristor of claim 20, wherein said shallow P region has a thickness of less than 1 μm. 22. The insulated gate turn-off thyristor of claim 20, wherein said shallow P region is injected with a charge sufficient to prevent a peak electric field from reaching said second oxide layer. 23. The charge is at least 3 × 10 ¹² / c
It is m ^2, and insulated gate turn-off thyristor according to claim 22. 24. The insulated gate turn-off thyristor of claim 19, wherein said conductive material is polysilicon heavily doped with a donor. 25. The insulated gate turn-off thyristor includes a plurality of the PNP transistor structures, a plurality of the thyristor structures, and a plurality of the insulated gate structures penetrating into the N-drift layer. Are each pair of the PNP transistor structures, each pair of the thyristor structures, or
20. The insulated gate turn-off thyristor of claim 19, located between respective pairs of an NP transistor structure and said thyristor structure. 26. The N- drift layer is a bulk substrate material, the P + layer is implanted on the back of the N- drift layer and has a thickness of less than 0.5 μm.
20. The insulated gate turn-off thyristor according to claim 19. 27. The insulated gate turn-off thyristor according to claim 19, wherein the thickness of the N-drift layer is sufficient to provide a blocking voltage to the device at or above 600 volts. 28. An insulated gate turn-off thyristor (I)
GTO), comprising an NPN bipolar transistor structure, wherein the NPN bipolar transistor structure comprises: an N + layer; a P− drift layer on the N + layer; a first N− base region on the P− drift layer; A shallow N + region on the first N- base region for providing ohmic contact to the first N- base region, further comprising a thyristor structure, wherein the thyristor structure comprises the N + layer; The P- drift layer on the N + layer; a second N- base region on the P- drift layer; and a P + region on the second N- base region. A first electrode that contacts a P + region and provides an anode connection of the device; a shallow N + and N− base region of the NPN transistor structure; and a P electrode of the thyristor structure. And an insulated gate disposed in a trench shape in the P- drift layer between the N- base region and the N- base region, wherein the insulated gate is a shallow N + region, the first N- base region, the P- drift layer, A second oxide layer in contact with the second N- base region and the P + region; and a conductive material in the trench for transmitting a voltage applied to an upper surface of the trench to the second oxide layer. A second electrode contacting the conductive material and providing a gate connection of the device; and a third electrode contacting the N + layer opposite the P- drift region to provide a cathode connection of the device. An electrode, wherein a negative voltage is applied to the gate connection to form an inverted P-channel across the second N-base region, and a negative voltage is applied if the voltage across the anode and cathode connections is sufficiently high. Allowing the thyristor and the NPN transistor structure to be turned on, so that current can flow between the anode and cathode connections through the thyristor and the NPN transistor structure, and a positive voltage is applied to the gate connection Forming an inversion N-channel across the P-drift region between the first and second N-base regions, and passing current from the second N-base region to the first P-base region. An insulated gate turn-off thyristor, which turns off the thyristor and the NPN transistor structure, thereby terminating device conduction. 29. The insulated gate turn-off thyristor of claim 28, wherein said conductive material is polysilicon heavily doped with acceptors. 30. An insulated gate turn-off thyristor (I)
GTO), comprising: a P + layer; an N- drift layer on the P + layer; and a plurality of PNP transistor structures, each transistor structure including a first P- base region on the N- drift layer. And a shallow P + region on the first P- base region for providing ohmic contact to the first P- base region, further comprising a plurality of thyristor structures, each of the thyristor structures being a N-type thyristor structure. A device comprising: a second P- base region on the drift layer; and a second N + region on the second P- base region, further contacting the shallow P + region and the second N + region; A plurality of PNP transistor structures and a plurality of thyristor structures penetrate into the N-drift layer, and further include a plurality of insulated gates. Wherein each of the insulated gates is arranged in a trench shape recessed in the N- drift layer, and the shallow P + and P- base regions of the PNP transistor structure and the N + and P- base regions of the thyristor structure are connected to the PNP transistor. Separated from shallow P + and P- base regions and the other of the N + and P- base regions of the thyristor structure, each of the insulated gates has a shallow P +, N + and P- base of the structure from which the gate is separated. Region and the N
A conductive layer in the trench, comprising an oxide layer in contact with the drift layer, said oxide layer forming a wall and a bottom surface of said trench, and further transmitting a voltage applied to a top surface of said trench to said oxide layer; A second electrode in contact with the conductive material and providing a gate connection for the device, wherein each of the gate connections is connected to each other to form a common gate connection, and further opposite the N-drift region. A third electrode contacting the P + layer on the side and providing an anode connection of the device, wherein a positive voltage is applied to the common gate connection and the second P
Forming an inverted N-channel across each of the base regions, allowing the thyristor and the PNP transistor structure to be turned on when the voltage of the anode and common cathode connection is sufficiently high, whereby the thyristor and A current can flow between the anode and the common cathode connection via the PNP transistor structure, and a negative voltage is applied to the common gate connection between the respective ones of the first and second P-base regions. P over the N-drift region of
An insulated gate forming a channel and branching current from the second P-base region to the first P-base region, thereby turning off the thyristor and the PNP transistor structure and terminating device conduction; Turn-off thyristor. 31. The device according to claim 31, wherein the device is on a die and the P
31. The insulated gate turn-off thyristor of claim 30, wherein a + layer and an N- drift layer run the length and width of the die. 32. The insulated gate turn-off of claim 31, wherein the PNP transistor structure and the thyristor structure are trench-shaped and are regularly spaced across the length of the die and across the width of the die. Thyristor. 33. The insulation of claim 30, wherein a portion of each said second P-base region reaches a device surface and is connected to said common cathode connection to enhance a safe operating area of said insulated gate turn-off thyristor. Gate turn-off thyristor. 34. The insulated gate turn-off thyristor of claim 30, wherein no portion of all of the second P-base regions reach the device surface or are not connected to the common cathode connection.