JP2018129762A - Switch control apparatus, switch changeover method, and computer program - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a switch control apparatus, a switch changeover method and a computer program which can open both terminals of all semiconductor switches including a semiconductor switch in which a failure occurs.SOLUTION: N (n: integer of 2 or more) semiconductor switches K1, K2, ..., Kn are connected in parallel. In a case where a failure is detected in at least one of the n semiconductor switches K1, K2, ..., Kn, a drive circuit 40 included in a switch control device 12 turns on the n semiconductor switches K 1, K 2, ..., Kn. Thereafter, when a predetermined condition is satisfied, the drive circuit 40 performs an OFF operation of turning off the n semiconductor switches K1, K2, ..., Kn.SELECTED DRAWING: Figure 1

Description

  The present invention relates to a switch control device, a switch switching method, and a computer program.

  As a power supply system mounted on a vehicle, there is a power supply system in which an FET (Field Effect Transistor) functioning as a semiconductor switch is arranged on a power supply path from a battery to a load (see, for example, Patent Document 1). In this power supply system, current flows from the battery to the load via the drain terminal and the source terminal of the FET.

  The FET driver adjusts the resistance value between the drain terminal and the source terminal of the FET by adjusting the voltage of the gate terminal of the FET. The FET driver adjusts the voltage of the gate terminal of the FET so that the FET is turned on, that is, the resistance value between the drain terminal and the source terminal of the FET becomes a sufficiently small value. When the FET is on, current flows from the battery to the load via the drain terminal and the source terminal of the FET, and power is supplied to the load.

  The FET driver adjusts the voltage at the gate terminal of the FET so that the FET is turned off, that is, the resistance value between the drain terminal and the source terminal of the FET becomes a sufficiently large value. When the FET is off, no current flows from the battery to the load via the drain terminal and the source terminal of the FET, and no power is supplied to the load.

JP 2006-163051 A

  A failure that occurs in the FET is a half-on failure. For the half-on failure, even if the on operation for turning on the FET is performed, the resistance value between the drain terminal and the source terminal of the FET is not sufficiently small, and the off operation for turning off the FET is performed. However, this is a phenomenon in which the resistance value between the drain terminal and the source terminal of the FET does not become a sufficiently large value. In an FET in which a half-on failure has occurred, the resistance value between the drain terminal and the source terminal is not a sufficiently large value, so that a current flows through the drain terminal and the source terminal.

  The amount of heat generated from the FET when a current flows through the FET increases as the resistance value between the drain terminal and the source terminal of the FET increases. As described above, the resistance value between the drain terminal and the source terminal of the FET in which the half-on failure has occurred is not a sufficiently small value. For this reason, when a current flows through an FET in which a half-on failure has occurred, the amount of heat generated from the FET is large, and the temperature of the FET rises rapidly. When the temperature of the FET is high, an element disposed around the FET is overheated, and the performance of the element may be deteriorated.

  A power supply system in which a plurality of FETs are connected in parallel is conceivable as a power supply system that prevents a temperature rise of the FET in which a half-on failure has occurred. In this power supply system, when a half-on failure is detected for at least one of the plurality of FETs, a normal FET among the plurality of FETs is switched on, and the normal FET is kept on. As a result, almost all of the current flowing from the battery to the load passes through the normal FET, so that no current flows through the FET where the half-on failure has occurred, and the temperature rise of the FET is prevented.

  However, in the case where the normal FET is kept on, when the temperature of the plurality of FETs continues to rise due to various causes, the elements arranged around the plurality of FETs may be overheated. As described above, when the element is overheated, the performance of the element is degraded. For this reason, it is necessary to open the drain and source terminals of all FETs before the element is overheated.

  In addition, when a normal FET is kept on, an overcurrent may flow through the plurality of FETs due to various causes, and the load may fail. In order to prevent a load failure, it is necessary to open the drain terminals and source terminals of all FETs before an overcurrent flows through the plurality of FETs.

  The present invention has been made in view of such circumstances, and an object of the present invention is to provide a switch control device capable of opening both terminals of all semiconductor switches including a semiconductor switch in which a failure has occurred, To provide a switch switching method and a computer program.

  A switch control device according to an aspect of the present invention performs an on operation for switching on a plurality of semiconductor switches when a failure is detected in at least one of the plurality of semiconductor switches connected in parallel. A first switching unit; and a second switching unit that performs an off operation for switching off the plurality of semiconductor switches after the first switching unit performs the on operation.

  The switch switching method according to an aspect of the present invention performs an on operation for switching on the plurality of semiconductor switches when a failure is detected in at least one of the plurality of semiconductor switches connected in parallel. And a step of performing an off operation for switching off the plurality of semiconductor switches after the on operation is performed.

  The computer program according to an aspect of the present invention performs an on operation for switching on the plurality of semiconductor switches when a failure is detected in at least one of the plurality of semiconductor switches connected in parallel. Instructing the computer to execute an instructing step and an instruction to perform an off operation for switching off the plurality of semiconductor switches after instructing to perform the on operation.

  The present invention can be realized not only as a switch control device including such a characteristic processing unit, but also as a switch switching method using such characteristic processing as a step, It can be realized as a computer program for execution. Further, the present invention can be realized as a semiconductor integrated circuit that realizes part or all of the switch control device, or as a switch control system including the switch control device.

  According to the above aspect, both terminals of all the semiconductor switches including the semiconductor switch in which the failure has occurred can be opened.

1 is a block diagram illustrating a main configuration of a power supply system according to Embodiment 1. FIG. It is explanatory drawing of installation of a semiconductor switch. It is sectional drawing of a semiconductor switch. It is a flowchart which shows the procedure of a switching process. It is a flowchart which shows the procedure of a switching process. It is explanatory drawing of the effect of a switch control apparatus. It is a block diagram which shows the principal part structure of the power supply system in Embodiment 2. FIG. It is a flowchart which shows the procedure of a switching process. It is a flowchart which shows the procedure of a switching process. It is explanatory drawing of the effect of a switch control apparatus.

[Description of Embodiment of the Present Invention]
First, embodiments of the present invention will be listed and described. You may combine arbitrarily at least one part of embodiment described below.

(1) A switch control device according to an aspect of the present invention provides an on-state for switching on a plurality of semiconductor switches when a failure is detected in at least one of the plurality of semiconductor switches connected in parallel. A first switching unit that performs an operation; and a second switching unit that performs an off operation to switch off the plurality of semiconductor switches after the first switching unit performs the on operation.

(2) In the switch control device according to an aspect of the present invention, the first switching unit performs the ON operation when a switch temperature that rises with the temperature of the plurality of semiconductor switches becomes equal to or higher than a predetermined temperature.

(3) In the switch control device according to one aspect of the present invention, the first switching unit has a current that flows through the plurality of semiconductor switches equal to or higher than a reference current, even though the OFF operation is performed. In some cases, the ON operation is performed.

(4) In the switch control device according to an aspect of the present invention, the second switching unit has a switch temperature that rises with a temperature of the plurality of semiconductor switches after the first switching unit performs the ON operation. The off operation is performed when the temperature becomes equal to or higher than the threshold temperature.

(5) In the switch control device according to an aspect of the present invention, the second switching unit is configured such that a current flowing through the plurality of semiconductor switches after the first switching unit performs the ON operation is a threshold current. The off operation is performed when the above is reached.

(6) In the switch control device according to an aspect of the present invention, each of the plurality of semiconductor switches includes a terminal, a semiconductor switch body, and a wire connecting the terminal and the semiconductor switch main end. In each of the semiconductor switches, a current flows through the semiconductor switch body, wires and terminals.

(7) According to one aspect of the present invention, there is provided a switch switching method for turning on a plurality of semiconductor switches when a failure is detected in at least one of the plurality of semiconductor switches connected in parallel. And a step of performing an off operation for switching off the plurality of semiconductor switches after the on operation is performed.

(8) A computer program according to an aspect of the present invention provides an on operation for turning on the plurality of semiconductor switches when a failure is detected in at least one of the plurality of semiconductor switches connected in parallel. And instructing the computer to execute an off operation for switching off the plurality of semiconductor switches after instructing to perform the on operation.

  In the switch control device, the switch switching method, and the computer program according to the above aspect, for example, when a half-on failure is detected for at least one of the plurality of semiconductor switches, the plurality of semiconductor switches are switched on. For the on operation. As a result, a normal semiconductor switch is switched on, so that the temperature rise of the semiconductor switch in which a failure has occurred is prevented, and current is supplied through the plurality of semiconductor switches.

  When it is determined that the current supply through the plurality of semiconductor switches should be stopped after the on operation is performed, an off operation for switching the plurality of semiconductor switches off is performed. As a result, a normal semiconductor switch is switched off, so that a large current flows through the semiconductor switch in which the failure has occurred, a disconnection has occurred in the semiconductor switch in which the failure has occurred, and the semiconductor in which the failure has occurred Both terminals of the switch are opened. A normal semiconductor switch is off. As a result, both terminals of all semiconductor switches including the semiconductor switch in which the failure has occurred are opened.

  In the switch control device according to the above aspect, when the switch temperature is equal to or higher than a predetermined temperature, the switch controller is turned on when a failure is detected in at least one of the plurality of semiconductor switches. The switch temperature is a temperature that increases as the temperature of the plurality of semiconductor switches increases.

  In the switch control device according to the above aspect, when the current flowing through the plurality of semiconductor switches is equal to or higher than the reference current even though the off operation for switching off the plurality of semiconductor switches is performed. When a failure is detected in at least one of the plurality of semiconductor switches, the on operation is performed.

  In the switch control device according to the above aspect, when the switch temperature is equal to or higher than the threshold temperature after performing the ON operation, the current supply through the plurality of semiconductor switches should be stopped. Turn off. As a result, both terminals of the plurality of semiconductor switches including the semiconductor switch in which the failure has occurred are opened, and the temperature of the entire plurality of semiconductor switches decreases.

  In the switch control device according to the above aspect, if the current flowing through the plurality of semiconductor switches is equal to or higher than the threshold current after the on operation is performed, the current supply through the plurality of semiconductor switches is stopped. It should be turned off. As a result, both terminals of the plurality of semiconductor switches including the semiconductor switch in which the failure has occurred are opened, and the current supply through the plurality of semiconductor switches is stopped.

  In the switch control device according to the above aspect, in each of the plurality of semiconductor switches, the terminal and the semiconductor switch body are connected by a wire. Since the wire is thin, the resistance value of the wire is large. For this reason, it is easy to break the wire by passing a current through the wire to raise the temperature of the wire. As a result, it is possible to easily open both terminals of a plurality of semiconductor switches including a semiconductor switch in which a failure has occurred.

[Details of the embodiment of the present invention]
A specific example of the switch control device according to the embodiment of the present invention will be described below with reference to the drawings. In addition, this invention is not limited to these illustrations, is shown by the claim, and intends that all the changes within the meaning and range equivalent to a claim are included.

(Embodiment 1)
FIG. 1 is a block diagram illustrating a main configuration of a power supply system 1 according to the first embodiment. The power supply system 1 is preferably mounted on a vehicle, and includes a battery 10, a load 11, a switch control device 12, a temperature detection unit 13, and n (n: an integer of 2 or more) semiconductor switches K1, K2,. , Kn. Each of the semiconductor switches K1, K2,..., Kn is an N-channel FET, and includes a semiconductor switch body 20, a drain terminal 21, a source terminal 22, and a gate terminal 23. In each of the semiconductor switches K1, K2,..., Kn, the drain terminal 21, the source terminal 22, and the gate terminal 23 are connected to the semiconductor switch body 20.

  The n semiconductor switches K1, K2,..., Kn are connected in parallel. For each of the semiconductor switches K1, K2,..., Kn, the drain terminal 21 is connected to the positive electrode of the battery 10, and the source terminal 22 is connected to one end of the load 11. The negative electrode of the battery 10 and the other end of the load 11 are grounded. The gate terminals 23 of the n semiconductor switches K1, K2,..., Kn are connected to the gate terminals 23 of other semiconductor switches and to the switch control device 12. The switch control device 12 is connected to a temperature detection unit 13 and an external device 30.

  In addition, the parallel which concerns on n semiconductor switch K1, K2, ..., Kn does not mean exact parallel, but means substantial parallel. Therefore, for example, in a state where the series circuit of the semiconductor switch K1 and the resistor is connected between the drain terminal 21 and the source terminal 22 of another semiconductor switch, the n semiconductor switches K1, K2,. It is in a state of being connected in parallel.

  For each of the semiconductor switches K1, K2,..., Kn, when the voltage of the gate terminal 23 with respect to the potential of the source terminal 22 is equal to or higher than a certain voltage, the resistance value between the drain terminal 21 and the source terminal 22 is sufficiently high. A small current flows through the drain terminal 21 and the source terminal 22. At this time, the semiconductor switches K1, K2,..., Kn are each turned on.

  For each of the semiconductor switches K1, K2,..., Kn, when the voltage of the gate terminal 23 with respect to the potential of the source terminal 22 is less than a certain voltage, the resistance value between the drain terminal 21 and the source terminal 22 is sufficiently high. The current does not flow through the drain terminal 21 and the source terminal 22. At this time, each of the semiconductor switches K1, K2,..., Kn is off.

  The switch control device 12 performs an on operation for switching on the n semiconductor switches K1, K2,. The ON operation is an operation of increasing the gate voltage, which is the voltage of the gate terminal 23 with respect to the ground potential, for each of the semiconductor switches K1, K2,. As a result, for each of the semiconductor switches K1, K2,..., Kn, the voltage of the gate terminal 23 with respect to the potential of the source terminal 22 increases, and the resistance value between the drain terminal 21 and the source terminal 22 is sufficiently large. Become.

  The switch control device 12 performs an off operation for switching off the n semiconductor switches K1, K2,..., Kn. The off operation is an operation of lowering the gate voltage for each of the semiconductor switches K1, K2,. As a result, for each of the semiconductor switches K1, K2,..., Kn, the voltage of the gate terminal 23 increases with respect to the potential of the source terminal 22, and the resistance value between the drain terminal 21 and the source terminal 22 is sufficiently small. Become.

  When the switch control device 12 is turned on, normal semiconductor switches among the n semiconductor switches K1, K2,..., Kn are turned on substantially simultaneously. Similarly, when the switch control device 12 performs an off operation, normal semiconductor switches among n semiconductor switches K1, K2,..., Kn are turned off substantially simultaneously.

The temperature detector 13 detects the switch temperature. The switch temperature is a temperature around n semiconductor switches K1, K2,. The temperature detection unit 13 outputs temperature information indicating the detected switch temperature to the switch control device 12.
The external device 30 also instructs the switch control device 12 to turn on the n semiconductor switches K1, K2,..., Kn, and the n semiconductor switches K1, K2,. And an off signal for instructing to turn off.

  The switch control device 12 performs an on operation or an off operation based on the signal input from the external device 30 and the switch temperature indicated by the temperature information input from the temperature detection unit 13.

  When n semiconductor switches K1, K2,..., Kn are switched on, current flows from the battery 10 to the load 11 via the n semiconductor switches K1, K2,. The power is supplied to the load 11. When the n semiconductor switches K1, K2,..., Kn are turned off, the current supply through the n semiconductor switches K1, K2,. The power supply to is stopped.

  A half-on failure may occur in each of the n semiconductor switches K1, K2,. In the half-on failure, although the ON operation is performed, the resistance value between the drain terminal 21 and the source terminal 22 does not decrease to a sufficiently small value, and the OFF operation is performed. This is a phenomenon in which the resistance value between the drain terminal 21 and the source terminal 22 does not increase to a sufficiently large value.

  When a half-on failure occurs in at least one of the n semiconductor switches K1, K2,..., Kn, the resistance value between the drain terminal 21 and the source terminal 22 of the semiconductor switch in which the half-on failure occurs. Is not a sufficiently large value, the current supply from the battery 10 to the load 11 cannot be stopped. Therefore, when all of the normal semiconductor switches among the n semiconductor switches K1, K2,..., Kn are off, a current flows through the semiconductor switch in which the half-on failure has occurred.

  At this time, since the resistance value between the drain terminal 21 and the source terminal 22 of the semiconductor switch in which the half-on failure has occurred is not a sufficiently small value, it is generated in a unit time from the semiconductor switch in which the half-on failure has occurred. The amount of heat to be generated is large, and the temperature of the semiconductor switch in which the half-on failure has occurred rapidly rises. As a result, the switch temperature also rises rapidly.

  FIG. 2 is an explanatory diagram of the installation of the semiconductor switches K1, K2, and K3. FIG. 2 shows an example where n is 3. Hereinafter, the installation of the three semiconductor switches K1, K2, and K3 will be described. The power supply system 1 further includes two conductive plates 14 and 15 and a circuit board 16. Each of the conductive plates 14 and 15 is a so-called bus bar.

  The direction perpendicular to the plate surface of the conductive plate 14 is substantially the same as the direction perpendicular to the plate surface of the conductive plate 15. The end face of the conductive plate 14 is opposed to the end face of the conductive plate 15 with a certain interval. A common circuit board 16 is disposed on the plate surfaces of the conductive plates 14 and 15. In the circuit board 16, a through hole 16a is provided at a location corresponding to a portion where the end faces of the conductive plates 14 and 15 face each other, and three semiconductor switches K1, K2, and K3 are provided in the through hole 16a. is set up.

  For each of the semiconductor switches K1, K2, and K3, the drain terminal 21, the source terminal 22, and the gate terminal 23 each have a plate shape, the drain terminal 21 is connected to the conductive plate 14, and the source terminal 22 is connected to the conductive plate 15. Yes. Therefore, for each of the semiconductor switches K1, K2, and K3, the drain terminal 21 is connected to the positive electrode of the battery 10 via the conductive plate 14, and the source terminal 22 is connected to one end of the load 11 via the conductive plate 15. Has been. The gate terminals 23 of the semiconductor switches K1, K2, and K3 are connected to the circuit board 16. For each of the semiconductor switches K1, K2, and K3, the circuit board 16 is disposed between the gate terminal 23 and the conductive plate 15, and no current flows between the gate terminal 23 and the conductive plate 15.

  When n is 2 or 4 or more, n semiconductor switches K1, K2,..., Kn are installed in the same manner as in the case where n is 3. That is, for each of the n semiconductor switches K1, K2,..., Kn, the drain terminal 21 is connected to the conductive plate 14, the source terminal 22 is connected to the conductive plate 15, and the gate terminal 23 is connected to the circuit board 16. Is done.

  The temperature detection unit 13 is installed on the circuit board 16. As described above, the temperature detector 13 detects the switch temperature. The switch temperature rises by heat conducted from the n semiconductor switches K1, K2,..., Kn to the temperature detection unit 13 through the air, and further, the n semiconductor switches K1, K2,. , Kn from the conductive plates 14, 15 and the circuit board 16, the temperature rises due to the heat conducted to the temperature detection unit 13. Therefore, the switch temperature rises with the temperature of the entire n semiconductor switches K1, K2,.

  Elements that are not shown are arranged on the circuit board 16. The temperature of the element rises by heat conducted from the n semiconductor switches K1, K2,..., Kn to the element through the air, and from the n semiconductor switches K1, K2,. The temperature rises due to heat conducted to the element through one of the conductive plates 14 and 15 and the circuit board 16. Accordingly, the temperature of the elements arranged on the circuit board 16 increases with the temperature of the entire n semiconductor switches K1, K2,. When the temperature of the element rises and the element is overheated, the element performance may be deteriorated.

  FIG. 3 is a cross-sectional view of the semiconductor switch K1. One plate surface of the drain terminal 21 is connected to the conductive plate 14 by solder (not shown). The other plate surface of the drain terminal 21 is connected to one plate surface of the semiconductor switch body 20 having a plate shape by solder (not shown).

  The semiconductor switch K1 further includes a wire 24 and a resin 25. The wire 24 connects the other plate surface of the semiconductor switch body 20 and the source terminal 22. As described above, the source terminal 22 is further connected to the conductive plate 15. The semiconductor switch body 20, a part of the drain terminal 21, a part of the source terminal 22, and the wire 24 are covered with a resin 25. With respect to the semiconductor switch K1, the current flows in the order of the conductive plate 14, the drain terminal 21, the semiconductor switch body 20, the wire 24, the source terminal 22, and the conductive plate 15.

  In the semiconductor switch K1, when the wire 24 is disconnected, the drain terminal 21 and the source terminal 22 are opened. Since the wire 24 is thin, the resistance value of the wire 24 is large. For this reason, it is easy to cause a current to flow through the wire 24 to raise the temperature of the wire 24 and disconnect the wire 24. Therefore, the drain terminal 21 and the source terminal 22 of the semiconductor switch K1 can be easily opened.

  Each of the semiconductor switches K2, K3,..., Kn is configured in the same manner as the semiconductor switch K1. Therefore, each of the semiconductor switches K2, K3,..., Kn further includes the wire 24 and the resin 25, and has the same effect as the semiconductor switch K1.

  As shown in FIG. 1, the switch control device 12 includes a drive circuit 40 and a microcomputer (hereinafter referred to as a microcomputer) 41. The microcomputer 41 includes a control unit 50, a storage unit 51, input units 52 and 53, and an output unit 54. These are connected to the bus 55 separately. The input unit 52 is further connected to the temperature detection unit 13. The input unit 53 is further connected to the external device 30. The output unit 54 is further connected to an input terminal of the drive circuit 40. The output terminal of the drive circuit 40 is connected to the gate terminals 23 of the n semiconductor switches K1, K2,.

Temperature information is input from the temperature detection unit 13 to the input unit 52. The control unit 50 acquires temperature information from the input unit 52. The switch temperature indicated by the temperature information acquired by the control unit 50 from the input unit 52 substantially matches the switch temperature detected by the temperature detection unit 13 at the time of acquisition.
An ON signal and an OFF signal are input from the external device 30 to the input unit 53. When the on signal or the off signal is input, the input unit 53 notifies the control unit 50 of the input signal.

The output unit 54 outputs a high level voltage or a low level voltage to the drive circuit 40. The control unit 50 instructs the output unit 54 to switch on or off the semiconductor switches K1, K2,.
When the control unit 50 instructs the output unit 54 to switch on, the output unit 54 switches the output voltage output to the drive circuit 40 to a high level voltage. When the output voltage of the output unit 54 is switched from the low level voltage to the high level voltage, the drive circuit 40 performs an on operation for turning on the n semiconductor switches K1, K2,. As described above, the ON operation is an operation of increasing the gate voltages of the n semiconductor switches K1, K2,.

  When the control unit 50 instructs the output unit 54 to switch off, the output unit 54 switches the output voltage to a low level voltage. When the output voltage of the output unit 54 is switched from the high level voltage to the low level voltage, the drive circuit 40 performs an off operation for turning off the n semiconductor switches K1, K2,. As described above, the off operation is an operation of lowering the gate voltages of the n semiconductor switches K1, K2,.

  The storage unit 51 is, for example, a nonvolatile memory. The storage unit 51 stores a computer program P1. The control unit 50 has a CPU (Central Processing Unit) (not shown). The CPU of the control unit 50 executes a computer program P1 to execute a switching process for switching the n semiconductor switches K1, K2,. The computer program P1 is used for causing the CPU to execute the switching process.

  The computer program P1 may be stored in the storage medium A1 so that the computer can read it. In this case, the computer program P1 read from the storage medium A1 by a reading device (not shown) is stored in the storage unit 51. The storage medium A1 is an optical disk, a flexible disk, a magnetic disk, a magnetic optical disk, a semiconductor memory, or the like. The optical disc is a CD (Compact Disc) -ROM (Read Only Memory), a DVD (Digital Versatile Disc) -ROM, or a BD (Blu-ray (registered trademark) Disc). The magnetic disk is, for example, a hard disk. Alternatively, the computer program P1 may be downloaded from an external device (not shown) connected to a communication network (not shown), and the downloaded computer program P1 may be stored in the storage unit 51.

  In addition to the computer program P1, the storage unit 51 stores flag values. The value of the flag is zero, 1 or 2. A flag value of zero means that the operations of the n semiconductor switches K1, K2,..., Kn are normal. A flag value of 1 means that a half-on failure has occurred in at least one of the n semiconductor switches K1, K2,. A flag value of 2 means that the drain terminal 21 and the source terminal 22 of the semiconductor switch in which the half-on failure has occurred are opened. The value of the flag is changed by the control unit 50.

  4 and 5 are flowcharts showing the procedure of the switching process. The control unit 50 periodically performs the switching process. First, the control unit 50 determines whether or not the flag value is zero (step S1). When determining that the value of the flag is zero (S1: YES), the controller 50 determines whether or not an ON signal is input from the external device 30 to the input unit 53 (step S2). When it is determined that the ON signal is input (S2: YES), the control unit 50 instructs the output unit 54 to turn on the n semiconductor switches K1, K2,..., Kn (step S3). .

  As a result, the output unit 54 switches the output voltage to the high level voltage, and the drive circuit 40 performs the on operation. Thereby, normal semiconductor switches in the semiconductor switches K1, K2,..., Kn are switched on. As a result, current flows from the positive electrode of the battery 10 to the load 11 via the n semiconductor switches K1, K2,..., Kn, and power is supplied to the load 11.

  When it is determined that the ON signal is not input (S2: NO), the control unit 50 determines whether an OFF signal is input from the external device 30 to the input unit 53 (step S4). When it is determined that the off signal is input (S4: YES), the control unit 50 instructs the output unit 54 to switch off the n semiconductor switches K1, K2,..., Kn (step S5). .

  As a result, the output unit 54 switches the output voltage to the low level voltage, and the drive circuit 40 performs the off operation. Thereby, normal semiconductor switches in the semiconductor switches K1, K2,..., Kn are switched off. When the n semiconductor switches K1, K2,..., Kn are normal semiconductor switches, the n semiconductor switches K1, K2,. , K2,..., Kn are stopped, and power supply to the load 11 is stopped.

  When a half-on failure has occurred in at least one of the n semiconductor switches K1, K2,..., Kn, the control unit 50 executes step S5, whereby the n semiconductor switches K1, K2 are executed. ,..., Kn, the semiconductor switches other than the semiconductor switch in which the half-on failure has occurred are turned off. Therefore, the current continues to flow from the battery 10 to the load 11 via the semiconductor switch in which the half-on failure has occurred, and the temperature of the semiconductor switch in which the half-on failure has occurred rapidly increases.

  After executing one of steps S3 and S5 or when it is determined that the off signal is not input (S4: NO), the control unit 50 outputs the output voltage output from the output unit 54 as a low level voltage. It is determined whether or not there is (step S6). When it is determined that the output voltage is a low level voltage (S6: YES), the control unit 50 acquires temperature information from the input unit 52 (step S7), and n based on the switch temperature indicated by the acquired temperature information. It is determined whether or not a half-on failure has occurred in at least one of the semiconductor switches K1, K2,..., Kn (step S8).

  When the output voltage is a low level voltage, that is, when all normal semiconductor switches among the n semiconductor switches K1, K2,... A current flows through the switch, and the temperature of the semiconductor switch in which the half-on failure has occurred rapidly rises. As a result, the switch temperature also rises rapidly. In step S8, the control unit 50 determines that a half-on failure has occurred when the switch temperature is equal to or higher than the reference temperature. If the switch temperature is lower than the reference temperature, the half-on failure has not occurred. judge. The reference temperature is a constant value and is set in advance.

  When it is determined that a half-on failure has occurred, that is, when the controller 50 detects a half-on failure for at least one of the n semiconductor switches K1, K2,..., Kn (S8: YES), the output unit 54 is instructed to turn on the n semiconductor switches K1, K2,..., Kn (step S9).

  As a result, the output unit 54 switches the output voltage to the high level voltage, and the drive circuit 40 performs the on operation. Thereby, a normal semiconductor switch is turned on among the n semiconductor switches K1, K2,..., Kn. The instruction to switch on that is performed by the control unit 50 in step S9 corresponds to an instruction to execute the on operation to the drive circuit 40, and the drive circuit 40 functions as a first switching unit.

  After executing Step S9, the control unit 50 changes the value of the flag from zero to 1 (Step S10). When the control unit 50 determines that the output voltage is not a low level voltage (S6: NO), when it is determined that a half-on failure has not occurred (S8: NO), or after executing Step S10, The switching process ends.

  When it is determined that the flag value is not zero (S1: NO), the control unit 50 determines whether or not the flag value is 1 (step S11). When determining that the value of the flag is 1 (S11: YES), the control unit 50 acquires temperature information from the input unit 52 (step S12), and the switch temperature indicated by the acquired temperature information is equal to or higher than the threshold temperature. Whether or not (step S13). The threshold temperature is also a constant value and is set in advance. The threshold temperature is higher than the reference temperature.

  When the controller 50 determines that the switch temperature is equal to or higher than the threshold temperature (S13: YES), the controller 50 is arranged on the circuit board 16 by heat conducted from the n semiconductor switches K1, K2,. Since there is a possibility that the element is overheated, the output unit 54 is instructed to switch off the n semiconductor switches K1, K2,..., Kn (step S14).

  As a result, the output unit 54 switches the output voltage to the low level voltage, and the drive circuit 40 performs the off operation. In steps S13 and S14, when the value of the flag is 1, that is, a half-on failure is detected in at least one of the n semiconductor switches K1, K2,. It is executed after the on operation is performed.

  The instruction for switching to OFF performed by the control unit 50 in step S14 corresponds to an instruction for executing the OFF operation to the drive circuit 40, and the drive circuit 40 also functions as a second switching unit.

  When the drive circuit 40 performs an off operation by executing step S14 by the control unit 50, a normal semiconductor switch is switched off. Therefore, in the semiconductor switch in which the half-on failure occurs, the wire 24 is not connected. A large current flows, the wire 24 is disconnected, and the drain terminal 21 and the source terminal 22 are opened. When the drain terminal 21 and the source terminal 22 of the semiconductor switch in which the half-on failure has occurred are opened, normal semiconductor switches are kept off, so that n semiconductor switches K1, K2,. Current does not flow through Kn, and power supply from the battery 10 to the load 11 is stopped.

  After executing Step S14, the control unit 50 changes the flag value to 2 (Step S15). When the controller 50 determines that the value of the flag is not 1 (S11: NO), when it is determined that the switch temperature is lower than the threshold temperature (S13: NO), or after executing Step S15, the controller 50 performs switching. The process ends.

  As described above, the flag value is changed to 2 while the normal semiconductor switch is OFF. Further, in the switching process, when the flag value is 2, the n semiconductor switches K1, K2,..., Kn are not switched on. Therefore, no current flows through the n semiconductor switches K1, K2,..., Kn after step S15 is executed.

FIG. 6 is an explanatory diagram of the effect of the switch control device 12. FIG. 6 shows the transition of the switch temperature and the transition of the output voltage output from the output unit 54. In FIG. 6, “H” indicates a high level voltage, and “L” indicates a low level voltage. The horizontal axis of each transition shows time.
In FIG. 6, the reference temperature is described as Tr and the threshold temperature is described as Tth. Tc is a disconnection temperature at which disconnection occurs in a semiconductor switch in which a half-on failure occurs when an off operation is performed. Td is an overheating temperature at which the elements arranged on the circuit board 16 are overheated.

  When n semiconductor switches K1, K2,..., Kn are normal semiconductor switches, when the output unit 54 outputs a high level voltage to the drive circuit 40, the n semiconductor switches K1, K2 are output. ,..., Kn are on, and a current flows through the n semiconductor switches K1, K2,. Usually, in the n semiconductor switches K1, K2,..., Kn, the heat dissipation amount and the heat generation amount per unit time are substantially the same, so that the switch temperature is stable at a temperature lower than the reference temperature Tr. .

  Assume that a half-on failure has occurred in at least one of the n semiconductor switches K1, K2,..., Kn while the n semiconductor switches K1, K2,. . At this time, since the resistance values of the drain terminal 21 and the source terminal 22 of the semiconductor switch in which the half-on failure has occurred are larger than the resistance values of the drain terminal 21 and the source terminal 22 of the normal semiconductor switch, they are supplied to the load 11. Almost all of the current that flows through the normal semiconductor switch. Accordingly, since the current flowing through the drain terminal 21 and the source terminal 22 of the semiconductor switch in which the half-on failure has occurred is substantially zero A, the temperature of the semiconductor switch in which the half-on failure has occurred almost increases. There is no.

  However, when a half-on failure occurs in at least one of the n semiconductor switches K1, K2,..., Kn connected in parallel, the number of normal semiconductor switches is reduced. The combined resistance of the semiconductor switches K1, K2,. Accordingly, the amount of heat generated by the n semiconductor switches K1, K2,..., Kn increases, and the switch temperature rises. Current supply is continued through the n semiconductor switches K1, K2,.

  In the state in which the semiconductor switch in which the half-on failure has occurred is included in the n semiconductor switches K1, K2,..., Kn, the external device 30 outputs an off signal and the output unit 54 outputs the output voltage. Is switched to a low level voltage, the drive circuit 40 performs an off operation. As a result, a normal semiconductor switch is switched off, so that current flows from the battery 10 to the load 11 via the semiconductor switch in which the half-on failure has occurred. As a result, the temperature of the semiconductor switch in which the half-on failure has occurred rises rapidly, and the switch temperature also rises rapidly as the temperature rises.

  When the switch temperature becomes equal to or higher than the reference temperature Tr, the control unit 50 detects a half-on failure and instructs the output unit 54 to turn on the n semiconductor switches K1, K2,. , Change the value of the flag from zero to one. When the control unit 50 instructs the output unit 54 to turn on the n semiconductor switches K1, K2,..., Kn, the output unit 54 switches the output voltage from the low level voltage to the high level voltage, The drive circuit 40 performs an on operation. When the drive circuit 40 performs an on operation, a normal semiconductor switch is switched on among the n semiconductor switches K1, K2,..., Kn. The flowing current becomes approximately zero A again. As a result, the temperature rise of the semiconductor switch in which the half-on failure has occurred is prevented, and current is supplied through the n semiconductor switches K1, K2,.

  Thereafter, it is assumed that the heat generation amount per unit time exceeds the heat release amount per unit time in the n semiconductor switches K1, K2,. In this case, the switch temperature rises with time. When the switch temperature becomes equal to or higher than the threshold temperature Tth after the switch temperature becomes equal to or higher than the reference temperature Tr and the drive circuit 40 performs the ON operation, the control unit 50 includes n semiconductor switches K1, K2,..., Kn are instructed to be turned off, and the flag value is changed from 1 to 2. When the control unit 50 instructs the output unit 54 to switch off the n semiconductor switches K1, K2,..., Kn, the output unit 54 switches the output voltage from the high level voltage to the low level voltage, The drive circuit 40 performs an off operation.

  When the drive circuit 40 performs an off operation, a normal semiconductor switch is switched off, so that a large current flows through the semiconductor switch in which a half-on failure has occurred. Thereby, in the semiconductor switch in which the half-on failure has occurred, the wire 24 is disconnected and the drain terminal 21 and the source terminal 22 are opened. Since the normal semiconductor switch is off, the drain terminal 21 and the source terminal 22 of the n semiconductor switches K1, K2,..., Kn including the semiconductor switch in which the half-on failure has occurred are opened.

As described above, since the threshold temperature Tth exceeds the disconnection temperature Tc, the period from when the output unit 54 switches the output voltage to the low level voltage until the disconnection occurs is short.
Note that the switch temperature rises while a current flows through the semiconductor switch in which the half-on failure occurs.

  When the drain terminal 21 and the source terminal 22 of the semiconductor switch in which the half-on failure has occurred are opened, the current supply through the n semiconductor switches K1, K2,. The semiconductor switches K1, K2,..., Kn stop heat generation. As a result, the switch temperature decreases with time.

(Embodiment 2)
FIG. 7 is a block diagram illustrating a main configuration of the power supply system 1 according to the second embodiment.
In the following, the second embodiment will be described while referring to differences from the first embodiment. Since the configuration other than the configuration described below is the same as that of the first embodiment, the same reference numerals as those of the first embodiment are given to the components common to the first embodiment, and the description thereof is omitted.

  The power supply system 1 according to the second embodiment includes other components other than the temperature detection unit 13 among the components included in the power supply system 1 according to the first embodiment. The power supply system 1 according to the second embodiment includes a current detection unit 60 and a resistor R1 instead of the temperature detection unit 13. The source terminals 22 of the n semiconductor switches K1, K2,..., Kn are connected to one end of the resistor R1, and the other end of the resistor R1 is connected to one end of the load 11. The current detection unit 60 is connected to both ends of the resistor R1 and the input unit 52 of the microcomputer 41 separately.

  The current flows to the load 11 through the n semiconductor switches K1, K2,..., Kn and the resistor R1. Here, the resistance value of the resistor R1 is constant. For this reason, according to Ohm's law, the load current flowing through the load 11 via the resistor R1 is proportional to the voltage across the resistor R1. The current detection unit 60 detects the voltage across the resistor R1 and outputs current information indicating the load current to the input unit 52. Specifically, the load current indicated by the current information is the magnitude of the load current.

  The control unit 50 acquires current information from the input unit 52. The load current indicated by the current information acquired from the input unit 52 substantially matches the load current flowing through the resistor R1 at the time of acquisition.

  8 and 9 are flowcharts showing the procedure of the switching process. Steps S21 to S26, S29 to S31, S34, and S35 of the switching process executed by the control unit 50 in the second embodiment are respectively steps S1 to S6 and S9 to S11 of the switching process executed by the control unit 50 in the first embodiment. It is the same as S14 and S15. For this reason, detailed description of steps S21 to S26, S29 to S31, S34, and S35 is omitted.

  When it is determined that the output voltage output from the output unit 54 is a low level voltage (S26: YES), the control unit 50 acquires current information from the input unit 52 (step S27), and the acquired current information is Based on the indicated load current, it is determined whether or not a half-on failure has occurred in at least one of the n semiconductor switches K1, K2,..., Kn (step S28).

  That the output voltage is a low level voltage means that the drive circuit 40 is performing an off operation. When the drive circuit 40 is performing an off operation, when all of the n semiconductor switches K1, K2,..., Kn are normal semiconductor switches, the load current is substantially zero A.

  In the same case, when n semiconductor switches K1, K2,..., Kn include a semiconductor switch in which a half-on failure has occurred, the semiconductor switches through which the half-on failure has occurred are included. Therefore, the load current is greater than the reference current. The reference current is a constant value and exceeds zero.

  In step S28, when the load current indicated by the current information acquired in step S27 is greater than or equal to the reference current, the control unit 50 is half-on with at least one of the n semiconductor switches K1, K2,. It is determined that a failure has occurred. As described above, the control unit 50 detects a half-on failure when the load current is equal to or higher than the reference current despite the drive circuit 40 performing the off operation. The reference current is set in advance.

  In step S28, the control unit 50 determines that a half-on failure has not occurred when the load current indicated by the current information acquired in step S27 is less than the reference current.

  When it is determined that a half-on failure has occurred, that is, when the controller 50 detects a half-on failure for at least one of the n semiconductor switches K1, K2,..., Kn (S28: YES), step S29 is executed, and the drive circuit 40 performs an ON operation. When it is determined that the half-on failure has not occurred (S28: NO), the control unit 50 ends the switching process.

  Moreover, when it determines with the value of a flag being 1 (S31: YES), the control part 50 acquires electric current information from the input part 52 (step S32), and the load current which the acquired electric current information shows is more than threshold current. It is determined whether or not (step S33). The threshold current is also a constant value and is set in advance. The threshold current is larger than the reference current.

  When it is determined that the load current is equal to or greater than the threshold current (S33: YES), the control unit 50 may cause an overcurrent to flow to the load 11 via the n semiconductor switches K1, K2,. As a result, step S34 is executed. In step S34, the drain terminal 21 and the source terminal 22 of the semiconductor switch in which the half-on failure has occurred are opened.

In steps S33 and S34, when the value of the flag is 1, that is, a half-on failure is detected in at least one of the n semiconductor switches K1, K2,. It is executed after the on operation is performed. When the control unit 50 executes Step S34, the drive circuit 40 performs an off operation. As a result, the drain terminal 21 and the source terminal 22 of the n semiconductor switches K1, K2,.
When it is determined that the load current is less than the threshold current (S33: NO), the control unit 50 ends the switching process.

  FIG. 10 is an explanatory diagram of the effect of the switch control device 12. FIG. 10 shows the transition of the output voltage output from the output unit 54. In FIG. 10, “H” indicates a high level voltage, and “L” indicates a low level voltage. Time is shown on the horizontal axis of the transition of the output voltage.

  In a state where a half-on failure has occurred in at least one of the n semiconductor switches K1, K2,... When the voltage is switched, the drive circuit 40 performs an off operation, and a normal semiconductor switch is switched off. At this time, since the semiconductor switches in which the half-on failure has occurred are included in the n semiconductor switches K1, K2,..., Kn, the load current is equal to or higher than the reference current.

  When the load current is equal to or higher than the reference current in a state where the output voltage output from the output unit 54 is a low level voltage, the control unit 50 detects a half-on failure, and the output unit 54 includes n semiconductor switches K1. , K2,..., Kn are turned on, and the flag value is changed from zero to one. When the control unit 50 instructs the output unit 54 to turn on the n semiconductor switches K1, K2,..., Kn, the output unit 54 switches the output voltage from the low level voltage to the high level voltage, The drive circuit 40 performs an on operation. When the driving circuit 40 performs the on operation, normal semiconductor switches among the n semiconductor switches K1, K2,..., Kn are switched on. As a result, the current flowing through the semiconductor switch in which the half-on failure has occurred becomes approximately zero A again. As a result, the temperature rise of the semiconductor switch in which the half-on failure has occurred is prevented, and current is supplied through the n semiconductor switches K1, K2,.

  Thereafter, when the load current becomes greater than or equal to the threshold current due to various causes, the control unit 50 instructs the output unit 54 to switch off the n semiconductor switches K1, K2,. Change the value of the flag from 1 to 2. When the control unit 50 instructs the output unit 54 to switch off the n semiconductor switches K1, K2,..., Kn, the output unit 54 switches the output voltage from the high level voltage to the low level voltage, The drive circuit 40 performs an off operation. When the drive circuit 40 performs an off operation, normal semiconductor switches among the n semiconductor switches K1, K2,..., Kn are switched off.

  When a normal semiconductor switch is switched off, a large current flows through the semiconductor switch in which a half-on failure has occurred. Thereby, in the semiconductor switch in which the half-on failure has occurred, the wire 24 is disconnected and the drain terminal 21 and the source terminal 22 are opened. Since the normal semiconductor switch is off, the drain terminal 21 and the source terminal 22 of the n semiconductor switches K1, K2,..., Kn including the semiconductor switch in which the half-on failure has occurred are opened.

  When the drain terminal 21 and the source terminal 22 of the semiconductor switch in which the half-on failure has occurred are opened, the current supply through the n semiconductor switches K1, K2,. Overcurrent is prevented from flowing.

  In the first embodiment, whether or not a half-on failure has occurred in at least one of the n semiconductor switches K1, K2,..., Kn is not the switch temperature but the same as in the second embodiment. Or based on the load current. In this case, the power supply system 1 in Embodiment 1 further includes a current detection unit 60 and a resistor R1. The control unit 50 acquires temperature information and current information from the input unit 52.

  When the power supply system 1 according to the first embodiment further includes the current detection unit 60 and the resistor R1, the control unit 50 determines whether the switch temperature is equal to or higher than the threshold temperature when the flag value is 1. In addition, as in the second embodiment, it may be determined whether the load current is equal to or greater than the threshold current. When it is determined that the switch temperature is the threshold temperature or the load current is equal to or higher than the threshold current, the control unit 50 determines the drain terminals 21 of the n semiconductor switches K1, K2,. And the source terminal 22 is opened.

  Further, in the second embodiment, whether or not a half-on failure has occurred in at least one of the n semiconductor switches K1, K2,..., Kn is not the load current but the same as in the first embodiment. , Based on the switch temperature. In this case, the power supply system 1 according to the second embodiment further includes a temperature detection unit 13. The control unit 50 acquires temperature information and current information from the input unit 52.

  In the first and second embodiments, the number of source terminals 22 and wires 24 included in each of the semiconductor switches K1, K2,..., Kn may be two or more. The plurality of source terminals 22, 22,... 22 are connected to the semiconductor switch body 20 by wires 24.

Further, each of the semiconductor switches K1, K2,..., Kn is not limited to the N channel type FET, but may be a P channel type FET or a bipolar transistor. When the semiconductor switches K1, K2,..., Kn are P-channel FETs, the on operation is an operation for decreasing the gate voltage, and the off operation is an operation for increasing the gate voltage.
Further, instead of the microcomputer 41, the switch control device 12 may be configured using hardware such as an AND circuit, an OR circuit, and a comparator.

  The disclosed first and second embodiments are examples in all respects, and should be considered not to be restrictive. The scope of the present invention is defined by the terms of the claims, rather than the meanings described above, and is intended to include any modifications within the scope and meaning equivalent to the terms of the claims.

DESCRIPTION OF SYMBOLS 1 Power supply system 10 Battery 11 Load 12 Switch control device 13 Temperature detection part 14,15 Conductive board 16 Circuit board 20 Semiconductor switch main body 21 Drain terminal 22 Source terminal 23 Gate terminal 24 Wire 25 Resin 30 External device 40 Drive circuit (1st switching) Part, second switching part)
DESCRIPTION OF SYMBOLS 50 Control part 51 Memory | storage part 52,53 Input part 54 Output part 55 Bus | bath 60 Current detection part A1 Storage medium K1, K2, ..., Kn Semiconductor switch P1 Computer program R1 Resistance

Claims (8)

A first switching unit that performs an on operation to switch on the plurality of semiconductor switches when a failure is detected in at least one of the plurality of semiconductor switches connected in parallel;
A switch control device comprising: a second switching unit that performs an off operation for switching off the plurality of semiconductor switches after the first switching unit performs the on operation. 2. The switch control device according to claim 1, wherein the first switching unit performs the ON operation when a switch temperature that rises with a temperature of the plurality of semiconductor switches becomes equal to or higher than a predetermined temperature. The first switching unit performs the on operation when a current flowing through the plurality of semiconductor switches is equal to or higher than a reference current despite the off operation being performed. Switch control device. The second switching unit performs the off operation when a switch temperature rising together with the temperatures of the plurality of semiconductor switches becomes equal to or higher than a threshold temperature after the first switching unit performs the on operation. The switch control device according to any one of claims 1 to 3. The second switching unit performs the off operation when the current flowing through the plurality of semiconductor switches becomes equal to or greater than a threshold current after the first switching unit performs the on operation. The switch control device according to claim 3. Each of the plurality of semiconductor switches includes
A terminal,
A semiconductor switch body;
A wire connecting the terminal and the main end of the semiconductor switch,
The switch control device according to any one of claims 1 to 5, wherein in each of the plurality of semiconductor switches, a current flows through the semiconductor switch body, a wire, and a terminal. Performing a turn-on operation to turn on the plurality of semiconductor switches when a failure is detected in at least one of the plurality of semiconductor switches connected in parallel; and
Performing a turn-off operation for turning off the plurality of semiconductor switches after the turn-on operation is performed. Instructing execution of an on operation for switching on the plurality of semiconductor switches when a failure is detected in at least one of the plurality of semiconductor switches connected in parallel;
A computer program for causing a computer to execute a step of instructing execution of an off operation for switching off the plurality of semiconductor switches after instructing to perform the on operation.

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