JP2018110218A - Semiconductor device and method for manufacturing the same - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor device capable of performing large current output high in safety and a method for manufacturing the same.SOLUTION: The semiconductor comprises: a first metal plate having a first surface; a second metal plate having a second surface facing the first surface; two or more semiconductor units arranged between the first metal plate and the second metal plate; a first conductive connection member provided between the first metal plate and each of the two or more semiconductor units; and a second conductive connection member provided between the second metal plate and each of the two or more semiconductor units. The semiconductor unit comprises; a laminate composed of a first metal member, a second metal member and a semiconductor element; and a sealing resin covering the laminate. At least one of a conductive part at the first metal member side and a conductive part at the second metal member side is covered with a first insulating member.SELECTED DRAWING: Figure 1

Description

  Embodiments described herein relate generally to a semiconductor device and a method for manufacturing the same.

  In semiconductor devices that handle high voltages of several kilovolts (kV) and large currents of several kiloamperes (kA), it is necessary to suppress the temperature rise during operation as much as possible, and there are cases where a large number of switching elements are connected in parallel. is there.

  There is a semiconductor module in which a plurality of switching elements connected in parallel are mounted in a single package. In such a semiconductor module, it is necessary to realize low thermal resistance and ensure high safety.

Japanese Patent No. 3258200 Japanese Patent No. 4385324 Japanese Patent No. 4292686

  An object of the embodiment is to provide a semiconductor device capable of outputting a large current with high safety and a manufacturing method thereof.

  The semiconductor device according to the embodiment includes a first metal plate having a first surface parallel to a first direction and a second direction intersecting the first direction, and a second metal having a second surface facing the first surface. A plate, two or more semiconductor units disposed between the first metal plate and the second metal plate, and conductivity provided between the first metal plate and the two or more semiconductor units. A first connecting member, and a conductive second connecting member provided between the second metal plate and the two or more semiconductor units. Each of the two or more semiconductor units has a first terminal, a first metal member connected to the first metal plate via the first terminal and the first connection member, and a second terminal. And the second metal member connected to the second metal plate via the second terminal and the second connection member, and the first metal between the first metal member and the second metal member. A semiconductor element connected to the member on one main surface and connected to the second metal member on the other main surface, the first metal member other than the first terminal, and the second metal other than the second terminal And a sealing resin that covers the semiconductor element. At least one of the conductive portion on the first terminal side and the conductive portion on the second terminal side is covered with an insulating first insulating member.

1 is a cross-sectional view illustrating a semiconductor device according to a first embodiment. 1 is a cross-sectional view illustrating a part of a semiconductor device according to a first embodiment; It is arrow sectional drawing in the AA line of FIG. 6 is a cross-sectional view illustrating a semiconductor device according to a second embodiment; FIG. 6 is a cross-sectional view illustrating a semiconductor device according to a third embodiment; FIG. It is arrow sectional drawing in the BB line of FIG. 10 is a cross-sectional view illustrating a semiconductor device according to a modification of the third embodiment; FIG. FIG. 6 is a cross-sectional view illustrating a semiconductor device according to a fourth embodiment. FIG. 10 is a cross-sectional view illustrating a semiconductor device according to a fifth embodiment. FIG. 10 is a cross-sectional view illustrating a part of the semiconductor device of a fifth embodiment. FIG. 11A to FIG. 11F are cross-sectional views illustrating a method for manufacturing a semiconductor device of the fifth embodiment. FIG. 12A to FIG. 12F are cross-sectional views illustrating another method for manufacturing the semiconductor device of the fifth embodiment. FIG. 13A and FIG. 13B are cross-sectional views illustrating a part of a semiconductor device according to a modification of the fifth embodiment. FIG. 10 is a cross-sectional view illustrating a semiconductor device according to a sixth embodiment. 10 is a cross-sectional view illustrating a semiconductor device according to a seventh embodiment; FIG. FIG. 20 is a cross-sectional view illustrating a semiconductor device according to an eighth embodiment. 10 is a cross-sectional view illustrating a semiconductor device according to a ninth embodiment; FIG. FIG. 18A is a plan view illustrating a part of the semiconductor device of the ninth embodiment. FIG. 18B is a cross-sectional view taken along the line CC in FIG. It is sectional drawing for demonstrating the creeping distance inside the semiconductor device of 9th Embodiment. It is sectional drawing which illustrates the semiconductor device which concerns on 10th Embodiment. It is sectional drawing which illustrates a part of semiconductor device of 10th Embodiment. It is sectional drawing for demonstrating the creeping distance inside the semiconductor device of 10th Embodiment. It is sectional drawing which illustrates the semiconductor device which concerns on 11th Embodiment. It is sectional drawing which illustrates a part of semiconductor device of 11th Embodiment. FIG. 25A and FIG. 25B are perspective views illustrating a part of the semiconductor device of the eleventh embodiment. FIG. 26A is an exploded view illustrating the semiconductor device according to the eleventh embodiment. FIG. 26B is a perspective view illustrating a semiconductor device according to the eleventh embodiment. It is sectional drawing which illustrates the semiconductor device which concerns on 12th Embodiment. FIG. 28A and FIG. 28B are cross-sectional views for explaining the creeping distance inside the semiconductor device of the twelfth embodiment. It is sectional drawing which illustrates the semiconductor device which concerns on 13th Embodiment. It is an enlarged view of the D section of FIG. It is sectional drawing which illustrates the semiconductor device which concerns on 14th Embodiment. FIG. 32A is a top view of a part of the semiconductor device according to the fourteenth embodiment, and FIG. 32B is a side view.

Hereinafter, embodiments of the present invention will be described with reference to the drawings.
(First embodiment)
FIG. 1 is a cross-sectional view illustrating a semiconductor device according to this embodiment.
As shown in FIG. 1, the semiconductor device 1 of this embodiment includes a first metal plate 10, a second metal plate 20, and a semiconductor unit 30. The first metal plate 10 has a first surface 10a and a second surface 10b. The second metal plate 20 has a first surface 20a and a second surface 20b.

  In the following, the following coordinates may be used. Coordinate axes parallel to the first surface 10a, which is one surface of the first metal plate 10, are taken as an X axis and a Y axis. A coordinate axis orthogonal to the X axis and the Y axis is taken as a Z axis.

  The second metal plate 20 is arranged so that the first surface 20 a, which is one surface, faces the first surface 10 a of the first metal plate 10 in parallel. That is, the first surfaces 10a and 20a are arranged substantially in parallel.

  The first metal plate 10 is a substantially rectangular flat plate having a first surface 10a parallel to the XY plane. The first metal plate 10 has a thickness in the Z-axis direction.

  The second metal plate 20 is a rectangular flat plate having a first surface 20a parallel to the XY plane. The second metal plate 20 has a thickness in the Z-axis direction. The second metal plate 20 is substantially the same flat plate as the first metal plate 10.

  The first metal plate 10 and the second metal plate 20 are made of, for example, a metal having high conductivity and high thermal conductivity. For example, the first metal plate 10 and the second metal plate 20 include copper (Cu) and a copper alloy. Alternatively, the first metal plate 10 and the second metal plate 20 also include aluminum (Al) and an aluminum alloy. The first metal plate 10 and the second metal plate 20 function as two electrodes of the semiconductor device 1.

  One or more semiconductor units 30 are provided between the first metal plate 10 and the second metal plate 20. When two or more semiconductor units 30 are provided, the semiconductor units 30 are connected in parallel between the first metal plate 10 and the second metal plate 20.

FIG. 2 is a cross-sectional view illustrating a part of the semiconductor device of this embodiment.
As shown in FIG. 2, the semiconductor unit 30 includes a first metal member 31, a second metal member 32, a first bonding member 33, a second bonding member 34, a sealing resin 35, and a semiconductor element 40. ,including. The first metal member 31, the first bonding member 33, the semiconductor element 40, the second bonding member 34, and the second metal member 32 are a stacked body 39 stacked in this order in the Z-axis direction. Part of the first metal member 31, part of the second metal member 32, the first joining member 33, the second joining member 34, and the semiconductor element 40 are covered with a sealing resin 35.

  The semiconductor unit 30 includes a first terminal 31a and a second terminal 32a. The first terminal 31 a is a part of the first metal member 31 that is not covered with the sealing resin 35. The second terminal 32 a is a part of the second metal member 32 that is not covered with the sealing resin 35.

  The semiconductor unit 30 has a substantially rectangular parallelepiped shape including surfaces along the XY plane, the XZ plane, and the YZ plane. The first terminal 31 a is a surface of the first metal member 31 that faces the first surface 10 a of the first metal plate 10 and is parallel to the XY plane of the first metal member 31. The first terminal 31 a is an exposed surface parallel to the XY plane of the semiconductor unit 30. The second terminal 32a is an exposed surface parallel to the XY plane of the semiconductor unit 30, and is an exposed surface formed on the surface opposite to the surface on which the first terminal 31a is formed. The second terminal 32 a is a surface of the second metal member 32 and is a surface that faces the first surface 20 a of the second metal plate 20 and is parallel to the XY plane of the second metal member 32. The first terminal 31a and the second terminal 32a are electrodes that are exposed to be spaced apart from each other in the rectangular parallelepiped.

  The first metal member 31 is a substantially rectangular plate material, and is connected to one main surface of the semiconductor element 40 via the first bonding member 33 in a plane substantially parallel to the XY plane.

  The second metal member 32 includes portions 32b and 32c. The portion 32b is a substantially square plate-like member, and the portion 32c is a convex portion protruding from the portion 32b toward the semiconductor element 40. The portion 32c is formed in accordance with the planar view shape of the electrode on the other main surface side of the semiconductor element 40, and is provided so as to protrude to the side to which the semiconductor element 40 is connected.

  The second metal member 32 is connected to the other main surface of the semiconductor element 40 via the portions 32 b and 32 c having a surface substantially parallel to the XY plane and the second bonding member 34.

  The first metal member 31 and the second metal member 32 have different shapes in order to match the shapes of the electrodes formed on both main surfaces of the semiconductor element 40.

  The first joining member 33 and the second joining member 34 are, for example, solder, conductive adhesive, silver paste, or the like.

  The semiconductor element 40 is a switching element that is switching-controlled by a control electrode such as an IGBT (Insulated Gate Bipolar Transistor) or a MOSFET (Metal Oxide Semiconductor Field Effect Transistor). The semiconductor element 40 is not limited to a three-terminal element such as an IGBT, but may be a two-terminal element that does not have a third electrode such as an FRD (Fast Recovery Diode).

  The number of semiconductor elements connected between the first metal member 31 and the second metal member 32 is not limited to one. When two or more semiconductor elements are connected between the same first metal member 31 and the second metal member 32, the same semiconductor element may be arranged, or different semiconductor elements may be arranged. Also good. When disposing different semiconductor elements, for example, the IGBT and the FRD may be connected in antiparallel.

  The sealing resin 35 seals the laminated first metal member 31, first bonding member 33, semiconductor element 40, second bonding member 34, and second metal member 32 in a rectangular parallelepiped shape. The sealing resin 35 is a thermosetting resin such as an epoxy resin, for example. The sealing resin 35 seals the stacked body 39 of the first metal member 31, the first bonding member 33, the semiconductor element 40, the second bonding member 34, and the second metal member 32. For example, after the laminated body 39 is placed in a vacuum mold for resin molding, a sealing resin is injected and solidified. As a result, the laminate is sealed without leaving bubbles around it.

  Returning to FIG. The first metal plate 10 has a plurality of columnar portions 12. The columnar portion 12 is provided on the first surface 10 a of the first metal plate 10. In this example, the plurality of columnar portions 12 extend in the negative direction of the Z axis and have substantially the same length (height). The second metal plate 20 has a plurality of columnar portions 22. The columnar portion 22 is provided on the second surface 20 a of the second metal plate 20. The plurality of columnar portions 22 extend in the positive direction of the Z axis and have substantially the same height. The columnar portions 12 and 22 are, for example, rectangular columns having a square cross section in the XY plane. The columnar part is not limited to a prism, and may be a polygonal column or a cylinder.

3 is a cross-sectional view taken along line AA in FIG.
As shown in FIG. 3, the columnar portions 22 are arranged on the second metal plate 20 in a grid pattern. Although not shown, the columnar portions 12 are arranged in a grid pattern on the first metal plate 10 so as to coincide with the arrangement of the columnar portions 22. In this example, two semiconductor elements 40 are mounted on one semiconductor unit 30, and one semiconductor unit 30 is connected so as to be sandwiched between one columnar portion 12, 22. The number of semiconductor units 30 connected to the set of columnar portions 12 and 22 is not limited to one, and may be plural.

  By providing the columnar portions 12 and 22, the distance between the first metal plate 10 and the second metal plate 20 can be increased independently of the height of the semiconductor unit 30. The columnar portions 12 and 22 are provided to ensure an external creepage distance surrounded by the case 60. The external creepage distance is the distance of the surface of the case 60 and is the shortest distance between the first metal plate 10 and the second metal plate 20. By providing the columnar portions 12 and 22, a creeping distance between the first metal plate 10 and the second metal plate 20 exposed to the outside of the semiconductor device 1 can be secured. Here, the creepage distance is defined as the shortest distance along the surface of the insulating material between two different conductors according to IEC606664-1.

  The insulating member 70 covers at least one of the first surface 10 a of the first metal plate 10 and the first surface 20 a of the second metal plate 20. The insulating member 70 covers the exposed surface of the columnar portion provided on the covering surface. Furthermore, the insulating member 70 covers an exposed surface of a connection member (at least one of the first connection member 51 and the second connection member 52) provided between the covering columnar portion and the semiconductor element 40. Yes. Furthermore, when there is an exposed surface of the metal member (at least one of the first metal member 31 and the second metal member 32) including the terminal connected to the connecting member that covers the insulating member 70, Covering.

  That is, the insulating member 70 is an inner surface of the semiconductor device 1, and is a conductive portion electrically connected to at least one of the electrode on one main surface and the electrode on the other main surface of the semiconductor element 40. Covers the exposed surface. Therefore, it is not necessary to consider the creepage distance inside the semiconductor device 1 of the present embodiment. The creeping distance of the semiconductor device 1 is determined by the distance between the first metal plate 10 and the second metal plate 20 disposed at both ends of the case 60.

  The insulating member 70 is provided by sealing an insulating material inside the semiconductor device 1. The insulating member 70 is, for example, potting silicone. Although not shown, the insulating member 70 is provided at a desired position by making a hole for injecting the insulating material in the case 60, injecting the insulating material, defoaming, and curing.

The operation and effect of the semiconductor device 1 of this embodiment will be described.
First, the point of securing the creepage distance will be described. In the semiconductor device 1 of the present embodiment, it is possible to handle a high voltage by ensuring a creepage distance between the conductive portions of both electrodes to which a high voltage is applied. For example, when realizing a withstand voltage of 3200 V, a creepage distance of about 32 mm or more is required.

  An exposed surface of at least one of the conductive parts of both electrodes inside the semiconductor device 1 is covered with an insulating member 70. Therefore, the creeping distance of the semiconductor device 1 is determined by the shortest distance along the outer surface of the case 60 provided between the first metal plate 10 and the second metal plate 20. The shortest distance of the outer surface of the case 60 between the first metal plate 10 and the second metal plate 20 is determined by the height of the columnar portions 12 and 22 and the height of the semiconductor unit 30. Therefore, the creepage distance of the semiconductor device 1 can be ensured by appropriately setting the heights of the columnar portions 12 and 22.

  Since any one of the conductive portions between the two electrodes inside the semiconductor device 1 may be covered with the insulating member 70, the amount of the insulating member 70 used can be reduced, and the weight of the semiconductor device 1 can be reduced. It can contribute to cost reduction. Moreover, since the part which is not covered with the insulating member 70 is a space, it is possible to suppress an increase in the internal pressure of the case 60 when the semiconductor unit 30 generates heat when a semiconductor failure occurs.

  Next, the ease of increasing the current of the semiconductor device 1 will be described. In a large current type semiconductor device, the number of parallel semiconductor elements may be increased by a pressure contact structure. For example, it is manufactured by arranging a plurality of semiconductor elements on an electrode plate and pressing them together. In the case of such a manufacturing method, it is difficult to press the semiconductor elements evenly, the pressure applied to the semiconductor elements varies, the performance of each semiconductor element varies, and the degree of heat generation There is a risk of discrepancies.

  Also, there is a manufacturing method in which both main surfaces of a semiconductor element are soldered between two flat metal plates to increase the number of parallel semiconductor elements. According to this method, it is possible to equalize the pressure with respect to each semiconductor element and increase the reliability of the bonding as compared with the case of the pressure contact structure. However, when a large number of semiconductor elements are soldered together, flat plate processing accuracy and temperature variations during temperature rise can occur. If one of the semiconductor elements connected in parallel is defective before connection, the entire semiconductor device is defective, which affects the yield of the semiconductor device.

  On the other hand, the semiconductor device 1 of the present embodiment includes a semiconductor unit 40 including a semiconductor element 40 that is soldered and sealed with one or a plurality of small units between the first metal member 31 and the second metal member 32. 30 is used. The plurality of semiconductor units 30 are manufactured by planar mounting between the first metal plate 10 and the second metal plate 20. Thus, an electrical test is performed for each semiconductor unit 30, and the semiconductor device 1 can be configured using the selected non-defective products. For this reason, even if the number of parallel connections of the semiconductor units 30 is increased, a high yield can be stably achieved without reducing the yield of the semiconductor device 1.

  The semiconductor unit 30 can be reduced in size according to the size of the semiconductor element 40. Therefore, the first metal member 31 and the second metal member 32 can be reduced in size to reduce the heat capacity. For this reason, it is possible to further shorten the period during which the temperature becomes high at the time of bonding with the semiconductor element 40. Moreover, since the usage-amount of the 1st joining member 33 used for a connection and the 2nd joining member 34 can also be decreased, management of the thickness of a joining member becomes easy and the dispersion | variation at the time of manufacture can be reduced. Therefore, since the yield of the semiconductor unit 30 can be improved, the yield of the entire semiconductor device 1 can be improved.

  By providing the columnar portions 12 and 22 on the first metal plate 10 and the second metal plate 20, respectively, the distance between the first metal plate 10 and the second metal plate 20 is appropriately set while downsizing the semiconductor unit 30. Can be set.

  Variations in the height of the columnar portions 12 and 22 cause connection failure when a large number of semiconductor units 30 are sandwiched. Therefore, these heights are set with high accuracy. Further, the tips of the columnar portions 12 and 22 are set with an area corresponding to the terminal of the semiconductor unit 30. These areas are sufficiently smaller than the respective areas of the first metal plate 10 and the second metal plate 20. Therefore, the shape of these tips can be formed with high flatness, and the position of the semiconductor unit 30 to be sandwiched can be set with high accuracy. In addition, when the thickness of the first bonding member 33 or the second bonding member 34 varies during the manufacture of the semiconductor unit 30, the thickness of the connection portion is adjusted by the first connection member 51 and the second connection member 52. It is possible to suppress the connection failure of a large number of semiconductor units 30. As a result, when a large number of semiconductor units 30 are arranged between the first metal plate 10 and the second metal plate 20, sufficient thermal and electrical connection can be achieved.

  Therefore, the position setting at the time of arrangement | positioning of the semiconductor unit 30 becomes easy, and the thermal resistance and electrical resistance of each semiconductor unit 30 can be made uniform, without being pressurized.

  Next, the realization of explosion-proof properties is described. In the semiconductor device 1 of this embodiment, the periphery of the semiconductor element 40, the first bonding member 33, and the second bonding member 34 is sealed with a sealing resin 35 so as to discharge a gas such as air. Therefore, even when the semiconductor element 40, the first bonding member 33, and the second bonding member 34 are in a high temperature state due to power concentration or the like, the expanding gas does not exist in the surroundings. Rapid volume expansion that can rupture can be suppressed. That is, an explosion-proof structure can be realized with a simple structure.

  As described above, since a large number of semiconductor units 30 can be easily arranged and connected in parallel, it is possible to realize a larger current and easily cope with a higher breakdown voltage.

(Second Embodiment)
FIG. 4 is a cross-sectional view illustrating the semiconductor device of this embodiment.
In the semiconductor device 201 of this embodiment, the heights of the columnar portions 212 and 222 are different from those in the first embodiment. Other components are the same as those in the first embodiment, and the same components are denoted by the same reference numerals and detailed description thereof is omitted as appropriate.

  As shown in FIG. 4, the semiconductor device 201 of this embodiment includes a first metal plate 10, a columnar part 212, a second metal plate 20, a columnar part 222, and a semiconductor unit 30.

  The total height of the columnar section 212, the first connection member 51, the semiconductor unit 30, the second connection member 52, and the columnar section 222 is L0. The height of the columnar part 212 is L1, and the height of the columnar part 222 is L2. Here, L1 ≠ L2. In this example, L1> L2, but L1 <L2. When the total thickness L3 of the semiconductor unit 30, the first connection member 51, and the second connection member 52 is set, L2 <(L0−L3) / 2.

  The creepage distance of the semiconductor device 201 of this embodiment is determined based on L0. In the semiconductor device 201, L 1 ≠ L 2, and the insulating member 70 covers the exposed surface of the conductive portion on the columnar portion 222 side having the lower height L 2.

The operation and effect of the semiconductor device 201 of this embodiment will be described.
In the semiconductor device 201 of this embodiment, one height is lowered while maintaining the total height of the columnar portions 212 and 222. Since the exposed surface of the conductive portion on the side of the columnar portion 222 having the lower height is covered with the insulating member, the amount of the insulating member 70 can be reduced as compared with the case where the height of the columnar portion is high. By reducing the amount of the insulating member 70 used, it is possible to suppress the occurrence of defoaming and to reduce the occurrence of insulation failure. Therefore, it is possible to facilitate the manufacture of the semiconductor device 1, to ensure the withstand voltage inside the semiconductor device 201, and to realize the weight reduction and cost reduction of the semiconductor device 201. it can.

(Third embodiment)
FIG. 5 is a cross-sectional view illustrating a semiconductor device according to this embodiment.
6 is a cross-sectional view taken along line BB in FIG.
In the case of the present embodiment, the gate terminals of the semiconductor elements drawn out from the semiconductor unit are connected to each other by the wiring board. As shown in FIG. 5, the semiconductor device 301 of this embodiment further includes a wiring board 350. The semiconductor unit 330 has a gate lead portion 334. In the semiconductor unit 330, the bonding wire 332 electrically connects the gate electrode formed on the semiconductor element 40 and the gate lead portion 334. The drawn-out gate portions 334 of the semiconductor elements 40 are connected to each other by the wiring board 350 and further connected to the gate terminal 354.

  Preferably, the wiring substrate 350 is provided on the columnar portion side of the conductive portion having a lower potential. In this example, the second metal plate 20 and the columnar portion 222 are connected to an electrode on the low potential side of the semiconductor element 40, for example, an emitter electrode. The wiring board 350 is embedded in the insulating member 70 together with the gate lead-out portion 334.

  As shown in FIG. 6, the wiring board 350 has an opening 351, and the semiconductor unit 330 is inserted through the opening 351. A wiring 352 is provided on the wiring board 350. The wiring 352 is provided in the vicinity of the portion where the gate lead-out portion 334 of each semiconductor unit 330 is drawn out. The gate lead-out portion 334 of each semiconductor unit 330 is electrically connected to the wiring 352 by soldering or the like. The wiring 352 is electrically connected to the gate terminal 354 of the semiconductor device 1 on the wiring substrate 350.

  In each semiconductor unit 330, the gate electrode of the mounted semiconductor element 40 is extracted as one electrode by the gate extraction portion 334. The gate lead-out portion 334 of the semiconductor unit 330 drawn out is drawn out as a single gate terminal 354 by the wiring 352 provided on the wiring board 350. In this way, gate electrodes such as IGBTs can be connected in parallel and connected to an external circuit.

  For example, after connecting the semiconductor unit 330 to the columnar part 212, the wiring board 350 is incorporated so that the semiconductor unit 330 is inserted into the opening 351.

  Although not shown, a rib-like stopper may be provided on the outer periphery of the sealing resin of the semiconductor unit 330 so as to support the wiring board 350. Alternatively, the wiring board 350 may be supported by an insulating support member or the like provided on the first surface 20 a of the second metal plate 20.

  After inserting the wiring board 350, the gate lead-out portion 334 and the wiring 352 are connected by soldering or the like. Thereafter, the semiconductor unit 330 is connected to the other columnar part 222.

  Thus, by providing the wiring substrate 350, control terminals such as IGBTs can be easily connected in parallel.

  When the wiring board 350 is embedded in the insulating member 70 together with the exposed surface on the low potential conductive portion side, the insulating treatment process can be performed in a lump, so that the necessary insulation performance can be realized with a small number of processes. Is possible.

(Modification)
FIG. 7 is a cross-sectional view illustrating a semiconductor device according to this variation.
As shown in FIG. 7, in the semiconductor device of this modification, the wiring board 350 a has a hole 353. The hole 353 is provided at an arbitrary position on the wiring board 350a. In this example, the gate lead-out portion 334 is provided at a place where the gate lead-out portion 334 is drawn out to the wiring 352 side. The hole 353 may be provided in the outer peripheral portion of the wiring board 350a.

  The insulating member 70 is injected into one of the columnar portions 212 and 222. Through the hole 353, the insulating member 70 can reach the inside of the semiconductor device without being blocked by the wiring substrate 350a.

(Fourth embodiment)
FIG. 8 is a cross-sectional view illustrating a semiconductor device according to this embodiment.
As shown in FIG. 8, the semiconductor device 401 of this embodiment includes a semiconductor unit 430 that is different from those of the other embodiments described above. The semiconductor unit 430 includes a sealing resin 435 having a tapered surface 435a.

  The tapered surface 435a is provided in the sealing resin 435 on the side where the insulating member 70 is provided. The tapered surface 435a is formed so as to spread upward (in the positive direction of the Z axis) from the surface of the insulating member 70.

  In the semiconductor device 401 of this embodiment, when the insulating member 70 is injected at the time of manufacture, bubbles mixed in the insulating member are discharged along the tapered surface 435a. For this reason, it becomes difficult for bubbles to remain in the vicinity of the contact portion between the sealing resin 435 and the second connection member 52, and the cause of the insulation failure is eliminated.

(Fifth embodiment)
FIG. 9 is a cross-sectional view illustrating a semiconductor device according to this embodiment.
FIG. 10 is a cross-sectional view illustrating a part of the semiconductor device of this embodiment.
In the case of the present embodiment, the configuration of the insulating member provided on the exposed surface of the conductive portion inside the semiconductor device is different from the case of the other embodiments described above. The same components are denoted by the same reference numerals, and detailed description thereof is omitted as appropriate. In the following, an example in which the components of the semiconductor unit are different from those of the other embodiments will be described. However, the components of the semiconductor unit may be the same as those of the other embodiments described above.

  As shown in FIG. 9, the semiconductor device 501 of this embodiment includes a first metal plate 10, a second metal plate 20, and a semiconductor unit 530. A first insulating member 553 is provided on the entire first surface 10 a of the first metal plate 10. Of the locations where the first insulating member 553 is provided, an opening is provided at a position where the semiconductor unit 530 is connected, and a first connection member 551 is provided in the opening. The first metal plate 510 is connected to the first connection member 551 through the opening.

  A second insulating member 555 is provided on the first surface 20 a of the second metal plate 20. Of the locations where the second insulating member 555 is provided, an opening is provided at a position where the semiconductor unit 530 is connected, and a second connection member 552 is provided in the opening. The second metal plate 520 is connected to the second connection member 552 through the opening.

  The length (thickness) of the first connecting member 551 in the Z-axis direction is thicker than the thickness of the first insulating member 553. The thickness of the first insulating member 553 is substantially the same as the thickness of the first connecting member 551 in the periphery including the outer peripheral surface of the first connecting member 551. Of the first insulating member 553, a portion where the thickness is increased around the first connecting member 551 may be referred to as a third insulating member 554. In this example, the first insulating member 553 and the third insulating member 554 are in close contact with the outer peripheral surface of the first connecting member 551.

  The thickness of the second connection member 552 is thicker than the thickness of the second insulating member 555. The thickness of the second insulating member 555 is substantially the same as the thickness of the second connecting member 552 around the second connecting member 552. Of the second insulating member 555, a portion where the thickness is increased around the second connecting member 552 may be referred to as a fourth insulating member 556. In this example, the second insulating member 555 and the fourth insulating member 556 are in close contact with the outer peripheral surface of the second connecting member 552.

  That is, the first insulating member 553 and the third insulating member 554 cover the first surface 10 a of the first metal plate 10 and the exposed outer surface of the first connecting member 551. When the first terminal 531a of the semiconductor unit 530 has an exposed surface, the first insulating member 553 and the third insulating member 554 also cover the exposed surface.

  Similarly, the second insulating member 555 and the fourth insulating member 556 cover the first surface 20 a of the second metal plate 20 and the exposed outer surface of the second connecting member 552. When the second terminal 532a of the semiconductor unit 530 has an exposed surface, the second insulating member 555 and the fourth insulating member 556 also cover the exposed surface.

  Since the first insulating member 553 to the fourth insulating member 556 cover the conductive portions of both poles, it is not necessary to consider the creepage distance inside the semiconductor device 501. The creepage distance of the semiconductor device 501 is determined by the distance of the outer surface between the first metal plate 510 and the second metal plate 520 on the outer surface of the case 60.

  The first insulating member 553 and the second insulating member 555 are an insulating resin material or the like. For example, the first insulating member 553 and the second insulating member 555 can be an insulating coating member containing epoxy resin, polyimide, or fluororesin. An insulating solder resist or the like may be used.

  The third insulating member 554 and the fourth insulating member 556 may be made of the same material as the first insulating member 553 and the second insulating member 555, or other insulating materials. For example, the third insulating member 554 and the fourth insulating member 556 can be made of insulating rosin, epoxy resin, polyimide resin, or fluorine resin. As will be described later, the insulating residue such as rosin is a solder containing a liquid insulating substance (insulating rosin, epoxy resin, polyimide resin, fluororesin or its precursor) after the semiconductor unit 30 is mounted. Precipitated from the paste. In this case, the solder paste is the first connection member 551 and the second connection member 552.

  In the above description, both the first insulating member 553 and the second insulating member 555 are provided, but any one of them may be provided. When both the first insulating member 553 and the second insulating member 555 are provided, even if one of the insulating members is damaged due to long-term use or impact, the other insulating member The insulation inside the semiconductor device 501 can be maintained.

A method for manufacturing the semiconductor device 501 of this embodiment will be described.
FIG. 10 is a cross-sectional view illustrating a part of the semiconductor device of this embodiment.
As shown in FIG. 10, the semiconductor unit 530 includes a first metal member 531, a second metal member 532, a first bonding member 533, a second bonding member 534, a sealing resin 535, and the semiconductor element 40. ,including. The first metal member 531, the first bonding member 533, the semiconductor element 40, the second bonding member 534, and the second metal member 532 are a stacked body 539 stacked in this order in the Z-axis direction. Part of the first metal member 531, part of the second metal member 532, the first joining member 533, the second joining member 534, and the semiconductor element 40 are covered with the sealing resin 535. The surface of the first metal member 531 that is not covered with the sealing resin 535 is the first terminal 531a. The surface of the second metal member 532 that is not covered with the sealing resin is the second terminal 532a.

FIG. 11A to FIG. 11F are cross-sectional views illustrating a method for manufacturing a semiconductor device of this embodiment.
As shown in FIG. 11A, the first metal member 531 and the semiconductor element 40 are connected by a first bonding member 533, and the second metal member 532 and the semiconductor element 40 are connected by a second bonding member 534. Then, the laminated body 539 is assembled.

  As shown in FIG. 11B, a sealing resin 535 is formed. The sealing resin 535 is formed in the same manner as in the other embodiments described above.

  As shown in FIG. 11C, the first insulating layer 553 a is formed on the first surface 10 a of the first metal plate 10. The first insulating layer 553a is, for example, an insulating coating member containing epoxy resin, polyimide, or fluororesin, or an insulating solder resist. In the first insulating layer 553a, an opening 559 is formed at a position where the semiconductor unit 530 is connected. For example, the opening 559 is formed by a photoresist process. A first insulating layer in which an opening 559 is formed in advance may be used.

  Similarly to the case of the first metal plate 10, the second insulating layer 555 a is formed on the first surface 20 a of the second metal plate 20, and the opening 559 is formed.

  As shown in FIG. 11D, the first connection layer 551a and the second connection layer 552a are formed in the respective openings 559 of the first insulating layer 553a and the second insulating layer 555a formed as described above. For example, the first connection layer 551a and the second connection layer 552a are formed using a well-known technique such as an offset printing technique by using a mask that covers other than the position of the opening 559.

  As shown in FIG. 11E, the semiconductor unit 530 is disposed at the position of the first connection member 551, and the temperature is increased and these are connected to each other. Similarly, the semiconductor unit 530 at the position of the second connection member 552 is disposed and connected to each other.

  The first connection layer 551a and the second connection layer 552a are preferably formed of a solder paste containing an insulating material. Thereby, a residue containing an insulating substance (insulating rosin or the like) is deposited on the outer peripheral surfaces of the first connecting member 551 and the second connecting member 552 at the time of connection. This insulating residue covers the exposed surface of the conductive portion as the third insulating member 554 and the fourth insulating member 556.

  As shown in FIG. 11F, the case 60 surrounds the first metal plate 10 and the second metal plate 20.

  By manufacturing as described above, at least one of the conductive portion on the first metal plate 10 side and the conductive portion on the second metal plate 20 side is covered with the first insulating member 553 and the second insulating member 555. Therefore, the creepage distance of the semiconductor device 501 is not determined inside the semiconductor device 501 but is determined by the distance along the outer surface of the case 60.

  Other methods can be used to form the insulating member inside the semiconductor device 501. FIG. 12A to FIG. 12F are cross-sectional views for explaining the method for manufacturing a semiconductor device of this embodiment. In FIG. 12A to FIG. 12B, the semiconductor unit 530 is assembled as in the case of the manufacturing method described above.

  In this manufacturing method, the insulating layer is not formed in advance on the first metal plate 10 and the second metal plate 20. As shown in FIG. 12C, a solder paste 551b, 552b is applied on the first surface 10a of the first metal plate 10, for example, by providing a mask having an opening at a position where the semiconductor unit 530 is connected. .

  As shown in FIG. 12D, the terminals of the semiconductor unit 530 are connected together on the solder pastes 551b and 552b formed on the first metal plate 10 and the second metal plate 20, respectively. The assembly is heated and electrically and thermally connected by the first connecting member 551 and the second connecting member 552.

  In this manufacturing method, after connecting the semiconductor unit 530 between the first metal plate 10 and the second metal plate 20, the surface of the conductive portion is covered by applying an insulating material to the inside. As shown in FIG. 12E, one of the divided cases 60 is connected to an assembly including the semiconductor unit 530, the first metal plate 510, and the second metal plate 520, and an insulating material is applied.

  By applying the insulating material, the exposed surface of the conductive portion on the first metal plate 510 side and the conductive portion of the second metal plate 520 can be covered with the insulating layer 553b. The insulating layer 553b can function as the first insulating member 553 and the second insulating member 554.

  As shown in FIG. 12F, the semiconductor device 501 is completed by connecting the other side of the divided case 60 to an opened portion of the assembly.

  According to this manufacturing method, solder paste containing an insulating organic residue may be used for the first connection member 551 and the second connection member 552, but the exposed surface inside the semiconductor device 501 may be formed by the insulation member without using the paste. Can be covered. For the first connection member 551 and the second connection member 552, a conductive paste, a sintered body of metal particles, an intermetallic compound, and the like can be used in addition to solder paste and solder that do not contain an insulating residue.

The operation and effect of the semiconductor device of this embodiment will be described.
Injecting an insulating member such as silicone resin from the side surface of the assembly of the first metal plate, the semiconductor unit, and the second metal plate is considered to reduce the ease of assembly. In addition, a narrow gap is formed around the terminal of the semiconductor unit 530, the connection member, and the connection portion of the metal plate, and a void may occur in the injected resin. Therefore, in the manufacturing method in which the insulating member is injected, it may be difficult to completely cover the exposed surface of the conductive portion.

  In the semiconductor device 501 of this embodiment, a solder paste containing an insulating residue is used for the connection member. Therefore, an insulating residue is deposited around the terminal of the semiconductor unit 530, the connection member, and the connection portion of the metal plate, and the exposed surface of the conductive portion around the connection portion can be covered. Therefore, the exposed surface of the conductive portion inside the semiconductor device 501 can be covered with the insulating member without reducing the ease of assembly.

  Further, according to another manufacturing method, the exposed surface of the conductive portion inside the semiconductor device 501 can be covered by using a coating technique.

  In this way, the exposed surfaces around the terminals of the semiconductor unit 530, the connecting member, and the connecting portion of the metal plate are covered with the insulating member, so that it is not necessary to consider the creeping distance inside the semiconductor device, and the outer surface of the case 60 By ensuring the creepage distance, it is possible to ensure the withstand voltage. Therefore, in this embodiment, since the assembly property can be improved while improving the yield of the semiconductor device 501, the semiconductor device 501 can be manufactured at a lower cost.

(Modification)
FIGS. 13A and 13B are cross-sectional views illustrating a part of the semiconductor device of this modification.
In this modification, the configurations of the semiconductor units 530v and 530h are different from those in the above-described embodiment. The other points are the same as described above, and the same components are denoted by the same reference numerals and detailed description thereof is omitted.

  As shown in FIG. 13A, the semiconductor unit 530v includes a first metal member 531v, a second metal member 532v, a semiconductor element 40, and a sealing resin 535v. In this example, the semiconductor element 40 is provided between the first metal member 531v and the second metal member 532v arranged side by side in the horizontal direction (X-axis direction). A part of the sealing resin 535v extends to the upper surface and the lower surface of the semiconductor unit 530v and encloses the semiconductor element 40. The sealing resin 535v has a convex surface 535va protruding in the lateral direction. Then, the side surface of the first metal member 531 and the side surface of the second metal member 532v are exposed on the lower surface and the upper surface of the semiconductor unit 530v, respectively. The side surface of the first metal member 531v is the first terminal 531va, and the side surface of the second metal member 532v is the second terminal 532va. The semiconductor unit 530v is electrically connected to the first metal plate 10 by the first terminal 531va, and is electrically connected to the second metal plate 20 by the second terminal 532va.

  As described above, the semiconductor unit 530v may be arranged in a direction intersecting with a direction (a direction parallel to the XY plane) in which the first surface of the first metal plate and the first surface of the second metal plate extend. Thereby, the creeping distance between the first terminal 531 va and the second terminal 532 va can be easily made longer than in the case of the semiconductor unit 30 of the first embodiment. Further, since the sealing resin 535v has the convex surface 535va, the creepage distance between the first terminal 531va and the second terminal 532va can be further extended.

  In the above-described modification, the semiconductor unit 530v is arranged in a direction intersecting with the extending direction of the first surfaces 10a and 20a. However, as in the case of the first embodiment, the semiconductor unit 530h is the first unit. You may make it arrange | position in the same direction as the direction where the surfaces 10a and 20a extend. As shown in FIG. 13B, the semiconductor unit 530h includes a first metal member 531h, a second metal member 532h, a semiconductor element 40, and a sealing resin 535h. The first metal member 531h and the second metal member 532h extend in the X direction and the Y direction, and the first terminal 531ha and the second terminal 532ha are provided substantially parallel to the XY plane. The sealing resin 535h has a convex surface 535ha.

  As in these modified examples, the amount of the sealing resin increases in the portions where the convex surfaces 535va and 535ha are formed. Therefore, by providing the convex surfaces 535va and 535ha at the position facing the surface of the semiconductor element 40, the stress at the time of resin sealing can be relieved and the characteristic deterioration of the semiconductor element can be prevented.

  In this modification, including the periphery of the terminal of the semiconductor unit, the connection member and the connection part of the metal plate, the insulation member that covers the conductive part inside the semiconductor device, even if insulation failure for some reason, A creepage distance is secured in the semiconductor unit. For this reason, it is possible to guarantee the withstand voltage of the semiconductor device.

  The above-described modifications can be applied by replacing the semiconductor units 530v and 530h as modifications in the other embodiments described above. The shape of the sealing resin is not limited to one convex surface as long as the creepage distance is extended, and may include a plurality of convex surfaces or one or more concave surfaces.

(Sixth embodiment)
FIG. 14 is a cross-sectional view illustrating a semiconductor device according to this embodiment.
As shown in FIG. 14, the semiconductor device 601 of this embodiment further includes heat sinks 681 and 682. The semiconductor device 601 of this embodiment has a configuration in which heat sinks 681 and 682 are connected to the case of the other embodiments described above (in this example, the assembly 610 which is the semiconductor device 501). About another component, it is the same as that of the case of the other embodiment mentioned above, and attaches | subjects the same code | symbol to the same component, and abbreviate | omits detailed description.

  The heat sink 681 is connected to the second surface 10 b of the first metal plate 10. The second surface 10b is a surface opposite to the first surface 10a. The heat sink 682 is connected to the second surface of the second metal plate 20. The second surface 20b is the opposite side of the first surface 20a.

  For connection of the heat sinks 681 and 682, a known connection technique such as soldering, brazing, friction stir welding, or the like is used. Preferably, the heat sinks 681 and 682 are connected without providing an insulating plate or an insulating member between the first metal plate 10 and the second metal plate 20. Thereby, thermal resistance can be reduced.

  The heat sinks 681 and 682 are made of a material having good thermal conductivity and electrical conductivity. Heat sinks 681 and 682 include, for example, a metal such as copper or aluminum.

  The heat sinks 681 and 682 may be air-cooled or water-cooled. In the case of a water-cooled heat sink, it is preferably used by circulating pure water inside.

The operation and effect of the semiconductor device 601 of this embodiment will be described.
In the semiconductor device 601 of this embodiment, the heat sinks 681 and 682 are directly connected to the first metal plate 10 and the second metal plate 20 without using an insulating plate. Therefore, the thermal resistance of the semiconductor device 601 can be kept low.

  When a water-cooled heat sink using pure water is used, since pure water is a non-conductor, there is no need to consider electric leakage, so that the cooling system can be configured simply.

(Seventh embodiment)
FIG. 15 is a cross-sectional view illustrating a semiconductor device according to this embodiment.
As shown in FIG. 15, the semiconductor device 701 of this embodiment includes heat sinks 781 and 782 and a plurality of assemblies 710. The semiconductor device 701 of this embodiment has a configuration in which heat sinks 781 and 782 are connected to the case of the other embodiments described above (in this example, a plurality of assemblies 710 that are the semiconductor devices 501). That is, the semiconductor device 701 of the present embodiment is a device in which a plurality of semiconductor devices manufactured in advance are arranged between the heat sinks 781 and 782 and are electrically and thermally connected to each other. Since the heat sinks 781 and 782 have conductivity and high thermal conductivity, the assembly 710 can be connected in parallel to further increase the current.

(Eighth embodiment)
FIG. 16 is a cross-sectional view illustrating a semiconductor device of this embodiment.
As shown in FIG. 16, the semiconductor device 801 of this embodiment includes a plurality of assemblies 810 and a connection member 820. The assembly 810 is the same as the semiconductor device 601 in the case of the sixth embodiment described above. The connecting member 820 is provided between the adjacently arranged assemblies 810. The connection member 820 electrically and thermally connects the heat sinks 681 of the assembly 810, and electrically and thermally connects the heat sinks 682.

  The assemblies 810 may be arranged along any one of the X-axis direction and the Y-axis direction, or may be arranged two-dimensionally along both the X-axis direction and the Y-axis direction.

  In this embodiment, a larger current output is enabled by arranging pre-manufactured assemblies 810 side by side and connecting the assemblies 810 electrically and thermally by the connecting member 820.

  In addition, about the case of embodiment provided with the heat sink mentioned above, it cannot be overemphasized that it can apply also in the case of other embodiment mentioned above and the other embodiment mentioned later, and there can exist the same effect. is there.

(Ninth embodiment)
FIG. 17 is a cross-sectional view illustrating a semiconductor device according to this embodiment.
FIG. 18A is a plan view illustrating a part of the semiconductor device of this embodiment. FIG. 18B is a cross-sectional view taken along the line CC in FIG.
As shown in FIG. 17, the semiconductor device 901 of this embodiment includes a first metal plate 10, a columnar part 12, a second metal plate 20, a columnar part 22, and a semiconductor unit 930. In this example, the heights of the columnar portions 12 and 22 are substantially the same. In this embodiment, the components of the semiconductor unit 930 are different from those in the other embodiments described above. The same components are denoted by the same reference numerals, and detailed description thereof is omitted.

  As shown in FIGS. 18A and 18B, the semiconductor unit 930 includes a first metal member 931, a second metal member 932, a semiconductor element 40, and a sealing resin 935. The semiconductor element 40 is connected to the first metal member 931 through the first bonding member 933 on one surface and is connected to the second metal member 932 through the second bonding member 934 on the other surface. The first metal member 931, the first bonding member 933, the semiconductor element 40, the second bonding member 934, and the second metal member 932 are a stacked body 939 stacked in this order.

  The sealing resin 935 seals the stacked body 939 except for the first terminal 931a and the second terminal 932a which are exposed surfaces.

  The sealing resin 935 includes a portion 935 a that covers the side surface of the stacked body 939. The sealing resin 935 further includes an insulating barrier 935 b extending in the stacking direction of the stacked body 939. In this example, the insulating barrier 935b extends in a direction in which the first terminal 931a and the second terminal 932a are exposed.

  The insulating barrier 935 b is provided so as to surround the outer periphery of the columnar part 12 when the semiconductor unit 930 is connected to the columnar part 12 of the first metal plate 10. The inner wall of the insulating barrier 935 b on the columnar part 12 side is separated from the outer periphery of the columnar part 12. Similarly, when the semiconductor unit 930 is connected to the columnar portion 22 of the second metal plate 20, the insulating barrier 935 b is provided so as to be separated from the columnar portion 22 and surround the outer periphery of the columnar portion 22.

FIG. 19 is a cross-sectional view for explaining the creeping distance inside the semiconductor device of this embodiment.
The creepage distance inside the semiconductor device 901 is between one electrode of the semiconductor element 40 (hereinafter referred to as an IGBT collector electrode) and the other electrode (hereinafter referred to as an IGBT emitter electrode). It is determined by the shortest distance on the surface of the sealing resin. The exposed conductive portion Cp of the collector electrode is the first terminal 931 a or the first bonding member 933. The exposed conductive portion Ep which is the potential of the exposed emitter electrode is the second terminal 932a or the second bonding member 934.

  FIG. 19 shows dimensions of each part for calculating the creepage distance of the semiconductor device 901. As shown in FIG. 19, in this example, the distance of the outer surface of the case 60 is set by a distance L <b> 0 between the first metal plate 10 and the second metal plate 20.

  Inside the semiconductor device 901, the creepage distance is calculated based on the dimensions of each part of the sealing resin 935. The length L1 is the length of the sealing resin 935 in the Z-axis direction. In other words, the length L1 is the length from the tip of the insulation barrier 935b on the first metal plate 10 side to the tip of the insulation barrier 935b on the second metal plate 20 side.

  Of the length of the sealing resin 935 in the Z-axis direction, the length of the insulating barrier 935b is L2. The thickness of the insulation barrier 935b is L3. The length L4 is a distance between the inner surface of the insulating barrier 935b and the outer surface of the columnar portion 12 (or the columnar portion 22).

  The creepage distance inside the semiconductor device 901 is defined along the arrows in the figure from the conductive portion Cp to the conductive portion Ep. According to this definition, the creepage distance L0 ′ inside the semiconductor device 901 is represented by the sum of the lengths L1 to L4. That is, L0 ′ = L4 + L2 + L3 + L1 + L3 + L2 + L4 = L1 + 2 × (L2 + L3 + L4).

  By appropriately setting L1 to L4, L0 '> L0 can be established. That is, the creepage distance can be secured without increasing the thickness of the stacked body 939 and without increasing the distance between the first terminal 931a and the second terminal 932a.

  When the length L0 is 20 mm, the length L1 can be 18 mm so that the tip of the insulating barrier 935b does not contact the first surfaces 10a and 20a. When the thickness of the stacked body 939 is 8 mm, the length L2 can be 5 mm. If the length L3 is 1 mm and the length L4 is 3 mm, the internal creepage distance L0 'can be 36 mm.

The operation and effect of the semiconductor device of this embodiment will be described.
The semiconductor device 901 according to this embodiment includes a semiconductor unit 930 including a sealing resin 935 having an insulating barrier 935b. Since the insulating barrier 935b can be set so that the tip does not contact the first surfaces 10a and 20a, the internal creepage distance can be increased according to the shape of the surface of the insulating barrier 935b. Therefore, an internal creepage distance can be secured without increasing the thickness of the stacked body 939. By taking a sufficient creepage distance inside the semiconductor device 901, the creepage distance can be determined by the distance between the conductive portions at both ends of the case 60, which can contribute to the thinning of the semiconductor device 901.

  In addition, when corrugated processing or convex processing is performed on the surface of the sealing resin, it is possible to extend the creeping distance inside the semiconductor device, but the separation distance between adjacent semiconductor units inside the semiconductor device Becomes longer. On the other hand, in the semiconductor device 901 of this embodiment, the distance between the adjacent semiconductor units 930 can be shortened, so that a larger number of semiconductor units 930 can be arranged and connected in parallel with a small area. . Therefore, a large current can be output without increasing the outer size.

(Tenth embodiment)
FIG. 20 is a cross-sectional view illustrating a semiconductor device according to this embodiment.
FIG. 21 is a cross-sectional view illustrating a part of the semiconductor device of this embodiment.
In this embodiment, the form of the sealing resin of the semiconductor unit is different from that in the above-described embodiment. About the same component, the same code | symbol is attached | subjected and detailed description is abbreviate | omitted.

  As shown in FIG. 20, the semiconductor device 1001 of the present embodiment includes a first metal plate 10, a columnar part 212, a second metal plate 20, a columnar part 222, and a semiconductor unit 1030. The heights of the columnar portions 212 and 222 are different. Preferably, the height of the columnar portion 212 on the high potential side is set higher than the height of the columnar portion 222 on the low potential side. The high potential side is, for example, the potential of the collector electrode of the semiconductor element 40, and the low potential side is the potential of the emitter electrode.

  As illustrated in FIG. 21, the semiconductor unit 1030 includes a stacked body 939 and includes a sealing resin 1035 that seals the stacked body 939 except for the first terminal 931 a and the second terminal 932 a. In the case of this embodiment, the insulating barrier 935b of the sealing resin 1035 is formed in one direction in the Z-axis direction, and is not formed on the other side. In this example, the insulating barrier 935b is provided so as to extend toward the first metal plate 10 side.

FIG. 22 is a cross-sectional view for explaining the creeping distance inside the semiconductor device of this embodiment.
In FIG. 22, the dimensions are set as in the case of the above-described embodiment. The creepage distance L0 ″ inside the semiconductor device 1001 can be represented by the sum of L1 ′ to L5 ′. That is, L0 ″ = L1 ′ + L2 ′ + L3 ′ + L4 ′ + L5 ′.

  As shown in FIG. 22, in this example, the height of the columnar portion 212 on the first metal plate 10 side is set higher than the height of the columnar portion 222 on the second metal plate 20 side. Therefore, the length of the insulating barrier 1035b provided on the columnar portion 212 side can be increased.

  The length of the sealing resin 1035 in the Z-axis direction is L1 ′. Of the length L1 ', the length of the insulating barrier 1035b is L2'. The thickness of the insulating barrier 1035b is L3 '. The length L4 'is a separation distance between the inner surface of the insulating barrier 1035b and the outer surface of the columnar section 212. The length L5 'is the length in the X-axis direction of the portion 935a of the sealing resin 1035 that covers the side surface of the stacked body 939. As is apparent from the figure, L5 '= L3' + L4 '.

  The creepage distance L0 ″ inside the semiconductor device 1001 is defined by the shortest distance on the surface of the sealing resin 1035 from the conductive portion Cp to the conductive portion Ep. Therefore, L0 ″ is the sum of L1 ′ to L5 ′.

  As specific dimensions, if L1 ′ = 14 mm, L2 ′ = 6 mm, L3 ′ (= L3) = 1 mm, and L4 ′ (= L4) = 3 mm, L5 ′ (= L3 + L4) = 4 mm, the internal creepage distance L0 '' Is 28 mm.

  Thus, the creeping distance inside can be secured also by forming the insulating barrier 1035b on one side of the first metal plate 10 or the second metal plate 20.

(Eleventh embodiment)
FIG. 23 is a cross-sectional view illustrating a semiconductor device according to this embodiment.
FIG. 24 is a cross-sectional view illustrating a part of the semiconductor device of this embodiment.
In this embodiment, when the semiconductor element 40 is equipped with a control electrode such as an IGBT or a MOSFET, the present embodiment is different from the above-described embodiment in that a wiring board is provided for connecting the control electrodes of the respective semiconductor elements 40 in parallel. . The other points are the same as those in the other embodiments described above, and the same components are denoted by the same reference numerals and detailed description thereof is omitted as appropriate.

  As shown in FIG. 23, the semiconductor device 1101 of this embodiment includes a first metal plate 10, a second metal plate 20, a semiconductor unit 1130, and a wiring board 1160. In this example, the wiring board 1160 is provided between the semiconductor unit 1130 and the second metal plate 20.

  As shown in FIG. 24, the semiconductor unit 1130 includes a first metal member 1131, a second metal member 1132, and a semiconductor element 40. One main surface of the semiconductor element 40 is connected to the first metal member 1131 via the first bonding member 1133. The other main surface of the semiconductor element 40 is connected to the second metal member 1132 via the second bonding member 1134.

  The semiconductor unit 1130 is different from the first embodiment in that the configuration of the second metal member 1132 is different from that of the first metal member 1131. The second metal member 1132 has a notch 1132b. The notch portion 1132 b is provided on the semiconductor element 40 side of the second metal member 1132. The lead wire 1336 connected to the control electrode of the semiconductor element 40 can be prevented from coming into contact with the second metal member 1132 by the notch 1132b. Further, by providing the notch portion 1132b on the semiconductor element 40 side, it is possible to prevent the area of the second terminal 1132a of the second metal member 1132 from decreasing. The sealing resin 1135 is sealed together with the stacked body 1139 except for the leading end portion of the exposed lead line 1136. In this example, the sealing resin 1135 has an insulating barrier 1135b on the first metal plate 10 side.

FIG. 25A and FIG. 25B are perspective views illustrating a part of the semiconductor device of this embodiment.
FIG. 26A is an exploded view illustrating the semiconductor device of this embodiment. FIG. 26B is a perspective view illustrating a semiconductor device of this embodiment.
As shown in FIG. 25A, the semiconductor units 1130 are arranged in a lattice pattern. The position where the semiconductor unit 1130 is disposed is the position of the columnar portion 12 of the first metal plate 10 and the columnar portion 22 of the second metal plate 20.

  As shown in FIG. 25B, the wiring board 1160 is provided with an opening 1161 so as to be inserted through the columnar portion 222 of the second metal plate 20 in this example. The wiring board 1160 is formed of an insulating material, and a pattern of a wiring 1162 made of a good conductor such as copper is drawn on the wiring board 1160. A connection land 1163 is provided on the wiring board 1160. The leading end of the lead wire 1136 of the semiconductor unit 1130 is inserted into the land 1163 and is electrically connected by solder or the like. Each land 1163 is electrically connected to each other by a wiring 1162. Therefore, the gate electrode lead line 1136 of each semiconductor unit 1130 is connected in parallel by the wiring 1162. The external terminal connection portion 1164 is provided at any position on the wiring board 1160. In this example, the wiring board 1160 is provided so as to protrude from one side. The wiring 1162 is routed to the external terminal connection portion 1164 and can be electrically connected to an external terminal.

  As shown in FIG. 26A and FIG. 26B, the wiring board 1160 is arranged with the opening 1161 aligned with the positions of the columnar portions 212 and 222. In this example, the openings 1161 are inserted through the columnar portions 222 (FIG. 23).

  A second connection member 1152 is applied to the tip of each columnar portion 222 inserted through the wiring board 1160.

  The first connection member 1151 is also applied to the tip of the columnar portion 212 of the first metal plate 10 and connected to the first terminal 1131 a of the semiconductor unit 1130.

  The second terminal 1132 a of the semiconductor unit 1130 is connected to the columnar part 222 by the second connection member 1152.

  The assembly described above is surrounded by the case 60. For example, the case 60 is divided into portions 61 and 62. One portion 61 is provided with an opening through which the external terminal connection portion 1164 is inserted. The parts 61 and 62 are connected to each other by an adhesive or the like.

  As described above, in the semiconductor device 1101 of this embodiment, the control electrodes such as the gate electrodes can be easily connected in parallel by using the wiring substrate 1160.

(Twelfth embodiment)
FIG. 27 is a cross-sectional view illustrating a semiconductor device according to this embodiment.
FIG. 28A and FIG. 28B are cross-sectional views for explaining the creeping distance inside the semiconductor device of this embodiment.
As shown in FIG. 27, in the semiconductor device 1201 of this embodiment, an insulating coating layer 1250 is provided in the vicinity of the periphery including the side surface of the columnar portion 212 and the connection portion of the columnar portion 212 with the first metal plate 10. The other points are the same as those of the other embodiments described above. The same components are denoted by the same reference numerals, and detailed description thereof is omitted as appropriate.

  FIG. 28A shows a semiconductor device using the semiconductor unit in the case of the other embodiments described above (FIGS. 20 and 21). As shown in FIG. 28A, in this example, the tip of the insulation barrier 935 b is separated from the first surface 10 a of the first metal plate 10. However, when this distance is short, dust or the like accumulates, and when the accumulated dust or the like contains moisture or the like, the insulating state may not be maintained.

  In such a case, it is necessary to consider that the conductive part Cp on the collector electrode side exists on the first surface 10a. Then, the internal creepage distance L0 ′ is L1 ″ + L2 ″ and may be shorter than L0.

  Therefore, as shown in FIG. 28B, an insulating coating layer 1250 is provided on the first surface 10a. The insulating coating layer 1250 is provided according to the creeping distance to be secured from the position on the first surface 10a corresponding to the tip of the insulating barrier 935b. That is, the length Lx is set so that L1 ″ + L2 ″ + Lx> L0 ′.

  For example, in this example, when the sum L1 ″ of the height and the separation distance of the sealing resin 935 is 15 mm and the length L2 ″ is 4 mm, the internal creepage distance L0 is set by setting Lx to 3 mm. 'Is 22 mm, which can be longer than the external creepage distance L0 = 20 mm.

  For example, a power conversion device used in a power system is assumed to be used in an external environment, and thus it is necessary to maintain high reliability in the long term. According to the semiconductor device of this embodiment, even when the insulation state between the insulating barrier 935b having a narrow separation distance and the first surface 10a is not maintained, the side surfaces of the columnar portion 12 and the first An internal creeping distance is secured by the insulating coating layer 1250 provided on the one surface 10a.

  In the above description, the case where the insulating coating layer is provided on a part of the first surface 10a has been described. However, it is possible to more stably secure the creeping distance by applying the insulating coating to the entire surface of the first surface 10a. It becomes possible.

(13th Embodiment)
FIG. 29 is a cross-sectional view illustrating a semiconductor device according to this embodiment.
FIG. 30 is an enlarged view of a portion D in FIG.
As shown in FIGS. 29 and 30, in the semiconductor device of this embodiment, resin potting 1350 is provided on the side surface of the columnar portion 212 provided with the insulating coating layer 1250 and the first connection member 1151. The resin potting 1350 is provided between the insulating barrier 935 b and the insulating coating layer 1250 applied to the columnar portion 12. The resin potting 1350 is provided between the insulating barrier 1135b and the first connecting member 1151. For the resin potting 1350, for example, a thermosetting insulating material such as silicone resin or epoxy resin can be used.

  In the present embodiment, a narrow space is formed between the inner wall of the insulating barrier 1135b and the outer periphery of the columnar portion 212. For example, if dust adheres to and accumulates in a part of such a narrow space, it may affect the insulation characteristics. Therefore, in this embodiment, by applying resin potting 1350 to the narrow portion in advance, it is possible to close the narrow space and prevent insulation failure due to dust adhesion.

  When epoxy resin or the like is used as the resin potting 1350, the periphery of the first metal member 1131 and the first connection member 1151 of the semiconductor unit 1130 is also molded, so that the bonding reliability in terms of mechanical strength is further improved. You can also.

  When potting the entire internal space of a semiconductor device, the effect of volume expansion and contraction due to temperature changes during curing of the potting material is large, and construction may be difficult. In addition, it may be difficult to eliminate minute voids. Furthermore, when the volume of the potting material is large, excessive stress may easily occur at the joint between the component member and the potting material due to a temperature change during use.

  On the other hand, in the semiconductor device of this embodiment, since potting can be partially performed in units of semiconductor units, the volume of the potting material can be reduced, so that the construction is facilitated and the stress is reduced. Therefore, long-term reliability is also improved.

(Fourteenth embodiment)
FIG. 31 is a cross-sectional view illustrating a semiconductor device according to the fourteenth embodiment.
FIG. 32A is a top view of a part of the semiconductor device, and FIG. 32B is a side view.

  As shown in FIGS. 31 to 32B, the semiconductor device 1401 includes a metal member 1410, a plurality of semiconductor units 1430 mounted on the metal member 1410, a main circuit wiring 1480, and a plurality of semiconductor units 1430. Each has a plurality of bus bars 1420 connecting the main circuit wiring 1480 and a case 1460 made of an insulating resin.

  The metal member 1410 has a plate-like portion 1410b and a plurality of convex portions (or columnar portions) 1410c. The plurality of convex portions 1410c are provided integrally with the plate-like portion 1410b on the one 1410a surface of the plate-like portion 1410b. A semiconductor unit 1430 is mounted on the convex portion 1410c via a connection member 1451. The metal member 1410 corresponds to the first metal plate 10 in the other embodiments described above.

  The lower end portion of the case 1460 is bonded to the plate-like portion 1410b of the metal member 1410, and a sealed space is formed inside the metal member 1410 and the case 1460. In the sealed space, the main circuit wiring 1480 is arranged in a region 1470 other than a region where the plurality of semiconductor units 1430 are provided.

  As in the other embodiments described above, the semiconductor unit 1430 includes a first metal member 1431, a second metal member 1432 disposed above the first metal member 1431, a first metal member 1431, and a second metal member 1432. And a semiconductor element 40 disposed between and an electrically insulating insulating member 1435. The semiconductor element 40 is connected to the first metal member 1431 on one surface thereof via the first bonding member 1433. The semiconductor element 40 is connected to the second metal member 1432 on the other surface via the second bonding member 1434.

  The second metal member 1432 includes two portions 1432b and 1432c, and the portion 1432c is a convex portion provided on the plate-like portion 1432b. The semiconductor element 40 and the second metal member 1432 are connected by a portion 1432c.

  The form of the joining member for joining each of the first metal member, the second metal member, and the semiconductor element in the semiconductor unit can be applied to the case of the other embodiments described above.

  Main circuit wiring 1480 is arranged between the plurality of semiconductor units 1430. The main circuit wiring 1480 is a plate-shaped metal wiring, for example, a copper wiring. The main circuit wiring 1480 is provided in a resin 1490 formed on the metal member 1410, and is held on the metal member 1410 by the resin 1490. A part of the main circuit wiring 1480 protrudes outside the case 1460 as a main electrode terminal (for example, an emitter terminal or a cathode terminal).

  The resin 1490 is provided so as to cover the inner surface of the semiconductor device 1401. The resin 1490 is provided so as to cover the surface of the conductive portion having the same potential as the surface 1410a of the metal member 1410. Since the resin 1490 covers at least the surface 1410a, the surface of the convex portion 1410c, and the surface of the first metal member 1431, it is not necessary to consider the creepage distance inside the semiconductor device 1401.

  A bus bar 1420 is joined to the plate-like portion 1432 b of the second metal member 1432 of the semiconductor unit 1430. Metal feet 1420a and 1420b are provided at both ends of the bus bar 1420. The metal feet 1420a and 1420b are, for example, copper brazed to the bus bar 1420. The bus bar 1420 corresponds to the second metal plate 20 in the other embodiments described above.

  The metal foot portion 1420 a at one end of the bus bar 1420 is joined to the side surface of the second metal member 1432 via the connection member 1452. Second metal member 1432 and metal foot 1420a may be connected by screw fastening. The metal foot portion 1420 a is not limited to the side surface of the second metal member 1432, and may be joined or screwed to the upper surface of the second metal member 1432.

  The metal foot 1420 b at the other end of the bus bar 1420 is joined or screwed to the main circuit wiring 1480. The resin 1490 covers and protects the joint portion between the main circuit wiring 1480 and the metal foot portion 1420b.

  The bus bar 1420 is made of a conductive material such as copper, 42 alloy (nickel and iron alloy), nickel and chromium alloy, for example. The bus bar 1420 is formed in, for example, a plate shape or a shape in which a plate member is bent in a zigzag manner. Bending the bus bar 1420 in a zigzag manner means that the length of the bus bar 1420 is substantially increased and the resistance value is increased by providing many bent portions in the direction in which the current flows.

The electric resistance of the bus bar 1420 is higher than the electric resistance of the main circuit wiring 1480. In the bus bar 1420, the cross-sectional area S [cm ² ] and the length (current path length) L [cm] of the cross section perpendicular to the direction in which the current flows are as follows: It is determined by the following formula.
R = ρ0 × L / S [Ω] (ρ0: volume resistivity [Ωcm])

  For example, by using a material having a volume resistivity higher than that of the main circuit wiring 1480 as the material of the bus bar 1420, the electric resistance of the bus bar 1420 is made higher than the electric resistance of the main circuit wiring 1480. The material of the main circuit wiring 1480 is preferably a material having a volume resistivity smaller than that of the bus bar 1420 in order to reduce electric resistance and reduce heat generation. For example, the material of the main circuit wiring 1480 is copper, and the material of the bus bar 1420 is 42 alloy (nickel and iron alloy) or nickel and chromium alloy.

  One semiconductor unit 1430 is electrically connected to the main circuit wiring 1480 by at least one bus bar 1420. The plurality of semiconductor units 1430 are electrically connected in parallel between the metal member 1410 and the main circuit wiring 1480 via the plurality of bus bars 1420. The current flows in the vertical direction (stacking direction) of the semiconductor unit 1430, that is, the Z-axis direction. The current flows between the metal member 1410 and the main circuit wiring 1480 through the semiconductor unit 1430 and the bus bar 1420.

  A short-circuit current flows through the semiconductor element 40, and the semiconductor element 40 is destroyed by Joule heat generated at that time. When the pressure in the semiconductor unit 1430 increases, the semiconductor unit 1430 may be ruptured.

  Therefore, according to the present embodiment, the bus bar 1420 having a certain high electric resistance value is connected in series to the semiconductor unit 1430, thereby sharing energy consumption between the bus bar 1420 and the semiconductor element 40, and generating a joule generated in the semiconductor element 40. Heat can be suppressed.

In normal operation (normal operation), current is divided into each bus bar 1420. Therefore, assuming that the total current flowing through the plurality of semiconductor units 1430 is Itotal, the Joule heat Q generated per one bus bar 1420 is Q = R × (Itotal / number of parallel) ² [J] (R is the electrical resistance [Ω] of the bus bar 1420).

A current flows through the semiconductor unit 1430 including the failed semiconductor element 40, and no current flows through the normal semiconductor unit 1430. The Joule heat Q ′ generated in the bus bar 1420 connected to the failed semiconductor unit 1430 is Q ′ = R × (Itotal) ² [J].

The loss generation effect on the current value flowing through the semiconductor unit 1430 during normal operation is Q / Q ′ = (1 / parallel number) ^{2 in} comparison with the time of failure, and the loss generation is reduced during the normal operation compared to the time of failure. can do.

  Due to the parallel connection effect of the plurality of bus bars 1420, the bus bar 1420 connected to the failed semiconductor unit 1430 consumes energy at the time of failure without deteriorating the efficiency of the semiconductor unit 1430 during normal operation. The generated Joule heat can be suppressed, and the burst of the semiconductor unit 1430 can be suppressed.

  That is, at the time of failure, a short-circuit current flows only in the failed semiconductor unit 1430 and the bus bar 1420 connected in series to the semiconductor unit 1430, and large Joule heat can be generated in the bus bar 1420. Thereby, the Joule heat which generate | occur | produces in the semiconductor element 40 with which a short circuit current flows is reduced, and destruction can be suppressed.

  Since a plurality of bus bars 1420 are connected in parallel between the metal member 1410 and the main circuit wiring 1480, the current value flowing through each bus bar 1420 during normal operation is a value obtained by dividing the output current of the power semiconductor module by the number of parallel operations. Thus, Joule heat during normal operation can be suppressed.

  According to the embodiment described above, it is possible to realize a semiconductor device capable of high current output with high safety.

  As mentioned above, although some embodiment of this invention was described, these embodiment is shown as an example and is not intending limiting the range of invention. These novel embodiments can be implemented in various other forms, and various omissions, replacements, and changes can be made without departing from the scope of the invention. These embodiments and modifications thereof are included in the scope and gist of the invention, and are included in the scope of the invention described in the claims and the equivalents thereof. Further, the above-described embodiments can be implemented in combination with each other.

  DESCRIPTION OF SYMBOLS 1 Semiconductor device, 10 1st metal plate, 10a 1st surface, 10b 2nd surface, 12 Columnar part, 20 2nd metal plate, 20a 1st surface, 20b 2nd surface, 22 Columnar part, 30 Semiconductor unit, 31 1st 1 metal member, 32 second metal member, 33 first joint member, 34 second joint member, 35 sealing resin, 39 laminated body, 40 semiconductor element, 51 first connection member, 52 second connection member, 60 case, 70 Insulating member, 201, 301, 401 Semiconductor device, 330, 430 Semiconductor unit, 350, 350a Wiring substrate, 353 hole, 435 sealing resin, 501, 601, 701, 801 Semiconductor device, 510 First metal plate, 520 Second metal plate, 530, 530v, 530h Semiconductor unit, 551 first connection member, 552 second connection member, 553 first insulating member, 5 3a 1st insulating layer, 553b insulating layer, 554 3rd insulating member, 555 2nd insulating member, 555a 2nd insulating layer, 556 4th insulating member, 681, 682, 781, 782 heat sink, 901, 1101, 1201, 1301 Semiconductor device, 930, 1030, 1130 Semiconductor unit, 935, 1035 Sealing resin, 935b, 1035b Insulating barrier, 1160 Wiring board, 1250 Insulating coating layer, 1350 Resin potting, 1401 Semiconductor device, 1410 Metal member, 1420 Bus bar, 1430 Semiconductor Unit, 1431 1st metal member, 1432 2nd metal member, 1433 1st joining member, 1434 2nd joining member, 1435 Insulating member, 1460 Case, 1470 region, 1480 Main circuit wiring, 1490 Resin

Claims (23)

A first metal plate having a first surface parallel to a first direction and a second direction intersecting the first direction;
A second metal plate having a second surface facing the first surface;
Two or more semiconductor units disposed between the first metal plate and the second metal plate;
A conductive first connecting member provided between the first metal plate and the two or more semiconductor units;
A conductive second connecting member provided between each of the second metal plate and the two or more semiconductor units;
With
Each of the two or more semiconductor units is
A first metal member having a first terminal and connected to the first metal plate via the first terminal and the first connection member;
A second metal member having a second terminal and connected to the second metal plate via the second terminal and the second connection member;
Between the first metal member and the second metal member, a semiconductor element connected to the first metal member on one main surface and connected to the second metal member on the other main surface;
A sealing resin that covers the first metal member other than the first terminal, the second metal member other than the second terminal, and the semiconductor element;
Including
A semiconductor device in which at least one of the conductive portion on the first terminal side and the conductive portion on the second terminal side is covered with an insulating first insulating member. A conductive first columnar portion connected to the first metal plate on the first surface and extending in a third direction intersecting the first direction and the second direction;
A conductive second columnar portion connected to the second metal plate on the second surface and extending in the third direction;
Further comprising
Each of the two or more semiconductor units is provided between the first columnar portion and the second columnar portion,
The semiconductor device according to claim 1, wherein at least one of the first columnar portion and the second columnar portion is covered with the first insulating member. The length along the third direction of the first columnar part is different from the length along the third direction of the second columnar part,
The semiconductor device according to claim 2, wherein the first insulating member covers a shorter one of a length of the first columnar portion and a length of the second columnar portion. A wiring board provided between the first metal plate and the second metal plate and electrically connecting the control electrodes of the semiconductor elements of each of the two or more semiconductor units;
The semiconductor device according to claim 1, wherein the wiring board is embedded in the first insulating member.   The semiconductor device according to claim 4, wherein the wiring board includes a hole filled with the first insulating member.   The length of the sealing resin in the first direction or the length of the second direction is the first insulation of the first terminal side and the second terminal side along the third direction. The semiconductor device according to claim 5, wherein the semiconductor device becomes shorter toward an end portion on a side where the member is provided. The conductive portion on the first terminal side covered by the first insulating member includes the first surface, the first connecting member, and the first terminal.
The semiconductor device according to claim 1, wherein the conductive portion on the second terminal side covered by the second insulating member includes the second surface, the second connection member, and the second terminal.   The semiconductor device according to claim 7, wherein the first insulating member includes a third insulating member in contact with the first connecting member.   The semiconductor device according to claim 8, wherein the third insulating member includes an insulating material different from that of the first insulating member. The first insulating member includes any one of an epoxy resin, a polyimide resin, or a fluororesin,
The semiconductor device according to claim 9, wherein the third insulating member includes any one of rosin, epoxy resin, polyimide resin, or fluororesin.   The semiconductor device according to claim 7, wherein the second insulating member includes a fourth insulating member in contact with the second connection member.   The semiconductor device according to claim 11, wherein the fourth insulating member includes an insulating material different from that of the second insulating member. The second insulating member includes any one of an epoxy resin, a polyimide resin, or a fluororesin,
The semiconductor device according to claim 12, wherein the fourth insulating member includes any one of rosin, epoxy resin, polyimide resin, or fluororesin.   The semiconductor device according to claim 1, wherein the sealing resin includes at least one of a convex surface and a concave surface between the first surface and the second surface. A first metal member providing a first terminal and a semiconductor element are connected by a first bonding member, and a second metal member providing a second terminal and the semiconductor element are connected by a second bonding member to form a laminate. Assembly process,
Forming a sealing resin around the laminate and manufacturing a semiconductor unit;
Forming a first insulating layer on the first surface of the first metal plate, and forming an opening in the first insulating layer so as to expose the first surface;
Disposing a first bonding layer in the opening;
Connecting the first terminal to the first metal plate via the first bonding layer by a first connecting member;
Connecting the second terminal to a second metal plate via a second bonding layer formed on the second surface;
Have
The method of manufacturing a semiconductor device, wherein the first bonding layer is formed using a solder paste including a component that forms an insulating residue. A first metal member providing a first terminal and a semiconductor element are connected by a first bonding member, and a second metal member providing a second terminal and the semiconductor element are connected by a second bonding member to form a laminate. Assembly process,
Forming a sealing resin around the laminate and manufacturing a semiconductor unit;
Connecting the first terminal to a first metal plate via a first bonding layer formed on the first surface;
Connecting the second terminal to a second metal plate via a second bonding layer formed on the second surface;
Applying an insulating material to the assembly assembled by the process;
A method for manufacturing a semiconductor device comprising: A first metal plate having a first surface parallel to a first direction and a second direction intersecting the first direction;
A conductive first columnar portion connected to the first metal plate on the first surface and extending in a third direction intersecting the first direction and the second direction;
A second metal plate having a second surface facing the first surface;
A conductive second columnar portion connected to the second metal plate on the second surface and extending in the third direction;
A semiconductor unit disposed between the first columnar portion and the second columnar portion;
A conductive first connecting member provided between the first metal plate and the semiconductor unit;
A conductive second connecting member provided between the second metal plate and the semiconductor unit;
With
The semiconductor unit is
A first metal member having a first terminal and connected to the first columnar part via the first terminal and the first connection member;
A second metal member having a second terminal and connected to the second columnar portion via the second terminal and the second connection member;
Between the first metal member and the second metal member, a semiconductor element connected to the first metal member on one main surface and connected to the second metal member on the other main surface;
A sealing resin that covers the first metal member other than the first terminal, the second metal member other than the second terminal, and the semiconductor element;
Including
The said sealing resin is a semiconductor device containing the insulation barrier part spaced apart from the circumference | surroundings of at least one among the said 1st columnar part and the said 2nd columnar part, and was extended | stretched and provided in the said 3rd direction.   The semiconductor device according to claim 17, wherein a separation distance between an inner surface of the insulating barrier portion and an outer surface of at least one of the first columnar portion and the second columnar portion is constant over the periphery.   The semiconductor device according to claim 17, wherein the insulating barrier portion is provided around one of the first columnar portion and the second columnar portion. A first insulating portion is provided on a side surface of the first column portion and the second columnar portion on the side where the insulating barrier portion is provided,
The semiconductor device according to claim 17, wherein the first insulating portion is provided on a side of the first surface and the second surface where the insulating barrier portion is provided.   21. The semiconductor device according to claim 20, further comprising a second insulating portion provided between the first columnar portion or the second columnar portion having an outer surface separated from the insulating barrier portion and an inner surface of the insulating barrier portion. . A first metal plate;
A second metal plate provided apart from the first metal plate;
Main circuit wiring respectively connected to the second metal plate;
Two or more semiconductor units provided on the first metal plate via a connecting member;
With
Each of the two or more semiconductor units is
A first metal member having a first terminal and connected to the first metal plate via the first terminal;
A second metal member having a second terminal and connected to the second metal plate via the second terminal;
Between the first metal member and the second metal member, a semiconductor element connected to the first metal member on one main surface and connected to the second metal member on the other main surface;
A sealing resin that covers the first metal member other than the first terminal, the second metal member other than the second terminal, and the semiconductor element;
Including
At least one of the conductive portion on the first terminal side and the conductive portion on the second terminal side is covered with an insulating first insulating member,
The main circuit wiring is provided in another region where the two or more semiconductor units are provided,
The second metal plate is a semiconductor device having a resistance value higher than a resistance value of the main circuit wiring.   23. The semiconductor device according to claim 22, wherein the second metal plate has a plurality of bent portions along a direction in which a current flows.

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