JP2018093088A - Tray for semiconductor integrated circuit and manufacturing method thereof - Google Patents

Abstract

PURPOSE: To prevent a semiconductor integrated circuit, housed in the pocket of a tray for semiconductor integrated circuit, from sticking to the tray for semiconductor integrated circuit, due to static electricity.SOLUTION: In a tray 1 for semiconductor integrated circuit including multiple pockets 4 for housing a semiconductor integrated circuit, one or more than one meandering walls 7 are formed on the front side of the tray 1 for semiconductor integrated circuit, and the top surface of the one or more than one meandering walls 7 is a support face for supporting the semiconductor integrated circuit that must be housed, respectively, in the multiple pockets 4.SELECTED DRAWING: Figure 3

Description

  The present invention relates to a semiconductor integrated circuit tray for housing a semiconductor integrated circuit (semiconductor chip) such as an IC, and a method for manufacturing the same. The present invention relates to a semiconductor integrated circuit tray capable of preventing a circuit from sticking to a support surface of the tray or a back side surface of an upper tray, and a method of manufacturing the same.

  Since recent semiconductor chips (PKG) are becoming smaller and thinner, when a plurality of semiconductor integrated circuit trays are stacked, they are accommodated in concave pockets formed in the semiconductor integrated circuit trays. In some cases, the semiconductor chip (PKG) on the upper side of the semiconductor integrated circuit is stuck to the back side of the upper semiconductor integrated circuit tray. In addition, when transporting a tray on which semiconductor chips are placed, a plurality of stacked trays are turned upside down. In some cases, the tray is attached to the accommodating portion of the main surface of the tray (see Patent Document 1).

Japanese Patent No. 4299721

  Generation of static electricity can be suppressed by reducing the contact area between the semiconductor integrated circuit tray and the semiconductor integrated circuit (PKG) accommodated in the tray. However, paragraph 0026 of the specification of Patent Document 1 states that “if the protrusion 1 f comes into contact with the main surface of the semiconductor chip 2 and presses the semiconductor chip 2, the semiconductor chip 2 may crack.” As described above, if the area of the support surface in contact with the semiconductor integrated circuit is extremely small, the semiconductor integrated circuit may be damaged by applying excessive pressure to the semiconductor integrated circuit.

  The semiconductor integrated circuit accommodated in the pocket of the semiconductor integrated circuit tray sticks to the support surface for supporting the semiconductor integrated circuit or the back side surface of the upper tray of the plurality of stacked semiconductor integrated circuit trays. It should be possible to prevent this.

  In one embodiment of the present invention, a tray for a semiconductor integrated circuit having a plurality of pockets for housing a semiconductor integrated circuit, wherein one or a plurality of meandering walls are formed in each pocket, Provided is a tray for a semiconductor integrated circuit, wherein the top surface of the one or more meandering walls serves as a support surface for supporting the semiconductor integrated circuit to be accommodated in each of the plurality of pockets. To do.

  In one embodiment, one or more meandering walls are formed on the back side of each pocket, and the top side of the one or more meandering walls on the back side (opposite to the base of the wall). ) Is in a position where it can come into contact with the semiconductor integrated circuit accommodated in the pocket of the lower semiconductor integrated circuit tray when the semiconductor integrated circuit tray is stacked.

  Further, in one embodiment, a tray for a semiconductor integrated circuit including a plurality of pockets for housing a semiconductor integrated circuit, and a plurality of walls that are spaced apart from each other are formed in each pocket, The top surfaces of the plurality of walls arranged apart from each other serve as support surfaces for supporting the semiconductor integrated circuit to be accommodated in each of the plurality of pockets.

  In another embodiment, in a method of manufacturing a tray for a semiconductor integrated circuit comprising a plurality of pockets for housing a semiconductor integrated circuit, the step of forming one or more meandering walls in each pocket comprising: One or more meandering walls in each pocket, wherein the top surface of the one or more meandering walls is a support surface for supporting a semiconductor integrated circuit to be accommodated in each of the plurality of pockets. A method of manufacturing a tray for a semiconductor integrated circuit including a forming step is presented.

  In another embodiment, forming one or more serpentine walls on the back side of each pocket, wherein the top surface of the one or more serpentine walls of the back side is the semiconductor integrated One or a plurality of meandering walls on the back side surface of each pocket at a position where it can come into contact with the semiconductor integrated circuit accommodated in the pocket of the lower semiconductor integrated circuit tray when the circuit tray is stacked. The method further includes forming.

  In yet another embodiment, at least one of forming one or more serpentine walls in each pocket and forming one or more serpentine walls on the back side of each pocket comprises: Molding the one or more serpentine walls using a die that has been machined to a certain depth using an end mill.

The figure which shows the tray for semiconductor integrated circuits which concerns on this invention. The figure which shows the position of the groove | channel cut by the front and back of a tray. (A) The figure which expands and shows a part of pocket. (B) The figure which shows one Example of the normal route which moves an end mill when cutting the type | mold for shape | molding the wall in a pocket. An enlarged photo showing a part of the back side of the pocket. The figure which shows the several tray for semiconductor integrated circuits bundled with the binding band. The schematic diagram which shows an example which has the some wall arrange | positioned mutually spaced apart on the front side.

  A tray for a semiconductor integrated circuit according to the present invention will be described with reference to the accompanying drawings.

  FIG. 1 is a plan view of a tray 1 for semiconductor integrated circuit (hereinafter simply referred to as “tray 1”) of the present invention. The front side surface 2 is provided with a plurality of pockets 4 of a semiconductor integrated circuit partitioned by vertical and horizontal partition frames 3, and one or a plurality of walls are formed in each pocket 4. The top surface of the one or more walls serves as a support surface for supporting a semiconductor integrated circuit (not shown) to be accommodated in each pocket 4.

  FIG. 1B is an enlarged perspective view showing the pocket 4 and its periphery provided in the tray 1 according to one embodiment. In one embodiment, the top surface of the support surface 5 is preferably formed flush with the other in order to stably support the semiconductor integrated circuit accommodated in the pocket.

  FIG. 2 shows the positions of the wall 7 formed on the front side surface 2 of the tray 1 and the wall 8 formed on the back side surface 6. In one embodiment, the wall 7 is formed around the entire circumference of the rectangular pocket 4 (the portion painted black in FIG. 2). In the embodiment shown in FIG. 2, one or more walls 8 are formed at four locations on the back side 6 of each pocket 4. In other embodiments, one or more walls 8 may be formed in fewer than four locations on the back side 6 of the tray 1 or one or more walls in more than four locations. 8 may be formed.

  As a method of forming the wall, the wall 7 can be molded using a groove cut into the mold. In one embodiment, a 0.02 mm deep groove is cut into a mold using an end mill with a radius of curvature R = 0.15 (mm). In other embodiments, a groove deeper than 0.02 mm may be cut into a mold, and a groove shallower than 0.02 mm may be cut into a mold.

  In one embodiment, when the trays 1 are stacked (see FIG. 5), the position of the back side surface 6 of the tray 1 that can come into contact with the four corners of the semiconductor integrated circuit housed in each pocket 4 of the lower tray 1. In addition, a meandering wall 8 is formed. In another embodiment, the size and arrangement of the wall 8 formed on the back side surface 6 of the tray 1 can be changed according to the size and shape of the semiconductor integrated circuit accommodated in each pocket 4.

  FIG. 3A is an enlarged photograph showing the inside of a one-dot chain line frame indicated by reference numeral A in FIG. 2 and shows a meandering wall 7 formed on the front side surface 2 of the tray 1.

  In one embodiment shown in FIG. 3 (a), a plurality of walls 7a that are spaced apart from each other are formed at the four corners of each pocket 4. In other words, it can be said that the lattice-like grooves are formed so as to separate the plurality of walls 7a from each other. That is, since air is easy to flow through the lattice-shaped grooves at the four corners of each pocket 4, static electricity is hardly generated. In this way, it is possible to prevent the semiconductor integrated circuit housed in each pocket 4 from sticking to the support surface 5. In another embodiment of the present invention, a plurality of walls arranged apart from each other are formed around each pocket 4 (see FIG. 6).

  FIG. 3B shows an example of a route for continuously moving the end mill when cutting a mold for molding the four corner walls of each pocket 4. In this embodiment, the end mill is moved along a route indicated by an arrow in FIG. 3B to cut a groove having a certain depth into a die. In one embodiment, when a plastic or the like is molded into the mold from above and turned upside down, the wall shown in the photograph of FIG. 3A is obtained.

  That is, in one embodiment shown in FIG. 3 (b), one or more meandering walls 7 are formed using a groove 7 'cut into a mold to a certain depth using an end mill. be able to. In addition, it is possible to form a plurality of walls 7a that are spaced apart from each other by using grooves 7a 'cut into a mold by a certain depth using an end mill. The meandering pitch interval of the meandering walls 7 to be molded and the interval between the plurality of walls 7a arranged apart from each other are preferably small and preferably constant.

  In another embodiment, there is a case in which a die of a meandering wall 7 or a plurality of walls 7a arranged apart from each other is cut by electric discharge machining. In still another embodiment, the meandering wall 7 and a plurality of walls 7a arranged apart from each other may be directly formed on the tray 1 without using a mold. Alternatively, the unevenness can be formed on the semiconductor integrated circuit tray by using embossing (etching), but when there is a very fine masking region, a high level masking technique may be required.

  FIG. 4 is an enlarged photograph showing the inside of the one-dot chain line frame indicated by the symbol B in FIG. A meandering wall 8 may be formed at one or more locations on the back side surface 6 of the pocket 4 of the tray 1 (the locations painted black in FIG. 2). In another embodiment, instead of the meandering wall 8, a plurality of (non-meandering) walls spaced apart from each other as shown in FIG. .

  As described above, according to the tray 1 of the present invention, a plurality of semiconductor integrated circuits accommodated in the pockets of the tray 1 may stick to the support surface 5 in the pockets 4 of the tray 1, It is possible to prevent sticking to the back side surface of the tray 1 and, in turn, contribute to improving work efficiency at the shipping destination of the semiconductor integrated circuit.

  In addition, since the support surface for supporting the semiconductor integrated circuit is the top surface of the meandering wall or the top surfaces of the plurality of walls arranged apart from each other, the semiconductor integrated circuit accommodated in the pocket is provided. In close contact with a relatively large area, even when a plurality of trays 1 are stacked, pressure is not excessively applied locally to the semiconductor integrated circuit. Therefore, the semiconductor integrated circuit can be prevented from being damaged.

DESCRIPTION OF SYMBOLS 1 ... Semiconductor integrated circuit tray 2 ... Front side surface 3 ... Partition frame 4 ... Pocket 5 ... Support surface 6 ... Back side surface 7 ... (Meandering) wall 7a ... (Plurally spaced apart) Wall 8 ... ( Walls formed on the back side of each pocket 9 ... Tray for semiconductor integrated circuit 10 ... Empty tray 11 ... Bundling band

Claims (6)

A semiconductor integrated circuit tray comprising a plurality of pockets for housing a semiconductor integrated circuit,
In each pocket, one or more meandering walls are formed, and the top surface of the one or more meandering walls supports the semiconductor integrated circuit to be accommodated in each of the plurality of pockets. A tray for a semiconductor integrated circuit, characterized by being a support surface for the semiconductor integrated circuit.   In the case where one or a plurality of meandering walls are formed on the back side surface of each pocket, and the top surface of the one or more meandering walls on the back side surface is stacked with the semiconductor integrated circuit tray. 2. The tray for a semiconductor integrated circuit according to claim 1, wherein the tray for the semiconductor integrated circuit is in a position where it can come into contact with the semiconductor integrated circuit accommodated in the pocket of the tray for the semiconductor integrated circuit at the lower stage. A semiconductor integrated circuit tray comprising a plurality of pockets for housing a semiconductor integrated circuit,
A plurality of walls that are spaced apart from each other are formed in each pocket, and the top surfaces of the plurality of walls that are spaced apart from each other are to be accommodated in each of the plurality of pockets. A tray for a semiconductor integrated circuit, which is a support surface for supporting a circuit. In a method of manufacturing a tray for a semiconductor integrated circuit including a plurality of pockets for housing a semiconductor integrated circuit,
Forming one or more serpentine walls in each pocket, the top surface of the one or more serpentine walls supporting a semiconductor integrated circuit to be accommodated in each of the plurality of pockets; A method of manufacturing a tray for a semiconductor integrated circuit, comprising the step of forming one or more serpentine walls in each pocket to serve as a support surface for.   Forming one or more serpentine walls on the back side of each pocket, wherein the top surface of the one or more serpentine walls of the back side is stacked with the semiconductor integrated circuit tray And forming one or more serpentine walls on the back side of each pocket in a position that can contact the semiconductor integrated circuit contained in the pocket of the lower semiconductor integrated circuit tray. Item 5. A method for manufacturing a tray for a semiconductor integrated circuit according to Item 4.   At least one of the step of forming one or more serpentine walls in each pocket and the step of forming one or more serpentine walls on the back side of each pocket has a constant depth using an end mill. 6. The method of manufacturing a tray for a semiconductor integrated circuit according to claim 5, comprising molding the one or more meandering walls by using a die cut only.