JP2018093034A - Manufacturing method for solar battery and plating device for electrode formation - Google Patents
Manufacturing method for solar battery and plating device for electrode formation Download PDFInfo
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Abstract
Description
本発明は、電解めっきにより金属電極を形成する太陽電池の製造方法、およびそれに用いる電極形成用めっき装置に関する。 The present invention relates to a method for manufacturing a solar cell in which a metal electrode is formed by electrolytic plating, and an electrode forming plating apparatus used therefor.
太陽電池では、半導体接合を有する光電変換部への光照射により発生したキャリア（電子および正孔）を、光電変換部の表面に設けられた金属電極を介して外部回路に取り出すことにより発電がおこなわれる。受光面では、金属電極によるシャドーイングロスを低減するために、金属電極がパターン状に形成される。金属電極のパターンとしては、フィンガー電極およびバスバー電極からなるグリッドパターンが典型的である。裏面側にも受光面と同様にパターン状の金属電極が形成される場合がある。 In a solar cell, power is generated by taking out carriers (electrons and holes) generated by light irradiation to a photoelectric conversion unit having a semiconductor junction to an external circuit through a metal electrode provided on the surface of the photoelectric conversion unit. It is. On the light receiving surface, the metal electrode is formed in a pattern in order to reduce shadowing loss due to the metal electrode. A typical metal electrode pattern is a grid pattern made up of finger electrodes and bus bar electrodes. A patterned metal electrode may be formed on the back side as well as the light receiving surface.
電極材料コストの低減等を目的として、めっき法により太陽電池の金属電極を形成する方法が提案されている。例えば、光電変換部の表面に、パターン開口を有する絶縁層（レジスト等）設け、絶縁層の開口下に露出した金属シードを起点とする電解めっきにより、パターン状の金属電極が形成される。特許文献１では、所定の冶具を用い、光電変換部の表面と裏面を等電位として、電解めっきにより、表裏両面に金属電極を形成する方法を開示している。 For the purpose of reducing the electrode material cost, a method of forming a metal electrode of a solar cell by a plating method has been proposed. For example, an insulating layer (resist or the like) having a pattern opening is provided on the surface of the photoelectric conversion portion, and a patterned metal electrode is formed by electrolytic plating starting from a metal seed exposed under the opening of the insulating layer. Patent Document 1 discloses a method of forming metal electrodes on both front and back surfaces by electrolytic plating using a predetermined jig, with the front and back surfaces of the photoelectric conversion unit being equipotential.
特許文献１に開示されているように、電解めっきにより基板の表裏に同時に金属電極を形成する方法は、電極形成時間の短縮に寄与する。しかし、受光面および裏面の両面にパターン状の金属電極を電解めっきにより同時に形成すると、被めっき領域である絶縁層の開口箇所以外に、不所望のめっき金属が析出する場合があることが判明した。かかる課題に鑑み、本発明は、受光面および裏面の両面にパターン状のめっき金属電極を有する太陽電池の製造方法、およびそれに用いられる電極形成用めっき装置の提供を目的とする。 As disclosed in Patent Document 1, the method of simultaneously forming metal electrodes on the front and back of a substrate by electrolytic plating contributes to shortening of the electrode formation time. However, it has been found that when a patterned metal electrode is simultaneously formed on both the light-receiving surface and the back surface by electrolytic plating, undesired plating metal may be deposited in addition to the openings in the insulating layer, which is the plated region. . In view of this problem, an object of the present invention is to provide a method for manufacturing a solar cell having patterned metal electrodes on both the light receiving surface and the back surface, and an electrode forming plating apparatus used therefor.
本発明の太陽電池の製造方法では、被めっき基板の第一主面および第二主面のそれぞれに、電解めっきによりパターン状のめっき金属電極が形成される。被めっき基板は、光電変換部の第一主面の被めっき領域において第一下地導電層が第一絶縁層の開口から露出しており、光電変換部の第二主面の被めっき領域において第二下地導電層が第二絶縁層の開口から露出している。光電変換部はｐｎ接合またはｐｉｎ接合を有し、第一主面がｎ型半導体層側、第二主面がｐ型半導体層側である。 In the method for manufacturing a solar cell of the present invention, a patterned metal electrode is formed on each of the first main surface and the second main surface of the substrate to be plated by electrolytic plating. In the substrate to be plated, the first base conductive layer is exposed from the opening of the first insulating layer in the plated region on the first main surface of the photoelectric conversion unit, and in the plated region on the second main surface of the photoelectric conversion unit. The second base conductive layer is exposed from the opening of the second insulating layer. The photoelectric conversion unit has a pn junction or a pin junction, the first main surface is the n-type semiconductor layer side, and the second main surface is the p-type semiconductor layer side.
めっき装置は、被めっき基板を保持する基板ホルダ、第一アノード、第二アノード、および電源を備える。第一アノードは、基板ホルダ内に保持される被めっき基板の第一主面と対峙するように配置されており、第二アノードは、基板ホルダ内に保持される被めっき基板の第二主面と対峙するように配置されている。電源は、第一アノードと被めっき基板との間、および第二アノードと被めっき基板との間に、個別に電圧を印加可能である。 The plating apparatus includes a substrate holder that holds a substrate to be plated, a first anode, a second anode, and a power source. The first anode is arranged to face the first main surface of the substrate to be plated held in the substrate holder, and the second anode is the second main surface of the substrate to be plated held in the substrate holder. It is arranged to face. The power supply can individually apply a voltage between the first anode and the substrate to be plated and between the second anode and the substrate to be plated.
めっき金属電極の形成においては、被めっき基板と第一アノードとの間に電圧を印加して、被めっき基板の第一主面の被めっき領域にパターン状の第一めっき金属電極を形成した後、被めっき基板と第二アノードとの間に電圧を印加して、被めっき基板の第二主面の被めっき領域にパターン状の第二めっき金属電極を形成する。第二めっき金属電極の形成は、被めっき基板と第二アノードとの間に、電圧のオン・オフを繰り返すパルス電圧を印加するパルスめっきにより実施される。 In the formation of the plated metal electrode, a voltage is applied between the substrate to be plated and the first anode to form a patterned first plated metal electrode on the plated region of the first main surface of the substrate to be plated. Then, a voltage is applied between the substrate to be plated and the second anode to form a patterned second plated metal electrode in the region to be plated on the second main surface of the substrate to be plated. The formation of the second plated metal electrode is performed by pulse plating in which a pulse voltage for repeatedly turning on and off the voltage is applied between the substrate to be plated and the second anode.
電解めっきによる第一めっき金属電極の形成は、第一アノードと被めっき基板との間に、非パルス電圧を印加して実施することが好ましく、相対的に低電流密度で電解めっきを実施した後、電流密度を高めて相対的に高電流密度で電解めっきを実施することが好ましい。 The formation of the first plated metal electrode by electrolytic plating is preferably performed by applying a non-pulse voltage between the first anode and the substrate to be plated, and after performing electrolytic plating at a relatively low current density. It is preferable that the electroplating is performed at a relatively high current density by increasing the current density.
本発明によれば、太陽電池の表裏の両面にパターン状の金属電極を電解めっきにより形成するため、電極形成の材料コストおよび工数を低減可能である。また、電極パターン形成領域以外への金属の析出を抑制できるため、シャドーイングロスおよび外観不良を低減できる。 According to the present invention, since the patterned metal electrodes are formed on both the front and back surfaces of the solar cell by electrolytic plating, the material cost and man-hour for electrode formation can be reduced. Further, since metal deposition outside the electrode pattern formation region can be suppressed, shadowing loss and appearance defects can be reduced.
図１は、太陽電池の一実施形態を示す模式的断面図である。太陽電池２００は、光電変換部４０の第一主面にパターン状の金属電極１１０を備え、第二主面にパターン状の金属電極１２０を備える。金属電極１１０，１２０は、光電変換部側から、金属シード６１，６２、およびめっき金属電極８１，８２を有する。図１に示す太陽電池２００は、いわゆるヘテロ接合太陽電池であり、導電型結晶シリコン基板の表面にシリコン系薄膜が設けられることにより、半導体接合が形成されている。 FIG. 1 is a schematic cross-sectional view showing one embodiment of a solar cell. The solar cell 200 includes a patterned metal electrode 110 on the first main surface of the photoelectric conversion unit 40 and includes a patterned metal electrode 120 on the second main surface. The metal electrodes 110 and 120 have metal seeds 61 and 62 and plated metal electrodes 81 and 82 from the photoelectric conversion unit side. A solar cell 200 shown in FIG. 1 is a so-called heterojunction solar cell, and a semiconductor junction is formed by providing a silicon-based thin film on the surface of a conductive crystalline silicon substrate.
図２は、太陽電池の第一主面の平面図であり、複数のフィンガー電極１１２およびフィンガー電極と直交するバスバー電極１１１からなるグリッド状にパターン状の金属電極１１０が設けられている。第二主面の金属電極１２０も、第一主面と同様、パターン状に形成される。第一主面の金属電極１１０のパターン形状と第二主面の金属電極１２０のパターン形状は同一でも異なっていてもよい。例えば、裏面側は受光面側に比べてシャドーイングロスの影響が小さいため、裏面側の金属電極形成領域の面積を大きくしてもよい。例えば、裏面側のフィンガー電極の形成密度を受光面側のフィンガー電極の形成密度よりも大きくする（裏面側のフィンガー電極の本数を増やす）ことにより、裏面側の金属電極の形成面積が増大する。裏面側のフィンガー電極の本数は、受光面側のフィンガー電極の本数の１．５倍〜３倍程度が好ましい。 FIG. 2 is a plan view of the first main surface of the solar cell, in which a patterned metal electrode 110 is provided in a grid shape including a plurality of finger electrodes 112 and a bus bar electrode 111 orthogonal to the finger electrodes. Similarly to the first main surface, the metal electrode 120 on the second main surface is also formed in a pattern. The pattern shape of the metal electrode 110 on the first main surface and the pattern shape of the metal electrode 120 on the second main surface may be the same or different. For example, since the back surface side is less affected by shadowing loss than the light receiving surface side, the area of the metal electrode formation region on the back surface side may be increased. For example, by increasing the formation density of the finger electrodes on the back surface side than the formation density of the finger electrodes on the light receiving surface side (increasing the number of finger electrodes on the back surface side), the formation area of the metal electrodes on the back surface side increases. The number of finger electrodes on the back surface side is preferably about 1.5 to 3 times the number of finger electrodes on the light receiving surface side.
図３は、図１に示すヘテロ接合太陽電池の形成に用いられる被めっき基板の断面図である。被めっき基板２は、光電変換部４０の第一主面上に第一下地導電層７１を備え、光電変換部４０の第二主面上に第二下地導電層７２を備える。光電変換部４０はｐｎ接合またはｐｉｎ接合を有し、第一主面がｎ側、第二主面がｐ側である。 FIG. 3 is a cross-sectional view of a substrate to be plated used for forming the heterojunction solar cell shown in FIG. The to-be-plated substrate 2 includes a first base conductive layer 71 on the first main surface of the photoelectric conversion unit 40 and a second base conductive layer 72 on the second main surface of the photoelectric conversion unit 40. The photoelectric conversion unit 40 has a pn junction or a pin junction, and the first main surface is the n side and the second main surface is the p side.
図４は、めっき金属電極の形成に用いられるめっき装置の概略構成図である。めっき装置１は、基板ホルダ３、第一アノード８、第二アノード９、めっき浴５および電源７を備える。基板ホルダ３は電源７の負極に接続され、被めっき基板２の第一主面および第二主面に、電源７から電子が供給される。めっき浴５はめっき液６で満たされており、被めっき基板２を保持した基板ホルダ３、第一アノード８および第二アノード９が浸漬されている。第一アノード８は、基板ホルダ３に保持された被めっき基板２の第一主面に対峙するように配置され、第二アノード９は、被めっき基板２の第二主面に対峙するように配置されている。電源７は、第一アノード８と被めっき基板２との間、および第二アノード９と前記被めっき基板２との間に、個別に電圧を印加可能である。図４に示す例では、電源７の正極と第一アノード８および第二アノード９との間に切り替えスイッチが設けられている。電源７から、カソードとしての被めっき基板２とアノードとの間に電圧を印加することにより、被めっき基板の第一主面および第二主面にめっき金属電極が形成される。 FIG. 4 is a schematic configuration diagram of a plating apparatus used for forming a plated metal electrode. The plating apparatus 1 includes a substrate holder 3, a first anode 8, a second anode 9, a plating bath 5, and a power source 7. The substrate holder 3 is connected to the negative electrode of the power source 7, and electrons are supplied from the power source 7 to the first main surface and the second main surface of the substrate 2 to be plated. The plating bath 5 is filled with a plating solution 6, and the substrate holder 3 holding the substrate to be plated 2, the first anode 8 and the second anode 9 are immersed therein. The first anode 8 is disposed so as to face the first main surface of the substrate 2 to be plated held by the substrate holder 3, and the second anode 9 is opposed to the second main surface of the substrate 2 to be plated. Has been placed. The power source 7 can individually apply a voltage between the first anode 8 and the substrate 2 to be plated and between the second anode 9 and the substrate 2 to be plated. In the example shown in FIG. 4, a changeover switch is provided between the positive electrode of the power supply 7 and the first anode 8 and the second anode 9. By applying a voltage from the power source 7 between the substrate 2 to be plated as the cathode and the anode, plated metal electrodes are formed on the first main surface and the second main surface of the substrate to be plated.
まず、被めっき基板の構成について説明する。被めっき基板２は、光電変換部４０の第一主面の表面に第一絶縁層９１を有し、第二主面の表面に第二絶縁層９２を有する。第一主面および第二主面の被めっき領域では、下地導電層７１，７２が絶縁層９１，９２の開口から露出している。第一めっき工程では、第一主面の被めっき領域に第一めっき金属電極８１が形成され、第二めっき工程では、第二主面の被めっき領域に第二めっき金属電極８２が形成される。 First, the configuration of the substrate to be plated will be described. The to-be-plated substrate 2 has a first insulating layer 91 on the surface of the first main surface of the photoelectric conversion unit 40 and a second insulating layer 92 on the surface of the second main surface. In the areas to be plated on the first main surface and the second main surface, the base conductive layers 71 and 72 are exposed from the openings of the insulating layers 91 and 92. In the first plating step, the first plating metal electrode 81 is formed in the plated region of the first main surface, and in the second plating step, the second plating metal electrode 82 is formed in the plated region of the second main surface. .
光電変換部はｐｎ接合またはｐｉｎ接合を有する。ヘテロ接合太陽電池の光電変換部４０は、導電型結晶シリコン基板４５および導電型シリコン系薄膜４１，４２の間で形成されたｐｎ接合を有する。導電型結晶シリコン基板４５としては、ｎ型結晶シリコン基板とｐ型結晶シリコン基板のいずれを用いてもよい。シリコン基板内のキャリア寿命の長さから、ｎ型単結晶シリコン基板を用いることが好ましい。光閉じ込めにより入射光の利用効率を高める観点から、シリコン基板の表面には凹凸構造が設けられていることが好ましい。 The photoelectric conversion unit has a pn junction or a pin junction. The photoelectric conversion unit 40 of the heterojunction solar cell has a pn junction formed between the conductive crystal silicon substrate 45 and the conductive silicon thin films 41 and 42. As the conductive crystalline silicon substrate 45, either an n-type crystalline silicon substrate or a p-type crystalline silicon substrate may be used. In view of the long carrier life in the silicon substrate, it is preferable to use an n-type single crystal silicon substrate. From the viewpoint of increasing the utilization efficiency of incident light by light confinement, it is preferable that an uneven structure is provided on the surface of the silicon substrate.
シリコン基板４５の第一主面には、ｎ型シリコン系薄膜４１が設けられ、第二主面にはｐ型シリコン系薄膜４２が設けられる。これらの導電型シリコン系薄膜の膜厚は、２〜２０ｎｍ程度である。ヘテロ接合太陽電池では、受光面側のへテロ接合が逆接合の場合に光キャリアの分離回収効率が高められる傾向がある。そのため、シリコン基板４５としてｎ型結晶シリコン基板を用いる場合は、ｐ型シリコン系薄膜４２が設けられている第二主面を受光面とすることが好ましい。 An n-type silicon thin film 41 is provided on the first main surface of the silicon substrate 45, and a p-type silicon thin film 42 is provided on the second main surface. The film thickness of these conductive silicon thin films is about 2 to 20 nm. In the heterojunction solar cell, when the heterojunction on the light receiving surface side is a reverse junction, the separation and recovery efficiency of the optical carrier tends to be increased. Therefore, when an n-type crystalline silicon substrate is used as the silicon substrate 45, the second main surface on which the p-type silicon-based thin film 42 is provided is preferably used as the light receiving surface.
ヘテロ接合太陽電池では、シリコン基板４５と導電型シリコン系薄膜４１，４２との間に、真性シリコン系薄膜４３，４４が設けられていることが好ましい。シリコン基板４５の表面に真性シリコン系薄膜４３，４４が設けられることにより、シリコン基板４５の表面欠陥が終端され、太陽電池の出力が向上する。これらのシリコン系薄膜は、例えばプラズマＣＶＤ法により製膜される。 In the heterojunction solar cell, intrinsic silicon-based thin films 43 and 44 are preferably provided between the silicon substrate 45 and the conductive silicon-based thin films 41 and 42. By providing the intrinsic silicon-based thin films 43 and 44 on the surface of the silicon substrate 45, the surface defects of the silicon substrate 45 are terminated and the output of the solar cell is improved. These silicon-based thin films are formed by, for example, a plasma CVD method.
ヘテロ接合太陽電池は、ｎ型シリコン系薄膜４１上に、第一透明導電層５１を備え、ｐ型シリコン系薄膜４２上に第二透明導電層５２を備える。透明導電層５１，５２の材料としては、酸化インジウム錫（ＩＴＯ）等の導電性金属酸化物が用いられる。透明導電層の膜厚は、２０〜１２０ｎｍ程度である。金属酸化物からなる透明導電層は、例えばＭＯＣＶＤ法やスパッタ法により製膜される。 The heterojunction solar cell includes a first transparent conductive layer 51 on an n-type silicon thin film 41 and a second transparent conductive layer 52 on a p-type silicon thin film. As a material of the transparent conductive layers 51 and 52, a conductive metal oxide such as indium tin oxide (ITO) is used. The film thickness of the transparent conductive layer is about 20 to 120 nm. The transparent conductive layer made of a metal oxide is formed by, for example, the MOCVD method or the sputtering method.
本実施形態において、被めっき基板２は、光電変換部の第一主面の下地導電層７１として、透明導電層５１上に金属シード６１を備え、光電変換部の第二主面の下地導電層７２として透明導電層５２上に金属シード６２を備える。金属シード６１，６２は、透明導電層５１，５２よりも高い導電率を有する金属材料からなる。下地導電層が、光電変換部側から透明導電層と金属シードを有することにより、金属シード６１，６２がめっき金属電極８１，８２を形成する際の下地層として機能し、電解めっきの効率を向上できる。金属シード６１，６２の材料としては、銅、銀、ニッケル、スズ、アルミニウムおよびこれらの合金等を使用できる。 In this embodiment, the to-be-plated substrate 2 includes a metal seed 61 on the transparent conductive layer 51 as the base conductive layer 71 on the first main surface of the photoelectric conversion unit, and the base conductive layer on the second main surface of the photoelectric conversion unit. 72, a metal seed 62 is provided on the transparent conductive layer 52. The metal seeds 61 and 62 are made of a metal material having a higher conductivity than the transparent conductive layers 51 and 52. Since the base conductive layer has the transparent conductive layer and the metal seed from the photoelectric conversion portion side, the metal seeds 61 and 62 function as a base layer when forming the plated metal electrodes 81 and 82, and the efficiency of electrolytic plating is improved. it can. As the material of the metal seeds 61 and 62, copper, silver, nickel, tin, aluminum, and alloys thereof can be used.
金属シードは、例えば、インクジェット法、スクリーン印刷法等の印刷法や、真空蒸着法、スパッタ法等のドライプロセス、および無電解めっき法等によって形成できる。材料の利用効率の観点から、金属シードは印刷により形成することが好ましい。印刷により金属シードが形成される場合、金属微粒子とバインダー樹脂材料と溶剤とを含む導電性ペーストを用いることが好ましい。バインダー樹脂としては、エポキシ系樹脂、フェノール系樹脂、アクリル系樹脂等の熱硬化性樹脂が好ましく用いられる。これらの樹脂は固体状の樹脂でもよく、液状樹脂でもよい。 The metal seed can be formed by, for example, a printing method such as an inkjet method or a screen printing method, a dry process such as a vacuum deposition method or a sputtering method, an electroless plating method, or the like. From the viewpoint of material utilization efficiency, the metal seed is preferably formed by printing. When the metal seed is formed by printing, it is preferable to use a conductive paste containing metal fine particles, a binder resin material, and a solvent. As the binder resin, a thermosetting resin such as an epoxy resin, a phenol resin, or an acrylic resin is preferably used. These resins may be solid resins or liquid resins.
印刷により金属シードが形成される場合、金属電極１１０，１２０のパターン形状に対応するように、金属シード６１，６２が形成される。例えば、図２に示すようなグリッド状の金属電極を形成する場合は、グリッド状の金属シードが形成される。 When the metal seed is formed by printing, the metal seeds 61 and 62 are formed so as to correspond to the pattern shape of the metal electrodes 110 and 120. For example, when a grid-like metal electrode as shown in FIG. 2 is formed, a grid-like metal seed is formed.
被めっき基板２は、第一主面および第二主面のそれぞれの表面に絶縁層９１，９２を備える。絶縁層９１，９２は、電解めっきによりめっき金属電極８１，８２を形成する際に光電変換部の表面をめっき液から保護する保護層として機能する。 The to-be-plated board | substrate 2 is equipped with the insulating layers 91 and 92 on each surface of a 1st main surface and a 2nd main surface. The insulating layers 91 and 92 function as a protective layer that protects the surface of the photoelectric conversion portion from the plating solution when the plated metal electrodes 81 and 82 are formed by electrolytic plating.
絶縁層９１，９２には、めっき金属層の形成時に用いられるめっき液に対する化学的安定性を有する材料が用いられる。開口の形成が容易であること、および保護性能に優れることから、各種のフォトレジスト材料や無機材料が好ましい。フォトレジストはポジ型でもネガ型でもよい。ポジ型のフォトレジスト材料としては、ノボラック樹脂、フェノール樹脂等、ネガ型のフォトレジスト材料としては、アクリル樹脂等が用いられる。絶縁性の無機材料としては、酸化シリコン、酸化マグネシウム、酸化銅、酸化ニオブ等が挙げられる。 For the insulating layers 91 and 92, a material having chemical stability with respect to a plating solution used when forming the plating metal layer is used. Various photoresist materials and inorganic materials are preferable because the formation of the opening is easy and the protective performance is excellent. The photoresist may be positive or negative. As the positive photoresist material, a novolac resin, a phenol resin, or the like is used. As the negative photoresist material, an acrylic resin or the like is used. Examples of the insulating inorganic material include silicon oxide, magnesium oxide, copper oxide, and niobium oxide.
絶縁層９１，９２は、金属シード６１，６２の形成領域に開口を有する。例えば、印刷法やマスクを用いた製膜により、金属シードのパターンに対応するように絶縁層を形成することにより、金属シード形成領域の絶縁層に開口が設けられる。また、ＷＯ２０１３／０７７０３８号に記載されているように、印刷により金属シードを形成し、その上にＣＶＤにより酸化シリコン等の無機絶縁層を形成し、ＣＶＤ製膜時、あるいはＣＶＤ製膜後の加熱により、金属シードの表面形状を変化させ、金属シード上の絶縁層にき裂状の開口を形成してもよい。いずれの方法においても、金属シード６１，６２は、一部または全部が、絶縁層９１，９２から露出している。 The insulating layers 91 and 92 have openings in regions where the metal seeds 61 and 62 are formed. For example, an opening is provided in the insulating layer in the metal seed formation region by forming the insulating layer so as to correspond to the pattern of the metal seed by film formation using a printing method or a mask. Also, as described in WO2013 / 077038, a metal seed is formed by printing, and an inorganic insulating layer such as silicon oxide is formed thereon by CVD, and heating during CVD film formation or after CVD film formation. By changing the surface shape of the metal seed, a crack-shaped opening may be formed in the insulating layer on the metal seed. In either method, part or all of the metal seeds 61 and 62 are exposed from the insulating layers 91 and 92.
上記の様に、被めっき基板２は、光電変換部４０の第一主面および第二主面に、パターン状の開口が設けられた絶縁層９１，９２を備え、第一主面の表面には絶縁層９１から露出した第一下地導電層７１（金属シード６１）が設けられ、第二主面の表面には絶縁層９２から露出した第二下地導電層７２（金属シード６２）が設けられている。この被めっき基板２を、めっき装置１の基板ホルダ３に保持して電解めっきを行う。 As described above, the to-be-plated substrate 2 includes the insulating layers 91 and 92 provided with the pattern-shaped openings on the first main surface and the second main surface of the photoelectric conversion unit 40, and is provided on the surface of the first main surface. The first base conductive layer 71 (metal seed 61) exposed from the insulating layer 91 is provided, and the second base conductive layer 72 (metal seed 62) exposed from the insulating layer 92 is provided on the surface of the second main surface. It has been. Electroplating is performed by holding the substrate 2 to be plated on the substrate holder 3 of the plating apparatus 1.
基板ホルダ３は、めっき浴内で被めっき基板を保持するとともに、被めっき基板２の下地導電層に電源７からの電流を供給する。絶縁層から露出した下地導電層７１，７２がめっき液に晒された状態で電流を流すことにより、開口形成領域に選択的にめっき金属が析出し、パターン状のめっき金属電極８１，８２が形成される。 The substrate holder 3 holds the substrate to be plated in the plating bath and supplies current from the power source 7 to the underlying conductive layer of the substrate 2 to be plated. By passing a current in a state where the underlying conductive layers 71 and 72 exposed from the insulating layer are exposed to the plating solution, the plating metal is selectively deposited in the opening formation region, and the patterned plating metal electrodes 81 and 82 are formed. Is done.
電解めっきにより析出させる金属としては、Ｓｎ，Ｃｕ，Ａｇ，Ｎｉ等が挙げられる。中でも、低コストで低抵抗化が可能であることから、Ｃｕが好ましい。めっき金属電極は、複数の層から構成させてもよい。例えば、Ｃｕ等の導電率の高いめっき金属層を形成後に、Ｓｎ等の化学的安定性に優れるめっき金属層を形成することにより、酸化等によるめっき層の劣化を抑制できる。 Examples of the metal to be deposited by electrolytic plating include Sn, Cu, Ag, and Ni. Among these, Cu is preferable because it can reduce resistance at low cost. The plated metal electrode may be composed of a plurality of layers. For example, by forming a plated metal layer having excellent chemical stability such as Sn after forming a plated metal layer having high conductivity such as Cu, deterioration of the plated layer due to oxidation or the like can be suppressed.
めっき金属電極の形成は、めっき浴５内のめっき液６に、基板ホルダ３に保持された被めっき基板２およびアノード８，９を浸漬した状態で、カソードとしての被めっき基板２とアノード８，９との間に、電源７から電圧を印加することにより行われる。めっき液６の組成は、析出させる金属の種類に応じて適宜選択すればよい。例えば、銅めっきに用いられるめっき液は銅イオンを含む。酸性銅めっきでは、硫酸銅および硫酸を含む水溶液が用いられる。 The plated metal electrode is formed by immersing the substrate 2 to be plated and the anodes 8 and 9 held in the substrate holder 3 in the plating solution 6 in the plating bath 5, and the substrate 2 to be plated and the anode 8, as the cathode. 9 is performed by applying a voltage from the power source 7. What is necessary is just to select the composition of the plating solution 6 suitably according to the kind of metal to deposit. For example, a plating solution used for copper plating contains copper ions. In acidic copper plating, an aqueous solution containing copper sulfate and sulfuric acid is used.
めっき装置１において、基板ホルダ３は、電源７の負極に接続された給電部３５、給電部３５に接続された第一支持部材３１、および被めっき基板２を保持する第二支持部材３２を備える。第一支持部材３１は導電性であり、給電ピン３１ｃを介して被めっき基板に通電可能に構成されている。第一支持部材の表面へのめっき金属の析出を抑制するために、第一支持部材の表面は絶縁性であることが好ましい。例えば、第一支持部材は、ステンレス等の金属部材の表面をフッ素系樹脂等の絶縁性材料で被覆したものである。図４に示すように、絶縁性部材の内部に導電性の配線３１ａが設けられていてもよい。第一支持部材３１の内部の導電性部材は被めっき基板に給電するための給電ピン３１ｃと導通している。第二支持部材３２は、第一支持部材３１と着脱可能に構成されている。第二支持部材３２は導電性であり、給電ピン３２ｃを介して被めっき基板に通電可能に構成されている。第二支持部材３２は、第一支持部材３１と同様、表面が絶縁性であることが好ましい。給電ピン３１ｃ，３２ｃは、支持部材３１，３２との接点および被めっき基板との接点（給電点）では導電性部材が露出しており、それ以外の表面は絶縁性材料により被覆されていることが好ましい。 In the plating apparatus 1, the substrate holder 3 includes a power supply unit 35 connected to the negative electrode of the power supply 7, a first support member 31 connected to the power supply unit 35, and a second support member 32 that holds the substrate 2 to be plated. . The first support member 31 is conductive, and is configured to be able to energize the substrate to be plated through the power supply pin 31c. In order to suppress the deposition of the plating metal on the surface of the first support member, the surface of the first support member is preferably insulating. For example, the first support member is obtained by coating the surface of a metal member such as stainless steel with an insulating material such as a fluorine-based resin. As shown in FIG. 4, conductive wiring 31a may be provided inside the insulating member. The conductive member inside the first support member 31 is electrically connected to the power supply pin 31c for supplying power to the substrate to be plated. The second support member 32 is configured to be detachable from the first support member 31. The second support member 32 is conductive and is configured to be able to energize the substrate to be plated through the power supply pin 32c. As with the first support member 31, the surface of the second support member 32 is preferably insulating. The power supply pins 31c and 32c are such that the conductive member is exposed at the contact point with the support members 31 and 32 and the contact point (power supply point) with the substrate to be plated, and the other surfaces are covered with an insulating material. Is preferred.
第二支持部材３２が被めっき基板２を保持した状態で、第一支持部材３１に設けられた凸部を第二支持部材３２の凹部に嵌合させることにより、第一支持部材３１と第二支持部材３２とが接合状態となり、基板ホルダ３に被めっき基板が固定される。基板ホルダ３が被めっき基板を保持した状態では、第一支持部材３１の凸部の先端に露出している導電接続部３１ｂが第二支持部材３２内の導電性部材（例えば配線３２ａ）と導通状態となっている。そのため、電源７から給電部３５を介して第一支持部材３１に供給された電流は、第一支持部材３１に設けられた給電ピン３１ｃに供給されるとともに、導電接続部材３１ｂを介して第二支持部材３２に設けられた給電ピン３２ｃにも供給される。 In a state where the second support member 32 holds the substrate 2 to be plated, the first support member 31 and the second support member 31 are fitted into the recesses of the second support member 32 by fitting the convex portions provided on the first support member 31. The support member 32 is joined, and the substrate to be plated is fixed to the substrate holder 3. In a state where the substrate holder 3 holds the substrate to be plated, the conductive connection portion 31b exposed at the tip of the convex portion of the first support member 31 is electrically connected to the conductive member (for example, the wiring 32a) in the second support member 32. It is in a state. Therefore, the current supplied from the power source 7 to the first support member 31 via the power supply unit 35 is supplied to the power supply pin 31c provided on the first support member 31 and also to the second via the conductive connection member 31b. The power is also supplied to the power supply pin 32 c provided on the support member 32.
給電ピン３１ｃから、被めっき基板２の第一主面の下地導電層７１に電流（電子）が供給され、給電ピン３２ｃから、被めっき基板２の第二主面の下地導電層７２に電流（電子）が供給される。基板ホルダ３の被めっき基板と当接する部分にバネ等の弾性部材を設けておけば、基板ホルダ３が被めっき基板を保持した状態では、弾性部材が圧縮状態となり、弾性復元力により給電ピンが被めっき基板に近接する方向に付勢される。そのため、給電ピン３１ｃ，３２ｃを被めっき基板の下地導電層７１，７２に確実に当接させ、基板ホルダ３内での被めっき基板の保持姿勢を維持するとともに、被めっき基板に安定的に電流を供給できる。弾性部材を介して給電ピンを支持部材に接合することにより、給電ピンが被めっき基板に近接する方向に付勢されるように基板ホルダを構成してもよい。 Current (electrons) is supplied from the feed pin 31c to the base conductive layer 71 on the first main surface of the substrate 2 to be plated, and current (electrons) is supplied from the feed pin 32c to the base conductive layer 72 on the second main surface of the substrate 2 to be plated. Electrons). If an elastic member such as a spring is provided at the portion of the substrate holder 3 that contacts the substrate to be plated, the elastic member is in a compressed state when the substrate holder 3 holds the substrate to be plated, and the power supply pin is moved by the elastic restoring force. It is biased in the direction approaching the substrate to be plated. Therefore, the power supply pins 31c and 32c are securely brought into contact with the underlying conductive layers 71 and 72 of the substrate to be plated, the holding posture of the substrate to be plated in the substrate holder 3 is maintained, and a current is stably supplied to the substrate to be plated. Can supply. The substrate holder may be configured such that the power supply pin is biased in the direction approaching the substrate to be plated by joining the power supply pin to the support member via the elastic member.
めっき装置１は、被めっき基板２の第一主面に対峙して配置される第一アノード８と被めっき基板の第二主面に対峙して配置される第二アノード９を備えている。第一アノード８は、主に、被めっき基板の第一主面の第一下地導電層７１上にめっき金属電極８１を形成するために用いられる。第二アノード９は、主に、被めっき基板の第二主面の第二下地導電層７２上にめっき金属電極８２を形成するために用いられる。 The plating apparatus 1 includes a first anode 8 disposed to face the first main surface of the substrate to be plated 2 and a second anode 9 disposed to face the second main surface of the substrate to be plated. The first anode 8 is mainly used for forming the plated metal electrode 81 on the first base conductive layer 71 on the first main surface of the substrate to be plated. The second anode 9 is mainly used for forming the plated metal electrode 82 on the second base conductive layer 72 on the second main surface of the substrate to be plated.
第一アノード８および第二アノード９の両方を電源７に接続した状態で電解めっきを実施すると、被めっき基板の両面に同時にめっき金属が析出するため、めっき時間を短縮できる。しかしながら、両面に同時に電解めっきを実施すると、図７（Ｂ）に示すように、ｐ側の主面（第二主面）の基板の周縁において、被めっき領域（絶縁層９２の開口形成領域）以外にもめっき金属が析出する。このような不所望の金属の析出は、シャドーイングロスによる変換効率の低下および外観不良の原因となる。 When electrolytic plating is performed in a state where both the first anode 8 and the second anode 9 are connected to the power source 7, the plating metal is simultaneously deposited on both surfaces of the substrate to be plated, so that the plating time can be shortened. However, when electrolytic plating is simultaneously performed on both surfaces, as shown in FIG. 7B, the region to be plated (the region where the insulating layer 92 is formed) is formed at the periphery of the substrate on the p-side main surface (second main surface). In addition, the plating metal is deposited. Such undesired metal deposition causes a decrease in conversion efficiency due to shadowing loss and an appearance defect.
被めっき領域以外へのめっき金属の析出は、第二主面に過剰の電子が供給されることに起因すると考えられる。めっき速度を高めるために電流密度を大きくすると、絶縁層から露出した下地導電層付近の境膜での物質移動（銅イオンの供給）が律速となり、カソードへの電子の供給が過剰となる。そのため、絶縁層のピンホールや膜厚が局所的に小さくなっている領域にも、被めっき基板の表面に電子が供給されて、金属が析出する場合がある。特に、被めっき基板の周縁は、製膜時の製膜トレイ等との接触や、搬送時の擦れ等の影響により、絶縁層にキズやピンホールが生成しやすいため、高電流密度で電解めっきを実施した場合に金属が析出しやすい。また、被めっき基板を電源の負極と接続すると、ｐｎ接合（またはｐｉｎ接合）のｐ型半導体側には、ダイオードの整流方向と逆方向に電流が流れるため、第二主面側では、被めっき領域以外にも金属が析出しやすいと考えられる。 It is considered that the deposition of the plating metal outside the region to be plated is caused by excessive electrons being supplied to the second main surface. When the current density is increased in order to increase the plating rate, mass transfer (copper ion supply) in the boundary film in the vicinity of the underlying conductive layer exposed from the insulating layer becomes rate-determining, and the supply of electrons to the cathode becomes excessive. For this reason, electrons may be supplied to the surface of the substrate to be plated and the metal may be deposited even in a region where the pinhole or thickness of the insulating layer is locally small. In particular, the periphery of the substrate to be plated tends to generate scratches and pinholes in the insulating layer due to the effects of contact with the film-forming tray, etc. during film formation, and rubbing during transportation. When this is carried out, the metal tends to precipitate. Further, when the substrate to be plated is connected to the negative electrode of the power source, a current flows in the direction opposite to the rectifying direction of the diode on the p-type semiconductor side of the pn junction (or pin junction). It is considered that the metal is likely to deposit other than the region.
第二主面側（光電変換部のｐ型半導体側）の被めっき領域の面積が、第一主面側（光電変換部のｎ型半導体側）の被めっき領域の面積よりも小さい場合（典型的には、第二主面が受光面側であり、裏面側に比べて受光面側のフィンガー電極の本数が少ない場合）、第一主面と第二主面に同時にめっきを実施すると、被めっき面積の小さい第二主面の電流密度が大きくなる。そのため、第二主面の電子が過剰となりやすく、被めっき領域以外への金属析出が生じやすいと考えられる。 When the area of the plating region on the second main surface side (p-type semiconductor side of the photoelectric conversion portion) is smaller than the area of the plating region on the first main surface side (n-type semiconductor side of the photoelectric conversion portion) (typically If the second main surface is the light receiving surface side and the number of finger electrodes on the light receiving surface side is smaller than that on the back surface side), if plating is performed simultaneously on the first main surface and the second main surface, The current density of the second main surface having a small plating area is increased. Therefore, it is considered that the electrons on the second main surface are likely to be excessive, and metal deposition is likely to occur outside the region to be plated.
本発明においては、第一アノード８および第二アノード９に順次電流を供給することにより、被めっき基板２の第一主面（ｎ側）および第二主面（ｐ側）に順次めっき金属電極を析出させる。さらに、パルスめっきにより第二主面にめっき金属電極８２を析出させることにより、第二主面の被めっき領域以外への不所望の金属の析出を抑制できる。 In the present invention, by sequentially supplying current to the first anode 8 and the second anode 9, the plated metal electrodes are sequentially applied to the first main surface (n side) and the second main surface (p side) of the substrate 2 to be plated. To precipitate. Furthermore, by depositing the plated metal electrode 82 on the second main surface by pulse plating, it is possible to suppress the deposition of undesired metal outside the plated area on the second main surface.
まず、図５Ａに示すように、電源７の正極を第一アノード８と接続して、被めっき基板２と第一アノード８との間に電圧を印加して電解めっきを実施する（第一めっき工程）。被めっき基板と第二アノード９との間には、電圧が印加されていないため、被めっき基板２の第二主面への電子の供給よりも第一主面への電子の供給が優先され、第一主面の被めっき領域にめっき金属電極８１が形成される。 First, as shown in FIG. 5A, the positive electrode of the power source 7 is connected to the first anode 8, and a voltage is applied between the substrate to be plated 2 and the first anode 8 to perform electrolytic plating (first plating). Process). Since no voltage is applied between the substrate to be plated and the second anode 9, the supply of electrons to the first main surface has priority over the supply of electrons to the second main surface of the substrate 2 to be plated. The plated metal electrode 81 is formed in the area to be plated on the first main surface.
この際、給電ピン３２ｃから供給される電子や、第一主面側からシリコン基板４５を介して回り込んだ電子が、被めっき基板２の第二主面に供給されるが、第二主面への電子の供給量が過剰となることはない。そのため、第一主面への電解めっき時に第二主面に供給された電子は、相対的に抵抗の小さい被めっき領域への金属の析出により消費され、第二主面への不所望の金属の析出が生じ難い。 At this time, electrons supplied from the power supply pins 32c and electrons that wrap around from the first main surface side through the silicon substrate 45 are supplied to the second main surface of the substrate 2 to be plated. The amount of electrons supplied to the camera will not be excessive. Therefore, the electrons supplied to the second main surface at the time of electrolytic plating on the first main surface are consumed by the deposition of the metal on the plating area having a relatively low resistance, and an undesired metal on the second main surface. Is unlikely to occur.
第一めっき工程において、電源７から第一アノード８と被めっき基板２との間に印加する電圧は、パルス電圧でも非パルス電圧でもよい。めっき効率の観点からは非パルス電圧が好ましい。第一めっき工程の開始時は、絶縁層９１，９２から下地導電層７１，７２が露出しているが、被めっき基板の第一主面および第二主面のいずれにもめっき金属電極が析出しておらず、基板表面は抵抗が高い状態である。この状態で、高電流密度の電解めっきを実施すると、給電ピン等の相対的に抵抗の低い部分に集中的に金属が析出する場合がある。 In the first plating step, the voltage applied from the power source 7 between the first anode 8 and the substrate 2 to be plated may be a pulse voltage or a non-pulse voltage. From the viewpoint of plating efficiency, a non-pulse voltage is preferable. At the start of the first plating step, the underlying conductive layers 71 and 72 are exposed from the insulating layers 91 and 92, but the plated metal electrode is deposited on both the first main surface and the second main surface of the substrate to be plated. The substrate surface is in a high resistance state. When electrolytic plating with high current density is performed in this state, metal may be concentrated in a portion having relatively low resistance such as a power supply pin.
被めっき領域に均一に金属を析出させるために、第一めっき工程の初期は、相対的に低電流密度（例えば、およそ９Ａ／ｄｍ２）で電解めっきを実施することが好ましい。低電流密度で電解めっきを実施することにより、被めっき領域の表面に均一に金属が析出し、基板表面の被めっき領域が低抵抗化される。低電流密度の電解めっきにより被めっき領域の第一下地導電層７１をめっき金属で被覆した後は、初期よりも電流密度を高めて高電流密度（例えば、およそ１８Ａ／ｄｍ２）で電解めっきを実施して、第一めっき金属電極８１の析出速度を高めることが、生産性の観点において好ましい。高電流密度は、初期の低電流密度に対して２〜３倍程度が好ましい。 In order to deposit the metal uniformly in the region to be plated, it is preferable to perform electrolytic plating at a relatively low current density (for example, approximately 9 A / dm 2 ) at the initial stage of the first plating step. By performing the electrolytic plating at a low current density, the metal is uniformly deposited on the surface of the plated area, and the resistance of the plated area on the substrate surface is reduced. After the first ground conductive layer 71 in the region to be plated is coated with the plating metal by electrolytic plating at a low current density, the current density is increased from the initial stage, and electrolytic plating is performed at a high current density (for example, approximately 18 A / dm 2 ). It is preferable from the viewpoint of productivity to increase the deposition rate of the first plated metal electrode 81 by performing the above. The high current density is preferably about 2 to 3 times the initial low current density.
被めっき基板の第一主面にめっき金属電極８２を形成後、図５Ｂに示すように、電源７を第二アノード９に接続して、被めっき基板２と第二アノード９との間に電圧を印加して電解めっきを実施する（第二めっき工程）。この際、電圧印加のオン・オフを繰り返して、パルスめっきを実施する。パルスの周期（電圧のオンオフの周期）は特に限定されないが、１０〜５００ｍｓ程度が好ましい。 After forming the plated metal electrode 82 on the first main surface of the substrate to be plated, the power source 7 is connected to the second anode 9 as shown in FIG. 5B, and a voltage is applied between the substrate 2 to be plated and the second anode 9. Is applied to perform electroplating (second plating step). At this time, pulse plating is performed by repeatedly turning on and off the voltage application. The pulse period (voltage on / off period) is not particularly limited, but is preferably about 10 to 500 ms.
このように、第一主面へのめっきを実施した後、パルスめっきにより第二主面へのめっきを実施することにより、図７（Ａ）に示すように、第二主面の被めっき領域以外への不所望の金属の析出を抑制できる。この方法により、被めっき領域以外への金属の析出を抑制できる理由として、第一主面へのめっき時に第二主面に析出する金属の影響、およびパルス電圧の影響が考えられる。 In this manner, after plating on the first main surface, by plating on the second main surface by pulse plating, as shown in FIG. It is possible to suppress the deposition of an undesired metal on the other side. As a reason why the deposition of the metal outside the region to be plated can be suppressed by this method, the influence of the metal deposited on the second principal surface during plating on the first principal surface and the influence of the pulse voltage can be considered.
第二主面へのめっきを実施する前に、第一主面へのめっきを実施することにより、第二主面の被めっき領域では、開口から露出した下地導電層７２上に、めっき金属がわずかに析出した状態となっており、第一めっき工程実施前に比べ低抵抗化されている。そのため、被めっき基板２と第二アノード９との間に電圧を印加して電解めっきを実施する際の電流密度が高い場合でも、被めっき領域にスムーズに電子が供給されると考えられる。さらに、パルスめっきでは、電圧オフの間に、物質移動により境膜内にめっき液中の金属イオンが供給されるため、電流密度を大きくした場合でも、電源からの被めっき領域への電子の供給とめっき液から境膜内へのイオンの供給とをバランスさせることができる。 Before plating on the second main surface, by plating on the first main surface, the plating metal is deposited on the underlying conductive layer 72 exposed from the opening in the plated region of the second main surface. It is in a slightly deposited state, and the resistance is reduced compared to before the first plating step. Therefore, it is considered that electrons are smoothly supplied to the area to be plated even when the current density is high when the electroplating is performed by applying a voltage between the substrate 2 and the second anode 9. Furthermore, in pulse plating, metal ions in the plating solution are supplied into the film by mass transfer while the voltage is off, so even if the current density is increased, electrons are supplied from the power source to the area to be plated. And the supply of ions from the plating solution into the film can be balanced.
このように、本発明の方法では、第二主面へのめっき時の電流密度を高めた場合でも、被めっき領域への電子の供給および金属イオンの供給が追随可能であるため、被めっき領域以外への不所望の金属の析出を抑制できると考えられる。 As described above, in the method of the present invention, even when the current density during plating on the second main surface is increased, the supply of electrons and the supply of metal ions to the plating area can be followed. It is thought that the deposition of undesired metals on the surface can be suppressed.
図４に示すめっき装置１は、１つの電源７から、スイッチの切り替えにより、第一アノード８および第二アノード９に個別に電圧を印加するように構成されているが、図６に示すように、第一アノード６０８と被めっき基板２との間に電圧を印加するための電源６７１と、第二アノード６０９と被めっき基板２との間に電圧を印加するための電源６７２とが個別に設けられていてもよい。この場合、被めっき基板の第二主面に対峙して配置されたアノード６０９に接続された電源６７２がパルス電圧を印加可能であればよい。 The plating apparatus 1 shown in FIG. 4 is configured to individually apply a voltage to the first anode 8 and the second anode 9 by switching the switch from one power source 7, but as shown in FIG. A power source 671 for applying a voltage between the first anode 608 and the substrate to be plated 2 and a power source 672 for applying a voltage between the second anode 609 and the substrate to be plated 2 are separately provided. It may be done. In this case, it is only necessary that the power supply 672 connected to the anode 609 arranged to face the second main surface of the substrate to be plated can apply a pulse voltage.
基板ホルダ３は、複数の被めっき基板を保持可能に構成されていてもよい。また、複数の基板ホルダを１つの電源に並列接続することにより、複数の被めっき基板に、同時に金属めっき電極を形成してもよい。 The substrate holder 3 may be configured to be able to hold a plurality of substrates to be plated. Moreover, you may form a metal plating electrode simultaneously in a several to-be-plated board | substrate by connecting a some board | substrate holder in parallel with one power supply.
以上、図３に示すヘテロ接合太陽電池形成用被めっき基板２を用いる例を挙げて、めっき金属電極の形成方法について説明したが、被めっき基板の構成は図３に示すものに限定されない。例えば、導電性下地層は、透明電極層のみからなり、金属シードを含んでいなくてもよい。光電変換部上の全面に金属シードが設けられていてもよい。金属シードが全面に形成されていても、その上の絶縁層にパターン開口が設けられていれば、パターン状のめっき金属電極を形成できる。この形態では、パターン状のめっき金属電極を形成後に絶縁層を除去し、さらに、その下に露出した金属シードを除去することが好ましい。 As described above, the method for forming the plated metal electrode has been described with reference to the example using the substrate to be plated 2 for forming the heterojunction solar cell shown in FIG. 3, but the configuration of the substrate to be plated is not limited to that shown in FIG. For example, the conductive underlayer is composed of only a transparent electrode layer and does not have to contain a metal seed. A metal seed may be provided on the entire surface of the photoelectric conversion unit. Even if the metal seed is formed on the entire surface, a patterned plated metal electrode can be formed if a pattern opening is provided in the insulating layer thereon. In this embodiment, it is preferable to remove the insulating layer after forming the patterned plated metal electrode and further remove the metal seed exposed thereunder.
本発明は、ヘテロ接合太陽電池以外の太陽電池の電極形成にも適用できる。具体的には、ヘテロ接合型以外の結晶シリコン太陽電池や、ＧａＡｓ等のシリコン以外の半導体基板を用いた太陽電池、非晶質シリコン系薄膜や結晶質シリコン系薄膜のｐｉｎ接合あるいはｐｎ接合上に透明導電層が形成されたシリコン系薄膜太陽電池や、ＣＩＳ，ＣＩＧＳ等の化合物半導体太陽電池、色素増感太陽電池や有機薄膜（導電性ポリマー）等の有機薄膜太陽電池等が挙げられる。 The present invention can also be applied to the formation of electrodes for solar cells other than heterojunction solar cells. Specifically, a crystalline silicon solar cell other than a heterojunction type, a solar cell using a semiconductor substrate other than silicon such as GaAs, a pin junction or a pn junction of an amorphous silicon thin film or a crystalline silicon thin film Examples thereof include silicon-based thin film solar cells on which a transparent conductive layer is formed, compound semiconductor solar cells such as CIS and CIGS, organic thin film solar cells such as dye-sensitized solar cells and organic thin films (conductive polymers).
以下では、実施例と比較例との対比により、本発明をより詳細に説明するが、本発明は下記の実施例に限定されるものではない。 Hereinafter, the present invention will be described in more detail by comparing the examples with the comparative examples, but the present invention is not limited to the following examples.
［被めっき基板の作製］
ＷＯ２０１３／０７７０３８の実施例に記載の方法により、受光面および裏面にパターン状の金属シードが設けられ、その上に開口を有する絶縁層が設けられた被めっき基板を作成した。まず、表裏にテクスチャが形成された６インチｎ型単結晶シリコン基板の一方の面（第二主面）に、プラズマＣＶＤ法により膜厚４ｎｍの真性非晶質シリコン層および膜厚６ｎｍのｐ型非晶質シリコン層を形成した。その後、シリコン基板の他方の面（第一主面）に、プラズマＣＶＤ法により膜厚５ｎｍの真性非晶質シリコン層および膜厚１０ｎｍのｎ型非晶質シリコン層を形成した。
[Production of substrate to be plated]
By the method described in the examples of WO2013 / 077038, a substrate to be plated was prepared in which a patterned metal seed was provided on the light receiving surface and the back surface, and an insulating layer having an opening was provided thereon. First, an intrinsic amorphous silicon layer with a thickness of 4 nm and a p-type with a thickness of 6 nm are formed on one surface (second main surface) of a 6-inch n-type single crystal silicon substrate with textures formed on the front and back surfaces by plasma CVD. An amorphous silicon layer was formed. Thereafter, an intrinsic amorphous silicon layer having a thickness of 5 nm and an n-type amorphous silicon layer having a thickness of 10 nm were formed on the other surface (first main surface) of the silicon substrate by plasma CVD.
ｐ層上およびｎ層上のそれぞれに、スパッタ法により膜厚１００ｎｍのＩＴＯ層を製膜後、銀ペーストをグリッド状パターンに印刷して金属シードを形成した。第一主面（裏面）では、フィンガー電極の本数を第二主面（受光面）の２倍とした。表裏の全面に、プラズマＣＶＤにより膜厚１００ｎｍの酸化シリコンを製膜した後、加熱によるアニールを行い、金属シード上の絶縁層に、き裂状の開口を形成した。 An ITO layer having a thickness of 100 nm was formed on each of the p layer and the n layer by sputtering, and then a silver paste was printed in a grid pattern to form a metal seed. On the first main surface (back surface), the number of finger electrodes was twice that of the second main surface (light receiving surface). A silicon oxide film having a thickness of 100 nm was formed on the entire front and back surfaces by plasma CVD, and then annealed by heating to form a crack-like opening in the insulating layer on the metal seed.
［比較例１］
第一主面および第二主面に給電ピンが接触するように、基板ホルダに被めっき基板をセットし、硫酸銅めっき液中に浸漬した。第一主面に対峙して配置されたアノードおよび第二主面に対峙して配置されたアノードの両方に電源からの電圧を印加し、基板１枚あたりの電流が２Ａの条件で、４０秒間めっきを実施した後、基板１枚当たりの電流４Ａで６０秒、さらに基板１枚当たりの電流６Ａで１７０秒の電解めっきを実施した。めっき後の基板（太陽電池）の第二主面は、図７（Ｂ）に示すように、基板の周縁にキズ状に金属が析出していた。
[Comparative Example 1]
The substrate to be plated was set on the substrate holder so that the power supply pins were in contact with the first main surface and the second main surface, and immersed in a copper sulfate plating solution. A voltage from a power source is applied to both the anode disposed facing the first main surface and the anode disposed facing the second main surface, and the current per substrate is 2 A for 40 seconds. After the plating, electrolytic plating was performed at a current of 4 A per substrate for 60 seconds and further at a current of 6 A per substrate for 170 seconds. As shown in FIG. 7B, the second main surface of the substrate (solar cell) after plating had scratches on the periphery of the substrate.
［実施例１］
第一主面および第二主面に給電ピンが接触するように、基板ホルダに被めっき基板をセットし、めっき液中に浸漬した。まず、第一主面に対峙して配置されたアノードと基板との間に電圧を印加し、基板１枚あたりの電流が２Ａの条件で、３０秒間めっきを実施した後、基板１枚当たりの電流４Ａで１８０秒間めっきを実施した。その後、第二主面に対峙して配置されたアノードと基板との間に、オン・オフがそれぞれ１００ｍｓの周期のパルス電圧を印加し、基板１枚当たりの電流４Ａで１３０秒間パルスめっきを実施した。めっき後の基板（太陽電池）の第二主面は、図７（Ａ）に示すように、被めっき領域に金属電極が形成され、それ以外の領域への金属の析出はみられなかった。
[Example 1]
The substrate to be plated was set on the substrate holder so that the power supply pins were in contact with the first main surface and the second main surface, and immersed in the plating solution. First, a voltage is applied between the anode disposed opposite to the first main surface and the substrate, plating is performed for 30 seconds under the condition that the current per substrate is 2 A, and then per substrate. Plating was performed at a current of 4 A for 180 seconds. After that, a pulse voltage with a period of 100 ms on / off is applied between the anode and the substrate arranged facing the second main surface, and pulse plating is performed for 130 seconds with a current of 4 A per substrate. did. On the second main surface of the substrate (solar cell) after plating, as shown in FIG. 7A, metal electrodes were formed in the plated area, and no metal deposition was observed in other areas.
以上の結果から、第一主面にめっきを実施した後、第二主面にパルスめっきを実施することにより、被めっき領域以外への不所望の金属の析出を抑制できることが分かる。 From the above results, it can be seen that, after performing plating on the first main surface, by performing pulse plating on the second main surface, it is possible to suppress deposition of undesired metals outside the region to be plated.
２ 被めっき基板
２００ 太陽電池
４０ 光電変換部
４５ シリコン基板
４１ ｎ型半導体層
４２ ｐ型半導体層
５１，５２ 透明電極層
６１，６２ 金属シード
７１，７２ 下地導電層
８１，８２ めっき金属電極
１ めっき装置
３ 基板ホルダ
５ めっき浴
６ めっき液
７ 電源
８，９ アノード
2 Substrate to be Plated 200 Solar Cell 40 Photoelectric Conversion Unit 45 Silicon Substrate 41 n-type Semiconductor Layer 42 p-type Semiconductor Layer 51, 52 Transparent Electrode Layer 61, 62 Metal Seed 71, 72 Underlying Conductive Layer 81, 82 Plating Metal Electrode 1 Plating Device 3 Substrate holder 5 Plating bath 6 Plating solution 7 Power supply 8, 9 Anode
Claims (7)
第一主面の被めっき領域において第一下地導電層が第一絶縁層の開口から露出しており、第二主面の被めっき領域において第二下地導電層が第二絶縁層の開口から露出している、被めっき基板を準備する基板準備工程；
前記被めっき基板と、前記被めっき基板の第一主面に対峙して配置された第一アノードとの間に電圧を印加して、電解めっきにより、前記被めっき基板の第一主面の被めっき領域に、パターン状の第一めっき金属電極を形成する第一めっき工程；および
前記被めっき基板と、前記被めっき基板の第二主面に対峙して配置された第二アノードとの間に電圧を印加して、電解めっきにより、前記被めっき基板の第二主面の被めっき領域に、パターン状の第二めっき金属電極を形成する第二めっき工程が、順に実施され、
前記第二めっき工程において、前記被めっき基板と第二アノードとの間に、電圧のオン・オフを繰り返すパルス電圧を印加して電解めっきが実施される、太陽電池の製造方法。 A photoelectric conversion part having an n-type semiconductor on the first main surface side and a p-type semiconductor on the second main surface side; a patterned first plated metal electrode provided on the first main surface of the photoelectric conversion part; and A method for producing a solar cell comprising a patterned second plated metal electrode provided on the second main surface of the photoelectric conversion part,
The first base conductive layer is exposed from the opening of the first insulating layer in the plated area of the first main surface, and the second base conductive layer is exposed from the opening of the second insulating layer in the plated area of the second main surface. A substrate preparation step for preparing an exposed substrate to be plated;
A voltage is applied between the substrate to be plated and the first anode disposed opposite to the first main surface of the substrate to be plated, and electrolytic plating is performed to cover the first main surface of the substrate to be plated. A first plating step of forming a patterned first plated metal electrode in the plating region; and between the substrate to be plated and a second anode disposed opposite to the second main surface of the substrate to be plated A second plating step for forming a patterned second plated metal electrode is sequentially performed on the plated region of the second main surface of the substrate to be plated by applying voltage and electrolytic plating,
The method for manufacturing a solar cell, wherein in the second plating step, electrolytic plating is performed by applying a pulse voltage that repeatedly turns on and off the voltage between the substrate to be plated and the second anode.
前記金属シードが前記絶縁層の開口から露出している、請求項１〜４のいずれか１項に記載の太陽電池の製造方法。 The first base conductive layer and the second base conductive layer each have a transparent conductive layer and a metal seed from the photoelectric conversion unit side,
The method for manufacturing a solar cell according to claim 1, wherein the metal seed is exposed from an opening of the insulating layer.
被めっき基板を保持する基板ホルダ；基板ホルダ内に保持される被めっき基板の第一主面と対峙するように配置された第一アノード；基板ホルダ内に保持される被めっき基板の第二主面と対峙するように配置された第二アノード；めっき浴；および電源を備え、
前記基板ホルダは、被めっき基板の第一主面に設けられた第一下地導電層、および被めっき基板の第二主面に設けられた第二下地導電層のそれぞれに、前記電源からの電子を供給するように構成されており、
前記電源は、前記第一アノードと前記被めっき基板との間、および前記第二アノードと前記被めっき基板との間に、個別に電圧を印加可能であり、かつ、前記第二アノードと前記被めっき基板との間に、電圧のオン・オフを繰り返すパルス電圧を印加可能である、電極形成用めっき装置。
It is a plating apparatus for electrode formation used for the method of any one of Claims 1-6,
A substrate holder for holding the substrate to be plated; a first anode arranged to face the first main surface of the substrate to be plated held in the substrate holder; a second main of the substrate to be plated held in the substrate holder A second anode arranged to face the surface; a plating bath; and a power source,
The substrate holder is supplied from the power source to each of the first base conductive layer provided on the first main surface of the substrate to be plated and the second base conductive layer provided on the second main surface of the substrate to be plated. Configured to supply electrons,
The power source can individually apply a voltage between the first anode and the substrate to be plated, and between the second anode and the substrate to be plated, and the second anode and the substrate to be plated. An electrode forming plating apparatus capable of applying a pulse voltage that repeatedly turns on and off the voltage between the plating substrate and the plating substrate.
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