JP2018081944A - METHOD FOR MANUFACTURING SiC SEMICONDUCTOR DEVICE AND ADAPTER - Google Patents

METHOD FOR MANUFACTURING SiC SEMICONDUCTOR DEVICE AND ADAPTER Download PDF

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JP2018081944A
JP2018081944A JP2016221185A JP2016221185A JP2018081944A JP 2018081944 A JP2018081944 A JP 2018081944A JP 2016221185 A JP2016221185 A JP 2016221185A JP 2016221185 A JP2016221185 A JP 2016221185A JP 2018081944 A JP2018081944 A JP 2018081944A
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JP6594286B2 (en
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吉徳 松野
Yoshinori Matsuno
吉徳 松野
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Mitsubishi Electric Corp
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Abstract

PROBLEM TO BE SOLVED: To improve uniformity of a temperature between wafers when an electrode material is film-formed on an SiC wafer.SOLUTION: A method for manufacturing an SiC semiconductor device includes: a step (a) of preparing a plurality of unit processing components formed of an SiC wafer 2 and an adapter 1a having the SiC wafer 2 mounted thereon and a larger size than the SiC wafer 2; a step (b) of setting the plurality of unit processing components in a load lock chamber; a step (c) of transporting one of the plurality of unit processing components to a film-formation chamber from the load lock chamber, film-forming the electrode material on the SiC wafer 2 in the film-formation chamber, and then returning the resultant electrode material to the load lock chamber from the film-formation chamber; and a step (d) of transporting another out of the plurality of unit processing components to the film-formation chamber from the load lock chamber, film-forming the electrode material on the SiC wafer 2 in the film-formation chamber, and then returning the resultant electrode material to the load lock chamber from the film-formation chamber, where the step (d) is repeated until the electrode material is film-formed in the SiC wafer 2 of each of the plurality of unit processing components.SELECTED DRAWING: Figure 2

Description

この発明は、ＳｉＣ半導体装置の製造方法に関する。   The present invention relates to a method for manufacturing a SiC semiconductor device.

ＳｉＣ−ＭＯＳＦＥＴ（Metal Oxide Semiconductor Field Effect Transistor）またはＳｉＣ−ＳＢＤ（Schottky Diode）のウエハプロセス（ＷＰ）では、電極パッドとしてＡｌ，ＡｌＳｉ，ＡｌＳｉＣｕなどを成膜する。４インチのＳｉＣウエハにＡｌＳｉを形成する方法として、直径４インチのウエハ用または太陽電池プロセスを想定した１００ｍｍ角のウエハ用のスパッタ装置を使用する方法と、口径変換アダプタによって５，６，８インチといった大口径のシリコンウエハプロセスを想定したスパッタ装置を用いる方法とがある（例えば特許文献１）。最も単純な口径変換アダプタは８インチのシリコンのダミーウエハであり、ダミーウエハの上に４インチのＳｉＣの本番ウエハを載せ、反応室で１枚ないし数枚単位でバッチ処理を行う。   In a wafer process (WP) of SiC-MOSFET (Metal Oxide Semiconductor Field Effect Transistor) or SiC-SBD (Schottky Diode), Al, AlSi, AlSiCu, etc. are deposited as electrode pads. As a method of forming AlSi on a 4-inch SiC wafer, a sputtering apparatus for a 4-inch diameter wafer or a 100 mm-square wafer assuming a solar cell process, and a 5, 6, and 8-inch diameter conversion adapter are used. There is a method using a sputtering apparatus that assumes a large-diameter silicon wafer process (for example, Patent Document 1). The simplest diameter conversion adapter is an 8-inch silicon dummy wafer. A 4-inch SiC production wafer is placed on the dummy wafer, and batch processing is performed in units of one or several sheets in a reaction chamber.

特開２００１−１３１７４９号公報JP 2001-131749 A

直径４インチのウエハ用または太陽電池プロセスを想定した１００ｍｍ角のウエハ用のスパッタ装置を用いて４インチのＳｉＣウエハにＡｌＳｉを成膜する場合、熱容量が小さいため、ウエハごとの処理温度を一定に保つことが困難である。そのため、ＡｌＳｉ膜の粒径サイズまたは表面モフォロジがウエハ間で大きくばらつき、後工程から要求される仕様を全てのウエハで同時に満たすことが困難だった。ここで、「後工程から要求される仕様」とは、例えばＷＰに続いてダイシングされたダイを、ダイボンドまたはワイヤボンドなどの工程で安定してチップ認識させるために、ＡｌＳｉ反射率に代表される光学特性を所定範囲に安定させるなどの仕様である。   When depositing AlSi on a 4 inch SiC wafer using a sputtering apparatus for a 100 mm square wafer assuming a 4 inch diameter wafer or a solar cell process, the processing temperature for each wafer is kept constant because the heat capacity is small. Difficult to keep. For this reason, the grain size or surface morphology of the AlSi film varies greatly from wafer to wafer, making it difficult to satisfy the specifications required from the subsequent processes on all wafers simultaneously. Here, the “specification required from the post-process” is typified by AlSi reflectivity, for example, in order to make a die diced following WP stably recognized in a process such as die bonding or wire bonding. It is a specification that stabilizes the optical characteristics within a predetermined range.

本発明は上述の問題に鑑みなされたものであり、ＳｉＣウエハに電極材料を成膜するにあたりウエハ間で温度の均一性を向上することを目的とする。   The present invention has been made in view of the above problems, and an object of the present invention is to improve temperature uniformity between wafers when an electrode material is formed on a SiC wafer.

本発明に係るＳｉＣ半導体装置の製造方法は、（ａ）ＳｉＣウエハとＳｉＣウエハを載置したＳｉＣウエハより大口径のアダプタとからなる複数の単位処理物を用意する工程と、（ｂ）複数の単位処理物を成膜装置のロードロック室にセットする工程と、（ｃ）複数の単位処理物の一つをロードロック室から成膜装置の成膜室に搬送し、成膜室でＳｉＣウエハに電極材料を成膜した後、成膜室からロードロック室に戻す工程と、（ｄ）複数の単位処理物の別の一つをロードロック室から成膜装置の成膜室に搬送し、成膜室でＳｉＣウエハに電極材料を成膜した後、成膜室からロードロック室に戻す工程と、を備え、複数の単位処理物の夫々のＳｉＣウエハに電極材料を成膜するまで工程（ｄ）を繰り返す。   The manufacturing method of the SiC semiconductor device according to the present invention includes: (a) preparing a plurality of unit processed objects each comprising a SiC wafer and an adapter having a larger diameter than the SiC wafer on which the SiC wafer is placed; (C) one of a plurality of unit processed products is transferred from the load lock chamber to the film forming chamber of the film forming apparatus, and the SiC wafer is formed in the film forming chamber. (D) transferring another one of the plurality of unit treatment products from the load lock chamber to the film forming chamber of the film forming apparatus; And after the electrode material is deposited on the SiC wafer in the deposition chamber, the process returns to the load lock chamber from the deposition chamber until the electrode material is deposited on each SiC wafer of the plurality of unit processed products ( Repeat d).

本発明に係るＳｉＣ半導体装置の製造方法は、（ａ）ＳｉＣウエハとＳｉＣウエハを載置したＳｉＣウエハより大口径のアダプタとからなる複数の単位処理物を用意する工程と、（ｂ）複数の単位処理物を成膜装置のロードロック室にセットする工程と、（ｃ）複数の単位処理物の一つをロードロック室から成膜装置の成膜室に搬送し、成膜室でＳｉＣウエハに電極材料を成膜した後、成膜室からロードロック室に戻す工程と、（ｄ）複数の単位処理物の別の一つをロードロック室から成膜装置の成膜室に搬送し、成膜室でＳｉＣウエハに電極材料を成膜した後、成膜室からロードロック室に戻す工程と、を備え、複数の単位処理物の夫々のＳｉＣウエハに電極材料を成膜するまで工程（ｄ）を繰り返す。従って、ウエハ間で温度の均一性が向上する。   The manufacturing method of the SiC semiconductor device according to the present invention includes: (a) preparing a plurality of unit processed objects each comprising a SiC wafer and an adapter having a larger diameter than the SiC wafer on which the SiC wafer is placed; (C) one of a plurality of unit processed products is transferred from the load lock chamber to the film forming chamber of the film forming apparatus, and the SiC wafer is formed in the film forming chamber. (D) transferring another one of the plurality of unit treatment products from the load lock chamber to the film forming chamber of the film forming apparatus; And after the electrode material is deposited on the SiC wafer in the deposition chamber, the process returns to the load lock chamber from the deposition chamber until the electrode material is deposited on each SiC wafer of the plurality of unit processed products ( Repeat d). Therefore, temperature uniformity is improved between wafers.

ＳｉＣウエハに電極材料を成膜する工程を示すフローチャートである。It is a flowchart which shows the process of forming an electrode material into a SiC wafer. 実施の形態１に係るアダプタにＳｉＣウエハを載置した状態の断面図である。3 is a cross-sectional view of a state where a SiC wafer is placed on the adapter according to Embodiment 1. FIG. 実施の形態１に係るアダプタにＳｉＣウエハを載置した状態の平面図である。3 is a plan view of a state where a SiC wafer is placed on the adapter according to Embodiment 1. FIG. 実施の形態２に係るアダプタにＳｉＣウエハを載置した状態の断面図である。FIG. 6 is a cross-sectional view of a state where a SiC wafer is placed on an adapter according to a second embodiment. 実施の形態２に係るアダプタにＳｉＣウエハを載置した状態の平面図である。6 is a plan view of a state in which a SiC wafer is placed on an adapter according to Embodiment 2. FIG. 実施の形態３に係るアダプタにＳｉＣウエハを載置した状態の断面図である。6 is a cross-sectional view of a state in which a SiC wafer is placed on an adapter according to Embodiment 3. FIG. 実施の形態４に係るアダプタにＳｉＣウエハを載置した状態の断面図である。FIG. 6 is a cross-sectional view of a state where a SiC wafer is placed on an adapter according to a fourth embodiment. 実施の形態４の変形例に係るアダプタにＳｉＣウエハを載置した状態の断面図である。10 is a cross-sectional view of a state in which a SiC wafer is placed on an adapter according to a modification of the fourth embodiment. FIG. 実施の形態５に係るアダプタにＳｉＣウエハを載置した状態の断面図である。FIG. 9 is a cross-sectional view of a state where a SiC wafer is placed on an adapter according to a fifth embodiment. 実施の形態５に係るアダプタにＳｉＣウエハを載置した状態の平面図である。FIG. 10 is a plan view of a state where a SiC wafer is placed on an adapter according to a fifth embodiment. 実施の形態５の変形例に係るアダプタにＳｉＣウエハを載置した状態の断面図である。FIG. 10 is a cross-sectional view of a state where a SiC wafer is placed on an adapter according to a modification of the fifth embodiment. 実施の形態５の変形例に係るアダプタにＳｉＣウエハを載置した状態の断面図である。FIG. 10 is a cross-sectional view of a state where a SiC wafer is placed on an adapter according to a modification of the fifth embodiment.

＜実施の形態１＞
図１は、本発明の実施の形態１に係るＳｉＣ半導体装置の製造方法として、ＳｉＣウエハに電極材料を成膜する工程を示すフローチャートである。 <Embodiment 1>
FIG. 1 is a flowchart showing a process of forming an electrode material on a SiC wafer as a method of manufacturing an SiC semiconductor device according to the first embodiment of the present invention.

まず、本番ウエハであるＳｉＣウエハをアダプタに載置する（ステップＳ１）。図２は、アダプタ１ａ上にＳｉＣウエハ２を載置した状態を示す断面図であり、図３はその平面図である。ここで、アダプタ１ａは８インチの多結晶ＳｉＣウエハとし、ＳｉＣウエハ２のサイズは４インチとする。ＳｉＣウエハ２に電極材料を成膜するにあたり、成膜装置にＳｉＣウエハ２よりも大口径のウエハ用のものを用いるため、口径変換用のアダプタ１ａを用いる。   First, a SiC wafer, which is a production wafer, is placed on an adapter (step S1). FIG. 2 is a cross-sectional view showing a state in which the SiC wafer 2 is placed on the adapter 1a, and FIG. 3 is a plan view thereof. Here, the adapter 1a is an 8-inch polycrystalline SiC wafer, and the size of the SiC wafer 2 is 4 inches. When the electrode material is formed on the SiC wafer 2, an adapter 1 a for changing the diameter is used because a film forming apparatus for a wafer having a larger diameter than the SiC wafer 2 is used.

次に、アダプタ１ａとＳｉＣウエハ２の組を成膜装置のロードロック室のカセットにセットする（ステップＳ２）。図２，３には１枚のアダプタ１ａと１枚のＳｉＣウエハ２からなる組を示しており、この組が単位処理物となるが、実際にはこの組が複数組、例えば数組から２５組程度用意されカセットにセットされる。アダプタ１ａは、１度に成膜装置で処理するＳｉＣウエハ２の枚数分だけ用意される。   Next, the set of the adapter 1a and the SiC wafer 2 is set in the cassette of the load lock chamber of the film forming apparatus (step S2). 2 and 3 show a set of one adapter 1a and one SiC wafer 2, and this set is a unit processed product. In practice, this set includes a plurality of sets, for example, several sets to 25 sets. About a set is prepared and set in a cassette. The adapter 1a is prepared for the number of SiC wafers 2 to be processed by the film forming apparatus at one time.

次に、アダプタ１ａとＳｉＣウエハ２の組が１組ずつ成膜装置のロードロック室からスパッタ反応室すなわち成膜室に運搬され、スパッタ反応室でＳｉＣウエハ２上に電極材料が成膜される（ステップＳ３）。電極材料には、Ａｌ，ＡｌＳｉ，ＡｌＳｉＣｕなどを用いることができるが、ここではＡｌＳｉとする。なお、電極材料を成膜する前に、成膜装置でＴｉ膜及びＴｉＮ膜を連続成膜する工程を間に挟んでも良い。   Next, a pair of the adapter 1a and the SiC wafer 2 is transported one by one from the load lock chamber of the film forming apparatus to the sputtering reaction chamber, that is, the film forming chamber, and an electrode material is formed on the SiC wafer 2 in the sputter reaction chamber. (Step S3). As the electrode material, Al, AlSi, AlSiCu, or the like can be used, but here it is AlSi. Note that, before the electrode material is formed, a step of continuously forming a Ti film and a TiN film with a film forming apparatus may be interposed.

成膜処理が終了した組がスパッタ反応室からロードロック室に運搬されると、次の組がロードロック室からスパッタ反応室に運搬されて順次成膜処理が行われる。仮に、アダプタ１ａを複数のＳｉＣウエハ２で使いまわすとすれば、複数のＳｉＣウエハ２の処理過程でアダプタ１ａに熱が蓄積され、後で処理されるＳｉＣウエハ２ほど高温のアダプタ１ａに載置されることになる結果、ＳｉＣウエハ２間で処理温度のばらつきが生じてしまう。しかし、実施の形態１に係るＳｉＣ半導体装置の製造方法によれば、１枚のＳｉＣウエハ２につき１枚のアダプタ１ａを用いるため、各ＳｉＣウエハ２は十分冷えたアダプタ１ａに載置されることになり、ＳｉＣウエハ２間で処理温度のばらつきを低減することができる。   When the set for which the film forming process has been completed is transported from the sputter reaction chamber to the load lock chamber, the next set is transported from the load lock chamber to the sputter reaction chamber, and the film forming process is sequentially performed. If the adapter 1a is reused with a plurality of SiC wafers 2, heat is accumulated in the adapter 1a during the processing of the plurality of SiC wafers 2, and the SiC wafer 2 to be processed later is placed on the adapter 1a having a higher temperature. As a result, the processing temperature varies among the SiC wafers 2. However, according to the manufacturing method of the SiC semiconductor device according to the first embodiment, since one adapter 1a is used for one SiC wafer 2, each SiC wafer 2 is placed on a sufficiently cooled adapter 1a. Thus, variation in processing temperature between SiC wafers 2 can be reduced.

最後に、成膜装置のロードロック室からＳｉＣウエハ２を取り出す（ステップＳ４）。なお、他のＳｉＣウエハ２と比べて処理中に異常に高い温度に到達したり一定温度以上の時間が異常に長くなったりしたＳｉＣウエハ２は、アダプタ１ａと熔着しやすい。しかし、上述したように本実施の形態では複数のＳｉＣウエハ２間で処理温度のばらつきが低減されるため、ＳｉＣウエハ２とアダプタ１ａとの溶着は少なく、従って、本工程ではＳｉＣウエハ２を簡単に取り出すことができる。   Finally, the SiC wafer 2 is taken out from the load lock chamber of the film forming apparatus (step S4). SiC wafer 2 that reaches an abnormally high temperature during processing or has an abnormally long time above a certain temperature as compared with other SiC wafers 2 is likely to be welded to adapter 1a. However, as described above, in the present embodiment, the processing temperature variation among the plurality of SiC wafers 2 is reduced, so that there is little welding between the SiC wafer 2 and the adapter 1a. Can be taken out.

以上に説明したように、実施の形態１に係るＳｉＣ半導体装置の製造方法では、（ａ）ＳｉＣウエハ２とＳｉＣウエハ２を載置したＳｉＣウエハ２より大口径のアダプタ１ａとからなる複数の単位処理物を用意する工程と、（ｂ）複数の単位処理物を成膜装置のロードロック室にセットする工程と、（ｃ）複数の単位処理物の一つをロードロック室から成膜装置の成膜室に搬送し、成膜室でＳｉＣウエハ２に電極材料を成膜した後、成膜室からロードロック室に戻す工程と、（ｄ）複数の単位処理物の別の一つをロードロック室から成膜装置の成膜室に搬送し、成膜室でＳｉＣウエハ２に電極材料を成膜した後、成膜室からロードロック室に戻す工程と、を備え、複数の単位処理物の夫々のＳｉＣウエハ２に電極材料を成膜するまで工程（ｄ）を繰り返す、この方法により、成膜装置内で成膜処理を待機中の各ＳｉＣウエハ２の熱をアダプタ１から放熱することができるため、ＳｉＣウエハ２間で処理温度のばらつきが低減される。   As described above, in the method of manufacturing the SiC semiconductor device according to the first embodiment, (a) a plurality of units including the SiC wafer 2 and the adapter 1a having a larger diameter than the SiC wafer 2 on which the SiC wafer 2 is placed. A step of preparing a processed product, (b) a step of setting a plurality of unit processed products in a load lock chamber of the film forming apparatus, and (c) one of the plurality of unit processed products from the load lock chamber to the film forming apparatus. A step of transferring the electrode material to the load lock chamber after depositing the electrode material on the SiC wafer 2 in the film formation chamber, and (d) loading another one of the plurality of unit treatment products A plurality of unit processed products, comprising: transferring the electrode material from the lock chamber to the film forming chamber of the film forming apparatus, depositing the electrode material on the SiC wafer 2 in the film forming chamber, and then returning the film from the film forming chamber to the load lock chamber. Step (d) until an electrode material is deposited on each SiC wafer 2 Repeating, by this method, it is possible to radiate heat the SiC wafer 2 waiting a film forming process in the film forming apparatus from the adapter 1, the variation of the processing temperature is reduced by between SiC wafer 2.

なお、上記の説明では、ＳｉＣウエハ２を載置するアダプタ１ａの面を特に限定しなかった。しかし、最高４５０℃程度で処理されるときのアダプタ１ａの反る方向からアダプタ１ａの２つの主面のうち一方を表面、他方を裏面と定義し、こうして定義されたアダプタ１ａの表面にのみＳｉＣウエハ２を載置するようにしても良い。このように、アダプタ１ａの反る方向に基づき選択された主面にＳｉＣウエハ２を載置することにより、複数のＳｉＣウエハ２間でアダプタ１ａとの接触面積が均一にし、処理温度のばらつきをさらに低減することができる。また、例えばアダプタ１ａの反る方向と反対側の面を表面と定義すれば、アダプタ１ａはＳｉＣウエハ２と反対側に反るため、アダプタ１ａとＳｉＣウエハ２との熔着を低減することができる。   In the above description, the surface of the adapter 1a on which the SiC wafer 2 is placed is not particularly limited. However, one of the two main surfaces of the adapter 1a is defined as a front surface and the other is defined as a back surface from the direction in which the adapter 1a warps when processed at a maximum of about 450 ° C. The wafer 2 may be placed. As described above, by placing the SiC wafer 2 on the main surface selected based on the warping direction of the adapter 1a, the contact area with the adapter 1a is made uniform among the plurality of SiC wafers 2, and the processing temperature varies. Further reduction can be achieved. Further, for example, if the surface opposite to the direction in which the adapter 1a warps is defined as the surface, the adapter 1a warps in the opposite direction to the SiC wafer 2, so that the welding between the adapter 1a and the SiC wafer 2 can be reduced. it can.

アダプタ１ａに使用される８インチ多結晶ＳｉＣウエハは、例えばカーボン母材の両面にＣＶＤ（Chemical Vapor Deposition）法によりＳｉＣを厚く成膜した後、カーボン母材をＣＯ２化により消失する方法により形成される。この方法によれば１枚のカーボン母材から２枚の多結晶ＳｉＣウエハを得ることができるが、得られた多結晶ＳｉＣウエハは、４５０℃程度で処理されると全てカーボン母材側すなわち成膜初期側、またはエア側すなわち成膜終了側の一方に反るという特徴を持つ。その反り方向は多結晶ＳｉＣの形成条件により一意に定まるため、反り方向を考慮して８インチ多結晶ＳｉＣウエハの表面と裏面とを定義することができる。 The 8-inch polycrystalline SiC wafer used for the adapter 1a is formed, for example, by forming a thick SiC film on both sides of the carbon base material by CVD (Chemical Vapor Deposition) method and then removing the carbon base material by CO 2 conversion. Is done. According to this method, two polycrystalline SiC wafers can be obtained from one carbon base material. However, when the obtained polycrystalline SiC wafer is processed at about 450 ° C., all of the polycrystalline SiC wafer is formed on the carbon base material side. It is characterized in that it warps either the film initial side or the air side, ie, the film formation end side. Since the warping direction is uniquely determined by the formation conditions of the polycrystalline SiC, the front and back surfaces of the 8-inch polycrystalline SiC wafer can be defined in consideration of the warping direction.

以上でＳｉＣウエハに電極材料を成膜する工程を説明したが、アダプタの構成に想定される多数の変形例を以下の実施の形態で説明する。   Although the process of forming the electrode material on the SiC wafer has been described above, a number of modifications assumed for the configuration of the adapter will be described in the following embodiments.

＜実施の形態２＞
図４は、実施の形態２に係るアダプタ１ｂにＳｉＣウエハ２を載置した状態の断面図であり、図５はその平面図である。アダプタ１ｂの上面、すなわちＳｉＣウエハ２が載置される面には滑り止めピン３が設置されている。図５に示すように、滑り止めピン３は、アダプタ１ｂにＳｉＣウエハ２を載置した際、ＳｉＣウエハ２が滑り止めピン３にほぼ内接するようＳｉＣウエハ２の外周より外側に６個程度設置される。これにより、滑り止めピン３は、ＳｉＣウエハ２の位置ずれを防ぐ突起となるため、ＳｉＣウエハ２が成膜装置内での処理中に滑って位置ずれを起こしたり想定外の周辺に落下したりすることを防止できる。滑り止めピン３の材質には、アルミナ（Ａｌ２Ｏ３）、ＳｉＣ、ＳｉＮ、ＢＮなどのセラミック材料が適している。また、滑り止めピン３の高さは０．２ｍｍないし１ｍｍ程度が適している。なぜならば、滑り止めピン３が高すぎるとスパッタ時の放電異常の原因となり、低過ぎると面取り加工が施されたＳｉＣウエハ２が滑り止めピン３に乗り上げてしまうリスクが高まるからである。 <Embodiment 2>
4 is a cross-sectional view of a state in which SiC wafer 2 is placed on adapter 1b according to the second embodiment, and FIG. 5 is a plan view thereof. Non-slip pins 3 are provided on the upper surface of the adapter 1b, that is, the surface on which the SiC wafer 2 is placed. As shown in FIG. 5, when the SiC wafer 2 is placed on the adapter 1b, about six anti-slip pins 3 are installed outside the outer periphery of the SiC wafer 2 so that the SiC wafer 2 is substantially inscribed in the anti-slip pin 3. Is done. As a result, the anti-slip pin 3 serves as a protrusion for preventing the positional deviation of the SiC wafer 2, so that the SiC wafer 2 slips during processing in the film forming apparatus and causes a positional deviation or falls to an unexpected surrounding. Can be prevented. As the material of the non-slip pin 3, a ceramic material such as alumina (Al2O3), SiC, SiN, or BN is suitable. The height of the anti-slip pin 3 is suitably about 0.2 mm to 1 mm. This is because if the anti-slip pin 3 is too high, it causes discharge abnormality during sputtering, and if it is too low, the risk of the chamfered SiC wafer 2 riding on the anti-slip pin 3 increases.

＜実施の形態３＞
図６は、実施の形態３に係るアダプタ１ｃにＳｉＣウエハ２を載置した状態の断面図である。アダプタ１ｃの上面にはＳｉＣウエハ２の寸法にあわせた凹部４が形成され、凹部４の底面にＳｉＣウエハ２が載置される。これにより、ＳｉＣウエハ２の位置ずれおよびアダプタ１ｃからの落下を防ぐことができる。また、成膜工程で発生した塵をアダプタ１ｃの凹部４内に留めることができるため、アダプタ１ｃ外への発塵を低減することができる。 <Embodiment 3>
FIG. 6 is a cross-sectional view of a state in which SiC wafer 2 is placed on adapter 1c according to the third embodiment. A recess 4 is formed on the upper surface of the adapter 1c in accordance with the dimension of the SiC wafer 2, and the SiC wafer 2 is placed on the bottom surface of the recess 4. Thereby, position shift of SiC wafer 2 and fall from adapter 1c can be prevented. Moreover, since the dust generated in the film forming process can be retained in the recess 4 of the adapter 1c, dust generation outside the adapter 1c can be reduced.

＜実施の形態４＞
図７は、実施の形態４に係るアダプタ１ｄにＳｉＣウエハ２を載置した状態の断面図である。アダプタ１ｄの凹部４の底面には、ブラスト加工による粗面化処理が施され、凹部４の底面の断面形状が方形波状となる。これ以外のアダプタ１ｄの構成は実施の形態２のアダプタ１ｃと同様である。ＳｉＣウエハ２が載置される凹部４の底面が凹凸形状であるため、ＳｉＣウエハ２とアダプタ１ｄとの間のエア抜きが促進され、ＳｉＣウエハ２の位置ずれリスクが低減する。さらに、アダプタ１ｄは何回か繰り返して使用すると、発塵管理の観点から成膜物を除去する必要があるが、凹部４の底面の凹凸に成膜物が入り込むことによって、成膜物除去までの繰り返し使用回数を増やすことができる。 <Embodiment 4>
FIG. 7 is a cross-sectional view of a state in which SiC wafer 2 is placed on adapter 1d according to the fourth embodiment. The bottom surface of the recess 4 of the adapter 1d is subjected to a roughening process by blasting, so that the cross-sectional shape of the bottom surface of the recess 4 becomes a square wave. Other configurations of the adapter 1d are the same as those of the adapter 1c of the second embodiment. Since the bottom surface of the recess 4 on which the SiC wafer 2 is placed has an uneven shape, air bleeding between the SiC wafer 2 and the adapter 1d is promoted, and the risk of displacement of the SiC wafer 2 is reduced. Furthermore, when the adapter 1d is used repeatedly several times, it is necessary to remove the film from the viewpoint of dust generation control. The number of repeated use can be increased.

なお、ＳｉＣウエハ２が載置される面の断面形状は、図７に示す方形波状の他、図８に示すアダプタ１ｅのような三角波形状であってもよいし、ポーラス状であっても良い。これらの断面形状は、例えばサンドブラスト法などにより形成することができる。但し、方形波状の場合、他の形状に比べてＳｉＣウエハ２と載置面との接触面積が大きいため、熱伝導性を高めることができる。   The cross-sectional shape of the surface on which SiC wafer 2 is placed may be a triangular wave shape such as adapter 1e shown in FIG. 8 or a porous shape in addition to the square wave shape shown in FIG. . These cross-sectional shapes can be formed by, for example, a sandblast method. However, in the case of a square wave shape, since the contact area between the SiC wafer 2 and the mounting surface is larger than that of other shapes, the thermal conductivity can be increased.

また、図７、図８に示すアダプタ１ｄ、１ｅでは凹部４にのみ凹凸を形成したが、凹部４以外の表面にも凹凸を形成しても良い。こうして凹凸の数を増やすことにより、成膜物除去までの繰り返し使用回数をさらに増やすことができる。   In addition, in the adapters 1 d and 1 e shown in FIGS. 7 and 8, irregularities are formed only in the recesses 4, but irregularities may be formed on the surface other than the recesses 4. By increasing the number of irregularities in this way, it is possible to further increase the number of times of repeated use until the film is removed.

＜実施の形態５＞
図９は、実施の形態５に係るアダプタ１ｆにＳｉＣウエハ２を載置した状態の断面図であり、図１０はその平面図である。アダプタ１ｆは、中央に開口部５を有する円環状である。また、開口部５に面するアダプタ１ｆの内周側面６はテーパーを有しており、ＳｉＣウエハ２を載置する。この形状のアダプタ１ｆは、ＳｉＣウエハ２の両面に同時に成膜を行う他のプロセスにおいてもアダプタとして用いることができる。 <Embodiment 5>
FIG. 9 is a cross-sectional view of a state in which SiC wafer 2 is placed on adapter 1f according to the fifth embodiment, and FIG. 10 is a plan view thereof. The adapter 1f has an annular shape having an opening 5 at the center. Moreover, the inner peripheral side surface 6 of the adapter 1 f facing the opening 5 has a taper, and the SiC wafer 2 is placed thereon. The adapter 1f having this shape can also be used as an adapter in other processes in which film formation is simultaneously performed on both surfaces of the SiC wafer 2.

アダプタ１ｆは、実施の形態１のアダプタ１ａの中央部をくりぬいて作成することができる。アダプタ１ｆは、放熱による冷却効果の観点から熱伝導性に優れるＳｉＣ製であることが望ましいが、加工が容易な石英製であっても良い。   The adapter 1f can be created by hollowing out the central portion of the adapter 1a of the first embodiment. The adapter 1f is preferably made of SiC having excellent thermal conductivity from the viewpoint of the cooling effect by heat dissipation, but may be made of quartz that can be easily processed.

図１１は、実施の形態５の第１の変形例に係るアダプタ１ｇにＳｉＣウエハ２を載置した状態の断面図である。アダプタ１ｇは、開口部５の上部に面する上部内周側面６ａと開口部５の下部に面する下部内周側面６ｂとを有しており、下部内周側面６ｂのテーパー角は上部内周側面６ａのテーパー角より大きい。そして、内周側面６ｂにＳｉＣウエハ２が載置される。スパッタ法でＳｉＣウエハ２にＡｌＳｉを成膜する際、ＡｌＳｉがＳｉＣウエハ２のターゲット面を回り込むため、アダプタ１ｇの内周側面６ｂにもＡｌＳｉが若干形成される。しかし、アダプタ１ｇの内周側面６ｂのテーパー角度を大きくすることによって、内周側面６ｂとＳｉＣウエハ２のべべリング面２ａとの角度が大きくなるため、両者の熔着を起こりにくくすることができる。   FIG. 11 is a cross-sectional view of a state in which SiC wafer 2 is placed on adapter 1g according to a first modification of the fifth embodiment. The adapter 1g has an upper inner peripheral side surface 6a facing the upper part of the opening 5 and a lower inner peripheral side surface 6b facing the lower part of the opening 5. The taper angle of the lower inner peripheral side surface 6b is the upper inner peripheral side. It is larger than the taper angle of the side surface 6a. Then, SiC wafer 2 is placed on inner peripheral side surface 6b. When AlSi is deposited on the SiC wafer 2 by sputtering, AlSi wraps around the target surface of the SiC wafer 2, so that a little AlSi is also formed on the inner peripheral side surface 6b of the adapter 1g. However, by increasing the taper angle of the inner peripheral side surface 6b of the adapter 1g, the angle between the inner peripheral side surface 6b and the beveling surface 2a of the SiC wafer 2 is increased, so that the two can hardly be welded. .

また、図１２は、実施の形態５の第２の変形例に係るアダプタ１ｈにＳｉＣウエハ２を載置した状態の断面図である。アダプタ１ｈは、ドーナツ形状の内周端部にアダプタ１ｈの上面から突出した突起１ｈ１を有しており、突起１ｈ１にＳｉＣウエハ２が載置される。図１２に示すように、ＳｉＣウエハ２のべべリング面２ａが突起１ｈ１と接触しないよう突起１ｈ１及び開口部５の寸法を設計することにより、ＳｉＣウエハ２のターゲット面を回り込んだＡｌＳｉが付着したアダプタ１ｈの部分とＳｉＣウエハ２とが接触しないため、ＳｉＣウエハ２とアダプタ１ｈとの熔着をより一層防ぐことができる。   FIG. 12 is a cross-sectional view of a state in which SiC wafer 2 is placed on adapter 1h according to the second modification of the fifth embodiment. The adapter 1h has a protrusion 1h1 protruding from the upper surface of the adapter 1h at the inner peripheral end of the donut shape, and the SiC wafer 2 is placed on the protrusion 1h1. As shown in FIG. 12, by designing the dimensions of the projection 1h1 and the opening 5 so that the beveling surface 2a of the SiC wafer 2 does not come into contact with the projection 1h1, the AlSi that wraps around the target surface of the SiC wafer 2 adheres. Since the adapter 1h portion and the SiC wafer 2 do not come into contact with each other, it is possible to further prevent welding of the SiC wafer 2 and the adapter 1h.

なお、本発明は、その発明の範囲内において、各実施の形態を自由に組み合わせたり、各実施の形態を適宜、変形、省略したりすることが可能である。   It should be noted that the present invention can be freely combined with each other within the scope of the invention, and each embodiment can be appropriately modified or omitted.

１ａ，１ｂ，１ｃ，１ｄ，１ｅ，１ｆ，１ｇ，１ｈ アダプタ、１ｈ１ 突起、２ ＳｉＣウエハ、２ａ べべリング面、３ 滑り止めピン、４ 凹部、５ 開口部、６ 内周側面、６ａ 上部内周側面、６ｂ 下部内周側面。   1a, 1b, 1c, 1d, 1e, 1f, 1g, 1h adapter, 1h1 protrusion, 2 SiC wafer, 2a beveling surface, 3 non-slip pin, 4 recess, 5 opening, 6 inner peripheral side, 6a upper inner periphery Side surface, 6b Lower inner peripheral side surface.

Claims (7)

（ａ）ＳｉＣウエハと前記ＳｉＣウエハを載置した前記ＳｉＣウエハより大口径のアダプタとからなる複数の単位処理物を用意する工程と、
（ｂ）前記複数の単位処理物を成膜装置のロードロック室にセットする工程と、
（ｃ）前記複数の単位処理物の一つを前記ロードロック室から前記成膜装置の成膜室に搬送し、前記成膜室で前記ＳｉＣウエハに電極材料を成膜した後、前記成膜室から前記ロードロック室に戻す工程と、
（ｄ）前記複数の単位処理物の別の一つを前記ロードロック室から前記成膜装置の成膜室に搬送し、前記成膜室で前記ＳｉＣウエハに電極材料を成膜した後、前記成膜室から前記ロードロック室に戻す工程と、を備え、
前記複数の単位処理物の夫々の前記ＳｉＣウエハに前記電極材料を成膜するまで前記工程（ｄ）を繰り返す、
ＳｉＣ半導体装置の製造方法。 (A) a step of preparing a plurality of unit processed objects each comprising a SiC wafer and an adapter having a larger diameter than the SiC wafer on which the SiC wafer is placed;
(B) setting the plurality of unit treatment products in a load lock chamber of a film forming apparatus;
(C) One of the plurality of unit processed products is transferred from the load lock chamber to a film forming chamber of the film forming apparatus, and after depositing an electrode material on the SiC wafer in the film forming chamber, the film forming is performed. Returning from the chamber to the load lock chamber;
(D) transferring another one of the plurality of unit processed products from the load lock chamber to a film forming chamber of the film forming apparatus, and forming an electrode material on the SiC wafer in the film forming chamber; A step of returning from the film formation chamber to the load lock chamber,
Repeating the step (d) until the electrode material is deposited on the SiC wafer of each of the plurality of unit processed products,
Manufacturing method of SiC semiconductor device. 前記アダプタの前記ＳｉＣウエハが載置される面は、前記アダプタの２つの主面のうち前記アダプタの反る方向に基づき選択された主面である、
請求項１に記載のＳｉＣ半導体装置の製造方法。 The surface on which the SiC wafer of the adapter is placed is a main surface selected based on the warping direction of the adapter among the two main surfaces of the adapter.
The manufacturing method of the SiC semiconductor device of Claim 1. 請求項１又は２に記載のＳｉＣ半導体装置の製造方法においてＳｉＣウエハが載置されるアダプタであって、
前記ＳｉＣウエハの載置面には、前記載置面に載置される前記ＳｉＣウエハの外周より外側に突起が設けられる、
アダプタ。 An adapter on which a SiC wafer is placed in the method of manufacturing a SiC semiconductor device according to claim 1 or 2,
On the mounting surface of the SiC wafer, a protrusion is provided outside the outer periphery of the SiC wafer mounted on the mounting surface.
adapter. 請求項１又は２に記載のＳｉＣ半導体装置の製造方法においてＳｉＣウエハが載置されるアダプタであって、
前記複数のアダプタの各々は凹部を有し、
前記凹部の底面が前記ＳｉＣウエハの載置面となる、
アダプタ。 An adapter on which a SiC wafer is placed in the method of manufacturing a SiC semiconductor device according to claim 1 or 2,
Each of the plurality of adapters has a recess,
The bottom surface of the recess serves as a mounting surface of the SiC wafer;
adapter. 請求項１又は２に記載のＳｉＣ半導体装置の製造方法においてＳｉＣウエハが載置されるアダプタであって、
表面にブラスト加工による粗面化処理が施された、
アダプタ。 An adapter on which a SiC wafer is placed in the method of manufacturing a SiC semiconductor device according to claim 1 or 2,
The surface was roughened by blasting,
adapter. 請求項１又は２に記載のＳｉＣ半導体装置の製造方法においてＳｉＣウエハが載置されるアダプタであって、
中心に開口部を有する円環状であり、
前記開口部に面する内周側面はテーパーを有し、
前記内周側面に前記ＳｉＣウエハが載置される、
アダプタ。 An adapter on which a SiC wafer is placed in the method of manufacturing a SiC semiconductor device according to claim 1 or 2,
An annular shape having an opening in the center;
The inner peripheral side facing the opening has a taper,
The SiC wafer is placed on the inner peripheral side surface,
adapter. 前記内周側面は、前記開口部の上部に面する上部内周側面と、前記開口部の下部に面する下部内周側面とを有し、
前記下部内周側面のテーパー角は前記上部内周側面のテーパー角より大きい、
請求項６に記載のアダプタ。 The inner peripheral side has an upper inner peripheral side facing the upper part of the opening, and a lower inner peripheral side facing the lower part of the opening,
The taper angle of the lower inner peripheral surface is larger than the taper angle of the upper inner peripheral surface,
The adapter according to claim 6.
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