JP2018056241A - Manufacturing method of solid state image pick-up device - Google Patents
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- 238000004519 manufacturing process Methods 0.000 title claims abstract description 28
- 239000007787 solid Substances 0.000 title abstract 2
- 238000005468 ion implantation Methods 0.000 claims abstract description 60
- 238000002955 isolation Methods 0.000 claims abstract description 31
- 239000011159 matrix material Substances 0.000 claims abstract description 7
- 238000003384 imaging method Methods 0.000 claims description 41
- 238000000034 method Methods 0.000 claims description 24
- 239000012535 impurity Substances 0.000 abstract description 25
- 238000002347 injection Methods 0.000 abstract 1
- 239000007924 injection Substances 0.000 abstract 1
- 238000000926 separation method Methods 0.000 abstract 1
- 239000000243 solution Substances 0.000 abstract 1
- 230000002093 peripheral effect Effects 0.000 description 9
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- 230000005484 gravity Effects 0.000 description 2
- 238000002513 implantation Methods 0.000 description 2
- 150000002500 ions Chemical class 0.000 description 2
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Abstract
Description
この発明は、平面内に複数の画素がマトリックス状に配置された固体撮像素子の製造方法に関するものである。 The present invention relates to a method for manufacturing a solid-state imaging device in which a plurality of pixels are arranged in a matrix in a plane.
従来、図１〜図３に示すように、１つのマイクロレンズ１１と、上記１つのマイクロレンズ１１の背後に配置された第１の画素１２Ｌと第２の画素１２Ｒを１組含んで構成される画素ペア１２である像面位相差画素を、複数備える固体撮像素子が知られている。この像面位相差画素とマイクロレンズ１１とが、平面において縦方向と横方向に複数隣接して配置される。つまり、平面内に複数の画素がマトリックス状に配置された固体撮像素子である。 Conventionally, as shown in FIGS. 1 to 3, one microlens 11 and a set of a first pixel 12 </ b> L and a second pixel 12 </ b> R disposed behind the one microlens 11 are configured. A solid-state imaging device including a plurality of image plane phase difference pixels that are the pixel pair 12 is known. A plurality of the image plane phase difference pixels and the microlenses 11 are arranged adjacent to each other in the vertical direction and the horizontal direction on the plane. That is, the solid-state imaging device has a plurality of pixels arranged in a matrix in a plane.
図１、図２においては、縦方向に隣接する２つの画素ペア１２を示している。全ての画素ペア１２の第１の画素１２Ｌと第２の画素１２Ｒは、例えば、撮像処理前のＡＦ(オートフォーカス）処理の際には像面位相差画素として用いられ、撮像処理の際には同じく全ての画素ペア１２の第１の画素１２Ｌと第２の画素１２Ｒが撮像素子として用いられる。 1 and 2 show two pixel pairs 12 adjacent in the vertical direction. The first pixel 12L and the second pixel 12R of all the pixel pairs 12 are used as, for example, an image plane phase difference pixel in an AF (autofocus) process before an imaging process, and in an imaging process. Similarly, the first pixel 12L and the second pixel 12R of all the pixel pairs 12 are used as imaging elements.
１つのマイクロレンズ１１と１組の第１の画素１２Ｌと第２の画素１２Ｒとの間には、平坦化層１４が設けられている。平坦化層１４内の上側の位置には、１組の第１の画素１２Ｌと第２の画素１２Ｒの表面領域を覆う大きさのカラーフィルタ１５が介装されている。即ち、上記１つのマイクロレンズ１１と上記１組の第１の画素１２Ｌと第２の画素１２Ｒとの間に、１つのカラーフィルタが介装されている。 A planarization layer 14 is provided between one microlens 11 and one set of the first pixel 12L and the second pixel 12R. A color filter 15 having a size covering the surface area of the pair of the first pixel 12L and the second pixel 12R is interposed at an upper position in the planarization layer 14. That is, one color filter is interposed between the one micro lens 11 and the one set of the first pixel 12L and the second pixel 12R.
各画素ペア１２のカラーフィルタ１５の色は、全画素ペアについて公知のようにベイヤー配列とすることができる。平面の上記画素ペア１２の周縁部を囲繞するように周縁部遮光膜１６が配置されている。この周縁部遮光膜１６は、例えばいずれの位置においても同一幅に形成されている。 The color of the color filter 15 of each pixel pair 12 can be a Bayer array as is known for all pixel pairs. A peripheral portion light shielding film 16 is disposed so as to surround the peripheral portion of the planar pixel pair 12. For example, the peripheral edge light shielding film 16 is formed to have the same width at any position.
図４には、固体撮像素子において、平面の上記画素ペア１２が縦に２ペア配列され、横に２ペア配列され、合計４ペアの部分が抜き出されて描かれている。この図４では、マイクロレンズ１１と周縁部遮光膜１６を取り去った状態を示している。素子分離領域部１３の領域に対しイオン注入を行って固体撮像素子が製造される。 In FIG. 4, in the solid-state imaging device, two pairs of the pixel pairs 12 on the plane are arranged vertically and two pairs are arranged horizontally, and a total of four pairs are extracted. FIG. 4 shows a state where the microlens 11 and the peripheral edge light shielding film 16 are removed. A solid-state imaging device is manufactured by performing ion implantation on the region of the element isolation region 13.
イオン注入において、広いイオン注入エリアと狭いイオン注入エリアとを比べると、一般的に、狭いイオン注入エリアの方が広いイオン注入エリアに比べて不純物濃度が薄くなることが知られている。これは半導体基板を構成している原子にイオンが衝突し、一定の広がりを持って注入されるからである。そのため、イオン注入領域の幅が狭くなるほど交差するイオン注入領域と他のイオン注入領域の濃度差は大きくなる。 In ion implantation, it is known that, when a wide ion implantation area is compared with a narrow ion implantation area, generally, a narrow ion implantation area has a lower impurity concentration than a wide ion implantation area. This is because ions collide with atoms constituting the semiconductor substrate and are implanted with a certain spread. Therefore, as the width of the ion implantation region becomes narrower, the concentration difference between the intersecting ion implantation region and other ion implantation regions becomes larger.
図４の固体撮像素子の例において、素子分離領域部１３の平面において素子分離領域部１３が交差する広いイオン注入エリアを円Ｘで示す。これに対し、直線帯状に素子分離領域部１３が延びている部分の狭いイオン注入エリアを円Ｙで示す。 In the example of the solid-state imaging device of FIG. 4, a wide ion implantation area where the element isolation region 13 intersects in the plane of the element isolation region 13 is indicated by a circle X. On the other hand, a narrow ion implantation area where the element isolation region 13 extends in a straight strip shape is indicated by a circle Y.
図５に、イオン注入を行った場合の図４に示した部分に関する不純物濃度の濃淡分布をシミュレーションした結果を示す。素子分離領域部１３において、濃い色で示されている部分の不純物濃度が濃く表されている。明らかに、素子分離領域部１３の広いイオン注入エリア円Ｘの不純物濃度が濃くなることが判る。また、交差エリアの濃度ｘと交差エリア以外の濃度ｙの比（相対値）をｘ／ｙとし、素子分離領域部１３の幅（交差点以外の位置の幅）を３段階で変化させたときの上記ｘ／ｙの変化を図６のグラフに示す。素子分離領域部１３の幅が狭いほど、比ｘ／ｙの値も大きくなることが判る。 FIG. 5 shows the result of simulating the density distribution of the impurity concentration for the portion shown in FIG. 4 when ion implantation is performed. In the element isolation region 13, the impurity concentration of the portion indicated by a dark color is expressed deeply. Obviously, it can be seen that the impurity concentration of the wide ion implantation area circle X in the element isolation region 13 is high. Further, the ratio (relative value) between the density x of the intersection area and the density y of the area other than the intersection area is x / y, and the width of the element isolation region 13 (the width of the position other than the intersection) is changed in three stages. The change in x / y is shown in the graph of FIG. It can be seen that the smaller the width of the element isolation region portion 13, the larger the value of the ratio x / y.
従って、上記図４の固体撮像素子において、直線帯状の素子分離領域部１３の部分で所定の素子分離効果が得られるように不純物濃度の設定を行ってイオン注入を行うと、交差エリアにおいて不純物濃度が必要以上に濃くなってしまう。このため、交差エリア近傍の無電界領域が設計値よりも広くなる。この結果、１つの画素ペア１２の素子分離領域部１３へ入射した光によって生成された電子は隣接する他方の画素ペア１２に到達し、クロストーク（混色）が生じるという問題がある。 Therefore, in the solid-state imaging device of FIG. 4 described above, when ion implantation is performed by setting the impurity concentration so that a predetermined element isolation effect can be obtained in the linear band-shaped element isolation region portion 13, the impurity concentration in the intersection area is obtained. Becomes darker than necessary. For this reason, the non-electric field region near the intersection area becomes wider than the design value. As a result, there is a problem that electrons generated by light incident on the element isolation region 13 of one pixel pair 12 reach the other adjacent pixel pair 12 and crosstalk (color mixing) occurs.
混色の防止という観点からなされた発明が特許文献１に開示されている。この発明では、チャネルストップ部２０、５０は、複数回の不純物イオン注入工程によって形成されており、半導体基板１００の深さ方向（バルク深さ方向）に４層の不純物領域２０Ａ、２０Ｂ、２０Ｃ、２０Ｄ及び不純物領域５０Ａ、５０Ｂ、５０Ｃ、５０Ｄを形成することにより、半導体基板１００の深い領域までＰ型領域を設け、不正な電荷の移動を防止する。 An invention made from the viewpoint of preventing color mixing is disclosed in Patent Document 1. In the present invention, the channel stop portions 20 and 50 are formed by a plurality of impurity ion implantation steps, and four layers of impurity regions 20A, 20B, and 20C are formed in the depth direction (bulk depth direction) of the semiconductor substrate 100. By forming 20D and impurity regions 50A, 50B, 50C, and 50D, a P-type region is provided up to a deep region of the semiconductor substrate 100 to prevent unauthorized charge transfer.
また、チャネルストップ部７０の４層構造の不純物領域７０Ａ、７０Ｂ、７０Ｃ、７０Ｄは、半導体基板１００の深さ方向に徐々に幅の狭い不純物領域とすることにより、半導体基板１００の深部では、チャネルストップ部７０のＰ型不純物の拡散によって受光部の電荷蓄積領域が小さくなるのを回避する、というものである。 Further, the impurity regions 70A, 70B, 70C, and 70D of the four-layer structure of the channel stop portion 70 are gradually narrowed in the depth direction of the semiconductor substrate 100, so that the channel region is formed in the deep portion of the semiconductor substrate 100. This is to prevent the charge accumulation region of the light receiving portion from becoming smaller due to the diffusion of the P-type impurity in the stop portion 70.
しかしながら、上記のような従来の固体撮像素子の製造方法によっては、固体撮像素子において、直線帯状の素子分離領域部の部分で所定の素子分離効果が得られるように不純物濃度の設定を行ってイオン注入を行うと、交差エリアにおいて不純物濃度が必要以上に濃くなってしまうという問題は解決することができなかった。また、逆に、交差エリアにおいて所定の素子分離効果が得られるように不純物濃度の設定を行ってイオン注入を行うと、直線帯状の素子分離領域部の部分で不純物濃度が必要以上に薄くなってしまうという問題は解決することができなかった。 However, depending on the conventional method for manufacturing a solid-state imaging device as described above, in the solid-state imaging device, the ion concentration is set by setting the impurity concentration so that a predetermined element isolation effect can be obtained in the linear band-shaped element isolation region portion. When the implantation is performed, the problem that the impurity concentration in the intersecting area becomes higher than necessary cannot be solved. Conversely, if ion implantation is performed by setting the impurity concentration so that a predetermined element isolation effect can be obtained in the intersection area, the impurity concentration becomes thinner than necessary in the linear band-shaped element isolation region portion. The problem of end could not be solved.
本発明は、上記のような固体撮像素子の製造方法が有している問題点を解決せんとしてなされたもので、その目的は、直線帯状の素子分離領域部の部分と交差エリアにおいてそれぞれ適切な不純物濃度の値を設定することが可能な固体撮像素子の製造方法を提供することである。 The present invention has been made in order to solve the problems of the above-described method for manufacturing a solid-state imaging device, and the purpose thereof is appropriate for each of the linear strip-shaped element isolation region portion and the intersection area. It is an object of the present invention to provide a method for manufacturing a solid-state imaging device capable of setting a value of impurity concentration.
本発明に係る固体撮像素子の製造方法は、平面内に複数の画素がマトリックス状に配置された固体撮像素子の製造方法において、前記複数の画素間を分離する素子分離領域部が平面において交差する交差エリアに対し、前記交差エリアより狭いイオン注入エリアを設定してイオン注入を行うことを特徴とする。 The method for manufacturing a solid-state imaging device according to the present invention is the method for manufacturing a solid-state imaging device in which a plurality of pixels are arranged in a matrix in a plane, and the element isolation region portions that separate the plurality of pixels intersect in a plane. Ion implantation is performed by setting an ion implantation area narrower than the intersection area with respect to the intersection area.
本発明に係る固体撮像素子の製造方法では、複数の交差エリアに対し、それぞれ個別にイオン注入エリアの広さを設定してイオン注入を行うことを特徴とする。 The method for manufacturing a solid-state imaging device according to the present invention is characterized in that ion implantation is performed by individually setting the size of an ion implantation area for each of a plurality of intersection areas.
本発明に係る固体撮像素子の製造方法では、前記交差エリアより狭い、前記交差エリアに対応するイオン注入のための開口部を有するレジストパターンを用いてイオン注入を行うことを特徴とする。 In the method for manufacturing a solid-state imaging device according to the present invention, ion implantation is performed using a resist pattern having an opening for ion implantation corresponding to the intersection area, which is narrower than the intersection area.
本発明に係る固体撮像素子の製造方法では、固体撮像素子は、１つのマイクロレンズと、前記１つのマイクロレンズの背後に配置された第１の画素と第２の画素を１組含んで構成される画素ペアである像面位相差画素が、平面において縦方向と横方向に複数隣接して配置された固体撮像素子であることを特徴とする。 In the method for manufacturing a solid-state imaging device according to the present invention, the solid-state imaging device is configured to include one microlens, and one set of the first pixel and the second pixel disposed behind the one microlens. The image plane phase difference pixel which is a pair of pixels is a solid-state imaging device which is arranged adjacent to each other in a vertical direction and a horizontal direction on a plane.
本発明によれば、複数の画素間を分離する素子分離領域部が平面において交差する交差エリアに対し、前記交差エリアより狭いイオン注入エリアを設定してイオン注入を行うので、実際の広さより狭いエリアへのイオン注入となり、直線帯状の素子分離領域部の部分と交差エリアにおいてそれぞれ適切な不純物濃度の値を設定することが可能である。 According to the present invention, the ion implantation is performed by setting the ion implantation area narrower than the intersecting area with respect to the intersecting area where the element isolation region portions for separating a plurality of pixels intersect in a plane, so that it is narrower than the actual area. Since ion implantation into the area is performed, it is possible to set an appropriate impurity concentration value in each of the linear strip-shaped element isolation region portion and the intersecting area.
以下、添付図面を参照して本発明に係る固体撮像素子の製造方法の実施形態を説明する。各図において同一の構成要素には同一の符号を付して重複する説明を省略する。本発明の実施形態に係る製造方法によって作成された固体撮像素子は、外見上は図１から図４に示した従来例の固体撮像素子と変わらないので、これらの図を用いて構成を説明する。本発明の実施形態に係る製造方法によって作成された固体撮像素子は、１つのマイクロレンズ１１と、上記１つのマイクロレンズ１１の背後に配置された第１の画素１２Ｌと第２の画素１２Ｒを１組含んで構成される画素ペア１２である像面位相差画素を、複数備える。 Embodiments of a method for manufacturing a solid-state imaging device according to the present invention will be described below with reference to the accompanying drawings. In the drawings, the same components are denoted by the same reference numerals, and redundant description is omitted. Since the solid-state imaging device produced by the manufacturing method according to the embodiment of the present invention is not different from the conventional solid-state imaging device shown in FIGS. 1 to 4 in appearance, the configuration will be described with reference to these drawings. . The solid-state imaging device created by the manufacturing method according to the embodiment of the present invention includes one microlens 11, and the first pixel 12 </ b> L and the second pixel 12 </ b> R disposed behind the one microlens 11. A plurality of image plane phase difference pixels which are pixel pairs 12 including the set are provided.
この画素ペア１２とマイクロレンズ１１とが、平面において縦方向と横方向に複数隣接して配置される。つまり、平面内に複数の画素がマトリックス状に配置された固体撮像素子である。 A plurality of pixel pairs 12 and microlenses 11 are arranged adjacent to each other in the vertical direction and the horizontal direction on the plane. That is, the solid-state imaging device has a plurality of pixels arranged in a matrix in a plane.
図１〜図３においては、縦方向に隣接する２つの画素ペア１２を示している。全ての画素ペア１２の第１の画素１２Ｌと第２の画素１２Ｒは、例えば、撮像処理前のＡＦ処理の際には像面位相差画素として用いられ、撮像処理の際には同じく全ての画素ペア１２の第１の画素１２Ｌと第２の画素１２Ｒが撮像素子として用いられる。 1 to 3 show two pixel pairs 12 adjacent in the vertical direction. For example, the first pixel 12L and the second pixel 12R of all the pixel pairs 12 are used as image plane phase difference pixels in the AF process before the imaging process, and all the pixels are similarly used in the imaging process. The first pixel 12L and the second pixel 12R of the pair 12 are used as an image sensor.
１組の第１の画素１２Ｌと第２の画素１２Ｒは、それぞれ、その底部と側壁部に素子分離領域部１３が設けられている。１組の第１の画素１２Ｌと第２の画素１２Ｒの上面と素子分離領域部１３の上面は例えば同じ高さとされている。 Each of the pair of first pixels 12L and second pixels 12R is provided with an element isolation region 13 at the bottom and side walls thereof. The upper surfaces of the pair of first pixels 12L and second pixels 12R and the upper surface of the element isolation region 13 are, for example, the same height.
１つのマイクロレンズ１１と１組の第１の画素１２Ｌと第２の画素１２Ｒとの間には、平坦化層１４が設けられている。平坦化層１４内の上側の位置には、１組の第１の画素１２Ｌと第２の画素１２Ｒの表面領域を覆う大きさのカラーフィルタ１５が介装されている。即ち、上記１つのマイクロレンズ１１と上記１組の第１の画素１２Ｌと第２の画素１２Ｒとの間に、１つのカラーフィルタが介装されている。 A planarization layer 14 is provided between one microlens 11 and one set of the first pixel 12L and the second pixel 12R. A color filter 15 having a size covering the surface area of the pair of the first pixel 12L and the second pixel 12R is interposed at an upper position in the planarization layer 14. That is, one color filter is interposed between the one micro lens 11 and the one set of the first pixel 12L and the second pixel 12R.
各画素ペア１２のカラーフィルタ１５の色は、例えば赤色、緑色、青色であり、全画素ペアについて公知のようにベイヤー配列とすることができる。平面の上記画素ペア１２の周縁部を囲繞するように周縁部遮光膜１６が配置されている。この周縁部遮光膜１６は、例えばいずれの位置においても同一幅に形成されている。 The colors of the color filter 15 of each pixel pair 12 are, for example, red, green, and blue, and all pixel pairs can be arranged in a Bayer arrangement as is well known. A peripheral portion light shielding film 16 is disposed so as to surround the peripheral portion of the planar pixel pair 12. For example, the peripheral edge light shielding film 16 is formed to have the same width at any position.
図４には、固体撮像素子において、平面の上記画素ペア１２が縦に２ペア配列され、横に２ペア配列され、合計４ペアの部分が抜き出されて描かれている。この図４では、マイクロレンズ１１と周縁部遮光膜１６を取り去った状態を示している。素子分離領域部１３の領域に対しイオン注入を行って固体撮像素子が製造される。 In FIG. 4, in the solid-state imaging device, two pairs of the pixel pairs 12 on the plane are arranged vertically and two pairs are arranged horizontally, and a total of four pairs are extracted. FIG. 4 shows a state where the microlens 11 and the peripheral edge light shielding film 16 are removed. A solid-state imaging device is manufactured by performing ion implantation on the region of the element isolation region 13.
本発明の実施形態に係る固体撮像素子の製造方法は、平面内に複数の画素がマトリックス状に配置された固体撮像素子（図１から図４に示した固体撮像素子）の製造方法である。本発明の実施形態に係る製造方法は、上記複数の画素間を分離する素子分離領域部１３が平面において交差する交差エリアＥ（図７（ａ）のハッチングのエリア）に対し、上記交差エリアＥより狭いイオン注入エリアを設定してイオン注入を行うものである。 The manufacturing method of the solid-state imaging device according to the embodiment of the present invention is a manufacturing method of a solid-state imaging device (solid-state imaging device shown in FIGS. 1 to 4) in which a plurality of pixels are arranged in a matrix in a plane. In the manufacturing method according to the embodiment of the present invention, the intersection area E is compared with the intersection area E (the hatched area in FIG. 7A) where the element isolation region portions 13 that separate the plurality of pixels intersect in a plane. Ion implantation is performed by setting a narrower ion implantation area.
次に、第１の実施形態を示す。図７（ｂ）に、第１の実施形態のイオン注入エリア設定の手法を示す。この実施形態では、交差エリアＥより狭いイオン注入エリアをＬ字領域２１を用いて設定する。交差エリアＥは２つの画素１２Ｌの角と２つの画素１２Ｒの角により規定されるため、この４つの角に、交差エリアＥを狭く設定するＬ字領域２１を設ける。Ｌ字領域２１は、その内側の角から横方向及び縦方向の長さＬと、その幅Ｗにより規定される。本実施形態では、Ｌ字領域２１の横方向及び縦方向の長さを同じに設定したが、異なる長さであっても良い。 Next, a first embodiment is shown. FIG. 7B shows a method for setting an ion implantation area according to the first embodiment. In this embodiment, an ion implantation area narrower than the intersection area E is set using the L-shaped region 21. Since the intersection area E is defined by the corners of the two pixels 12L and the corners of the two pixels 12R, an L-shaped region 21 that narrows the intersection area E is provided at these four corners. The L-shaped region 21 is defined by the horizontal and vertical lengths L and the width W from the inner corners. In the present embodiment, the lengths of the L-shaped region 21 in the horizontal direction and the vertical direction are set to be the same, but may be different lengths.
Ｌ字領域２１は、交差エリアＥより狭いイオン注入エリアを設定するための設計に用いるもので、このＬ字領域２１によりイオン注入エリアが決定されると、これに応じて図７（ｃ）に示すようなレジストパターン２０を作成し、これを用いてイオン注入を行う。 The L-shaped region 21 is used for a design for setting an ion implantation area narrower than the intersection area E. When the ion-implanted area is determined by the L-shaped region 21, the L-shaped region 21 is shown in FIG. A resist pattern 20 as shown is created, and ion implantation is performed using the resist pattern 20.
イオン注入を行う工程のフローチャートを図８に示す。上記のようにイオン注入エリアを決定してレジストパターンニングを行う（Ｓ１１）。次にレジストパターンニングされたレジストパターンを用いてイオン注入を行う（Ｓ１２）。イオン注入が終了するとレジストパターンを剥離する（Ｓ１３）。 FIG. 8 shows a flowchart of a process for performing ion implantation. As described above, the ion implantation area is determined and resist patterning is performed (S11). Next, ion implantation is performed using the resist pattern subjected to resist patterning (S12). When the ion implantation is completed, the resist pattern is peeled off (S13).
図９にイオン注入を行った場合の不純物濃度の濃淡分布を、シミュレーションした結果を示す。素子分離領域部１３においては、不純物濃度が濃い部分の色を濃い色で表示したものである。明らかに、素子分離領域部１３の平面において交差する交差エリアEにおいても素子分離領域部１３の他のエリアにおいても、同程度の濃さで表示されており、交差エリアＥにおいて不純物濃度が濃くなるという不具合を解消できたことが判る。 FIG. 9 shows a simulation result of the light and shade distribution of the impurity concentration when ion implantation is performed. In the element isolation region 13, the color of the portion where the impurity concentration is high is displayed in a dark color. Obviously, the intersection area E intersecting in the plane of the element isolation region 13 and the other areas of the element isolation region 13 are displayed with the same density, and the impurity concentration is high in the intersection area E. It can be seen that the problem was solved.
また、交差エリアＥの濃度ｘと交差エリア以外の濃度ｙの比（相対値）をｘ／ｙとし、Ｌ字領域２１の幅Ｗを３段階で変化させたときの上記ｘ／ｙの変化を図１０のグラフに示す。図１０のグラフにおいては、Ｌ字領域２１の幅Ｗを「補正量１」、「補正量２」、「補正量３」と表記している。Ｌ字領域２１の幅Ｗが広いほど、比ｘ／ｙの値が１に近付いている。従って、Ｌ字領域２１の幅Ｗを適宜変更することによって、交差エリアの濃度を変更して所望の値とすることができるものである。 Further, the ratio (relative value) between the density x of the intersection area E and the density y other than the intersection area is x / y, and the change in x / y when the width W of the L-shaped region 21 is changed in three stages. This is shown in the graph of FIG. In the graph of FIG. 10, the width W of the L-shaped region 21 is expressed as “correction amount 1”, “correction amount 2”, and “correction amount 3”. As the width W of the L-shaped region 21 is wider, the value of the ratio x / y is closer to 1. Therefore, by appropriately changing the width W of the L-shaped region 21, the density of the intersection area can be changed to a desired value.
次に、第２の実施形態を示す。図１１（ａ）に、第２の実施形態のイオン注入エリア設定の手法を示す。この実施形態では、交差エリアＥより狭いイオン注入エリアを三角形領域３１により設定する。交差エリアＥは２つの画素１２Ｌの角と２つの画素１２Ｒの角により規定されるため、この４つの角に、三角形の例えば重心を合わせて、交差点の中心点に対して点対称に配置し、三角形の大きさ（面積）を変化させて交差エリアＥを狭く設定する。図１１（ａ）に示す三角形領域３１は二等辺三角形の領域であり、二角の角度で決められている三角形の面積を適宜調整し、イオン注入エリアを規定することにより、交差エリアＥの濃度を適宜に調整する。三角形領域３１の面積調整は、４つの三角形領域３１が共に同じ面積となるように調整する。 Next, a second embodiment is shown. FIG. 11A shows a method for setting an ion implantation area according to the second embodiment. In this embodiment, an ion implantation area narrower than the intersection area E is set by the triangular region 31. Since the intersection area E is defined by the corners of the two pixels 12L and the corners of the two pixels 12R, the triangles, for example, the center of gravity are aligned with these four corners and arranged symmetrically with respect to the center point of the intersection. The intersection area E is set narrow by changing the size (area) of the triangle. A triangular area 31 shown in FIG. 11A is an isosceles triangular area, and the concentration of the intersection area E is determined by appropriately adjusting the area of the triangle determined by the angle of the two angles and defining the ion implantation area. Is adjusted appropriately. The area adjustment of the triangular region 31 is performed so that the four triangular regions 31 have the same area.
この三角形領域３１によりイオン注入エリアが決定されると、これに応じた図１１（ｂ）に示すようなレジストパターン３０を作成し、これを用いてイオン注入を行う。この第２の実施形態では、二等辺三角形による三角形領域３１としたが、正三角形など他の三角形であっても良い。また、三角形領域３１は、多角形領域であっても良いし、円や楕円の領域であっても良い。 When the ion implantation area is determined by the triangular region 31, a resist pattern 30 as shown in FIG. 11B corresponding to this is created, and ion implantation is performed using this resist pattern 30. In the second embodiment, the triangular region 31 is an isosceles triangle, but another triangle such as a regular triangle may be used. Further, the triangular area 31 may be a polygonal area or a circular or elliptical area.
次に、第３の実施形態を示す。図１２（ａ）に、第３の実施形態のイオン注入エリア設定の手法を示す。この実施形態では、交差エリアＥより狭いイオン注入エリアを交差点図形領域４１により設定する。交差エリアＥは交差点の中心点により規定されるため、この中心点に、図形の例えば重心を合わせて、図形の大きさ（面積）を変化させて交差エリアＥを狭く設定する。図１２（ａ）に示す交差点図形領域４１は正四角形であり、一辺の長さが決められるものとする。一辺の長さを変更して正四角形の面積を適宜調整し、イオン注入エリアを規定する。これにより交差エリアの濃度を適宜に調整する。 Next, a third embodiment is shown. FIG. 12A shows a method for setting an ion implantation area according to the third embodiment. In this embodiment, an ion implantation area narrower than the intersection area E is set by the intersection graphic area 41. Since the intersection area E is defined by the center point of the intersection, for example, the center of gravity of the figure is matched with the center point, and the size (area) of the figure is changed to narrow the intersection area E. Assume that the intersection graphic area 41 shown in FIG. 12A is a regular square and the length of one side is determined. By changing the length of one side and adjusting the area of the regular square as appropriate, the ion implantation area is defined. Thereby, the density of the intersection area is appropriately adjusted.
この交差点図形領域４１によりイオン注入エリアが決定されると、これに応じた図１２（ｂ）に示すようなレジストパターン４０を作成し、これを用いてイオン注入を行う。この第３の実施形態では、正四角形による交差点図形領域４１としたが、他の図形であっても良い。但し、交差点の中心点を点対称の中心として左右上下の面積が変更される図形が好適であり、この例として円や正八角形の領域を挙げることができる。 When the ion implantation area is determined by the intersection graphic area 41, a resist pattern 40 as shown in FIG. 12B corresponding to this is created, and ion implantation is performed using this resist pattern 40. In the third embodiment, the intersection graphic area 41 is formed by a regular square, but may be another graphic. However, a figure whose left and right and upper and lower areas are changed with the center point of the intersection as the center of point symmetry is suitable, and examples thereof include a circle or a regular octagonal region.
以上の如くの本発明の第１の実施形態に示したレジストパターン２０と、第２の実施形態に示したレジストパターン３０、第３の実施形態に示したレジストパターン４０のいずれかを用いてイオン注入を行うことにより、直線帯状の素子分離領域部の部分と交差エリアにおいてそれぞれ適切な不純物濃度の値を設定することが可能となる。なお、上記のレジストパターン２０、３０、４０では、図において、交差エリアＥの付近の白抜きされたエリアが、交差エリアＥより狭い、上記交差エリアに対応するイオン注入のための開口部を示している。 As described above, the resist pattern 20 shown in the first embodiment of the present invention, the resist pattern 30 shown in the second embodiment, and the resist pattern 40 shown in the third embodiment are used for ionization. By performing the implantation, it is possible to set an appropriate impurity concentration value in each of the linear strip-shaped element isolation region portion and the intersection area. Note that, in the resist patterns 20, 30, and 40, in the drawing, the white area near the intersection area E is smaller than the intersection area E, and an opening for ion implantation corresponding to the intersection area is shown. ing.
上記では、固体撮像素子の全ての複数の交差エリアに対し、交差エリアより狭い同じ広さのイオン注入エリアを設定したが、固体撮像素子の全ての複数の交差エリアに対し、それぞれ個別にイオン注入エリアの広さを設定してイオン注入を行うようにしても良い。例えば、隣接する画素ペア１２のカラーフィルタの色の組合せが同じ場合には同じ広さとし、隣接する画素ペア１２のカラーフィルタの色の組合せが同じ場合には異なる広さとする。これはカラーフィルタの色により侵入する光のエネルギーが異なるためである。このため、入射した光によって電子が生成された場合、この電子が隣接する他方の画素ペア１２に到達しないように不純物濃度を制御すればよく、このような素子分離領域部１３を得るようにする。 In the above, an ion implantation area having the same width narrower than the intersection area is set for all of the plurality of intersection areas of the solid-state imaging device, but ion implantation is individually performed for each of the plurality of intersection areas of the solid-state imaging device. The ion implantation may be performed by setting the area size. For example, when the color combinations of the color filters of the adjacent pixel pairs 12 are the same, the width is the same, and when the color combinations of the color filters of the adjacent pixel pairs 12 are the same, the widths are different. This is because the energy of the entering light differs depending on the color of the color filter. Therefore, when electrons are generated by the incident light, the impurity concentration may be controlled so that the electrons do not reach the other adjacent pixel pair 12, and such an element isolation region portion 13 is obtained. .
１１ マイクロレンズ
１２ 画素ペア
１２Ｌ 第１の画素
１２Ｒ 第２の画素
１５ カラーフィルタ
１６ 周縁部遮光膜
２０ レジストパターン
２１ Ｌ字領域
３０ レジストパターン
３１ 三角形領域
４０ レジストパターン
４１ 交差点図形領域
DESCRIPTION OF SYMBOLS 11 Micro lens 12 Pixel pair 12L 1st pixel 12R 2nd pixel 15 Color filter 16 Peripheral part light shielding film 20 Resist pattern 21 L-shaped area 30 Resist pattern 31 Triangle area 40 Resist pattern 41 Intersection figure area
Claims (4)
前記複数の画素間を分離する素子分離領域部が平面において交差する交差エリアに対し、前記交差エリアより狭いイオン注入エリアを設定してイオン注入を行うことを特徴とする固体撮像素子の製造方法。 In a method for manufacturing a solid-state imaging device in which a plurality of pixels are arranged in a matrix in a plane,
A method for manufacturing a solid-state imaging device, wherein ion implantation is performed by setting an ion implantation area narrower than the intersecting area with respect to an intersecting area where element isolation regions separating the plurality of pixels intersect in a plane.
The solid-state imaging device includes one microlens and an image plane phase difference pixel that is a pixel pair including one set of a first pixel and a second pixel arranged behind the one microlens. 2. The method for manufacturing a solid-state image pickup device according to claim 1, wherein the solid-state image pickup devices are arranged adjacent to each other in the vertical direction and the horizontal direction on a plane.
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Citations (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6089940A (en) * | 1983-10-24 | 1985-05-20 | Toshiba Corp | Manufacture of semiconductor device |
| JPH1065139A (en) * | 1996-06-10 | 1998-03-06 | Lg Semicon Co Ltd | Ccd video element |
| JP2001250931A (en) * | 2000-03-07 | 2001-09-14 | Canon Inc | Solid-state image sensor and image sensing system using the same |
| JP2003255508A (en) * | 2002-02-28 | 2003-09-10 | Oki Electric Ind Co Ltd | Correction method for mask pattern, photomask, exposure method and semiconductor device |
| JP2011176715A (en) * | 2010-02-25 | 2011-09-08 | Nikon Corp | Back-illuminated image sensor and imaging apparatus |
| JP2012142994A (en) * | 2012-04-09 | 2012-07-26 | Nikon Corp | Connection and isolation structures of photoelectric conversion part, solid state image sensor, and imaging apparatus |
| JP2013084742A (en) * | 2011-10-07 | 2013-05-09 | Canon Inc | Photoelectric conversion device and imaging system |
| JP2013211413A (en) * | 2012-03-30 | 2013-10-10 | Fujifilm Corp | Solid state image sensor and image pickup device |
| JP2014038937A (en) * | 2012-08-16 | 2014-02-27 | Mitsubishi Electric Corp | Semiconductor device |
| JP2014086462A (en) * | 2012-10-19 | 2014-05-12 | Nikon Corp | Solid state image sensor, image pick-up device and manufacturing method of solid state image sensor |
| JP2014116472A (en) * | 2012-12-10 | 2014-06-26 | Canon Inc | Solid-state image pickup device and method for manufacturing the same |
| JP2015162658A (en) * | 2014-02-28 | 2015-09-07 | キヤノン株式会社 | Photoelectric conversion device and imaging system |
-
2016
- 2016-09-27 JP JP2016188537A patent/JP6833430B2/en active Active
Patent Citations (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6089940A (en) * | 1983-10-24 | 1985-05-20 | Toshiba Corp | Manufacture of semiconductor device |
| JPH1065139A (en) * | 1996-06-10 | 1998-03-06 | Lg Semicon Co Ltd | Ccd video element |
| JP2001250931A (en) * | 2000-03-07 | 2001-09-14 | Canon Inc | Solid-state image sensor and image sensing system using the same |
| JP2003255508A (en) * | 2002-02-28 | 2003-09-10 | Oki Electric Ind Co Ltd | Correction method for mask pattern, photomask, exposure method and semiconductor device |
| JP2011176715A (en) * | 2010-02-25 | 2011-09-08 | Nikon Corp | Back-illuminated image sensor and imaging apparatus |
| JP2013084742A (en) * | 2011-10-07 | 2013-05-09 | Canon Inc | Photoelectric conversion device and imaging system |
| JP2013211413A (en) * | 2012-03-30 | 2013-10-10 | Fujifilm Corp | Solid state image sensor and image pickup device |
| JP2012142994A (en) * | 2012-04-09 | 2012-07-26 | Nikon Corp | Connection and isolation structures of photoelectric conversion part, solid state image sensor, and imaging apparatus |
| JP2014038937A (en) * | 2012-08-16 | 2014-02-27 | Mitsubishi Electric Corp | Semiconductor device |
| JP2014086462A (en) * | 2012-10-19 | 2014-05-12 | Nikon Corp | Solid state image sensor, image pick-up device and manufacturing method of solid state image sensor |
| JP2014116472A (en) * | 2012-12-10 | 2014-06-26 | Canon Inc | Solid-state image pickup device and method for manufacturing the same |
| JP2015162658A (en) * | 2014-02-28 | 2015-09-07 | キヤノン株式会社 | Photoelectric conversion device and imaging system |
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