JP2018038926A - Game machine - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a game machine capable of reliably making a notification of fraudulence.SOLUTION: On the basis of having received a fraudulent command (e.g., radio wave detection command) from a main CPU, a sub CPU continuously makes a sub notification till a prescribed termination condition is established, and if a power interruption by a reset or the like occurs during the continuation of the sub notification, terminates the sub notification. If a fraudulence is detected after the sub notification is terminated, the main CPU transmits the fraudulence command (e.g., fraudulent winning command), regardless of whether the prescribed termination condition is established or not.SELECTED DRAWING: Figure 47

Description

  The present invention relates to a gaming machine, and more particularly to a gaming machine that detects fraud.

  Conventionally known as this type of gaming machine is a gaming machine such as a pachinko gaming machine in which a player plays a predetermined game using a gaming medium such as a gaming ball.

  In such a gaming machine, a game medium launched on the game area by a player performing a launch operation passes through a predetermined start area such as a start port provided on the game area of the game board (hereinafter, referred to as a game machine). Based on the fact that the passing is also referred to as “winning”), the identification information on the display device starts variably displaying, and the variably displaying identification information is stopped and displayed in a specific manner. Transition to a special gaming state advantageous to the player.

  On the gaming area, there is a specific winning opening as a specific winning area, an open state in which it is easy for the gaming medium to pass to the specific winning opening, and the passage of gaming media to the specific winning opening than the open state An openable / closable member is provided in any one of the closed states in which it becomes difficult to perform the above operation. Patent Document 1 discloses a gaming machine in which the opening / closing member is opened a plurality of times in a special gaming state.

  In the special gaming state, the gaming machine disclosed in Patent Document 1 has a specific prize opening in a period during which the opening / closing member is in an open state and a period until a predetermined period elapses after the opening / closing member is in a closed state. Even if a game medium that has passed through is detected, it is not determined that fraud has been performed, but the specified prize opening is not received after a predetermined period of time has elapsed since the opening / closing member is closed, and the opening / closing member is closed. When a game medium passing through is detected, it is determined that fraud has been performed.

  For this reason, in the gaming machine disclosed in Patent Document 1, when a game medium that has passed through the specific winning opening is detected immediately after the opening and closing member is in the closed state, the specific winning is immediately before the opening and closing member is in the closed state. When it is determined that a game medium that has entered the mouth has been detected, it is determined that fraud has not been performed, and a game medium that has passed through a specific winning port after a predetermined period of time has elapsed since the opening and closing member has been closed. By performing an illegal act such as forcibly opening and closing the opening / closing member, it is determined that an illegal act has been made if the game medium is passed through the specific prize opening.

JP2013-248451A

  A gaming machine such as that described above cannot reliably report fraud.

  The present invention has been made in view of the above problems, and an object of the present invention is to provide a gaming machine capable of reliably reporting fraud.

  In order to achieve the above object, a gaming machine according to the present invention is based on a fraud determination unit (main CPU 60) for determining whether fraud has been performed based on a predetermined condition, and a determination result of the fraud determination unit. An unauthorized command transmitting means (main CPU 60) capable of transmitting an unauthorized command (for example, an unauthorized winning command, a radio wave detection command) to an informing means (sub CPU11) capable of notifying that an unauthorized operation has been performed, and the unauthorized command. Based on the reception of the illegal command by the illegal command receiving means (sub CPU 71) that can be received and the illegal command receiving means, a predetermined termination condition is established in the notification means until a predetermined termination condition is satisfied (reset). The game control means (main CPU 60) for controlling the game while the notification is continuously executed and the predetermined notification is continued. Notification control means (sub CPU71) that terminates the predetermined notification when a power interruption occurs only in the effect control means of the effect control means (sub CPU71) for controlling the unauthorized command transmission means After the predetermined notification is terminated due to the occurrence of the power interruption, the fraud command is determined when the fraud determination unit determines that fraud has been performed regardless of whether the predetermined termination condition is satisfied. Can be transmitted.

  With this configuration, the gaming machine according to the present invention determines that fraud has been performed regardless of whether or not the predetermined termination condition is satisfied after the predetermined notification is terminated due to the occurrence of power-off of the production control means. In this case, since an illegal command can be transmitted, it is possible to reliably notify the illegality.

  The gaming machine according to the present invention includes a game board (140) having a game area (14) in which a game medium (game ball) can roll, and a prize that is provided in the game area and that allows the game medium to win. An area (for example, the first grand prize opening 39), a first state that makes it easy to win a game medium in the prize area, and a second that makes it difficult to win a game medium in the prize area than in the first state. An opening / closing member (for example, the first shutter 41) that is displaceable between states, a winning detection means that detects a game medium that has won the winning area, and a predetermined advantageous condition are satisfied (for example, winning a special symbol lottery) ), A special game state control means (main CPU 60) for controlling the game state so as to be in a special game state advantageous to the player (for example, a big hit game state), and in the special game state, the opening / closing Parts After the displacement from the second state to the first state, an advantageous game (round game) in which a series of operations for displacing the opening / closing member from the first state to the second state is executed at least once is executed a plurality of times. Advantageous game execution means (main CPU 60), and the predetermined condition may be that a predetermined number or more of game media are detected by the winning detection means in the special game state.

  With this configuration, the gaming machine according to the present invention can surely prevent the illegal winning of the prize during the special gaming state.

  The present invention can provide a gaming machine capable of reliably reporting fraud.

1 is a schematic perspective view of a pachinko gaming machine according to a first embodiment of the present invention. 1 is a schematic exploded perspective view of a pachinko gaming machine according to a first embodiment of the present invention. 1 is a schematic front view of a game board in a pachinko gaming machine according to a first embodiment of the present invention. It is the schematic which shows the switches etc. which are arrange | positioned at the back surface side of the game board in the pachinko gaming machine which concerns on the 1st Embodiment of this invention. It is a schematic front view of the LED unit in the pachinko gaming machine according to the first embodiment of the present invention. It is a block diagram showing a control circuit in the pachinko gaming machine according to the first embodiment of the present invention. It is a figure which shows the winning / winning detection counter table in the pachinko gaming machine according to the first embodiment of the present invention. It is a time chart at the time of the fraud act by the unauthorized radio wave in the pachinko gaming machine according to the first embodiment of the present invention. It is a time chart at the time of the electric power interruption generation | occurrence | production in the fraudulent act by the improper electromagnetic wave in the pachinko game machine which concerns on the 1st Embodiment of this invention. It is a time chart when a power failure occurs only in the sub-control circuit in the pachinko gaming machine according to the first embodiment of the present invention. It is a flowchart of the main process performed by the main control circuit in the pachinko gaming machine according to the first embodiment of the present invention. It is a flowchart following FIG. It is a flowchart of the interruption process at the time of a power failure performed by the main control circuit in the pachinko gaming machine according to the first embodiment of the present invention. It is a flowchart of the game information data generation process performed by the main control circuit in the pachinko gaming machine according to the first embodiment of the present invention. It is a flowchart of the port output process performed by the main control circuit in the pachinko gaming machine according to the first embodiment of the present invention. It is a flowchart of the timer interruption process performed by the main control circuit in the pachinko gaming machine according to the first embodiment of the present invention. It is a flowchart of the residual sphere monitoring timer update process performed by the main control circuit in the pachinko gaming machine according to the first embodiment of the present invention. It is a flowchart of the winning detection process performed by the main control circuit in the pachinko gaming machine according to the first embodiment of the present invention. It is a flowchart of the electromagnetic wave detection process performed by the main control circuit in the pachinko gaming machine according to the first embodiment of the present invention. It is a flowchart of the winning detection detection deletion process performed by the main control circuit in the pachinko gaming machine according to the first embodiment of the present invention. It is a flowchart of the special symbol related switch check process executed by the main control circuit in the pachinko gaming machine according to the first embodiment of the present invention. It is a flowchart of the normal symbol related switch check process performed by the main control circuit in the pachinko gaming machine according to the first embodiment of the present invention. It is a flowchart of the payout control process performed by the main control circuit in the pachinko gaming machine according to the first embodiment of the present invention. It is a flowchart of the command transmission control process performed by the main control circuit in the pachinko gaming machine according to the first embodiment of the present invention. It is a flowchart of the special symbol control process performed by the main control circuit in the pachinko gaming machine according to the first embodiment of the present invention. It is a flowchart of the special symbol memory check process performed by the main control circuit in the pachinko gaming machine according to the first embodiment of the present invention. It is a flowchart of the hit start interval management process performed by the main control circuit in the pachinko gaming machine according to the first embodiment of the present invention. It is a flowchart of the waiting time management process before the big winning opening reopening executed by the main control circuit in the pachinko gaming machine according to the first embodiment of the present invention. It is a flowchart of the big winning opening opening process executed by the main control circuit in the pachinko gaming machine according to the first embodiment of the present invention. It is a flowchart of the hit end interval process performed by the main control circuit in the pachinko gaming machine according to the first embodiment of the present invention. It is a flowchart of the special symbol game end process performed by the main control circuit in the pachinko gaming machine according to the first embodiment of the present invention. It is a flowchart of the main process performed by a sub control circuit in the pachinko gaming machine according to the first embodiment of the present invention. It is a flowchart following FIG. It is a flowchart of the command reception interruption process performed by a sub control circuit in the pachinko gaming machine according to the first embodiment of the present invention. It is a flowchart of the timer interruption process performed by a sub control circuit in the pachinko gaming machine according to the first embodiment of the present invention. It is a flowchart of the command analysis process performed by the sub-control circuit in the pachinko gaming machine according to the first embodiment of the present invention. It is a flowchart of the fraud notification process performed by a sub-control circuit in the pachinko gaming machine according to the first embodiment of the present invention. (A) is a screen displayed in the display area during normal gaming in the pachinko gaming machine according to the first embodiment of the present invention, and (b) is displayed in the display area when unauthorized radio waves are detected. It is a schematic front view which shows a screen. (A) is a screen displayed in the display area when an illegal winning to the big winning opening is detected in the pachinko gaming machine according to the first embodiment of the present invention, and (b) is the screen of the present invention. It is a schematic front view which shows the screen displayed on a display area, when the unauthorized radio wave and the illegal winning to a big winning opening are detected in the pachinko gaming machine according to one embodiment. It is a flowchart of the process at the time of the power interruption interruption performed by the sub control circuit in the pachinko gaming machine according to the first embodiment of the present invention. It is a time chart which shows the 1st example at the time of fraud winning with respect to the big winning opening in the pachinko gaming machine concerning the 1st embodiment of the present invention. It is a time chart which shows the 2nd example at the time of fraudulent winning with respect to the big winning opening in the pachinko gaming machine concerning the 1st embodiment of the present invention. It is a flowchart of the residual ball monitoring timer update process performed by the main control circuit in the pachinko gaming machine according to the second embodiment of the present invention. It is a time chart which shows the 1st example at the time of fraudulent winning with respect to the big winning opening in the pachinko game machine concerning the 2nd embodiment of the present invention. It is a time chart which shows the 2nd example at the time of fraudulent winning with respect to the big winning opening in the pachinko gaming machine concerning the 2nd embodiment of the present invention. It is a time chart which shows the 3rd example at the time of fraud winning with respect to the 2nd starting port in the pachinko game machine concerning a 2nd embodiment of the present invention. It is a time chart at the time of resetting only a sub-control circuit in the pachinko machine based on the 3rd Embodiment of this invention during the fraudulent act | action by the unauthorized electric wave generation | occurrence | production. It is a flowchart of the winning detection process performed by the main control circuit in the pachinko gaming machine according to the third embodiment of the present invention. It is a time chart at the time of the fraud act by the unauthorized radio wave in the pachinko gaming machine according to the fourth embodiment of the present invention. (A)-(h) is a conceptual diagram which shows the state of the 1st entrance detection counter and the 2nd entrance detection counter in the pachinko game machine which concerns on the 5th Embodiment of this invention, respectively. It is a flowchart of the winning detection process performed by the main control circuit in the pachinko gaming machine according to the fifth embodiment of the present invention. (A) is a pachinko gaming machine according to the fifth embodiment of the present invention, and includes a first entry detection counter, a second entry detection counter, and a prize detection counter when no chattering occurs. It is a conceptual diagram showing values in time series, (b) and (c), in the pachinko gaming machine according to the fifth embodiment of the present invention, a first entrance detection counter in a state where chattering has occurred, It is a conceptual diagram which shows the 1st and 2nd example which each represents the value of a 2nd winning detection counter and a winning detection counter in a time series. In the pachinko gaming machine which concerns on other embodiment of this invention, it is a time chart at the time of improper act in the case of providing a radio wave sensor in both a glass door and a game board. It is explanatory drawing explaining the functional flow in the pachislot game machine which concerns on the 6th Embodiment of this invention. It is a perspective view which shows the example of an external appearance structure in the pachislot game machine which concerns on the 6th Embodiment of this invention. It is a perspective view which shows the example of an internal structure of the state which closed the middle door in the pachislot machine which concerns on the 6th Embodiment of this invention. It is a perspective view which shows the example of an internal structure of the state which opened the middle door in the pachislot machine based on the 6th Embodiment of this invention. It is a front view which shows the inside of the cabinet in the pachislot machine which concerns on the 6th Embodiment of this invention. It is a front view which shows the back surface side of the front door in the pachislot machine which concerns on the 6th Embodiment of this invention. It is a block diagram which shows the control system in the pachislot machine which concerns on the 6th Embodiment of this invention. It is a block diagram which shows the structural example of the main control circuit in the pachislot game machine which concerns on the 6th Embodiment of this invention. It is a block diagram which shows the structural example of the sub control circuit in the pachislot game machine which concerns on the 6th Embodiment of this invention. It is a flowchart of the lever detection process performed by the main control circuit in the pachislot machine according to the sixth embodiment of the present invention.

Embodiments of the present invention will be described below with reference to the drawings.
(First embodiment)
Hereinafter, a first embodiment of a gaming machine according to the present invention will be described with reference to FIGS. Note that this embodiment shows an example in which the gaming machine of the present invention is applied to a pachinko gaming machine.
[Composition of gaming machine]
First, an overview of the pachinko gaming machine 1 as a gaming machine will be described with reference to FIGS.

  As shown in FIGS. 1 and 2, the pachinko gaming machine 1 includes a glass door 10, a dish unit 11, a launching device 12, a liquid crystal display (also referred to as “LCD”) 13, and a game board 14. A base door 15, a discharge unit 16, a substrate unit 17, and a wooden frame 18.

  The base door 15 supports the glass door 10, the dish unit 11, the launching device 12, the liquid crystal display device 13, and the game board 14 on the front side, and the discharge unit 16 and the substrate unit 17 on the back side. It is supported and fitted in the opening 181 of the wooden frame 18.

  The glass door 10 includes a speaker 21, a lamp / LED (Light Emitting Diode) 22, an opening 101, and a radio wave sensor 500, and is pivotally attached to the base door 15 so as to be opened and closed. The radio wave sensor 500 will be described later.

  The opening 101 is formed at the center of the glass door 10, and a transparent protective glass 19 is disposed so as to face the front surface of the game board 14 in a state where the glass door 10 is closed.

  The speaker 21 is disposed on the upper part of the glass door 10 and is for performing, for example, voice notification, production, and error notification. The lamps / LEDs 22 are arranged on the left and right sides of the glass door 10 and perform various notifications such as effects and announcements.

  The dish unit 11 is configured by a unit in which an upper dish 111 and a lower dish 112 are integrated. The dish unit 11 is disposed on the base door 15 at a lower part of the glass door 10 and stores game balls as game media.

  The upper plate 111 has a payout opening 113 and an effect button 20 for storing game balls to be launched into a game area 140 described later. The payout port 113 is for lending out game balls and winning game balls, and the game balls are discharged when a predetermined condition is satisfied. Here, the prize ball of the game ball means that the game ball is paid out.

  The effect button 20 is a so-called “CHANCE button” or “push button” or the like, and for example, performs a CHANCE effect displayed on the liquid crystal display device 13 (so-called cut-in effect or whether or not the movable body is movable). In order to select whether or not, or when the degree of expectation is notified in the effect of notifying the degree of expectation of the jackpot (for example, the conversation content or the character color of the conversation effect), the player presses down the operation.

  The lower plate 112 is provided at the lower part of the upper plate 111 and has a payout opening 114. In the same way as the payout port 113, the payout port 114 rents out game balls and wins game balls, and the game balls are discharged when a predetermined prize ball condition is satisfied.

  The launcher 12 includes a panel body 121 and a launch handle 122. The launching device 12 is provided at the lower right portion of the base door 15 and launches game balls stored in the upper plate 111 to a game area 140 described later.

  The panel body 121 is integrated with the lower right portion of the dish unit 11 when the dish unit 11 and the launching device 12 are disposed on the base door 15, and a driving device (not shown) for firing a game ball on the back side. Is provided. For example, a firing solenoid is used as the driving device.

  As shown in FIGS. 1 and 3, the liquid crystal display device 13 is disposed substantially at the center of the game board 14 and is a big hit lottery based on winning of game balls to the first start port 34 and the second start port 35. In addition to the result of the above, various images related to the game, for example, an identification symbol for decoration (decoration symbol / identification information), an effect image in a normal state, an effect image during a big hit, a demonstration effect, and the number of reserved balls are displayed. .

  In other words, the liquid crystal display device 13 displays variable information of the identification information (for example, a decorative pattern) on condition that the game ball has passed through the first start port 34 and the second start port 35, that is, won a prize. .

  As shown in FIG. 2, the game board 14 is disposed in front of the base door 15 so as to be located behind the protective glass 19, and has a game area 140 in which the launched game ball can roll down. ing. The game area 140 is surrounded by the outer rail 31, and a plurality of game nails (not shown) are driven therein.

  As shown in FIGS. 3 and 4, the game board 14 includes a guide rail 30, a stage 33, a first start port 34, a second start port 35, a passing gate 36, and a first hold display unit 37. A second hold display section 38, a first grand prize opening 39, a second big prize opening 40, a first shutter 41, a second shutter 42, a first general prize opening 43, and a second general prize. A port 44, an out port 47, and the LED unit 5 are provided.

  The pachinko gaming machine 1 according to the present embodiment includes a first start port 34, a second start port 35, a passage gate 36, a first grand prize port 39, a second major prize port 40, and a first The general winning opening 43 and the second general winning opening 44 correspond to winning areas where game balls can be won. In particular, the second start opening 35, the first grand prize opening 39, and the second big prize opening 40 correspond to the winning area according to the embodiment of the present invention.

  The guide rail 30 is composed of an outer rail 31 and an inner rail 32. The outer rail 31 is arranged so as to surround the game area 140 in order to partition the game area 140. The inner rail 32 is for guiding the game ball to the upper part of the game board 14 together with the outer rail 31, and is disposed inside the outer rail 31 on the left side of the game board 14.

  The stage 33 distributes the game ball flow area in the game area 140 and is disposed along the upper edge of the liquid crystal display device 13.

  The game ball launched by the launching device 12 flows down toward the lower side of the game board 14 while changing its traveling direction due to a collision with the game nail, the stage 33 and the like that have been driven into the game board 14.

  In this process, any of the first start port 34, the second start port 35, the passing gate 36, the first grand prize port 39, the second major prize port 40, the first general prize port 43, and the second general prize port 44 Crab game balls are won and game balls that have not won are discharged from the outlet 47 and collected.

  When the rotation angle of the firing handle 122 is small, the launching force applied to the game ball is small, so that the game ball flows down mainly on the left side of the stage 33. Further, when the rotation angle of the launch handle 122 is large, the launching force applied to the game ball is large, so that the game ball flows down mainly on the right side of the stage 33. In general, the method of hitting the game ball to the left of the stage 33 is called left-handed, and the method of hitting the game ball to the right of the stage 33 is called right-handed.

  The first start port 34 and the second start port 35 provide an opportunity for a big hit lottery on condition that the game ball passes, that is, wins, and a first special symbol display unit 52 and a second one which will be described later on the result of the big hit lottery. The special symbol display unit 53 and the liquid crystal display device 13 provide an opportunity to display.

  The first start port 34 is provided at a position slightly below the center of the game board 14. A first start port switch 340 is disposed behind the first start port 34. When a game ball is detected by the first start port switch 340, a big hit lottery is performed in the board unit 17, and a predetermined number of game balls are placed in the upper plate 111 or through the payout port 113 or the payout port 114. It is paid out to the lower plate 112.

  The second start port 35 is provided directly below the first start port 34, and a second start port switch 350 is disposed behind the second start port 35. When a game ball is detected by the second start port switch 350, a big hit lottery is performed in the board unit 17, and a predetermined number of game balls are received via the payout opening 113 or the payout opening 114 through the upper plate 111 or It is paid out to the lower plate 112. The second starting port 35 is determined to be difficult to win by a blade member 48 as an ordinary electric accessory.

  The blade member 48 is rotated in the left-right direction, and is in an open state in which a game ball can be won in the second start port 35 and a game ball in the second start port 35 is impossible or difficult. The closed state can be selected.

  When the blade member 48 is stopped and displayed with a predetermined symbol (combination of lighting and extinguishing) in the normal symbol display unit 50 to be described later, the blade member 48 is opened for a predetermined time and a predetermined number of times. It becomes easy to enter the ball.

  For example, in the normal symbol game, the hit probability in the low probability state (normal state) is 1/256, and when this is won, the blade member 48 is released once for 0.3 seconds. The hit probability in the high probability state (short time state) is, for example, 255/256, and when this is won, the blade member 48 is opened three times for 1.3 seconds. Further, the maximum number of winning prizes to the second start opening 35 for one game of the normal symbol game is 8 counts.

  Note that the ordinary electric accessory is not limited to one in which the blade member 48 is rotated to the left and right. For example, the tongue member is moved to the front and rear of the game board 14 or the front and rear of the game board 14 is rotated. An open / close door that opens and closes the second start opening 35 may be used.

  The passing gate 36 provides an opportunity to perform a normal symbol lottery for opening the second start opening 35, and is provided at the left and right central positions of the game board 14. The result of the normal symbol lottery is displayed on the normal symbol display unit 50 described later.

  When a specific symbol is stopped and displayed on the normal symbol display unit 50 described later, an effect image for allowing the player to grasp that the result of the normal symbol lottery is winning is displayed in the display area 131 of the liquid crystal display device 13. You may make it do.

  In the pachinko gaming machine 1, after the big hit game is over, the normal state or the probability change state in which the big hit probability is higher than the normal state. Here, the jackpot game that shifts to the normal state at the end is referred to as a “normal jackpot”, and the jackpot game that shifts to the probability variation state at the end is referred to as a “probable variation jackpot”. Since the probability of winning the normal symbol lottery is in a high probability state after the probable big hit, the winning to the second starting port 35 is facilitated by the support of the blade member 48 as a normal electric accessory.

  This state is a state called “electric support”, and it becomes easy to store the reserved balls of the special symbol game, and it is possible to suppress the loss of the game balls by winning the second start opening 35. Since the “electric support” state continues until the next big hit is won, the player can win the big hit in a short time and in a state where the decrease of the game balls is suppressed.

  On the other hand, even when the big hit probability is set to the normal state after the big hit game ends, the state shifts to the “electric support” state. In this case, the “electric support” state continues until the first special symbol display unit 52 and the second special symbol display unit 53 display the result of the jackpot lottery for a predetermined number of times (for example, 100 times). Such a finite number of “electric support” states are called “short-time states”.

  The first hold display unit 37 and the second hold display unit 38 are configured such that the first start port switch 340 or the second hold display unit 340 or the second hold display unit 38 is displayed when a first special symbol display unit 52 or a second special symbol display unit 53 described later is variably displayed. When a game ball is detected by the start opening switch 350, the first special symbol or the second special symbol that is being displayed in the first special symbol display unit 52 or the second special symbol display unit 53 is stopped and displayed until the first special symbol is displayed. The execution (start) of the variable display of the first special symbol or the second special symbol based on the game ball entering the first start port 34 or the second start port 35 is put on hold. When the first special symbol or the second special symbol that has been variably displayed is stopped and displayed, the variable display of the first special symbol or the second special symbol that has been suspended is started.

  Here, the priority of the variable display of the first special symbol and the second special symbol is higher in the second special symbol than the first special symbol in the present embodiment. The corresponding first special symbol and second special symbol may be sequentially displayed in a variable manner according to the winning order to the second start opening 35.

  In addition, an upper limit is set for the number of times the execution of the special symbol variation display is suspended. In the present embodiment, the first special symbol and the first special symbol by entering the first start port 34 and the second start port 35 and The maximum number of reserves for the variable display of the second special symbol is specified as 4 each.

  When the first special symbol game for the first special symbol is held four times, information on the special symbol game corresponding to the changing first special symbol is the first in the main RAM 62 (see FIG. 6) described later. It is stored as a start memory in the special symbol start storage area (0).

  The information of the four special symbol games held on hold is stored as the start memory in the first special symbol start storage areas (1) to (4).

  Similarly, when the second special symbol game is held four times, the information of the second special symbol game corresponding to the changing second special symbol is stored in the main RAM 62 (see FIG. 6) described later. 2 Special symbol start storage areas (0) are stored as start memories, and the information of the second special symbol game for four times held is stored as start memories in the second special symbol start storage areas (1) to (4). Remembered.

  Therefore, the total number of winning holds to the first starting port 34 and the second starting port 35 is eight in total.

  The first big winning opening 39 and the second big winning opening 40 are portions that are opened in a special gaming state (a big hit gaming state or a small hit gaming state) which is a gaming state advantageous to the player. The first grand prize winning port 39 is provided on the right side (or the upper right side or the lower right side) of the first starting port 34, and the second big winning port 40 is provided on the lower side of the first starting port 34. . In the following description, the first grand prize winning port 39 and the second grand prize winning port 40 are collectively referred to as “large prize winning port”.

  A first count switch 391 is provided in the first big prize opening 39. The first count switch 391 is for counting the number of winning game balls to the first big winning opening 39, and when a winning game ball is confirmed, a predetermined number of gaming balls are paid out. It is paid out to the upper plate 111 or the lower plate 112 through the outlet 113 or the outlet 114.

  A second count switch 392 is provided in the second big prize opening 40. The second count switch 392 is for counting the number of winning game balls to the second grand prize opening 40, and when a winning game ball is confirmed, a predetermined number of gaming balls are paid out. It is paid out to the upper plate 111 or the lower plate 112 through the outlet 113 or the outlet 114.

  The first shutter 41 controls the first big prize opening 39 in an open state or a closed state, and is arranged so as to cover the first big prize opening 39. The first shutter 41 has a first state that makes it easy to win a game ball to the first grand prize opening 39, and a second state that makes it difficult to win a game ball to the first big prize port 39 than the first state. An openable / closable member is configured.

  In other words, the first shutter 41 changes the state of the first big prize opening 39 between an open state in which a game ball can be won in the first big prize opening 39 and a closed state in which a game ball cannot be won or difficult. To be driven.

  When the first shutter 41 is opened by the first shutter 41, the special symbol becomes a specific stop display mode in the first special symbol display unit 52 or the second special symbol display unit 53 described later, and the gaming state is a big hit. This is performed when the game state or the small hit game state is entered.

  The second shutter 42 controls the second big prize opening 40 to be in an open state or a closed state, and is arranged so as to cover the second big prize opening 40. The second shutter 42 has a first state that makes it easy to win a game ball in the second large winning opening 40, and a second state that makes it difficult to win a game ball in the second large winning opening 40 than in the first state. An openable / closable member is configured.

  In other words, the second shutter 42 changes the state of the second big prize opening 40 between an open state in which a game ball can be won in the second big prize opening 40 and a closed state in which a game ball cannot be won or difficult. To be driven.

  When the second shutter winning opening 40 is opened by the second shutter 42, the special symbol becomes a specific stop display mode in the first special symbol display unit 52 or the second special symbol display unit 53 described later, and the gaming state is a big hit. This is performed when the game state or the small hit game state is entered.

  Here, the big hit game state includes a state in which a game ball can be acquired more than the normal state (a big hit game state with a ball) and a state in which a game ball cannot be acquired substantially (a big hit game state without a ball). In the present embodiment, the gaming state shifts to a probability variation state in which the jackpot winning probability is higher than the normal state after the end of the big hit gaming state without a ball.

  Such a big hit game state without a game that shifts to the probability variation gaming state after the end of the big hit gaming state is called a sudden probability variation. This sudden probability variation is also called “sudden probability variation” or “surprising accuracy”.

  On the other hand, in the small hit gaming state, although either the first shutter 41 or the second shutter 42 is opened, the opened / closed speed of the opened first shutter 41 or the second shutter 42 is high, so It cannot be acquired.

  The opening / closing mode of the first shutter 41 and the second shutter 42 in the small hit gaming state is the same as or similar to the opening / closing mode of the first shutter 41 and the second shutter 42 in the big hitless gaming state, and the first shutter It is difficult to distinguish which win (game state) is established only by confirming the opening / closing mode of 41 and the second shutter 42.

  The open state of the first big prize opening 39 by the first shutter 41 is that the count value (the number of game balls passed) by the first count switch 391 becomes a predetermined number (for example, 7) or the opening time is a predetermined time ( For example, about 25 seconds or 0.1 seconds).

  On the other hand, when the number of game balls passed reaches a predetermined number, or when the opening time of the first shutter 41 reaches a predetermined time, the first shutter 41 is driven so as to close the first big prize opening 39. Is done.

  In the open state of the second big prize opening 40 by the second shutter 42, the count value (the number of game balls passed) by the second count switch 392 becomes a predetermined number (for example, 7) or the opening time is a predetermined time ( For example, about 25 seconds or 0.1 seconds).

  On the other hand, when the number of game balls passed reaches a predetermined number, or when the opening time of the second shutter 42 reaches a predetermined time, the second shutter 42 is driven to close the second big prize opening 40. Is done.

  In the big hit gaming state, the first shutter 41 or the second shutter 42 is displaced from the second state to the first state, and a series of operations for displacing from the first state to the second state in response to a predetermined condition being satisfied. An advantageous game in which is executed at least once is executed a plurality of times.

  Specifically, in the big hit gaming state, the open state and the closed state are repeated at either the first big prize opening 39 or the second big prize opening 40. In the advantageous game in the present embodiment, the open state and the closed state are executed only once in either the first grand prize winning port 39 or the second grand prize winning port 40. Further, in the present embodiment, the number of executions of the advantageous game in the big hit gaming state is set to 16 times or 2 times.

  In the following description, the advantageous game is also referred to as a “round game”. The period from the end of the round game to the start of the next round game is called the “inter-round interval”. The period from when the gaming state transitions to the big hit gaming state until the first round game starts Is called a “hit start interval”, and a period from the end of the last round game to the end of the big hit game state is called a “hit end interval”.

  A round game is counted by the number of rounds, such as 1 round and 2 rounds. For example, the first round game may be referred to as a first round (1R) and the second round as a second round (2R). The last round game is also referred to as “final round”.

  In the present embodiment, the round game is executed 16 times or 2 times in the big hit game state. However, the round game executed 16 times is “16R big hit”, and the round game is executed twice. Can be called “2R jackpot”.

  “16R jackpot” is set to a relatively long time, for example, about 25 seconds, for either one of the first big prize opening 39 or the second big prize opening 40 in each round. Therefore, in the case of “16R big hit”, the player can acquire many game balls.

  On the other hand, the “2R jackpot” is set to a time shorter than the 16R jackpot, for example, about 0.1 second, in either one of the first grand prize port 39 or the second big prize port 40 in each round. Therefore, it is difficult to acquire game balls.

  That is, “2R jackpot” is set to have a shorter maximum total opening time of the first grand prize port 39 or the second big prize port 40 than “16R jackpot”. In this case, the opening / closing control of the first big prize opening 39 by the first shutter 41 or the opening / closing control of the second big prize opening 40 by the second shutter 42 is made the same as or similar to the small hit state, and the player is given “2R big hit”. It may be difficult to distinguish “small hits”.

  “2R jackpot” sets the opening time of the first grand prize port 39 or the second big prize port 40 in each round to the same time as “16R jackpot”, and the first big prize port 39 or the second It may be configured such that a certain number of game balls can be obtained by making it easy to win a game ball when the grand prize opening 40 is open. In addition, as the “2R big hit”, a “first 2R big hit” in which a certain number of game balls can be acquired and a “second 2R big hit” in which a game ball can not be substantially acquired may be used in combination.

  The number of times the first grand prize opening 39 or the second grand prize opening 40 is opened is the same as “16R big hit (first 16R big hit)”. A “16R jackpot (second 16R jackpot)” in which the game time cannot be obtained due to a short opening time is provided, and the first grand prize port 39 or the second grand prize port 40 in the “second 16R jackpot” is provided. The “small hit” that is the same as or similar to the opening control is provided, and whether the “second 16R big hit” or “small hit” is established is determined from the opening mode of the first big prize opening 39 or the second big prize opening 40. Then, it may be difficult or impossible to discriminate. In addition, after the “second 16R big hit”, regardless of the game state before the “second 16R big hit”, the game may shift to a probability change state or a normal state.

  The first general winning port 43 and the second general winning port 44 are roles for paying out a specified number of game balls on condition that a game ball is won. The first general winning port 43 and the second general winning port 44 are formed one by one in the lower left portion and the lower right portion of the game board 14 by arranging decorative members.

  When a game ball wins the first general winning port 43 and the second general winning port 44, a predetermined number of game balls are paid out to the upper plate 111 or the lower plate 112 via the payout port 113 or the payout port 114. It is.

  As shown in FIG. 4, the first start port 34, the second start port 35, the first big winning port 39, the second big winning port 40, the first general winning port 43, and the second general winning port 44 described above. The first start port switch 340, the second start port switch 350, the first count switch 391, the second count switch 392, the first general winning port switch 430, and the second general winning port switch 440 are respectively arranged behind the two. A pass gate switch 360 is provided inside the pass gate 36 to detect each entry or pass.

  A first big prize opening solenoid 410, a second big prize opening solenoid 420, and an electric accessory solenoid 460 are arranged behind the first shutter 41, the second shutter 42, and the blade member 48, respectively. The movable member is driven.

  As shown in FIG. 5, the LED unit 5 includes a normal symbol display unit 50, a normal symbol hold display unit 51, a first special symbol display unit 52, a second special symbol display unit 53, and a first special symbol hold display. Part 54 and a second special symbol hold display part 55.

  The normal symbol display unit 50 determines the lottery result for the “normal symbol game” for determining whether or not to open the second start opening 35 by driving the normal electric accessory (the blade member 48 (see FIGS. 3 and 4)). , And includes two LED lamps 501 and 502.

  The LED lamps 501 and 502 are displayed in a stopped state after being variably displayed as normal symbols by alternately turning on and off. The blade member 48 (see FIGS. 3 and 4) is configured such that when the combination of turning on / off the LED lamps 501 and 502 in the normal symbol display unit 50 is in a predetermined mode, the blade member 48 (see FIGS. 3 and 4). ) Is opened / closed in a predetermined pattern to select the difficulty in entering the ball at the second start port 35.

  The normal symbol hold display unit 51 displays the number of times that the variable symbol variable display that is held can be executed by turning on / off or blinking the two LED lamps 511 and 512. Regarding the hold display by the LED lamps 511 and 512, for example, when the hold number is “1”, the LED lamp 511 is turned on and the LED lamp 512 is turned off.

  When the hold number is “2”, both the LED lamp 511 and the LED lamp 512 are lit. When the hold number is “3”, the LED lamp 511 blinks, the LED lamp 512 is lit, and the hold number is “4”. ", The LED lamp 511 and the LED lamp 512 both flash.

  The first special symbol display unit 52 and the second special symbol display unit 53 indicate the result of the big hit lottery for the “special symbol game”, and include eight LED lamps 520 and 530, respectively. The first special symbol display unit 52 performs a variable display in response to a start winning at the first starting port 34, and displays a jackpot lottery result based on the winning at the first starting port 34.

  The second special symbol display unit 53 displays a change in response to a start winning at the second start opening 35 and also displays a jackpot lottery result based on a win at the second start opening 35. The variable display of the first special symbol display unit 52 and the second special symbol display unit 53 is performed by the LED lamps 520 and 530 being individually turned on and off.

  The result of the big hit lottery is displayed by a display pattern (special symbol) formed by turning on / off the eight LED lamps 520 and 530 of the first special symbol display unit 52 and the second special symbol display unit 53.

  For example, in any one of the first special symbol display unit 52 and the second special symbol display unit 53, when all of the eight LED lamps 520 and 530 are lit, “16R probability variation big hit”, eight LED lamps 520 and 530 are displayed. When the upper three of the lamps are lit and the remaining lamps are extinguished, “16R normal big hit”, when the lower three of the eight LED lamps 520 and 530 are lit and the remaining lamps are extinguished, "Big hit", when the middle two of the eight LED lamps 520, 530 are lit and the remaining lamps are turned off, "small hit", the top one of the eight LED lamps 520, 530 is lit, the rest When the lamp is turned off, the “lost” display pattern can be obtained.

  Since the first special symbol display unit 52 and the second special symbol display unit 53 display the jackpot lottery result, the player suddenly changes the probability according to the display patterns of the eight LED lamps 520 and 530 (for example, the lower three lamps). Can be distinguished from small hits (two central lamps are lit).

  It should be noted that a round lamp is provided to know the number of winning big hits. When a “16R big hit” occurs, the 16R lamp lights. When a “2R big hit” occurs, the 2R lamp lights. You may be able to tell which round of jackpot lottery you won.

  When a big hit lottery is won, after the special symbol is stopped and displayed in a specific stop display mode, the gaming state is shifted from the normal gaming state to the winning gaming state (special gaming state) which is advantageous to the player. It is done.

  When the winning game state is reached, the first shutter 41 and the second shutter 42 (see FIG. 3) are driven and controlled as described above, and the first big prize opening 39 and the second big prize opening 40 (see FIG. 3). ) Is in an open state, and a game ball can be received.

  On the other hand, when the big hit lottery or the small hit lottery is not won, the lost symbol is stopped and displayed as a special symbol, and the gaming state is maintained. Further, when winning a small hit, the special symbol is stopped and displayed in the display pattern corresponding to the small hit, and the first shutter 41 and the second shutter 42 are driven in a predetermined pattern.

  In the display area 131 of the liquid crystal display device 13, an effect image related to the special symbol displayed in the first special symbol display unit 52 and the second special symbol display unit 53 is displayed. For example, in the variable display of the special symbols displayed on the first special symbol display unit 52 and the second special symbol display unit 53, the identification made up of numbers in the display area 131 of the liquid crystal display device 13 except for specific cases. Symbols (decorative symbols), for example, numbers such as “0”, “1”, “2”.

  On the other hand, the special symbols that are variably displayed in the first special symbol display unit 52 (see FIG. 5) and the second special symbol display unit 53 (see FIG. 5) are stopped and displayed, and the display area 131 of the liquid crystal display device 13 is displayed. But the decorative symbol is stopped and displayed.

  Further, in the first special symbol display unit 52 and the second special symbol display unit 53, when the special symbol that has been changed or stopped is in a specific stop display mode, the player can grasp that it is “winning”. The image is displayed in the display area 131 of the liquid crystal display device 13.

  Specifically, in any one of the first special symbol display unit 52 and the second special symbol display unit 53, the special symbol is, for example, in a specific display mode corresponding to “big hit” that can be obtained by many balls. When the display is stopped, the combination of effect identification symbols displayed in the display area 131 of the liquid crystal display device 13 has a specific display mode (for example, a state in which all the same symbols are arranged in each of a plurality of symbol columns). In addition, an effect image for big hit is displayed in the display area 131 of the liquid crystal display device 13.

  In the case of “hit (small hit)” where it is difficult to obtain a ball, an effect image that causes the player to grasp that “hit” is not displayed in the display area 131 of the liquid crystal display device 13. Also good.

  The LED lamps 541 and 542 of the first special symbol hold display unit 54 and the LED lamps 551 and 552 of the second special symbol hold display unit 55 execute the variable display of the special symbols held by turning on / off or blinking. The number of possible times (the number of holds) is displayed.

  The LED lamps 541 and 542 of the first special symbol hold display unit 54 and the LED lamps 551 and 552 of the second special symbol hold display unit 55 correspond to the first hold display unit 37 and the second hold display unit 38, respectively. The display status of the number of reserved items in the LED lamps 541 and 542 of the first special symbol hold display unit 54 and the LED lamps 551 and 552 of the second special symbol hold display unit 55 is the normal symbol hold display unit 51. The LED lamps 511 and 512 are the same as the display mode of the reserved number.

  The wooden frame 18 has an opening 181 into which the base door 15 is fitted.

[Electric configuration of gaming machine]
Next, the control circuit of the pachinko gaming machine 1 will be described with reference to FIG.

  As shown in FIG. 6, the pachinko gaming machine 1 includes a main control circuit 6 that controls a game and a sub-control circuit 7 that controls an effect according to the progress of the game.

  The main control circuit 6 includes a main CPU (Central Processing Unit) 60, a main ROM (Read Only Memory) 61 that is a read-only memory, a main RAM (Random Access Memory) 62 that is a readable / writable memory, and an initial reset circuit. 63, an I / O port 64, a command output port 65, and a backup capacitor 66, and are connected to various devices (devices, switches, etc.).

  The main CPU 60 is connected to the main ROM 61 and the main RAM 62, and has a function of executing various processes according to programs stored in the main ROM 61.

  The main CPU 60 has a function of shifting the gaming state as described above. Specifically, the main CPU 60 constitutes special game state control means for controlling the game state so as to enter a special game state advantageous to the player in response to the establishment of a predetermined advantageous condition. For example, the main CPU 60 executes a jackpot lottery and controls the gaming state so that the gaming state becomes a jackpot game in response to the result of the jackpot lottery being a win.

  Further, in the special gaming state, the main CPU 60 displaces the first or second shutter 41, 42 from the second state to the first state, and changes from the first state to the second state in response to a predetermined condition being satisfied. Advantageous game executing means for executing a plurality of advantageous games for executing a series of operations to be displaced at least once. That is, the main CPU 60 is configured to execute the round game a plurality of times in the special game state.

  Further, the main CPU 60 constitutes various timers such as a watch dog timer, a system timer monitoring timer, a waiting time timer, a big winning opening opening time timer, a security signal output timer, a remaining ball monitoring timer, and a total winning invalid period timer. Various timer values may be stored in a register constituting the main CPU 60 or may be stored in a predetermined area of the main RAM 62.

  The main CPU 60 also includes a winning detection counter, a winning detection counter, a jackpot determination random number counter, a jackpot symbol determination random number counter, a normal symbol determination random number counter, an effect condition determination random number counter, a first or second illegal winning counter. (Hereinafter collectively referred to as “illegal prize counter”), radio wave detection counter, first or second grand prize opening prize counter (hereinafter collectively referred to as “large prize opening prize counter”), grand prize opening open Various counters such as a count counter are configured. Note that the values of various counters may be stored in a register constituting the main CPU 60 or may be stored in a predetermined area of the main RAM 62.

  The main ROM 61 stores a program for controlling the operation of the pachinko gaming machine 1 by the main CPU 60 such as a program for causing the main CPU 60 to execute the processes shown in FIGS.

  The main RAM 62 has a function of storing various data (such as flag and variable values) as a temporary storage area of the main CPU 60. As the temporary storage area of the main CPU 60, other readable / writable storage media can be used instead of the main RAM 62.

  The initial reset circuit 63 generates a reset signal when the power is turned on, and is connected to the main CPU 60.

  The I / O port 64 transmits input signals from various devices to the main CPU 60 and output signals from the main CPU 60 to various devices.

  The command output port 65 transmits various commands from the main CPU 60 to the sub-control circuit 7.

  The backup capacitor 66 is for holding various data stored in the main RAM 62 by quickly supplying power to the main RAM 62 when power is interrupted.

  The various devices connected to the main control circuit 6 include the LED unit 5, the first big prize opening solenoid 410, the second big prize opening solenoid 420, the electric accessory solenoid 460, and the external terminal plate 80. included.

  As shown in FIG. 5, the LED unit 5 has a normal symbol display unit 50 that performs variable display of the normal symbol in the normal symbol game, a normal symbol hold display unit 51, and a special symbol variable in the special symbol game as described above. A first special symbol display unit 52 and a second special symbol display unit 53, a first special symbol hold display unit 54, and a second special symbol hold display unit 55 that perform display are included.

  The first big prize opening solenoid 410 drives the shutter 41 to make the first big prize opening 39 open or closed. The second big prize opening solenoid 420 drives the shutter 42 to make the second big prize opening 40 open or closed.

  The electric combination solenoid 460 drives the blade member 48 as a normal electric combination to open or close the second start port 35.

  The external terminal board 80 performs data communication with a call device (not shown) having a function of calling a hall clerk and a function of displaying the number of hits, or an external device such as a hall computer 90 that manages pachinko gaming machines throughout the hall. Is for.

  Various switches connected to the main control circuit 6 include a first start port switch 340, a second start port switch 350, a pass gate switch 360, a first count switch 391, a second count switch 392, A first general prize opening switch 430, a second general prize opening switch 440, and a backup clear switch 81 are included.

  The pachinko gaming machine 1 according to the present embodiment includes a first start port switch 340, a second start port switch 350, a passing gate switch 360, a first count switch 391, a second count switch 392, The 1 general prize port switch 430 and the second general prize port switch 440 constitute a prize detection means.

  The first start port switch 340 and the second start port switch 350 supply a predetermined detection signal to the main control circuit 6 when a game ball wins the first start port 34 and the second start port 35. .

  The passing gate switch 360 supplies a predetermined detection signal to the main control circuit 6 when a game ball passes through the passing gate 36.

  The first count switch 391 supplies a predetermined detection signal to the main control circuit 6 when a game ball passes through a predetermined area of the first big winning opening 39.

  The second count switch 392 supplies a predetermined detection signal to the main control circuit 6 when a game ball passes through a predetermined area of the second big winning opening 40.

  The first general winning port switch 430 and the second general winning port switch 440 send a predetermined detection signal to the main control circuit 6 when the game ball passes through the first general winning port 43 and the second general winning port 44, respectively. To supply.

  The main control circuit 6 transmits a prize ball command from the main control circuit 6 to the payout / launch control circuit 82. The payout / firing control circuit 82 controls the payout device 83 and the launching device 12, and the payout device 83, the firing device 12 and the card unit 84 are connected thereto.

  The card unit 84 can be transmitted / received to / from the ball lending operation panel 85 that outputs a signal for requesting the card unit 84 to lend a game ball by the player's operation.

  The payout / launch control circuit 82 receives a prize ball command supplied from the main control circuit 6 and a lending ball control signal supplied from the card unit 84, and transmits a predetermined signal to the payout device 83. The paying device 83 pays out the game ball.

  When the firing handle 122 of the launching device 12 is gripped by the player and rotated in the clockwise direction, the payout / firing control circuit 82 is a firing solenoid (not shown) according to the rotational angle. The power is supplied to the player and the game ball is fired.

  The backup clear switch 81 clears the backup data of the main control circuit 6 and the payout / launch control circuit 82 in the event of a power interruption in accordance with the operation of the game hall manager.

  The main CPU 60 interrupts the main process and executes a timer interrupt process as an interrupt process even during execution of a main process described later. The timer interruption process is executed with an interruption condition generated every predetermined time (for example, 2 ms) as a trigger, and a winning determination process for determining whether or not a winning for each element constituting the winning detection means is detected; This is a process in which a radio wave detection process for determining whether or not the radio wave sensor 500 detects a radio wave is performed.

  The sub-control circuit 7 is connected to the main control circuit 6 via a command output port 65 and a command input port 70, and is configured to be supplied with various commands from the main control circuit 6.

  The sub control circuit 7 performs various controls in accordance with various commands supplied from the main control circuit 6, and includes a sub CPU 71, a program ROM 72, a work RAM 73, a display control circuit 74, and voice control. A circuit 75, a lamp control circuit 76, and a backup capacitor 77 are provided.

  The sub CPU 71 has a function of executing various processes according to a program stored in the program ROM 72 as shown in FIGS. In particular, the sub CPU 71 controls the sub control circuit 7 in accordance with various commands supplied from the main control circuit 6.

  The program ROM 72 stores a program and various tables for controlling the game effects of the pachinko gaming machine 1 by the sub CPU 71.

  The work RAM 73 stores various data (flags, variable values, etc.) as a temporary storage area of the sub CPU 71.

  The display control circuit 74 is for performing display control in the liquid crystal display device (LCD) 13 in accordance with data supplied from the sub CPU 71. For example, the display control circuit 74 generates various image data with an image data processor (VDP). The image data ROM is configured to store image data, a frame buffer that buffers the image data, and a D / A converter that converts the image data as an image signal. This is an exemplification, and the present invention is not limited to this.

  The display control circuit 74 temporarily stores image data to be displayed on the liquid crystal display device 13 in the frame buffer in response to an image display command supplied from the sub CPU 71. Examples of the image data include decorative design image data, background image data, various effect image data, various fraud notification image data, and the like.

  Further, the display control circuit 74 supplies the image data stored in the frame buffer to the D / A converter at a predetermined timing. The D / A converter converts the image data as an image signal and supplies the image signal to the liquid crystal display device 13 at a predetermined timing. The liquid crystal display device 13 displays an image based on the image signal from the D / A converter.

  The sound control circuit 75 is for performing control related to the sound generated from the speaker 21. For example, a sound source IC that performs control related to sound, a sound data ROM that stores various sound data, and an amplifier that amplifies the sound signal (AMP) is included.

  The sound source IC controls sound generated from the speaker 21 and selects one sound data from a plurality of sound data stored in the sound data ROM in accordance with a sound generation command supplied from the sub CPU 71. can do.

  The sound source IC can also read the selected audio data from the audio data ROM, convert the audio data into a predetermined audio signal, and supply the audio signal to the AMP. The AMP amplifies the sound signal and generates sound from the speaker 21.

  The lamp control circuit 76 is for controlling the lamp / LED 22 including a decoration lamp, a drive circuit for supplying a lamp control signal, a decoration data ROM storing a plurality of types of lamp decoration patterns, and the like. It is composed of

  The backup capacitor 77 is for holding various data stored in the work RAM 73 by quickly supplying power to the work RAM 73 when power is interrupted.

  The sub-control circuit 7 further includes a pressing operation button switch 20a that detects a pressing operation of the effect button 20 that can be pressed by the player.

  The sub-control circuit 7 controls the display control circuit 74, the sound control circuit 75, and the lamp control circuit 76, for example, based on the output from the push-down operation button switch 20a, and performs a chance effect.

[Pitch / Winner Detection Counter]
FIGS. 7A to 7C show the unused area, the used area, and the winning storage area of the winning detection counter of each element constituting the winning detection means.

  Each of the entrance detection counters has a 4-bit unused area and an in-use area, and the old entrance detection information is shifted to the left each time the timer interrupt process is performed. In addition, the winning detection counter stores “HIGH” indicating the detection state by setting the counter value to “1” when each element constituting the winning detection means detects the winning by the timer interruption process. Then, when each element constituting the winning detection means does not detect the incoming ball by the timer interruption process, “LOW” representing the non-detection state is stored by setting the counter value to “0”.

  FIG. 7B shows a winning detection counter corresponding to the first general winning opening 43 among the elements constituting the winning detection means. As shown in FIG. 7B, the main CPU 60 responds when the use area of the ball detection counter corresponding to the first general winning opening 43 becomes “0011” (LOW, LOW, HIGH, HIGH). The first general winning opening switch 430 detects that there has been a winning, and sets the corresponding bit of the winning detection counter to 1 (ON).

  As a result, the main CPU 60 can prevent a malfunction in which a winning is determined when a ball is detected only once by chattering or the like.

  As shown in FIG. 7C, the winning detection counter stores the winning information of each element constituting the winning detection means in the winning storage area. The winning detection counter stores a bit corresponding to 1 when it is determined to be a winning and 0 corresponding to a bit when it is not determined to be a winning.

  In addition, the winning detection counter executes 0 clearing as winning information erasing processing that sets all the bits corresponding to each element constituting the winning detection means to 0 when there is an injustice such as radio wave goto.

[Time chart when radio wave occurs]
FIGS. 8 to 10 illustrate processing when a radio wave is detected by the radio wave sensor 500. FIG. In the following description, the timer interrupt process is executed every 2 ms (milliseconds).

  As shown in FIG. 8, the radio wave sensor 500 is turned on when it is determined that a radio wave is detected in the timer interrupt process, and is turned off when it is determined that no radio wave is detected.

  Then, if the radio sensor 500 continues to be on until the predetermined period W elapses, the main CPU 60 determines that the radio sensor 500 detects the radio wave in the next timer interruption process. It is determined that the radio wave has been detected, and the winning invalidation process is executed.

  In the pachinko gaming machine 1 according to the present embodiment, the predetermined period W is 4 ms. This is to determine that the radio wave sensor 500 has detected a radio wave when a radio wave is detected for the first time in the timer interrupt process is set to 0 ms, and then a radio wave is detected in two timer interrupt processes. . Further, in the pachinko gaming machine 1 of the present embodiment, determining that the main CPU 60 has detected a radio wave by the radio wave sensor 500 is a radio wave detection determination process.

  That is, the main CPU 60 determines that the radio wave sensor 500 has detected a radio wave twice consecutively in the timer interruption process, and determines that the radio wave sensor 500 has detected an electric wave in the third timer interruption process. It is determined that the sensor 500 has detected a radio wave, and the winning invalidation process is executed. Note that the predetermined period W is 4 ms, and the present invention is not limited to this.

  Accordingly, the main CPU 60 determines that the radio wave is not being performed if the radio wave sensor 500 detects the radio wave once or twice continuously but does not detect the radio wave for the third time. Thereby, the main CPU 60 can prevent malfunctioning when the radio wave is generated when the radio wave is generated by chattering or the like.

  Here, the main CPU 60 issues a radio wave detection command when it is determined that the radio wave sensor 500 has detected a radio wave in the third timer interrupt process in a radio wave detection process (see FIG. 18) in a timer interrupt process to be described later. turn on.

  In the winning invalidation process, the main CPU 60 sets a predetermined period X starting from the time point when it is determined that the detection of the radio wave by the radio wave sensor 500 is in the OFF state. Then, the main CPU 60 passes a period obtained by adding the above-described predetermined period X to the period from the detection of the radio wave (the third radio wave detection) until the detection of the radio wave is turned off (the radio wave sensor 500 is turned off). All winning invalidation periods for invalidating winnings by all winning detecting means are set.

  In the pachinko gaming machine 1 of the present embodiment, the predetermined period X is 10 s (seconds). The predetermined period X is 10 s, and the present invention is not limited to this.

  Here, when the main CPU 60 determines in the winning detection process (see FIG. 18) in the timer interruption process described later that there is a winning detection counter that has detected a winning, the main CPU 60 displays the first general winning opening 43 in FIG. It becomes ON state as shown.

  Therefore, the main CPU 60 invalidates all the ON states surrounded by a frame in FIG. 8 because they are generated during the all winning invalidation period.

  Here, in general, regardless of the determination of the fraud determination process, the winning detection by the detection sensor is enabled, and when it is determined in the fraud determination process that an illegal act has been performed, In the case of a pachinko gaming machine that does not perform payout processing, the pachinko gaming machine has a configuration in which a special symbol display device is activated based on a winning detection that is validated when an illegal act is detected. Yes.

  Since the operation of the special symbol display device is synonymous with the fact that the lottery game state is advantageous for the player, it gives a fraudulent a profit in the form of a prize ball. Although it is not, there was a problem that it gave a profit in the form of lottery transition to the big hit gaming state.

  Therefore, the pachinko gaming machine 1 according to the present embodiment is a pachinko gaming machine that does not give any profit to the fraudster, and when the main CPU 60 is in the all winning invalidation period, the winning invalidation process is performed. All winning information stored in the winning storage area of the detection counter is cleared to zero.

  As a result, the main CPU 60 deletes the winning information on the condition that the radio wave is detected, so that the predetermined profit based on the winning information stored by the radio wave is also invalidated and given to the fraudulent person. I can not.

  The main CPU 60 detects the value of the corresponding winning detection counter when each element constituting the winning detection means detects a winning during the all winning invalid period and the use area of the winning detection counter becomes “0011”. When the value is updated to 1, the profit based on the winning information stored by the radio wave is invalidated as soon as the value of the winning detection counter is cleared to 0. Countermeasure processing can be executed, and fraud countermeasure processing for radio wave goto can be executed without imposing any burden on other processing for proceeding with the game.

  If the main CPU 60 determines that the radio wave sensor 500 has detected a radio wave attack by the timer interruption process performed during the winning invalidation period, the main CPU 60 starts again from the point in time when the newly detected radio wave attack has ended. Set all winnings invalid period.

  When the main CPU 60 determines that the radio wave sensor 500 has detected a radio wave, the main CPU 60 transmits a radio wave detection command to the command input port 70 via the command output port 65. The main CPU 60 outputs a security signal through the I / O port 64 when the radio wave detection command is transmitted, and the output security signal is output to the hall computer 90 through the external terminal board 80. The

  The main CPU 60 outputs a security signal to the hall computer 90 until the minimum output period Y elapses. In the pachinko gaming machine 1 according to the present embodiment, the minimum output period Y is 60 s. The minimum output period Y is 60 s, and the present invention is not limited to this.

  Further, when the main CPU 60 transmits the radio wave detection command again while the security signal is being output to the hall computer 90, the main CPU 60 causes the hall computer 90 to send the radio wave detection command again to the hall computer 90 until 60 seconds elapses. Update the minimum output period to output the security signal.

  When the command input port 70 receives the radio wave detection command, the sub CPU 71 starts fraud notification by each element constituting the fraud notification means. Thereby, the pachinko gaming machine 1 can notify the outside of the pachinko gaming machine 1 that an illegal act has been performed. In this embodiment, the fraud notification means includes the liquid crystal display device 13, the speaker 21, the lamp / LED 22, and the like.

[Time chart when power interruption occurs]
FIG. 9 is a diagram for explaining the operation of the main CPU 60, the sub CPU 71, and the external terminal board 80 when a power interruption occurs in which the power of the pachinko gaming machine 1 is turned off during the all winning invalidation period.

  As shown in FIG. 9, when a power interruption occurs when Zms has not elapsed for 10 seconds, the main CPU 60 returns from the power interruption with the all winning invalid period canceled. Further, the sub CPU 71 terminates the fraud notification by each element constituting the fraud notification means when a power interruption occurs.

  Since the fraudulent notification can be turned off simply by turning off the power of the pachinko gaming machine 1, the pachinko gaming machine 1 is advantageous to the player by initializing the data when the fraudulent notification is executed due to erroneous detection of radio waves. Unauthorized notification can be canceled without clearing a certain state (for example, a big hit gaming state or a probability variation gaming state).

  If power interruption occurs at the time when Zms has not elapsed since the minimum output period of Yms (60 s), the main CPU 60 sends a time security signal obtained by subtracting Zms from Yms (60 s) to the hall computer 90 after returning from power interruption. Send.

  As a result, even if the pachinko gaming machine 1 is interrupted immediately after the fraud is performed, the game hall side can easily grasp that the fraud has been performed after returning from the power interruption. it can.

[Time chart when sub-control circuit is reset]
FIG. 10 is a diagram for explaining that when only the sub-control circuit 7 is reset and only the power supply of the sub-control circuit 7 is turned off, the fraud notification is not performed again after returning from the reset. The operations of the main CPU 60 and the external terminal board 80 are the same as those shown in FIG.

  Since recent pachinko machines perform a wide variety of effects in the sub-control circuit, the capacity of the effect data and the processing for performing the effects are increasing, and only the sub-control circuit is reset due to runaway or static electricity. Sometimes.

  As shown in FIG. 10, when only the sub control circuit 7 is reset, only the sub control circuit 7 is instantaneously turned off. When the instantaneous power OFF occurs, the data stored in the work RAM 73 is held by the power supplied from the backup capacitor 77 until the power is turned on.

  When the sub control circuit 7 determines that the data in the work RAM 73 held by the power supplied from the backup capacitor 77 is not normal when the power is turned off from the power off state after the reset occurs (the backup is taken). In the case where there is not, the unauthorized notification is not performed again even if the unauthorized notification is executed before the reset occurs.

  Although not shown in this time chart, even if it is determined that the data in the work RAM 73 held by the power supplied from the backup capacitor 77 is normal (when the backup is taken), the unauthorized notification is not performed again. It is like that.

  Here, after transmitting a radio wave detection command to the sub-control circuit after determining that the main control circuit is illegal, the control of the main control circuit is not performed until the predetermined period elapses. In pachinko machines that reduce the load, if the unauthorized notification is terminated when the power is turned off, the so-called “instantaneous interruption”, which is a phenomenon that the power is turned off instantaneously due to static electricity, is the main control. If only the sub-control circuit side does not occur on the circuit side, a situation in which the main control circuit does not perform fraud determination processing and a situation in which the sub-control circuit does not perform fraud notification control occurs.

  If a fraudulent act is executed during this time, in such a pachinko gaming machine, the main control circuit does not perform fraud determination processing, and the radio wave detection command is not transmitted to the sub-control circuit.

  Therefore, in such a pachinko gaming machine, since the radio wave detection command is not transmitted to the sub-control circuit, the fraud notification is not performed, and therefore the fraud notification that has been terminated halfway cannot be recovered during the predetermined period. There was a problem.

  Therefore, the pachinko gaming machine 1 according to the present embodiment should be able to promptly return the fraud notification when the fraud is detected after the fraud notification is terminated when the power is turned off. 8 and 10, even if the power of the sub control circuit 7 is turned off and the unauthorized notification by the sub CPU 71 is terminated, the command input from the command output port 65 is detected when the main CPU 60 detects a radio wave goto. The sub CPU 71 that transmits the radio wave detection command to the port 70 and receives the radio wave detection command through the command input port 70 is configured to start the fraud notification again.

  As a result, the pachinko gaming machine 1 performs an instantaneous interruption after an unauthorized player performs radio wave goto, and even when the rogue notification of the pachinko game machine 1 is completed, the radio goto is performed again. In this case, since it is possible to return the unauthorized notification by the sub CPU 71, it is possible to quickly recover the unauthorized notification. Note that the fraudulent notification corresponds to “predetermined fraud notification” and “predetermined notification”.

[Main processing]
Next, the main process executed in the main CPU 60 will be described below with reference to FIGS. 11 and 12.

  In step S10, the main CPU 60 performs a watch dog timer disable setting process. When this process ends, the main CPU 60 shifts the process to step S11.

  In step S11, the main CPU 60 performs input / output port setting processing. When this process ends, the main CPU 60 shifts the process to step S12.

  In step S <b> 12, the main CPU 60 performs a process of determining whether or not it is in a power failure detection state. In this process, the main CPU 60 determines whether or not the power interruption detection signal is HIGH (high level). If the power failure detection signal is not HIGH, it is determined that the power failure detection state is present, and the process of step S12 is performed until the power failure detection state is resolved. If the power failure detection signal is HIGH, the power failure is detected. It determines with it not being a detection state, and moves a process to step S13.

  In step S13, the main CPU 60 performs sub-control reception acceptance wait processing. In this process, the main CPU 60 performs a process of waiting until the sub control circuit 7 receives a signal. When this process ends, the main CPU 60 shifts the process to step S14.

  In step S <b> 14, the main CPU 60 performs processing for permitting writing to the main RAM 62. When this process ends, the main CPU 60 shifts the process to step S15.

  In step S15, the main CPU 60 performs a process of determining whether or not the backup clear switch 81 (see FIG. 6) is ON. In this process, when the main CPU 60 determines that the backup clear switch 81 (see FIG. 6) is ON, the main CPU 60 proceeds to step S30 (see FIG. 12) and determines that the backup clear switch 81 is not ON. In that case, the process proceeds to step S16.

  In step S16, the main CPU 60 performs a process of determining whether or not there is a power interruption detection flag. In this process, if the main CPU 60 determines that there is a power interruption detection flag, it moves the process to step S17, and if it determines that there is no power interruption detection flag, it performs the process in step S30 (see FIG. 12). Move.

  In step S <b> 17, the main CPU 60 performs a process of checking the work area for damage and calculating a work damage check value. When this process ends, the main CPU 60 shifts the process to step S18.

  In step S18, the main CPU 60 performs a process of determining whether or not the work damage check value is a normal value. In this process, when the main CPU 60 determines that the work damage check value is a normal value, the main CPU 60 proceeds to step S19, and when it does not determine that the work damage check value is a normal value, the main CPU 60 proceeds to step S30 ( The processing is transferred to (see FIG. 12).

  In step S19, the main CPU 60 performs a process of setting 7FFEH to the stack pointer. When this process ends, the main CPU 60 shifts the process to step S20.

  In step S20, the main CPU 60 performs an initial setting process for the work area at the time of power recovery. When this process ends, the main CPU 60 shifts the process to step S21.

  In step S21, the main CPU 60 performs a high probability gaming state display notification setting process at the time of power recovery. Specifically, the main CPU 60 performs a display for informing that the special symbol game is a game with a high probability of jackpot. When this process ends, the main CPU 60 shifts the process to step S22. Note that the notification display may be configured to end at the start or end of the first fluctuation after power-on.

  In step S22, the main CPU 60 performs a process of transmitting a command at the time of power recovery. In this process, the main CPU 60 performs a process of transmitting a command for returning to the sub-control circuit 7 to the gaming state at the time of power interruption. When this process ends, the main CPU 60 shifts the process to step S23.

  In step S <b> 23, the main CPU 60 performs initial setting of devices around the main CPU 60. When this process is completed, the address before power interruption, that is, the program address indicated by the program counter restored from the stack area is restored (step S24).

  As shown in FIG. 12, in step S30, the main CPU 60 performs processing for setting 8000H in the stack pointer. When this process ends, the main CPU 60 shifts the process to step S31.

  In step S31, the main CPU 60 performs processing for acquiring an initial value of a random number related to jackpot determination. When this process ends, the main CPU 60 shifts the process to step S32.

  In step S32, the main CPU 60 performs all work area clear processing. When this process ends, the main CPU 60 shifts the process to step S33.

  In step S33, the main CPU 60 performs processing for setting an initial value of a random number related to jackpot determination. When this process ends, the main CPU 60 shifts the process to step S34.

  In step S34, the main CPU 60 performs an initial setting process for the work area when the RAM is initialized. When this process ends, the main CPU 60 shifts the process to step S35.

  In step S <b> 35, the main CPU 60 performs processing for transmitting a command for initializing the main RAM 62 to the sub-control circuit 7. In the sub control circuit 7, the main CPU 60 is initialized based on the received command. When this process ends, the main CPU 60 shifts the process to step S36.

  In step S <b> 36, the main CPU 60 performs initial setting of devices around the main CPU 60. When this process ends, the main CPU 60 shifts the process to step S40.

  In step S40, the main CPU 60 performs an interrupt prohibition process. In this process, the main CPU 60 performs a process for prohibiting the interrupt process. When this process ends, the main CPU 60 shifts the process to step S41.

  In step S41, the main CPU 60 performs initial value random number update processing. In this process, the main CPU 60 performs a process of updating the initial random number counter value. When this process ends, the main CPU 60 shifts the process to step S42.

  In step S42, the main CPU 60 performs an interrupt permission process. In this process, the main CPU 60 performs a process for permitting an interrupt process. When this process ends, the main CPU 60 shifts the process to step S43.

  In step S43, the main CPU 60 performs an effect random number update process. In this process, the main CPU 60 performs a process of updating the effect random number counter value. When this process ends, the main CPU 60 shifts the process to step S44.

  In step S44, the main CPU 60 determines whether or not the value of the system timer monitoring timer is 3 or more. In this process, the main CPU 60 refers to the value of the system timer monitoring timer stored in the main RAM 62, and when determining that the value of the system timer monitoring timer is 3 or more, the main CPU 60 moves the process to step S45, If it is determined that the value of the timer monitoring timer is not 3 or more, the process proceeds to step S40.

  In step S <b> 45, the main CPU 60 performs a process of subtracting 3 from the value of the system timer monitoring timer stored in the main RAM 62. When this process ends, the main CPU 60 shifts the process to step S46.

  In step S46, the main CPU 60 performs timer update processing. In this process, the main CPU 60 sets a waiting time timer for synchronizing the main control circuit 6 and the sub-control circuit 7, and the first big winning opening 39 and the second big winning opening 40 that are opened when a big hit occurs. A big prize opening time timer for measuring the opening time, which measures the minimum output period of the security signal output from the main CPU 60 to the hall computer 90 via the external terminal board 80 when it is detected that an illegal act has occurred. The processing for updating various timers such as a security signal output timer is executed. If this process ends, the process moves to a step S47.

  In step S47, the main CPU 60 performs a special symbol control process. Although described in detail later, in this process, the main CPU 60 performs a special symbol control process. In this process, the main CPU 60 extracts a winning determination random number value and a winning symbol determination random number value in accordance with detection signals from the first start winning port switch 340 and the second starting port switch 350 and stores them in the main ROM 61. Referring to the hit determination table, it is determined whether or not a special symbol lottery (big hit) has been won, and the result of determination is stored in the main RAM 62. When this process ends, the main CPU 60 shifts the process to step S48.

  In step S48, the main CPU 60 performs normal symbol control processing. As will be described in detail later, in this process, the main CPU 60 extracts a random number value in accordance with the detection signal from the passing gate switch 360, refers to the normal symbol winning table stored in the main ROM 61, and selects the normal symbol lottery. It is determined whether or not a win has been made, and processing for storing the determination result in the main RAM 62 is performed.

  When the normal symbol lottery is won, the blade member 48 is changed from the closed state to the opened state, so that the game ball can easily enter the second start port 35. When this process ends, the main CPU 60 shifts the process to step S49.

  In step S49, the main CPU 60 performs a symbol display device control process. In this process, the main CPU 60 outputs a control signal for driving the liquid crystal display device 13 according to the result of the special symbol control process stored in the main RAM 62 in step S47 and step S48 and the result of the normal symbol control process. Processing to be stored in the main RAM 62 is performed.

  The main CPU 60 transmits a control signal to the first special symbol display unit 52 or the second special symbol display unit 53. The 1st special symbol display part 52 or the 2nd special symbol display part 53 carries out the variable display and stop display of a special symbol based on the received control signal.

  Further, the normal symbol display unit 50 displays the normal symbol in a variable manner and stops based on the received control signal. When this process ends, the main CPU 60 shifts the process to step S50.

  In step S50, the main CPU 60 performs game information data generation processing. In this processing, the main CPU 60 performs processing for generating data relating to game information signals to be transmitted to the base computer or the hall computer 90 and storing the data in the main RAM 62. When this process ends, the main CPU 60 shifts the process to step S51.

  In step S51, symbol reservation number data generation processing is performed. In this process, the main CPU 60 detects the first start prize port switch 340 detected in a special symbol related switch check process and a normal symbol related switch check process (FIG. 16, step S109, step S110) in a timer interrupt process to be described later. Based on the detection signal from the second start port switch 350 and the passing gate switch 360 and the update result of the reserved number data stored in the main RAM 62 updated in accordance with the execution of the variation display of the special symbol and the normal symbol, A process for storing in the main RAM 62 control signals for driving the first special symbol hold display unit 54, the second special symbol hold display unit 55, and the normal symbol hold display unit 51 is performed. When this process ends, the main CPU 60 shifts the process to step S52.

  In step S52, the main CPU 60 performs port output processing. In this process, the main CPU 60 performs a process of outputting a control signal stored in the main RAM 62 from each port in the above steps.

  Specifically, the main CPU 60 outputs a security signal to the hall computer 90 via the external terminal board 80 and opens / closes the LED power source (common signal) for lighting the LED, the first shutter 41 or the second shutter 42. The solenoid power supply for driving the solenoid that opens and closes the blade member 48 is supplied. When this process ends, the main CPU 60 shifts the process to step S53.

  In step S53, the main CPU 60 performs a winning mouth related command control process. In this process, the main CPU 60 performs a process of controlling a winning mouth associated command. If this process ends, the process moves to a step S40.

[Interrupt handling during power interruption]
FIG. 13 is a diagram for explaining the power interruption interrupt process executed when the main CPU 60 detects that the power interruption detection signal has fallen from H (high) to L (low). .

  In step S61, the main CPU 60 performs a register (AF) saving process. In this process, the main CPU 60 performs a process for saving the register. When this process ends, the main CPU 60 shifts the process to step S62.

  In step S62, the main CPU 60 determines whether or not the power interruption detection signal is L. If the power interruption detection signal is L, the process proceeds to step S64. If the power interruption detection signal is not L, the process proceeds to step S63. In this process, the main CPU 60 can determine whether or not the fall of the power interruption detection signal is due to chattering by detecting the state of the power interruption detection signal.

  In step S63, the main CPU 60 performs a register restoration process. In this process, the main CPU 60 performs a process for restoring the register. When this process ends, the process returns to the process before the interruption of this process.

  In step S64, the main CPU 60 performs a register saving process. In this process, the main CPU 60 performs a process for saving the register. When this process ends, the main CPU 60 shifts the process to step S65.

  In step S65, the main CPU 60 performs a process of reflecting the interrupt state on the interrupt flag. When this process ends, the main CPU 60 shifts the process to step S66.

  In step S66, the main CPU 60 performs processing for saving the stack pointer. When this process ends, the main CPU 60 shifts the process to step S67.

  In step S67, the main CPU 60 performs work area damage check data generation processing. In this process, the main CPU 60 performs generation of work area damage check data, and determines whether or not the generated work area damage check data matches the power interruption return data at the time of power failure recovery. If they match, it is determined that the data in the main RAM 62 held by the power supplied from the backup capacitor 66 is normal (backup is taken). When this process ends, the main CPU 60 shifts the process to step S68.

  In step S68, the main CPU 60 performs processing for setting a power interruption detection flag. When this process ends, the main CPU 60 shifts the process to step S69.

  In step S69, the main CPU 60 performs a RAM write prohibition process. In this processing, the main CPU 60 performs processing for prohibiting RAM writing. When this process is finished, this subroutine is finished.

  Although not shown, in the interruption processing at the time of power interruption, the power from the backup capacitor 66 is supplied to the main RAM 62, and the data stored in the main RAM 62 is retained by the supply of power. It becomes.

[Game information data generation processing]
FIG. 14 is a diagram for explaining the details of the game information data generation process (FIG. 12, step S50) performed in the main process.

  In step S71, the main CPU 60 determines whether or not the radio wave detection command transmission flag is ON. In this process, the main CPU 60 determines whether or not the radio wave detection command transmission flag that is set when the radio wave detection command is transmitted from the command output port 65 is ON, and if the radio wave detection command transmission flag is ON. If it is determined, the process proceeds to step S72. If it is determined that the radio wave detection command transmission flag is not ON, the process proceeds to step S76.

  In step S72, the main CPU 60 performs a radio wave detection command transmission flag OFF process. In this process, the main CPU 60 turns OFF the radio wave detection command transmission flag that is ON. When this process ends, the main CPU 60 shifts the process to step S73.

  In step S73, the main CPU 60 performs security signal output timer clear processing. In this process, the main CPU 60 clears the value of the security signal output timer. When this process ends, the main CPU 60 shifts the process to step S74.

  In step S74, the main CPU 60 performs processing for setting the minimum output period Yms in the security signal output timer. In this process, the main CPU 60 sets 60s which is the minimum output period, which is the security signal output time, in the security signal output timer. Note that the value set in the security signal output timer is not limited to 60 s. When this process ends, the main CPU 60 shifts the process to step S75.

  In step S75, the main CPU 60 performs security signal output data set processing. In this process, the main CPU 60 generates and sets a security signal. When this process ends, the main CPU 60 shifts the process to step S76.

  In step S76, the main CPU 60 determines whether or not the big prize opening illegal prize command transmission flag is ON. In this process, the main CPU 60 determines whether or not the big prize mouth illegal prize command transmission flag that is set when the big prize mouth illegal prize command is transmitted from the command output port 65 is ON. If it is determined that the winning command transmission flag is ON, the process proceeds to step S77, and if it is determined that the large winning mouth illegal winning command transmission flag is not ON, the process proceeds to step S81.

  In step S77, the main CPU 60 performs a large winning opening illegal prize command transmission flag OFF process. In this process, the main CPU 60 turns off the large winning opening illegal prize command transmission flag that is ON. When this process ends, the main CPU 60 shifts the process to step S78.

  In step S78, the main CPU 60 performs security signal output timer clear processing. In this process, the main CPU 60 clears the value of the security signal output timer. When this process ends, the main CPU 60 shifts the process to step S79.

  In step S79, the main CPU 60 performs processing for setting the minimum output period Yms in the security signal output timer. In this process, the main CPU 60 sets 60s which is the minimum output period, which is the security signal output time, in the security signal output timer. Note that the value set in the security signal output timer is not limited to 60 s. When this process ends, the main CPU 60 shifts the process to step S80.

  In step S80, the main CPU 60 performs security signal output data set processing. In this process, the main CPU 60 generates and sets a security signal. When this process ends, the main CPU 60 shifts the process to step S83.

  In step S81, the main CPU 60 determines whether or not the value of the security signal output timer is zero. In this process, the main CPU 60 determines whether or not the value of the security signal output timer is 0. If it is determined that the value of the security signal output timer is 0, the main CPU 60 moves the process to step S83 and performs security. If it is determined that the value of the signal output timer is not 0, the process proceeds to step S82.

  In step S82, the main CPU 60 performs security signal output data set processing. In this process, the main CPU 60 generates and sets a security signal. When this process ends, the main CPU 60 shifts the process to step S83.

  In step S83, the main CPU 60 performs other game information data generation processing. In this process, the main CPU 60 performs a process of generating and setting a signal such as a jackpot signal indicating that it is a jackpot gaming state or a probability changing signal indicating that it is a probability changing gaming state in accordance with the gaming state. When this process is finished, this subroutine is finished.

  From step S75, step S80 and step S82, the main CPU 60 is configured to set the security signal output data unless the value of the security signal output timer is zero. As a result, the main CPU 60 continuously outputs the security signal until a period in which the value of the security signal output timer is greater than 0 has elapsed.

[Port output processing]
FIG. 15 is a diagram for explaining the details of the port output process (FIG. 12, step S52) performed in the main process.

  In step S91, the main CPU 60 determines whether security signal output data is set. In this process, the main CPU 60 determines the game information data when the radio wave detection command transmission flag (see FIG. 24, step S213) that is turned on when a radio wave detection command is transmitted in the command transmission control process described later is ON. When it is determined whether the security signal output data (see FIG. 14, step S75, step S80, and step S82) set in the generation process is set, and when it is determined that the security signal output data is set If the process proceeds to step S92 and it is determined that the security signal output data is not set, the process proceeds to step S93.

  In step S92, the main CPU 60 performs security signal output processing. In this process, the main CPU 60 performs a process of outputting the set security signal output data. When this process ends, the main CPU 60 shifts to a process in step S93.

  In step S93, the main CPU 60 performs other port output processing. In this processing, the main CPU 60 outputs a signal such as a jackpot signal indicating that it is a jackpot gaming state or a probability variation signal indicating that it is a probability variation gaming state according to the gaming state, for example, LED lighting LED power supply (common signal) for this purpose, solenoid power supply for driving the solenoid that opens and closes the first shutter 41 or the second shutter 42 and opens and closes the blade member 48 is supplied. When this process ends, the main CPU 60 ends this subroutine.

[Timer interrupt processing]
Even when the main CPU 60 is executing the main process, the main CPU 60 may interrupt the main process and execute the timer interrupt process. This timer interrupt process is a process performed in accordance with a clock pulse generated every predetermined period (for example, 2 ms) from a clock pulse generation circuit (not shown). The timer interrupt process will be described below with reference to FIG.

  In step S101, the main CPU 60 performs a register saving process. In this process, the main CPU 60 performs a process for saving the register. When this process ends, the main CPU 60 shifts the process to step S102.

  In step S102, the main CPU 60 performs a process of incrementing the value of the system timer monitoring timer by 1. In this process, the main CPU 60 performs a process of incrementing the value of the system timer monitoring timer stored in the main RAM 62 by one. The system timer monitoring timer is a monitoring timer for executing a predetermined process (special symbol control process or the like) on the condition that the timer interrupt process is started a predetermined number of times (three times). When this process ends, the main CPU 60 shifts the process to step S103.

  In step S103, the main CPU 60 performs a residual sphere monitoring timer update process. In this processing, the main CPU 60 performs processing for updating the values of the remaining ball monitoring timer and the first or second illegal winning counter stored in the main RAM 62. Details of step S103 will be described later. When this process ends, the main CPU 60 shifts the process to step S104.

  The residual ball monitoring timer is a residual ball monitoring period from when the first shutter 41 closes the first big prize opening 39 until a predetermined period elapses, or the second shutter 42 makes the second big prize opening 40 open. The remaining time of the residual sphere monitoring period from when the closed state is reached until the predetermined period elapses is measured.

  The residual ball monitoring timer is a residual ball monitoring period from when the main CPU 60 controls the first shutter 41 to close the first grand prize winning port 39 until the predetermined period elapses, or the second shutter. The remaining time of the remaining ball monitoring period from when the main CPU 60 controls so that the second grand prize winning opening 40 is closed may be measured until the predetermined period elapses.

  The residual ball monitoring timer is a residual ball monitoring period from when a predetermined period elapses after the first shutter 41 closes the first grand prize winning port 39 until the predetermined period elapses, or when the second shutter 42 You may make it measure the remaining time of the residual ball | bowl monitoring period until a predetermined period passes after making the 2nd big winning opening 40 closed.

  During the remaining ball monitoring period, the main CPU 60 closes the first or second big prize opening 39, 40, and then the game balls detected by the first or second count switch 391, 392 respectively are properly awarded. It is determined that the game ball has won a prize during the detection period. That is, the main CPU 60 sets a period from when the first or second big prize opening 39, 40 is opened to the end of the remaining ball monitoring period as a regular prize detection period.

  The first illegal prize counter counts the number of game balls until it is determined that the first big prize opening 39 is illegally won, and the second illegal prize counter illegally enters the second big prize opening 39. Count the number of game balls until it is determined that a prize has been won.

  For example, the first and second illegal winning counters constituted by the main CPU 60 are used for a period from when the advantageous game is executed until the remaining ball monitoring period, which is a predetermined period, after the advantageous game is ended, The counting means for counting the number of game media detected by the first or second count switches 391 and 392 during the winning detection period is configured.

  In step S104, the main CPU 60 performs processing for setting clear data in the watchdog output data. In this process, the main CPU 60 sets clear data in the watchdog output data and transmits a control signal based on the watchdog output data to the initial reset circuit 63.

  The initial reset circuit 63 releases the capacitor voltage based on the received control signal. When a predetermined time (for example, 3100 ms) determined by the capacitance of the capacitor connected to the initial reset circuit 63 has elapsed after the watchdog timer provided in the initial reset circuit 63 is cleared, the main CPU 60 starts from the initial reset circuit 63. A system reset signal is output.

  When the system reset signal is input from the initial reset circuit 63, the main CPU 60 enters a system reset state. When the process of step S104 is completed, the main CPU 60 shifts the process to step S105.

  In step S105, the main CPU 60 performs a random number update process. In this process, the main CPU 60 performs a process of updating the random number. For example, the main CPU 60 updates values (random numbers) such as a jackpot determination random number counter, a jackpot symbol determination random number counter, a normal symbol determination random number counter, and an effect condition determination random number counter.

  Note that the jackpot determination random number counter and the jackpot symbol determination random number counter are not fair if the update timing of the counter value is indefinite, and therefore a fixed timing every 2 ms to ensure this. I am trying to update with. When the process of step S105 is completed, the main CPU 60 shifts the process to step S106.

  In step S106, the main CPU 60 performs a winning detection process. In this process, the main CPU 60 determines whether or not each of the elements constituting the winning detection means has detected a winning. Details of step S106 will be described later. When this process ends, the main CPU 60 shifts the process to step S107.

  In step S107, the main CPU 60 performs radio wave detection processing. In this process, the main CPU 60 performs a process of determining whether or not a radio wave has been detected. Details of step S107 will be described later. When this process ends, the main CPU 60 shifts the process to step S108.

  In step S108, the main CPU 60 performs a winning detection deletion process. In this process, the main CPU 60 erases the winning information when determining that it is necessary to perform the winning information erasing process. Details of step S108 will be described later. When this process ends, the main CPU 60 shifts the process to step S109.

  In step S109, the main CPU 60 performs a special symbol related switch check process. In this process, the main CPU 60 performs processing related to the first start port 34, the first grand prize port 39, and the second major prize port 40. Details of step S109 will be described later. When this process ends, the main CPU 60 shifts the process to step S110.

  In step S110, the main CPU 60 performs a normal symbol related switch check process. In this process, the main CPU 60 performs a process related to the second start port 35 and the passage gate 36. Details of step S110 will be described later. When this process ends, the main CPU 60 shifts the process to step S111.

  In step S111, the main CPU 60 performs a payout control process. In this process, the main CPU 60 plays game balls in the first grand prize opening 39, the second big prize opening 40, the first starting opening 34, the second starting opening 35, the first general winning opening 43, and the second general winning opening 44. Whether or not a prize has been won. If a prize has been won, a corresponding prize ball command is transmitted to the payout / firing control circuit 82. Details of step S111 will be described later. When this process ends, the main CPU 60 shifts the process to step S112.

  In step S112, the main CPU 60 performs a command transmission control process. In this process, the main CPU 60 transmits the set commands to the command input port 70 of the sub control circuit 7 through the command output port 65. Details of step S112 will be described later. When this process ends, the main CPU 60 shifts the process to step S113.

  In step S113, the main CPU 60 performs a register return process. In this process, the main CPU 60 performs a process for restoring the register to the address before the interrupt process. When this process ends, the main CPU 60 ends this subroutine.

[Residual sphere monitoring timer update processing]
FIG. 17 is a diagram illustrating details of the residual sphere monitoring timer update process (FIG. 16, step S103) performed in the timer interrupt process.

  In step S121, the main CPU 60 determines whether or not the value of the residual sphere monitoring timer is zero. In this process, when the main CPU 60 determines that the value of the residual sphere monitoring timer is 0, the main CPU 60 ends this subroutine, and when it determines that the value of the residual sphere monitoring timer is not 0, the main CPU 60 proceeds to step S122. Move processing.

  In step S122, the main CPU 60 subtracts 1 from the value of the residual sphere monitoring timer. That is, in this process, the main CPU 60 shortens the remaining sphere monitoring period with the passage of time. When this process ends, the main CPU 60 shifts the process to step S123.

  In step S123, the main CPU 60 performs a process of determining whether or not the value of the residual sphere monitoring timer is zero. In this process, it is determined that the value of the residual sphere monitoring timer is 0, which means that the residual sphere monitoring period has ended.

  Therefore, if the main CPU 60 determines that the value of the residual sphere monitoring timer is not 0, it determines that it is during the residual sphere monitoring period, and ends this subroutine. On the other hand, when the main CPU 60 determines that the value of the residual sphere monitoring timer is 0, the main CPU 60 determines that the residual sphere monitoring period has ended, and moves the process to step S124.

  In step S124, the main CPU 60 performs processing for setting the value of the first or second illegal winning counter to 1. In this process, if the main CPU 60 determines in step S123 that the remaining ball monitoring period for the first big prize opening 39 has ended, the main CPU 60 sets the value of the first illegal prize counter to 1, When it is determined that the remaining ball monitoring period for the big winning opening 40 has ended, the value of the second illegal winning counter is set to 1. When this process ends, the main CPU 60 ends this subroutine.

[Winning detection process]
FIG. 18 is a diagram for explaining the details of the winning detection process (FIG. 16, step S106) performed in the timer interrupt process.

  In step S131, the main CPU 60 performs a pitch detection counter updating process for each winning area. In this process, the main CPU 60 updates the value of the winning detection counter in accordance with the detection status of the winning switch of each element constituting the winning detection means. When this process ends, the main CPU 60 shifts the process to step S132.

  In step S132, the main CPU 60 performs a process of determining whether or not there is a ball detection counter that has detected a winning. In this process, the main CPU 60 detects a winning in the winning detection counter corresponding to each element constituting the winning detection means, that is, whether the use area of the winning detection counter is “0011” (“LLHH”). If it is determined that the winning detection counter has detected a winning, the process proceeds to step S133. If it is determined that the winning detection counter has not detected a winning, this subroutine is executed. finish.

  In step S133, the main CPU 60 performs processing for setting winning data in the corresponding winning detection counter. In this process, the main CPU 60 sets the bit of the winning detection counter corresponding to the element constituting the winning detecting means whose value of the winning detection counter is “0011” to 1 (ON). When this process ends, the main CPU 60 ends this subroutine.

[Radio wave detection processing]
FIG. 19 is a diagram illustrating details of the radio wave detection process (FIG. 16, step S107) performed in the timer interrupt process.

  In step S141, the main CPU 60 determines whether or not the all winning invalid flag is ON. In this process, the main CPU 60 determines whether the all winning invalidation flag indicating that the all winning invalidity state is invalid even if a winning is detected in any of the elements constituting the winning detecting means is ON. If NO is determined and it is determined that the all winning invalidity flag is ON, the process proceeds to step S142. If it is determined that the all winning invalidity flag is not ON, the process proceeds to step S146.

  In step S142, the main CPU 60 determines whether or not the value of the all winning invalidation period timer is zero. In this process, the main CPU 60 determines whether or not the value of the all winning invalidation period timer is 0. If it is determined that the value is 0, the detection of unauthorized radio waves is continued, so step S146. If it is determined that it is not 0, the process is shifted to step S143 because it is during the all-payout invalid period.

  In step S143, the main CPU 60 performs all winning invalidity period timer update processing. In this process, the main CPU 60 updates the value of the all winning invalidity period timer to be subtracted by the time that has elapsed since the last set time. When this process ends, the main CPU 60 shifts the process to step S144.

  In step S144, the main CPU 60 determines whether or not the all winning invalid period timer is zero. In this process, the main CPU 60 determines whether or not the value of the all winning invalidation period timer is 0. If it is determined that the value is 0, since the all winning invalidation period has elapsed, the process proceeds to step S145. If it is determined that it is not 0, the process is shifted to step S146 because all winnings are invalid.

  In step S145, the main CPU 60 performs all winning invalid flag OFF processing. In this process, the main CPU 60 ends the all winning invalid period because the value of the all winning invalid period timer becomes 0 as a result of performing the all winning invalid period timer updating process in step S143. When this process ends, the main CPU 60 shifts the process to step S146.

  In step S146, the main CPU 60 determines whether or not the radio wave sensor 500 is ON. That is, it is determined whether the radio wave sensor 500 detects radio waves. In this process, the main CPU 60 determines whether or not the radio wave sensor 500 is ON. If the main CPU 60 determines that the radio wave sensor 500 is ON, the main CPU 60 shifts the process to step S147. Move processing to.

  In step S147, the main CPU 60 adds 1 to the value set in the radio wave detection counter. In this process, the main CPU 60 adds the detected number to the radio wave detection counter that stores the number of times the radio wave is detected. When this process ends, the main CPU 60 shifts the process to step S148.

  In step S148, the main CPU 60 determines whether or not the value set in the radio wave detection counter is 3. In this process, the main CPU 60 determines whether or not the radio wave sensor 500 has detected the radio wave three times in succession, and if it is determined that the radio wave sensor 500 has detected the radio wave three times in succession, the process proceeds to step S149. If it is determined that the radio wave sensor 500 has not detected the radio wave three times in succession, the present subroutine is terminated.

  In step S149, the main CPU 60 performs all winning invalidity period timer clear processing. In this process, the main CPU 60 clears the value set in the all winning invalidity period timer so as not to set the all winning invalidity period timer while the radio wave sensor 500 continues to detect the radio wave. When this process ends, the main CPU 60 shifts the process to step S150.

  In step S150, the main CPU 60 performs all winning invalid flag ON processing. In this process, the main CPU 60 sets the all winning invalidation flag to ON and disables winning when the elements constituting the winning detection means detect winning. When this process ends, the main CPU 60 shifts the process to step S151.

  In step S151, the main CPU 60 performs radio wave detection command set processing. In this processing, the main CPU 60 transmits a radio wave detection command from the command output port 65 to the command input port 70, and sets the radio wave detection command in a predetermined area of the main RAM 62 in order to perform unauthorized notification by the sub control circuit 7. To do. When this process ends, the main CPU 60 ends this subroutine.

  In step S152, the main CPU 60 determines whether or not the value set in the radio wave detection counter is 3 or more. In this process, the main CPU 60 determines whether or not the value set in the radio wave detection counter is 3 or more, and determines that the value set in the radio wave detection counter is 3 or more, Therefore, if the process is shifted to step S153 and it is determined that it is not 3 or more, radio waves have been detected once or twice in succession by chattering, etc., or radio waves have been detected. Therefore, the process proceeds to step S154.

  In step S153, the main CPU 60 sets a predetermined period Xms in the all winning invalid period timer. In this processing, the main CPU 60 determines that the radio wave has been received in response to the radio wave sensor 500 detecting the radio wave three times or more, and the radio wave sensor 500 is turned off (the radio wave sensor 500 is Therefore, it is determined that the radio wave has ended, and a predetermined period X is set in the all winning invalid period timer as the all winning invalid period. When this process ends, the main CPU 60 shifts the process to step S154.

  In step S154, the main CPU 60 performs radio wave detection counter clear processing. In this process, the main CPU 60 clears the value set in the radio wave detection counter and prepares for the next radio wave detection process. When this process ends, the main CPU 60 ends this subroutine.

[Winning detection deletion process]
FIG. 20 is a diagram for explaining the details of the winning detection deletion process (FIG. 16, step S108) performed in the timer interrupt process.

  In step S161, the main CPU 60 determines whether or not the all winning invalid flag is ON. In this process, the main CPU 60 determines whether or not the all winning invalid flag is ON, and if it is determined that the all winning invalid flag is ON, the main CPU 60 shifts the process to step S162 and sets the all winning invalid flag. If it is determined that it is not ON, this subroutine is terminated.

  In step S162, the main CPU 60 performs a winning detection counter clear process. In this process, the main CPU 60 clears the values set in all the winning detection counters to 0, thereby invalidating the winnings detected by the respective elements constituting the winning detecting means in the all winning invalid state. When this process ends, the main CPU 60 ends this subroutine.

[Special design related switch check processing]
FIG. 21 is a diagram for explaining the details of the special symbol related switch check process (FIG. 16, step S109) performed in the timer interrupt process.

  In step S171, the main CPU 60 performs a process of determining whether or not a start winning for the first start port 34 has been detected. In this process, the main CPU 60 determines whether or not the bit corresponding to the first start port 34 of the winning detection counter is 1 (ON), and the bit corresponding to the first start port 34 of the winning detection counter is 1. If it is determined that the bit corresponding to the first start port 34 of the winning detection counter is not 1, the process proceeds to step S178.

  In step S172, the main CPU 60 performs a process of determining whether or not the start memory of the first special symbol is 4 or more. In this process, the main CPU 60 determines whether or not the start memory of the first special symbol, that is, the number of holds is 4 or more. If it is determined that the reserved number is 4 or more, the process proceeds to step S178. If it is determined that the reserved number is not 4 or more, the process proceeds to step S173.

  In step S173, the main CPU 60 performs a process of adding 1 to the start memory of the first special symbol. In this process, the main CPU 60 performs a process of adding 1 to the value of the number of reserved first symbol symbols stored in the main RAM 62. When this process ends, the main CPU 60 shifts the process to step S174.

  In step S174, the main CPU 60 performs various random value acquisition processes. In this process, the main CPU 60 extracts a jackpot determination random number value for the special symbol game from the jackpot determination random number counter (so-called special symbol lottery), and further outputs the jackpot symbol determination random number value from the jackpot symbol determination random number counter. Extraction is performed, and the effect condition determination random number value is extracted from the effect condition determination random number counter, and stored in the first special symbol start storage area of the main RAM 62. When this process ends, the main CPU 60 shifts the process to step S175.

  In this embodiment, the first special symbol start storage area (0) to the first special symbol start storage area (4) is the first special symbol start storage area (0). The determination result based on the hit determination random number stored in) is derived and displayed by a special symbol, and various random numbers acquired by winning a start during the variation of the special symbol are stored in the first special symbol start storage area (1 ) To the first special symbol start storage area (4).

  In step S175, the main CPU 60 performs processing for setting the first special symbol variation state data. In this process, the main CPU 60 performs a process of setting the first special symbol variation state data in a predetermined area of the main RAM 62. When this process ends, the main CPU 60 shifts the process to step S176.

  In step S176, the main CPU 60 performs a winning effect determination process. In this process, the main CPU 60 determines whether or not to win a prize based on random lottery. When this process ends, the main CPU 60 shifts the process to step S177.

  In step S <b> 177, the main CPU 60 sets a start winning command in a predetermined area of the main RAM 62. The start winning command is supplied from the main CPU 60 of the main control circuit 6 to the sub CPU 71 of the sub control circuit 7 so that the sub control circuit 7 recognizes that there has been a start winning or that the winning lottery result is correct. Become.

  The data of the start winning command includes data for executing an effect such as changing the display mode of the reserved ball that is displayed as a winning effect when it is determined that the winning effect is determined in the process of step S176.

  As a result, a so-called “prefetching effect” in which an effect is executed based on the start-up memory information before the change is executed becomes possible. When the process of step S177 is completed, the main CPU 60 shifts the process to step S178.

  In step S178, the main CPU 60 performs a process of determining whether or not a winning at the first big winning opening 39 is detected. In this process, the main CPU 60 determines whether or not the bit corresponding to the first large winning opening 39 of the winning detection counter is 1 (ON), and the bit corresponding to the first large winning opening 39 of the winning detection counter. Is determined to be 1, the process proceeds to step S179, and if it is determined that the bit corresponding to the first big prize opening 39 of the winning detection counter is not 1, the process proceeds to step S187.

  In step S179, the main CPU 60 performs a process of adding 1 to the value of the first big prize opening winning counter. In this process, the main CPU 60 determines whether or not the upper limit number of game balls in one round game has won the first big prize opening 39 when executing a round game that opens the first big prize opening 39. When determining, 1 is added to the value of the first grand prize winning prize counter. When this process ends, the main CPU 60 shifts the process to step S180.

  In step S180, the main CPU 60 performs a process of subtracting 1 from the value of the first illegal winning counter. In this process, the main CPU 60 subtracts 1 from the value of the first illegal winning counter that becomes a reference when determining whether or not there is an illegal winning in the first big winning opening 39. When this process ends, the main CPU 60 shifts the process to step S181.

  In step S181, the main CPU 60 performs a process of determining whether or not the value of the first illegal winning counter is zero. In this process, when the main CPU 60 determines that the value of the first illegal prize counter is 0, the main CPU 60 determines that there is an illegal prize in the first big prize opening 39, and moves the process to step S182. If it is determined that the value of the 1 illegal winning counter is not 0, it is determined that there is no illegal winning in the first big winning opening 39, and the process proceeds to step S187.

  In step S <b> 182, the main CPU 60 performs a special winning opening illegal prize command setting process. In this processing, the main CPU 60 transmits the big prize port illegal prize command from the command output port 65 to the command input port 70, and the sub-control circuit 7 performs illegal notification so that the main prize prize illegal prize command is the main. Set in a predetermined area of the RAM 62. When this process ends, the main CPU 60 shifts the process to step S183.

  In step S183, the main CPU 60 performs a process of setting the value of the first illegal winning counter to 1. In this process, the main CPU 60 determines that all winnings with respect to the first big winning opening 39 are illegal until a new value is set in the first illegal winning counter as the new round game is executed. It becomes like this. When this process ends, the main CPU 60 shifts the process to step S184.

  In step S184, the main CPU 60 determines whether or not the control state flag corresponding to each step in the special symbol control process (FIG. 12, step S47) performed in the main process is 04H.

  Although the control state flag will be described later, the fact that the control state flag is 04H indicates that the big prize opening is open, that is, the first or second big prize opening 39, 40 is in the open state. In step S184, if the main CPU 60 determines that the control state flag is 04H, the main CPU 60 determines that there has been an illegal prize when the first or second big prize opening 39, 40 is in the open state. If the process proceeds to S187 and it is determined that the control state flag is not 04H, it is determined that there is an illegal winning when neither of the first or second big winning openings 39 and 40 is in the open state, and step S185 is performed. Move processing to.

  In step S185, the main CPU 60 performs processing for determining whether or not the value of the residual sphere monitoring timer is zero. In this process, the main CPU 60 determines whether or not there is an illegal winning in the residual ball monitoring period for the first or second big prize opening 39, 40, and the value of the residual ball monitoring timer is 0. If it is determined, it is determined that there has been no illegal winning in the residual sphere monitoring period, and the process proceeds to step S187. If it is determined that the value of the residual sphere monitoring timer is not 0, an invalid value is detected in the residual sphere monitoring period. It is determined that there is a winning, and the process proceeds to step S186.

  In step S186, the main CPU 60 performs a process of clearing the first big prize opening winning detection information. In this process, the main CPU 60 resets the bit corresponding to the first big winning opening 39 of the winning detection counter to 0 (OFF), and moves the process to step S187.

  In step S187, the main CPU 60 performs a process of determining whether or not the start winning to the second big winning opening 40 is detected. In this process, the main CPU 60 determines whether or not the bit corresponding to the second large winning opening 40 of the winning detection counter is 1 (ON), and the bit corresponding to the second large winning opening 40 of the winning detection counter. Is determined to be 1, the process proceeds to step S188, and if it is determined that the bit corresponding to the second big prize opening 40 of the winning detection counter is not 1, this subroutine is terminated.

  In step S188, the main CPU 60 performs a process of adding 1 to the value of the second big prize opening winning counter. In this process, when the main CPU 60 executes a round game that opens the second grand prize opening 40, the main CPU 60 determines whether or not the upper limit number of game balls in one round game has won the second big prize opening 40. When the determination is made, 1 is added to the value of the second grand prize winning prize counter which becomes the reference. When this process ends, the main CPU 60 shifts the process to step S189.

  In step S189, the main CPU 60 performs a process of subtracting 1 from the second illegal winning counter. In this process, the main CPU 60 subtracts 1 from the value of the second illegal winning counter that becomes a reference when determining whether or not there is an illegal winning in the second big winning opening 40. When this process ends, the main CPU 60 shifts the process to step S190.

  In step S190, the main CPU 60 performs a process of determining whether or not the value of the second illegal winning counter is zero. In this process, if the main CPU 60 determines that the value of the second illegal prize counter is 0, the main CPU 60 determines that there is an illegal prize in the second big prize opening 40, and moves on to step S191. If it is determined that the value of the 2 illegal winning counter is not 0, it is determined that there is no illegal winning in the second big winning opening 40, and this subroutine is terminated.

  In step S191, the main CPU 60 performs a special winning opening illegal prize command setting process. In this processing, the main CPU 60 transmits the big prize port illegal prize command from the command output port 65 to the command input port 70, and the sub-control circuit 7 performs illegal notification so that the main prize prize illegal prize command is the main. Set in a predetermined area of the RAM 62. When this process ends, the main CPU 60 shifts the process to step S192.

  In step S192, the main CPU 60 performs processing for setting the value of the second illegal winning counter to 1. In this process, the main CPU 60 determines that all winnings for the second big winning opening 40 are illegal until a new value is set in the second illegal winning counter as a result of newly executing the round game. It becomes like this. When this process ends, the main CPU 60 shifts the process to step S193.

  In step S193, the main CPU 60 determines whether or not the control state flag corresponding to each step in the special symbol control process performed in the main process is 04H. In this process, if the main CPU 60 determines that the control state flag is 04H, the main CPU 60 determines that there has been an illegal prize when the first or second big prize opening 39, 40 is in the open state. When the subroutine is finished and it is determined that the control state flag is not 04H, it is determined that there has been an illegal winning when neither of the first or second big winning openings 39, 40 is in the open state, and the process goes to step S194. Move processing.

  In step S194, the main CPU 60 performs processing for determining whether or not the value of the residual sphere monitoring timer is zero. In this process, the main CPU 60 determines whether or not there is an illegal winning in the residual ball monitoring period for the first or second big prize opening 39, 40, and the value of the residual ball monitoring timer is 0. If it is determined, it is determined that there has been no illegal winning in the residual sphere monitoring period, and this subroutine is terminated. If it is determined that the value of the residual sphere monitoring timer is not 0, an illegal winning is made in the residual sphere monitoring period. Is determined, and the process proceeds to step S195.

  In step S195, the main CPU 60 performs processing for clearing the second big prize opening winning detection information. In this processing, the main CPU 60 resets the bit corresponding to the second large winning opening 40 of the winning detection counter to 0 (OFF), and ends this subroutine.

[Normal design related switch check processing]
FIG. 22 is a diagram for explaining the details of the normal symbol related switch check process (FIG. 16, step S110) performed in the timer interrupt process.

  In step S <b> 201, the main CPU 60 performs a process of determining whether or not a start winning for the second start opening 35 has been detected. In this process, the main CPU 60 determines whether or not the bit corresponding to the second starting port 35 of the winning detection counter is 1 (ON), and the bit corresponding to the second starting port 35 of the winning detection counter is 1. If it is determined that the bit corresponding to the second start port 35 of the winning detection counter is not 1, the process proceeds to step S208.

  In step S202, the main CPU 60 performs a process of determining whether or not the start memory of the second special symbol is 4 or more. In this process, the main CPU 60 determines whether or not the second special symbol is started and stored, that is, the number of holds is 4 or more.

  If the main CPU 60 determines that the number of holds is 4 or more, it moves the process to step S208, and if it determines that the number of holds is not 4 or more, it moves the process to step S203.

  In step S203, the main CPU 60 performs a process of adding 1 to the start memory of the second special symbol. In this process, the main CPU 60 performs a process of adding 1 to the value of the number of reserved symbols in the second special symbol stored in the main RAM 62. When this process ends, the main CPU 60 shifts the process to step S204.

  In step S204, the main CPU 60 performs various random value acquisition processes. In this process, the main CPU 60 extracts a jackpot determination random number value for the special symbol game from the jackpot determination random number counter (so-called special symbol lottery), and further outputs the jackpot symbol determination random number value from the jackpot symbol determination random number counter. A process for extracting and extracting a rendering condition determination random value from the rendering condition determination random number counter and storing it in the second special symbol start storage area of the main RAM 62 is performed. When this process ends, the main CPU 60 shifts the process to step S205.

  In the present embodiment, the second special symbol start storage area (2) is the second special symbol start storage area (0) to the second special symbol start storage area (4). The determination result based on the random number for hit determination stored in () is derived and displayed by a special symbol, and various random number values obtained by winning a start during the variation of the special symbol are stored in the second special symbol start storage area (1 ) To second special symbol start storage area (4).

  In step S205, the main CPU 60 performs processing for setting the second special symbol variation state data. In this process, the main CPU 60 performs a process of setting the second special symbol variation state data in a predetermined area of the main RAM 62. When this process ends, the main CPU 60 shifts the process to step S206.

  In step S206, the main CPU 60 performs a winning effect determination process. In this process, the main CPU 60 determines whether or not to win a prize based on random lottery. When this process ends, the main CPU 60 shifts the process to step S207.

  In step S <b> 207, the main CPU 60 sets a start winning command in a predetermined area of the main RAM 62. The start winning command is supplied from the main CPU 60 of the main control circuit 6 to the sub CPU 71 of the sub control circuit 7 so that the sub control circuit 7 recognizes that there has been a start winning or that the winning lottery result is correct. Become.

  The data of the start winning command includes data for executing an effect such as changing the display mode of the reserved ball that is displayed as a winning effect when it is determined that the winning effect is determined in the process of step S206.

  As a result, a so-called “prefetching effect” in which an effect is executed based on the start-up memory information before the change is executed becomes possible. When the process of step S207 is completed, the main CPU 60 shifts the process to step S208.

  In step S208, the main CPU 60 performs a process of determining whether or not a start winning for the passing gate 36 has been detected. In this process, the main CPU 60 determines whether or not the bit corresponding to the passing gate 36 of the winning detection counter is 1 (ON), and determines that the bit corresponding to the passing gate 36 of the winning detection counter is 1. If so, the process proceeds to step S209. If it is determined that the bit corresponding to the pass gate 36 of the winning detection counter is not 1, this subroutine is terminated.

  In step S209, the main CPU 60 performs a process of determining whether or not the normal symbol start-up memory is 4 or more. In this process, the main CPU 60 determines whether or not the normal symbol start-up storage, that is, the number of holds is 4 or more. If the main CPU 60 determines that the number of holds is 4 or more, the main CPU 60 ends the present subroutine. If the main CPU 60 determines that the number of holds is not 4 or more, the main CPU 60 shifts the processing to step S210.

  In step S210, the main CPU 60 performs a process of adding 1 to the normal symbol start memory. In this process, the main CPU 60 performs a process of adding 1 to the value of the number of reserved normal symbols stored in the main RAM 62. When this process ends, the main CPU 60 shifts the process to step S211.

  In step S211, the main CPU 60 performs various random value acquisition processes. In this process, the main CPU 60 extracts a random number value for hit determination of the normal symbol game from the normal symbol determination random number counter (so-called normal symbol lottery). When this process ends, the main CPU 60 ends this subroutine.

[Payout control processing]
FIG. 23 is a diagram for explaining the details of the payout control process (FIG. 16, step S111) performed in the timer interrupt process.

  In step S221, the main CPU 60 determines whether or not the first start port 34 has detected a winning. In this process, the main CPU 60 determines whether or not the bit corresponding to the first start port 34 of the winning detection counter is 1 (ON), and the bit corresponding to the first start port 34 of the winning detection counter is 1. If it is determined that the bit corresponding to the first start port 34 of the winning detection counter is not 1, the process proceeds to step S223.

  In step S222, the main CPU 60 performs a first start opening prize ball command set process. In this process, the main CPU 60 sets a prize ball command (for example, a command indicating 3-ball payout) corresponding to the first start port 34. When this process ends, the main CPU 60 shifts the process to step S223.

  In step S223, the main CPU 60 determines whether or not the second start port 35 has detected a winning. In this process, the main CPU 60 determines whether or not the bit corresponding to the second starting port 35 of the winning detection counter is 1 (ON), and the bit corresponding to the second starting port 35 of the winning detection counter is 1. If it is determined that the bit corresponding to the second start port 35 of the winning detection counter is not 1, the process proceeds to step S225.

  In step S224, the main CPU 60 performs a second start opening prize ball command set process. In this process, the main CPU 60 sets a prize ball command corresponding to the second start port 35 in a predetermined area of the main RAM 62. When this process ends, the main CPU 60 shifts the process to step S225.

  In step S225, the main CPU 60 determines whether or not the first general winning opening 43 has detected a winning. In this process, the main CPU 60 determines whether or not the bit corresponding to the first general winning opening 43 of the winning detection counter is 1 (ON), and the bit corresponding to the first general winning opening 43 of the winning detection counter. Is determined to be 1, the process proceeds to step S226. If it is determined that the bit corresponding to the first general winning port 43 of the winning detection counter is not 1, the process proceeds to step S227.

  In step S226, the main CPU 60 performs a first general winning opening prize ball command set process. In this process, the main CPU 60 sets a prize ball command corresponding to the first general winning opening 43 in a predetermined area of the main RAM 62. When this process ends, the main CPU 60 shifts the process to step S227.

  In step S227, the main CPU 60 determines whether or not the second general winning opening 44 has detected a winning. In this process, the main CPU 60 determines whether or not the bit corresponding to the second general winning opening 44 of the winning detection counter is 1 (ON), and the bit corresponding to the second general winning opening 44 of the winning detection counter. Is determined to be 1, the process proceeds to step S228. If it is determined that the bit corresponding to the second general winning port 44 of the winning detection counter is not 1, the process proceeds to step S229.

  In step S228, the main CPU 60 performs a second general winning opening prize ball command set process. In this process, the main CPU 60 sets a prize ball command corresponding to the second general winning opening 44 in a predetermined area of the main RAM 62. When this process ends, the main CPU 60 shifts the process to step S229.

  In step S229, the main CPU 60 determines whether or not the first big prize opening 39 has detected a winning. In this process, the main CPU 60 determines whether or not the bit corresponding to the first large winning opening 39 of the winning detection counter is 1 (ON), and the bit corresponding to the first large winning opening 39 of the winning detection counter. If it is determined that is 1, the process proceeds to step S230, and if it is determined that the bit corresponding to the first big prize opening 39 of the winning detection counter is not 1, the process proceeds to step S231.

  In step S230, the main CPU 60 performs a first big prize winning ball command set process. In this process, the main CPU 60 sets a prize ball command corresponding to the first big winning opening 39 in a predetermined area of the main RAM 62. When this process ends, the main CPU 60 shifts the process to step S231.

  In step S231, the main CPU 60 determines whether or not the second big prize opening 40 has detected a winning. In this process, the main CPU 60 determines whether or not the bit corresponding to the second large winning opening 40 of the winning detection counter is 1 (ON), and the bit corresponding to the second large winning opening 40 of the winning detection counter. Is determined to be 1, the process proceeds to step S232, and when it is determined that the bit corresponding to the second big prize opening 40 of the winning detection counter is not 1, the process proceeds to step S233.

  In step S232, the main CPU 60 performs a second grand prize winning ball command set process. In this process, the main CPU 60 sets a prize ball command corresponding to the second big prize opening 40 in a predetermined area of the main RAM 62. When this process ends, the main CPU 60 shifts the process to step S233.

  In step S233, the main CPU 60 performs a process of outputting the set prize ball command. In this processing, the main CPU 60 outputs the set prize ball command to the payout / firing control circuit 82. When this process ends, the main CPU 60 shifts the process to step S234.

  In step S234, the main CPU 60 performs a process of clearing the winning detection information of each winning opening and the passing gate 36. In this process, the main CPU 60 sets bits corresponding to the respective elements constituting the winning detection means set in the winning detection counter to 0 (OFF). When this process ends, the main CPU 60 ends this subroutine.

[Command transmission control processing]
FIG. 24 is a diagram for explaining the details of the command transmission control process (FIG. 16, step S112) performed in the timer interrupt process.

  In step S241, the main CPU 60 determines whether or not a radio wave detection command is set. In this process, the main CPU 60 determines whether or not the radio wave detection command is set. If it is determined that the radio wave detection command is set, the main CPU 60 moves the process to step S242 and sets the radio wave detection command. If it is determined that it is not, the process proceeds to step S244.

  In step S242, the main CPU 60 performs radio wave detection command transmission processing. In this process, the main CPU 60 transmits a radio wave detection command from the command output port 65 to the command input port 70 of the sub control circuit 7. When this process ends, the main CPU 60 shifts the process to step S243.

  In step S243, the main CPU 60 performs processing for turning on the radio wave detection command transmission flag. In this process, the main CPU 60 sets a radio wave detection command transmission flag when the command output port 65 transmits a radio wave detection command. When this process ends, the main CPU 60 shifts the process to step S244.

  In step S244, the main CPU 60 determines whether or not the big prize opening illegal prize command is set. In this process, the main CPU 60 determines whether or not the big prize mouth illegal prize command is set, and if it is judged that the big prize mouth illegal prize command is set, the process shifts to step S245, If it is determined that the large winning opening illegal prize command is not set, the process proceeds to step S247.

  In step S245, the main CPU 60 performs a large winning opening illegal prize command transmission process. In this process, the main CPU 60 transmits a large winning opening illegal prize command from the command output port 65 to the command input port 70 of the sub-control circuit 7. When this process ends, the main CPU 60 shifts the process to step S246.

  In step S246, the main CPU 60 performs a process of turning on the big prize opening illegal prize command transmission flag. In this process, the main CPU 60 sets a large winning opening illegal prize command transmission flag when the command output port 65 transmits an illegal big opening prize winning command. When this process ends, the main CPU 60 shifts the process to step S247.

  In step S247, the main CPU 60 determines whether another command is set. In this processing, the main CPU 60 determines whether or not a command other than the radio wave detection command such as the start winning command and each prize ball command and the big prize opening illegal prize command is set, and the radio detection command and the big prize opening illegality are determined. If it is determined that a command other than the winning command is set, the process proceeds to step S248, and if it is determined that a command other than the radio wave detection command and the big winning mouth illegal winning command is not set, Exit the subroutine.

  In step S248, the main CPU 60 performs transmission processing for the set command. In this process, the main CPU 60 transmits a set command other than the radio wave detection command and the big prize opening illegal prize command from the command output port 65 to the command input port 70 of the sub-control circuit 7. When this process ends, the main CPU 60 ends this subroutine.

[Special symbol control processing]
FIG. 25 is a diagram for explaining the details of the special symbol control process (FIG. 12, step S47) performed in the main process. In FIG. 25, the numerical values drawn from step S252 to step S259 indicate control state flags corresponding to those steps, and are stored in a storage area functioning as a control state flag in the main RAM 62.

  The main CPU 60 executes one step corresponding to the numerical value of the control state flag stored in the main RAM 62, and the special symbol game proceeds.

  First, in step S251, the main CPU 60 executes processing for loading a control state flag. In this process, the main CPU 60 reads the control state flag. When this process ends, the main CPU 60 shifts the process to step S252.

  In step S252 to step S259 described later, the main CPU 60 determines whether or not to execute various processes in each step based on the value of the control state flag.

  This control state flag indicates the state of the game of the special symbol game, and enables one of the processes in steps S252 to S259 to be executed. In addition, the main CPU 60 executes processing in each step at a predetermined timing determined in accordance with a waiting time timer set for each step.

  Before reaching the predetermined timing, the main CPU 60 ends without executing the processing in each step, and executes another subroutine. The main CPU 60 also executes a system timer interrupt process at a predetermined cycle.

  In step S252, the main CPU 60 executes a special symbol storage check process. Details of step S252 will be described later. When this process ends, the main CPU 60 shifts the process to step S253.

  In step S253, the main CPU 60 executes a special symbol variation time management process. In this process, the main CPU 60 sets the control state flag to a value (01H) indicating special symbol variation time management, and when the variation time has elapsed, sets the value (02H) indicating special symbol display time management to the control state flag. Set the waiting time after confirmation (for example, 600 ms) in the waiting time timer.

  That is, the main CPU 60 performs setting so as to execute the process of step S254 after the waiting time after determination has elapsed. When this process ends, the main CPU 60 shifts the process to step S254.

  In step S254, the main CPU 60 executes a special symbol display time management process. In this process, the main CPU 60 determines whether the control state flag is a value (02H) indicating the special symbol display time management, and if the waiting time after determination has passed, it is a hit (big hit or small hit).

  If the main CPU 60 determines that it is a win, it sets a value (03H) indicating hit start interval management in the control state flag, and sets, for example, 5000 ms as the length of the hit start interval in the waiting time timer. That is, the main CPU 60 sets the process of step S255 to be executed after the hit start interval has elapsed.

  On the other hand, when the main CPU 60 determines that it is not a win, it sets a value (07H) indicating the end of the special symbol game. That is, the main CPU 60 is set to execute the process of step S259. When this process ends, the main CPU 60 shifts the process to step S255.

  In step S255, the main CPU 60 executes a hit start interval management process. In this process, the main CPU 60 has a value (03H) indicating the hit start interval management in the control status flag, and when the time corresponding to the hit start interval has elapsed, the main CPU 60 reads the first big prize read from the main ROM 61. Data for opening the mouth 39 or the second grand prize winning opening 40 is stored in the main RAM 62.

  Then, in the process of step S93 in FIG. 15, the main CPU 60 reads out data for opening the first big prize opening 39 or the second big prize opening 40 stored in the main RAM 62, and the first big prize opening 39 or A signal for opening the second grand prize opening 40 is supplied to the first big prize opening solenoid 410 or the second big prize opening solenoid 420. In this way, the main CPU 60 or the like performs opening / closing control of the first big prize opening 39 or the second big prize opening 40.

  That is, a predetermined advantageous gaming state (the first grand prize winning port 39 or the second grand prize winning port 40 is difficult to accept the game ball from the open state in which the first grand prize winning port 39 or the second grand prize winning port 40 is easy to accept the game ball. (A game state up to the closed state) is provided a big hit game in which one round game is repeated 16 rounds, or a small hit game in which the first big prize opening 39 or the second big prize opening 40 is opened 16 times or twice. Will be.

  Further, the main CPU 60 sets a value (04H) indicating that the special winning opening is open in the control state flag, and sets the upper opening limit time (for example, about 0.1 seconds or about 25 seconds) to the special winning opening opening time timer. set. That is, the main CPU 60 is set to execute the process of step S257. When this process ends, the main CPU 60 shifts the process to step S256.

  In step S256, the main CPU 60 executes a waiting time management process before reopening the big winning opening. In this process, the main CPU 60 determines that the control status flag is a value (05H) indicating the waiting time management before reopening of the big winning opening and the time corresponding to the interval between rounds has elapsed, The memory is updated so that the value increases by one.

  The main CPU 60 sets a value (04H) indicating that the special winning opening is open in the control state flag. The main CPU 60 sets the opening upper limit time (for example, about 0.1 second or about 25 seconds) in the big prize opening time timer. That is, it sets so that the process of step S257 may be performed. When this process ends, the main CPU 60 shifts the process to step S257.

  In step S257, the main CPU 60 executes a special winning opening opening process. In this process, when the control state flag is a value (04H) indicating that the big prize opening is open, the value of the first or second big prize winning prize counter is the upper limit winning number (in this embodiment). 7) It is determined whether or not any of the condition that it is equal to or greater than the above condition, or the condition that the upper limit time limit has elapsed (the value of the big prize opening time timer is 0) is satisfied.

  When the main CPU 60 determines that any one of the conditions is satisfied, the main CPU 60 updates a variable positioned in the main RAM 62 in order to close the first big prize opening 39 or the second big prize opening 40. Then, it is determined whether or not a condition that the value of the special winning opening opening number counter is equal to or greater than the maximum winning opening open number (the final round) is satisfied.

  The main CPU 60 sets the value (06H) indicating the hit end interval in the control state flag when it is the final round, and the value (05H) indicating the waiting time management before reopening the big winning opening when it is not the final round. Is set in the control status flag. When this process ends, the main CPU 60 shifts the process to step S258.

  In step S258, the main CPU 60 executes a hit end interval process. In this process, the main CPU 60 sets the value (07H) indicating the end of the special symbol game to the control state when the control state flag is a value (06H) indicating the hit end interval and the time corresponding to the hit end interval has elapsed. Set to flag. That is, the main CPU 60 is set to execute the process of step S259. When this process ends, the main CPU 60 shifts the process to step S259.

  In step S259, the main CPU 60 executes a special symbol game end process. In this process, the main CPU 60 sets a value (00H) indicating a special symbol storage check when the control state flag is a value (07H) indicating the end of the special symbol game. That is, the main CPU 60 is set to execute the process of step S252. When this process ends, the main CPU 60 ends this subroutine.

  As described above, the special symbol game is executed by setting the control state flag. Specifically, the main CPU 60 sets the control status flag to “00H”, “01H”, “02H”, or “07H” when the hit determination result is lost in the case of not being in the big hit or small hit gaming state. By setting in order, the processing of step S252, step S253, step S254, and step S259 shown in FIG. 25 is executed at a predetermined timing.

  Further, when the main CPU 60 is not in the big hit or small hit gaming state, the main CPU 60 sets the control status flag to “00H”, “01H”, “02H” when the result of the hit determination is a big hit or a small hit. By setting in order, the processing of step S252, step S253, and step S254 shown in FIG. 25 is executed at a predetermined timing, and control to the big hit or small hit gaming state is executed.

  Furthermore, when the control to the big hit or the small hit gaming state is executed, the main CPU 60 sets the control state flags in the order of “03H”, “04H”, and “05H”, as shown in FIG. The processing of step S255, step S257, and step S256 is executed at a predetermined timing, and a big hit or small hit game is executed.

  Further, the main CPU 60 sets “04H”, “06H”, and “07H” in this order when the big hit or small hit game ending conditions are satisfied, thereby performing steps S256 and S258 shown in FIG. The process of S259 is executed at a predetermined timing, and the big hit or the small hit game is ended.

[Special symbol memory check processing]
FIG. 26 is a diagram for explaining the details of the special symbol storage check process (FIG. 25, step S252) performed in the special symbol control process.

  In step S261, the main CPU 60 performs a process of determining whether or not the control state flag is a value (00H) indicating a special symbol storage check. In this process, if the main CPU 60 determines that the control state flag is a value indicating a special symbol storage check, it moves the process to step S262. On the other hand, if the main CPU 60 determines that the control state flag is not a value indicating the special symbol storage check, the main CPU 60 ends the present subroutine.

  In step S262, the main CPU 60 performs a process of determining whether or not there is a start memory. In this process, the main CPU 60 determines that there is no special symbol game start memory, that is, the first special symbol start memory area (0) to the first special symbol start memory area (4) or the second special symbol start memory. If no data is stored in the area (0) to the second special symbol start storage area (4), the process proceeds to step S263. On the other hand, if the main CPU 60 determines that there is a start-up memory, it moves the process to step S264.

  In step S263, the main CPU 60 performs a demo display process. In this process, the main CPU 60 performs a process of setting a demonstration display permission value in the main RAM 62. Further, the main CPU 60 determines that the state in which the special symbol game start memory (the first special symbol start memory area and the second special symbol start memory area in which the random number value for hit determination is stored) has become 0 (for example, 30 seconds), a value for permitting execution of the demonstration display is set in the main RAM 62 as the demonstration display permission value.

  Then, the main CPU 60 performs processing for setting demo display command data when the demo display permission value is a predetermined value. The demo display command data stored in this way is supplied as a demo display command from the main CPU 60 of the main control circuit 6 to the sub CPU 71 of the sub control circuit 7. Thus, the demonstration display is executed by the liquid crystal display device 13 in the sub control circuit 7. When this process ends, the main CPU 60 ends this subroutine.

  In step S264, the main CPU 60 performs a process of determining whether or not the start memory corresponding to the second special symbol is zero. In this process, the main CPU 60 determines the presence / absence of data in the second special symbol start storage area (0) to the second special symbol start storage area (4), and the start memory corresponding to the second special symbol start storage area is zero. That is, if it is determined that no data is stored in the second special symbol start storage area (0) to the second special symbol start storage area (4), the process proceeds to step S265.

  On the other hand, in the main CPU 60, the start memory corresponding to the second special symbol is not 0, that is, data is stored in any of the second special symbol start storage area (0) to the second special symbol start storage area (4). If it is determined that it is, the process proceeds to step S266.

  In step S <b> 265, the main CPU 60 executes a process of setting a value (02H) indicating the variation of the second special symbol as a variation state number in a predetermined area of the main RAM 62. When this process ends, the main CPU 60 shifts the process to step S267.

  In step S266, the main CPU 60 executes a process of setting a value (01H) indicating the fluctuation of the first special symbol as a fluctuation state number in a predetermined area of the main RAM 62. When this process ends, the main CPU 60 shifts the process to step S267.

  In step S267, the main CPU 60 executes a process of setting a value (01H) indicating special symbol variation time management as a control state flag. When this process ends, the main CPU 60 shifts the process to step S268.

  In step S268, the main CPU 60 executes special symbol memory transfer processing. In this process, when the special symbol to be variably displayed is the first special symbol, the main CPU 60 converts each of the data from the first special symbol start storage area (1) to the first special symbol start storage area (4) to the first special symbol. A process of shifting (storing) from the special symbol start storage area (0) to the first special symbol start storage area (3), and when the special symbol to be variably displayed is the second special symbol, the second special symbol start storage area A process of shifting (storing) each of the data in (1) to the second special symbol start storage area (4) from the second special symbol start storage area (0) to the second special symbol start storage area (3) is executed. To do. When this process ends, the main CPU 60 shifts the process to step S269.

  In step S269, the main CPU 60 executes a big hit determination process. In this processing, the main CPU 60 reads out the high probability flag, and selects one hit determination table from a plurality of hit determination tables having different numbers of determination values (hit determination values) that are big hits based on the read high probability flag. To do.

  That is, when the high probability flag is a predetermined value, the high probability hit determination table with a large number of jackpot determination values is referenced, and when the high probability flag is not a predetermined value, the normal hit with a small jackpot determination value is small. A judgment table is referred to. As described above, when the gaming state flag has a predetermined value, that is, when the gaming state is in a high probability state (probability variation state), the probability of shifting to the big hit gaming state is higher than normal.

  Then, the main CPU 60 extracts a random number value for determining the hit of the special symbol start storage area previously extracted in the first special symbol start storage area (0) and the second special symbol start storage area (0). And the selected hit determination table.

  Then, the main CPU 60 determines that it is a big hit when the random number for hit determination and the big hit determination value match. That is, the main CPU 60 performs a process of determining whether or not to enter a big hit gaming state advantageous to the player. When this process ends, the main CPU 60 shifts the process to step S270.

  In step S270, the main CPU 60 executes a small hit determination process. This small hit determination process is executed when the main CPU 60 determines that the big hit is not a big hit in the big hit determination process in step S269.

  In this process, the main CPU 60 pre-sets the hit determination random number value of the special symbol start storage area previously set in the first special symbol start storage area (0) and the second special symbol start storage area (0). It is determined whether or not the small hit judgment value is matched, if the random number value for hit judgment and the small hit judgment value match, it is determined that it is a small hit, and if it does not match, Judged to be lost.

  Note that the small hit probability due to winning in the first start opening 34 of the normal game may be larger or smaller than the small hit probability due to winning in the second start opening 35. Similarly, the jackpot probability due to winning at the first start port 34 of the normal game may be larger or smaller than the jackpot probability due to winning at the second start port 35.

  As described above, the process of steps S269 and S270 determines one of big hit, small hit and lost as a result of the special symbol game. When this process ends, the main CPU 60 shifts the process to step S271.

  In step S271, the main CPU 60 executes a special symbol determination process. In this process, the main CPU 60 determines a big hit symbol when the hit determination result is a big hit, determines a small hit symbol when the hit determination result is a small hit, and is not a big hit or a small hit, that is, loses. In the case of, a process of determining a lost symbol is performed. When this process ends, the main CPU 60 shifts the process to step S272.

  In step S272, the main CPU 60 executes special symbol variation pattern determination processing. In this process, the main CPU 60 creates a variation pattern determination table for determining a special symbol variation pattern based on the special symbol determined in step S271 and the result of the hit determination determined in step S269. select. Then, the main CPU 60 determines a variation pattern based on the rendering condition determination random number extracted from the rendering condition determination random number counter and the selected variation pattern determination table, and stores it in a predetermined area of the main RAM 62. The main CPU 60 determines the variation display mode of the special symbol in the first special symbol display unit 52 or the second special symbol display unit 53 based on the data indicating such a variation pattern.

  Data indicating the variation pattern stored in this way is supplied to the first special symbol display unit 52 or the second special symbol display unit 53. Accordingly, the main CPU 60 causes the first special symbol display unit 52 or the second special symbol display unit 53 to display the special symbols in a variable display manner based on the determined variation pattern.

  Further, the data indicating the variation pattern stored in this way is supplied from the main CPU 60 of the main control circuit 6 to the sub CPU 71 of the sub control circuit 7 as a special figure variation pattern designation command. The sub CPU 71 of the sub control circuit 7 executes effect display according to the received special figure variation pattern designation command. When the process of step S272 ends, the main CPU 60 shifts the process to step S273.

  In step S273, the main CPU 60 performs special symbol variation time setting processing. In this process, the main CPU 60 sets a variation time corresponding to the determined special symbol variation pattern in the waiting time timer, and executes a process of clearing the storage area used for the current variation display. When this process ends, the main CPU 60 shifts the process to step S274.

  In step S274, the main CPU 60 executes processing for clearing the value of the storage area (0) used for the current variation display. When this process ends, the main CPU 60 ends this subroutine.

[Period start interval management processing]
FIG. 27 is a diagram for explaining the details of the hit start interval management process (FIG. 25, step S255) performed in the special symbol control process.

  In step S281, the main CPU 60 determines whether or not the control state flag is a value (03H) indicating hit start interval management. In this process, when the main CPU 60 determines that the control state flag is a value indicating the hit start interval management, the main CPU 60 shifts the process to step S282. On the other hand, when the main CPU 60 determines that the control state flag is not a value indicating the hit start interval management, the main CPU 60 ends the present subroutine.

  In step S282, the main CPU 60 performs processing for determining whether or not the value of the waiting time timer is zero. In this process, if the main CPU 60 determines that the value of the waiting time timer is 0, it moves the process to step S283. On the other hand, when determining that the value of the waiting time timer is not 0, the main CPU 60 ends this subroutine.

  In step S283, the main CPU 60 performs processing for setting a maximum value of the number of winning a prize opening. In this process, the main CPU 60 determines whether or not it is 16R big hit, and if it is determined that it is 16R big hit, the maximum value of the number of big winning opening is set to 15 and it is determined that it is not 16R big hit. In other words, if it is determined that 2R is a big hit, the maximum value of the number of times of winning the big prize opening is set to 2. When this process ends, the main CPU 60 shifts the process to step S284.

  In step S284, the main CPU 60 performs a process of adding 1 to the value of the special winning opening opening number counter. In this process, the main CPU 60 sets the value of the special winning opening opening number counter to 1. When this process ends, the main CPU 60 shifts the process to step S285.

  In step S285, the main CPU 60 performs a process of setting opening / closing pattern data for each round or for a small hit according to the type of the big hit symbol. In this process, the main CPU 60 sets opening / closing pattern data representing the opening / closing mode of the first shutter 41 and the second shutter 42 for each round or small hit according to the type of winning symbol in the main RAM 62. When this process ends, the main CPU 60 shifts the process to step S286.

  In step S286, the main CPU 60 performs processing for setting a display command for opening the special winning opening. In this process, the main CPU 60 sets a display command for opening the big prize opening indicating the first round in the main RAM 62. The display command for opening the big prize opening is supplied from the main CPU 60 of the main control circuit 6 to the sub CPU 71 of the sub control circuit 7. When this process ends, the main CPU 60 shifts the process to step S287.

  In step S287, the main CPU 60 performs a process of setting a value (04H) indicating that the special winning opening is open in the control state flag. When this process ends, the main CPU 60 shifts the process to step S288.

  In step S288, the main CPU 60 performs a process of clearing the big prize opening prize counter. In this process, the main CPU 60 resets the values of the first and second grand prize winning prize counters to zero. When this process ends, the main CPU 60 shifts the process to step S289.

  In step S289, the main CPU 60 performs a process of setting the value of the big winning opening opening time timer to the opening upper limit time. In this process, the main CPU 60 sets the value of the big prize opening time timer to the upper limit opening time (for example, about 0.1 second or about 25 seconds) for opening the first big prize opening 39 and the second big prize opening 40. set. When this process ends, the main CPU 60 shifts the process to step S290.

  In step S290, the main CPU 60 performs a process of setting the big prize opening opening data. When this process is finished, the main CPU 60 shifts the process to step S291.

  In step S291, the main CPU 60 sets a specific number in the first or second illegal prize counter. In the present embodiment, up to 9 balls with a margin of 2 balls, with respect to 7 balls, which is the maximum number of winnings for the first or second grand prize opening 39, 40, are illegal winnings. Not judged. Therefore, although the specific number in this Embodiment is set to 10, it should just be a value one or more larger than an upper limit prize-winning number.

  That is, the main CPU 60 sets the upper limit number of game balls determined to be normally won in one round to nine for the first or second big prize opening 39, 40 that is opened in the first round. When this process ends, the main CPU 60 ends this subroutine.

[Waiting time management process before reopening of big prize opening]
FIG. 28 is a diagram for explaining the details of the waiting time management process before the special winning opening reopening (FIG. 25, step S356) performed in the special symbol control process.

  In step S301, the main CPU 60 performs a process of determining whether or not the control state flag is a value (05H) indicating waiting time management before the big winning opening reopening. In this process, if the main CPU 60 determines that the control state flag is a value indicating waiting time management before reopening of the big winning opening, the process moves to step S302. On the other hand, when the main CPU 60 determines that the control state flag is not a value indicating the waiting time management before reopening the big winning opening, this subroutine is terminated.

  In step S302, the main CPU 60 performs a process of determining whether or not the value of the waiting time timer is zero. In this process, when the main CPU 60 determines that the value of the waiting time timer is 0, the process proceeds to step S303. On the other hand, when determining that the value of the waiting time timer is not 0, the main CPU 60 ends this subroutine.

  In step S303, the main CPU 60 performs processing for setting a maximum value of the number of times of winning a prize winning opening. In this process, the main CPU 60 determines whether or not it is 16R big hit, and if it is determined that it is 16R big hit, the maximum value of the number of big winning opening is set to 15 and it is determined that it is not 16R big hit. In other words, if it is determined that 2R is a big hit, the maximum value of the number of times of winning the big prize opening is set to 2. When this process ends, the main CPU 60 shifts the process to step S304.

  In step S304, the main CPU 60 performs a process of adding 1 to the value of the special winning opening opening number counter. In this process, the main CPU 60 sets the value of the special winning opening opening number counter to 1. When this process ends, the main CPU 60 shifts the process to step S305.

  In step S305, the main CPU 60 performs processing for setting a value (04H) indicating that the special winning opening is open to the control state flag. When this process ends, the main CPU 60 shifts the process to step S306.

  In step S306, the main CPU 60 performs a process of clearing the big prize opening prize counter. In this process, the main CPU 60 resets the values of the first and second grand prize winning prize counters to zero. When this process ends, the main CPU 60 shifts the process to step S307.

  In step S307, the main CPU 60 performs processing for setting the value of the special winning opening opening time timer to the opening upper limit time. In this process, the main CPU 60 sets the value of the big prize opening time timer to the upper limit opening time (for example, about 0.1 second or about 25 seconds) for opening the first big prize opening 39 and the second big prize opening 40. set. When this process ends, the main CPU 60 shifts the process to step S308.

  In step S <b> 308, the main CPU 60 performs a process of setting the special winning opening open data. When this process is finished, the main CPU 60 shifts the process to step S309.

  In step S309, the main CPU 60 sets a specific number in the first or second illegal prize counter. As described above, the specific number in the present embodiment is 10, but it may be a value that is one or more larger than the upper limit winning number. That is, the main CPU 60 sets the upper limit number of game balls that can be normally won in one round to the first or second big winning opening 39, 40 that is opened after the second round. When this process ends, the main CPU 60 ends this subroutine.

[Processing during the grand prize opening]
FIG. 29 is a diagram for explaining the details of the special winning opening opening process (FIG. 25, step S357) performed in the special symbol control process.

  In step S311, the main CPU 60 performs a process of determining whether or not the control state flag is a value (04H) indicating that the special winning opening is open. In this process, when the main CPU 60 determines that the control state flag is a value indicating that the big prize opening is open, the process proceeds to step S312. On the other hand, if the main CPU 60 determines that the control state flag is not a value indicating that the special winning opening is open, the present subroutine is terminated.

  In step S312, the main CPU 60 performs a process of determining whether or not the value of the big prize opening winning counter is 7 or more, which is the upper limit winning number in the present embodiment. In this process, if the main CPU 60 determines that the value of the first or second big prize opening prize counter is 7 or more, the main CPU 60 moves the process to step S315, where the first or second big prize opening prize counter is set. If it is determined that the value is not 7 or more, the process proceeds to step S313.

  In step S313, the main CPU 60 performs a big winning opening / closing process according to the set round / small opening / closing pattern. In this process, the main CPU 60 opens and closes the first shutter 41 and the second shutter 42 according to the opening / closing pattern data set in the main RAM 62 in step S385 in the hit start interval management process shown in FIG. When this process ends, the main CPU 60 shifts the process to step S314.

  In step S314, the main CPU 60 performs processing for determining whether or not the value of the waiting time timer is zero. In this process, when the main CPU 60 determines that the value of the waiting time timer is 0, the process proceeds to step S315. On the other hand, when determining that the value of the waiting time timer is not 0, the main CPU 60 ends this subroutine.

  In step S315, the main CPU 60 performs processing for setting the big prize opening closing data. In this process, the main CPU 60 sets data for closing the first big prize opening 39 or the second big prize opening 40 in the main RAM 62. When this process ends, the main CPU 60 shifts the process to step S316.

  In step S316, the main CPU 60 performs a process of determining whether or not the gaming state is a small hit gaming state. In this process, when the main CPU 60 determines that the gaming state is the small hit gaming state, the main CPU 60 moves the process to step S322, and when determining that the gaming state is not the small hit gaming state, the main CPU 60 proceeds to step S317. Move.

  In step S317, the main CPU 60 determines whether or not the value of the special winning opening opening number counter is equal to or greater than the maximum winning opening release number. In this process, if the main CPU 60 determines that the value of the big prize opening number of times counter is equal to or greater than the maximum value of the big prize opening number, the process proceeds to step S322, where the value of the big prize opening number counter is If it is determined that it is not equal to or greater than the maximum value of the number of times that the big winning opening is opened, the process proceeds to step S318.

  In step S318, the main CPU 60 performs processing for setting the length of the interval between rounds in the waiting time timer. In this process, the main CPU 60 sets, for example, 3500 ms in the waiting time timer as the length of the interval between rounds. When this process ends, the main CPU 60 shifts the process to step S319.

  In step S319, the main CPU 60 sets the length of the residual sphere monitoring period in the residual sphere monitoring timer. Here, the residual sphere monitoring period in the present embodiment is 1500 ms. When this process ends, the main CPU 60 shifts the process to step S320.

  In step S320, the main CPU 60 sets 05H to the control state flag. In this process, the main CPU 60 sets a value (05H) indicating the waiting time management before reopening the big winning opening in the control state flag. When this process ends, the main CPU 60 shifts the process to step S321.

  In step S321, the main CPU 60 performs processing for setting an inter-round display command. In this process, the main CPU 60 sets an inter-round display command in the main RAM 62. The inter-round display command is supplied from the main CPU 60 of the main control circuit 6 to the sub CPU 71 of the sub control circuit 7. When this process ends, the main CPU 60 ends this subroutine.

  In step S322, the main CPU 60 performs a process of setting the length of the hit end interval in the waiting time timer. In this process, the main CPU 60 sets, for example, 7000 ms as the length of the hit end interval in the waiting time timer. When this process ends, the main CPU 60 shifts the process to step S323.

  In step S323, the main CPU 60 sets the length of the residual sphere monitoring period in the residual sphere monitoring timer. When this process ends, the main CPU 60 shifts the process to step S324.

  In step S324, the main CPU 60 sets 06H to the control state flag. In this process, the main CPU 60 sets a value (06H) indicating the hit end interval in the control state flag. When this process ends, the main CPU 60 shifts the process to step S325.

In step S325, the main CPU 60 performs processing for setting a hit end command. In this process, the main CPU 60 sets a hit end command including data relating to the final round and the big hit or the small hit in the main RAM 62. The hit end command is supplied from the main CPU 60 of the main control circuit 6 to the sub CPU 71 of the sub control circuit 7.
When this process ends, the main CPU 60 ends this subroutine.

[Hit end interval processing]
FIG. 30 is a diagram for explaining the details of the hit end interval process (FIG. 25, step S358) performed in the special symbol control process.

  In step S331, the main CPU 60 performs a process of determining whether or not the control state flag is a value (06H) indicating a hit end interval. In this process, when the main CPU 60 determines that the control state flag is a value indicating the hit end interval, the main CPU 60 shifts the process to step S332. On the other hand, when the main CPU 60 determines that the control state flag is not a value indicating the hit end interval, the main CPU 60 ends the present subroutine.

  In step S332, the main CPU 60 performs processing for determining whether or not the value of the waiting time timer is zero. In this process, if the main CPU 60 determines that the value of the waiting time timer is 0, it moves the process to step S333. On the other hand, when determining that the value of the waiting time timer is not 0, the main CPU 60 ends this subroutine.

  In step S333, the main CPU 60 performs a process of setting a value (07H) indicating the end of the special symbol game in the control state flag. When this process ends, the main CPU 60 shifts the process to step S334.

  In step S334, the main CPU 60 performs a process of setting control data corresponding to the winning symbol and the gaming state. In this process, the main CPU 60 sets control data corresponding to the winning symbol and the gaming state in the main RAM 62. This control data is supplied from the main CPU 60 of the main control circuit 6 to the sub CPU 71 of the sub control circuit 7. When this process ends, the main CPU 60 shifts the process to step S335.

  In step S335, the main CPU 60 sets 1 to the first and second illegal prize counters. In this process, the main CPU 60 executes a new round game of the first and second illegal prize counters, and until the new value is set, the main CPU 60 wins the first and second big prize openings 39 and 40. Are all determined to be illegal. When this process ends, the main CPU 60 ends this subroutine.

[Special symbol game end processing]
FIG. 31 is a diagram for explaining the details of the special symbol game end process (FIG. 25, step S359) performed in the special symbol control process.

  In step S341, the main CPU 60 performs a process of determining whether or not the control state flag is a value (07H) indicating the end of the special symbol game. In this process, when the main CPU 60 determines that the control state flag is a value indicating the end of the special symbol game, the process proceeds to step S342. On the other hand, when the main CPU 60 determines that the control state flag is not a value indicating the end of the special symbol game, the main CPU 60 ends the present subroutine.

  In step S342, the main CPU 60 performs a process of setting a value (00H) indicating a special symbol storage check in the control state flag. When this process ends, the main CPU 60 ends this subroutine.

[Grand prize winning fraud determination process]
As described above, after the round game (advantageous game) is executed in the big hit game state (special game state), the main CPU 60 passes the remaining ball monitoring period (predetermined period) after the round game ends. The number of game balls detected by the first or second count switch 391, 392 is counted during the regular winning detection period up to. Thus, the main CPU 60 constitutes counting means.

  Further, the main CPU 60 determines whether fraud has been performed based on whether or not the number of game balls counted in the regular winning detection period is equal to or greater than a specific number (10 in the present embodiment). . Thus, the main CPU 60 constitutes fraud determination means.

  In addition, the main CPU 60, after the last round (the last advantageous game) is completed, after the remaining ball monitoring period (predetermined period) has elapsed, the final elapsed period until the jackpot gaming state ends, that is, A predetermined first upper limit number (hereinafter also referred to as “first specified number”. In the present embodiment, 1) or more after the remaining sphere monitoring period in the hit end interval elapses until the hit end interval ends. It is determined whether or not the game ball is detected by the first or second count switch 391, 392. Thus, the main CPU 60 constitutes a final elapsed period determination unit.

  In addition, after the round other than the final round (the advantageous game excluding the advantageous game to be executed last) ends, the main CPU 60 waits for the remaining round monitoring period (predetermined period) and then the next round (the next advantageous game). 1 or more count switches 391, 392 from the lapse of the continuous elapsed time until the game is executed, that is, after the remaining ball monitoring period in the interval between rounds has elapsed until the interval between rounds ends. It is determined whether or not it has been detected.

  Further, the main CPU 60 determines whether or not one or more game balls are detected by the first or second count switches 391 and 392 in a non-special game period in which the game state is a state other than the big hit game state and the small hit game state. Determine.

  That is, in the present embodiment, when the number of game balls counted in the regular winning detection period is 10 or more, the main CPU 60 detects the game balls detected by the first or second count switch 391, 392 in the final elapsed period. When the number of game balls detected by the first or second count switch 391, 392 during the continuous elapsed period is one or more, or during the non-special game period, the first or second When the number of game balls detected by the count switches 391 and 392 is 1 or more, it is determined that fraud has been performed.

  Although the above-described big prize opening fraud determination process has been described as a process of judging fraud in the big hit gaming state, the same big prize opening fraud determination process can also be used in the small hit gaming state.

[Sub control main processing]
32 and 33 are diagrams for describing main processing executed by the sub CPU 71.

  In step S <b> 351, the sub CPU 71 performs a process of determining whether or not it is in a power failure detection state. In this process, the sub CPU 71 determines whether or not the power interruption detection signal is HIGH (high level). If the sub CPU 71 determines that the power interruption detection signal is not HIGH, the sub CPU 71 determines that the power interruption detection state is present, performs the process of step S351 until the power interruption detection state is resolved, and the power interruption detection signal is HIGH. If it is determined that it is, it is determined that the power interruption detection state is not established, and the process proceeds to step S352.

  In step S <b> 352, the sub CPU 71 performs processing for permitting writing to the work RAM 73. When this process ends, the sub CPU 71 shifts the process to step S353.

  In step S353, the sub CPU 71 performs a power failure recovery notification process. In this process, the sub CPU 71 notifies the liquid crystal display device 13, the speaker 21, and the lamp / LED 22 that the power interruption is being restored. When this process ends, the sub CPU 71 shifts the process to step S354.

  In step S354, the sub CPU 71 performs a process of determining whether or not there is a power interruption detection flag. In this process, if the sub CPU 71 determines that there is a power interruption detection flag, it moves the process to step S355, and if it does not determine that there is a power interruption detection flag, it moves the process to step S360.

  In step S355, the sub CPU 71 performs a work area damage check value calculation process. In this process, the sub CPU 71 performs a process of calculating a work area damage check value. When this process ends, the sub CPU 71 shifts the process to step S356.

  In step S356, the sub CPU 71 executes a work area damage check of the work RAM 73, and determines whether or not the work area of the work RAM 73 is damaged. In this process, the sub CPU 71 determines the work area damage check value calculated in the power interruption interruption process executed when the power supplied to the sub control circuit 7 becomes smaller than a predetermined threshold value, and step S355. It is determined whether or not the work area damage check value calculated in step 1 is the same.

  Here, if the sub CPU 71 determines that the work area damage check value calculated in the interruption processing at power interruption and the work area damage check value calculated in step S355 are the same, the backup capacitor 77 Since the data in the work RAM 73 held by the power supplied from the power supply is normal, the process proceeds to step S357, and if it is determined that they are not the same, the data in the work RAM 73 held by the power supplied from the backup capacitor 77 is stored. Since the data is not normal, the process proceeds to step S360.

  In step S357, the sub CPU 71 determines whether or not the command input port 70 has received a command. In this process, the sub CPU 71 determines whether or not the command input port 70 has received each command transmitted from the command output port 65 of the main control circuit 6. If it is determined that the command has been received, the sub CPU 71 proceeds to step S358. If it is determined that the process has not been received, the process of step S357 is repeated.

  In step S358, the sub CPU 71 determines whether or not the command received by the command input port 70 is a power recovery command. In this process, the sub CPU 71 determines whether or not the command received by the command input port 70 is a power recovery command (see step S22 in FIG. 11) transmitted by the main control circuit 6 in the main process. If it is determined that the power-time command has been received, both the main control circuit 6 and the sub-control circuit 7 are in the power-off state, so the process moves to step S359 and other than the power-return command is received. If it is determined that only the sub-control circuit 7 may have been cut off, the process proceeds to step S360.

  In step S359, the sub CPU 71 performs a return process. In this processing, the sub CPU 71 determines that the data in the work RAM 73 held by the power supplied from the backup capacitor 77 is normal and the command transmitted from the main control circuit 6 is a power recovery command. Based on the data in the RAM 73, a return process is performed.

  In addition, the sub CPU 71 performs a process of returning to the state before the power is turned off in the return process, but does not return the unauthorized notification. When this process ends, the sub CPU 71 restores the process to the address before the power interruption, that is, the program address indicated by the program counter restored from the stack area.

  In step S360, the sub CPU 71 performs an initialization process. In this process, since the sub CPU 71 performs a process of initializing the sub control circuit 7, the fraud notification is not performed if the fraud notification is made before the initialization. When this process ends, the sub CPU 71 shifts the process to step S361.

  As shown in FIG. 33, in step S361, the sub CPU 71 performs a random number update process. In this process, the sub CPU 71 performs an update process such as an effect determination random number counter or a stop symbol determination random number counter. When this process ends, the sub CPU 71 shifts the process to step S362.

  In step S362, the sub CPU 71 performs command analysis processing. In this processing, the sub CPU 71 performs processing for analyzing the command received from the main control circuit 6. Details of step S362 will be described later. When this process ends, the sub CPU 71 shifts the process to step S363.

  In step S363, the sub CPU 71 performs display control processing. In this processing, the sub CPU 71 performs processing for controlling a display image displayed on the liquid crystal display device 13. When this process ends, the sub CPU 71 shifts the process to step S364.

  In step S364, the sub CPU 71 performs a voice control process. In this process, the sub CPU 71 performs a process for controlling the sound reproduced by the speaker 21. When this process ends, the sub CPU 71 shifts the process to step S365.

  In step S365, the sub CPU 71 performs a lamp control process. In this process, the sub CPU 71 performs a process of controlling ON / OFF of the lamp / LED 22. When this process ends, the sub CPU 71 shifts the process to step S361.

[Command reception interrupt processing]
Even when the sub-control main process shown in FIGS. 32 and 33 is being executed, the sub-control main process may be interrupted and the command reception interrupt process may be executed. The command reception interrupt process will be described below with reference to FIG.

  In step S371, the sub CPU 71 performs processing for saving a register. In this process, the sub CPU 71 performs a process of saving the value used in the program being executed stored in each register (storage area). When this process ends, the sub CPU 71 shifts the process to step S372.

  In step S372, the sub CPU 71 performs processing for storing the received command in the buffer. In this processing, the sub CPU 71 performs processing for storing the command received from the main control circuit 6 in the reception buffer. When this process ends, the sub CPU 71 shifts the process to step S373.

  In step S373, the sub CPU 71 performs processing for restoring the register. In this processing, the sub CPU 71 performs processing for restoring the value saved in step S371 to each register. When this process ends, the sub CPU 71 ends this subroutine.

[Timer interrupt processing]
Even when the sub-control main process shown in FIGS. 32 and 33 is being executed, the sub-control main process may be interrupted and the timer interrupt process may be executed. This timer interrupt process is a process performed in accordance with a clock pulse generated every predetermined period (for example, 2 ms) from a clock pulse generation circuit (not shown). The timer interrupt process will be described below with reference to FIG.

  In step S381, the sub CPU 71 performs processing for saving the register. In this process, the sub CPU 71 performs a process of saving the value used in the program being executed stored in each register (storage area). When this process ends, the sub CPU 71 shifts the process to step S382.

  In step S382, the sub CPU 71 performs a timer update process. In this process, the sub CPU 71 performs a process of updating a timer such as a round effect stored in the work RAM 73. When this process ends, the sub CPU 71 shifts the process to step S383.

  In step S383, the sub CPU 71 performs processing for restoring the register. In this processing, the sub CPU 71 performs processing for restoring the value saved in step S381 to each register. When this process ends, the sub CPU 71 ends this subroutine.

[Command analysis processing]
FIG. 36 is a diagram for explaining the details of the command analysis process (FIG. 33, step S362) performed in the sub-control main process.

  In step S391, the sub CPU 71 performs processing for determining whether or not a command has been received. In this process, the sub CPU 71 determines whether or not the received command is stored in a predetermined buffer, and if it is determined that there is a received command, the process proceeds to step S392, and if it is determined that there is no received command. This subroutine is finished.

  In step S392, the sub CPU 71 performs a command data read process. In this process, the sub CPU 71 reads command data to identify the received command. When this process ends, the sub CPU 71 shifts the process to step S393.

  In step S393, the sub CPU 71 determines whether or not the received command is a variation pattern designation command. In this process, the sub CPU 71 determines whether or not the received command specified in step S392 is a variation pattern designation command. If it is determined that the variation pattern designation command has been received, the sub CPU 71 shifts the processing to step S394. If it is determined that the variation pattern designation command has not been received, the process proceeds to step S395.

  In step S394, the sub CPU 71 performs effect pattern determination processing. In this process, the sub CPU 71 is based on a variation pattern designation command and an effect determining random value from among a plurality of predetermined effect patterns according to the effect determining table stored in the program ROM 72 of the sub control circuit 7. The effect pattern (effect data) is determined. Here, the effect determination random number value is determined from the random number values 0 to 9 in the sub-control circuit 7. When this process ends, the sub CPU 71 ends this subroutine.

  In step S395, the sub CPU 71 determines whether or not a symbol designation command has been received. In this process, the sub CPU 71 determines whether or not the received command specified in step S392 is a symbol designation command. If it is determined that the symbol designation command has been received, the sub CPU 71 shifts the processing to step S396 and designates the symbol designation. If it is determined that the command has not been received, the process proceeds to step S397.

  In step S396, the sub CPU 71 performs a stop symbol determination process. In this process, the sub CPU 71 determines a stop symbol based on the symbol designation command. When this process ends, the sub CPU 71 ends this subroutine.

  In step S397, the sub CPU 71 determines whether or not a radio wave detection command has been received. In this process, the sub CPU 71 determines whether or not the reception command specified in step S392 is a radio wave detection command. If it is determined that the radio wave detection command has been received, the sub CPU 71 shifts the process to step S398 to detect the radio wave detection. If it is determined that a command has not been received, the process proceeds to step S399.

  In step S398, the sub CPU 71 performs fraud notification processing. In this process, the sub CPU 71 performs fraud notification using each element constituting the fraud notification means. Details of step S398 will be described later. When this process ends, the sub CPU 71 ends this subroutine.

  In step S <b> 399, the sub CPU 71 determines whether or not a large winning opening illegal winning command has been received. In this process, the sub CPU 71 determines whether or not the received command specified in step S392 is a large winning mouth illegal winning command, and if it is determined that the large winning mouth illegal winning command is received, the sub CPU 71 proceeds to step S400. If the process is shifted and it is determined that the illegal winning prize illegal winning command has not been received, the process shifts to step S401.

  In step S400, the sub CPU 71 performs fraud notification processing. In this process, the sub CPU 71 performs fraud notification using each element constituting the fraud notification means. Further, the sub CPU 71 turns on the big prize opening fraud notification flag. Details of step S400 will be described later. When this process ends, the sub CPU 71 ends this subroutine.

  In step S401, the sub CPU 71 performs processing corresponding to the received command other than the variation pattern designation command, the symbol designation command, and the radio wave detection command. When this process ends, the sub CPU 71 ends this subroutine.

[Unauthorized notification processing]
FIG. 37 is a diagram for explaining the details of the fraud notification process (FIG. 36, step S398 and step S400) performed in the command analysis process.

  In step S411, the sub CPU 71 determines whether or not a large prize opening illegal winning command has been received. In this process, the sub CPU 71 determines whether or not the received command specified in step S392 in FIG. 36 is a big prize mouth illegal prize command, and if it is judged that the big prize mouth illegal prize command has been received, If the process proceeds to step S414 and it is determined that the large winning opening illegal prize command is not received, the process proceeds to step S412.

  In step S412, the sub CPU 71 determines whether or not notification of unauthorized radio waves is being executed. In this process, if the sub CPU 71 determines that the notification of illegal radio waves is being executed, the sub CPU 71 ends this subroutine. If it is determined that the notification of illegal radio waves is not being executed, the process proceeds to step S413. Move.

  In step S413, the sub CPU 71 performs processing for setting data for reporting illegal radio waves. In this process, the sub CPU 71 sets data for causing each element constituting the fraud notification means to perform fraud notification until the power of the sub control circuit 7 is turned off. As a result, a fraud notification screen (see FIG. 38B), which will be described later, is displayed on the liquid crystal display device 13. When this process ends, the sub CPU 71 ends this subroutine.

  In step S414, the sub CPU 71 determines whether or not the big prize opening fraud notification flag is ON. In this process, if the sub CPU 71 determines that the big prize opening fraud notification flag is ON, the process proceeds to step S415. If the sub CPU 71 determines that the big prize opening fraud notification flag is not ON, step S417 is performed. Move processing to.

  In step S415, the sub CPU 71 performs a process of turning on the big prize opening fraud notification flag. When this process ends, the sub CPU 71 shifts the process to step S416. Although not shown, the sub CPU 71 subtracts the value of the big prize opening fraud notification timer in the timer update process of step S382 in FIG. The data for ending the notification is set, and the notification is ended by turning off the special winning opening fraud notification flag.

  In step S416, the sub CPU 71 performs a process of setting the big prize opening fraud notification data. In this process, the sub CPU 71 sets data for causing each element constituting the fraud notification means to perform fraud notification. As a result, a fraud notification screen (see FIG. 39A) described later is displayed on the liquid crystal display device 13. When this process ends, the sub CPU 71 shifts the process to step S417.

  In step S417, the sub CPU 71 sets a predetermined period A (for example, 30 seconds) in the big prize opening fraud notification timer. When this process ends, the sub CPU 71 ends this subroutine.

[Injustice notification screen]
FIGS. 38A and 38B and FIGS. 39A and 39B are diagrams showing screens displayed on the liquid crystal display device 13.

  FIG. 38A is a diagram showing a screen displayed in the display area 131 of the liquid crystal display device 13 in a normal gaming state. As shown in FIG. 38A, the sub CPU 71 displays each game information in the display area 131.

  The sub CPU 71 displays the current gaming state (for example, “probably changing” in the case of the probability changing gaming state) in the upper left portion of the display area 131, displays a decorative symbol in the center portion, and displays the first in the lower right portion. The number of reserved balls stored in the special symbol start storage area is displayed, and the number of reserved balls stored in the second special symbol start storage area is displayed in the lower left part.

  FIG. 38B is a diagram illustrating a first fraud notification screen displayed in the display area 131 of the liquid crystal display device 13 when an unauthorized radio wave is detected. As shown in FIG. 38 (b), the sub CPU 71 displays “fraud detection” on the decorative symbol displayed in the center of the display area 131 on the first fraud notification screen, and in the lower center. “Unauthorized radio wave detected! If you want to cancel the unauthorized detection status, turn off the power!” Is displayed.

  Since the game continues even during the fraud notification, the sub CPU 71 variably displays the decorative symbols at the center of the display area 131. In addition, the sub CPU 71 performs fraud notification by the liquid crystal display device 13 and also performs fraud notification by the speaker 21 and the lamp / LED 22.

  FIG. 39A is a diagram showing a second fraud notification screen displayed in the display area 131 when an illegal winning for the first big winning opening 39 or the second big winning opening 40 is detected. As shown in FIG. 39A, the sub CPU 71 displays “fraud detection” on the decorative symbol displayed in the central portion of the display area 131 on the second fraud notification screen, and in the lower center portion. “Unauthorized entry to the big prize opening has been detected!” Is displayed.

  Since the game continues even during the fraud notification, the sub CPU 71 variably displays the decorative symbols at the center of the display area 131. In addition, the sub CPU 71 performs fraud notification by the liquid crystal display device 13 and also performs fraud notification by the speaker 21 and the lamp / LED 22.

  FIG. 39B is a diagram illustrating a third fraud notification screen displayed in the display area 131 when an illegal radio wave and an illegal prize winning for the first big prize opening 39 or the second big prize opening 40 are detected. is there. As shown in FIG. 39B, the sub CPU 71 displays “fraud detection” on the decorative symbol displayed in the center of the display area 131 on the third fraud notification screen, and “large” in the lower center. "I detected an illegal prize at the prize opening!" And a message "Incorrect radio wave detected! If you want to cancel the illegal detection status, please turn off the power!" .

  Since the game continues even during the fraud notification, the sub CPU 71 variably displays the decorative symbols at the center of the display area 131. In addition, the sub CPU 71 performs fraud notification by the liquid crystal display device 13 and also performs fraud notification by the speaker 21 and the lamp / LED 22.

  As described above, the pachinko gaming machine 1 according to the present embodiment can notify that an illegal act has been detected when an illegal act is performed, and can prevent the illegal player from performing an illegal act. Can do. Moreover, the pachinko gaming machine 1 according to the present embodiment can specifically notify the detected fraud.

[Interrupt handling during power interruption]
FIG. 40 is a diagram for explaining a power interruption interrupt process executed when the sub CPU 71 detects that the power interruption detection signal has fallen from H (high) to L (low).

  In step S421, the sub CPU 71 performs a register (AF) saving process. In this process, the sub CPU 71 performs a process of saving the register value. When this process ends, the sub CPU 71 shifts the process to step S422.

  In step S422, the sub CPU 71 determines whether the power interruption detection signal is L or not. If it is determined that the power interruption detection signal is L, the process proceeds to step S424. If it is determined that the power interruption detection signal is not L, the process proceeds to step S423. In this process, the sub CPU 71 can determine whether or not the fall of the power interruption detection signal is due to chattering by detecting the state of the power interruption detection signal.

  In step S423, the sub CPU 71 performs a register restoration process. In this processing, the sub CPU 71 performs processing for restoring the register value. When this process ends, the sub CPU 71 returns to the process before the interruption of this process.

  In step S424, the sub CPU 71 performs a register saving process. In this process, the sub CPU 71 performs a process of saving the register value. When this process ends, the sub CPU 71 shifts the process to step S425.

  In step S425, the sub CPU 71 performs a process of reflecting the interrupt state on the interrupt flag. When this process ends, the sub CPU 71 shifts the process to step S426.

  In step S426, the sub CPU 71 performs processing for saving the stack pointer. When this process ends, the sub CPU 71 shifts the process to step S427.

  In step S427, the sub CPU 71 performs a work area damage check value calculation process. In this process, the sub CPU 71 calculates a work area damage check value for checking whether or not the work area of the work RAM 73 is damaged after the power failure recovery.

  At the time of power recovery, the sub CPU 71 determines whether or not the calculated work area damage check value matches the check value of the work area at the time of power failure recovery. It is determined that the data in the work RAM 73 held by the electricity supplied from the backup capacitor 77 is normal (backup is taken). When this process ends, the sub CPU 71 shifts the process to step S428.

  In step S428, the sub CPU 71 performs processing for setting a power interruption detection flag. When this process ends, the sub CPU 71 shifts the process to step S429.

  In step S429, the sub CPU 71 performs a RAM write prohibition process. In this processing, the sub CPU 71 performs processing for prohibiting writing to the work RAM 73. When this process is finished, this subroutine is finished.

  Although not shown, in the interruption processing at power interruption, the power from the backup capacitor 77 is supplied to the work RAM 73, and the data stored in the work RAM 73 is retained by the supply of power. It becomes.

[Operation of this embodiment]
The operation of the pachinko gaming machine 1 according to the present embodiment as described above will be described with reference to FIG. 41 and FIG. 41 and 42 show an example in which a round game in which only the first grand prize opening 39 is opened for a maximum of 25 seconds is performed 16 times. The same applies even if the second grand prize opening 40 is applied instead of the first big prize opening 39.

  FIG. 41 shows the relationship between the gaming state, the state of the first grand prize opening 39, the state of the first count switch 391, the security signal, the illegal prize winning prize winning command, the notification state by the sub CPU 71, and the time. .

  The period during which the display of the first or second special symbol is fluctuating (in the figure, indicated as “fluctuating special figure”) and the period during which the first or second special symbol is being stopped (in the figure, “confirmed”) In the hit start interval (denoted as “FAN” in the figure) after passing through, the number of game balls determined to be illegally won is 1, so the first count switch at time t1 and time t2 The game ball whose winning is detected by 391 is determined by the main CPU 60 as an illegally winning game ball, and a large winning mouth illegal winning command is set in the main RAM 62 and supplied to the sub CPU 11 (in the figure, “ When the sub CPU 71 receives the illegal winning mouth illegal winning command, the fraud notification is started or continued.

  In addition, the residual sphere monitoring period (in the figure, “monitoring” in one round (indicated as “RND1”, “RND2”, “RND16”, etc.) in the figure) and the interval between rounds (indicated as “INV” in the figure). ”), The number of game balls determined to be illegally won is 10, so that the game ball whose winning was detected by the first count switch 391 at time t3 was illegally won by the main CPU 60. When it is determined as a game ball and a large winning opening illegal winning command is set in the main RAM 62, it is supplied to the sub CPU 11, and the illegal notification is started or continued by the sub CPU 71 that has received the large winning opening illegal winning command.

  In addition, since the number of game balls determined to be illegally won at the winning end interval (denoted as “ENDING” in the figure) is 1, the game whose winning is detected by the first count switch 391 at time t4. The ball is determined by the main CPU 60 as a game ball that has been illegally won, and the big prize mouth illegal prize command is set in the main RAM 62 to be supplied to the sub CPU 11 and received by the sub CPU 71 that has received the big prize mouth illegal prize command. Unauthorized notification is started or continued.

  In FIG. 41, in the interval between rounds, the remaining sphere monitoring period appears to be longer than the non-monitoring period other than the remaining sphere monitoring period, but the non-monitoring period is longer than the remaining sphere monitoring period. For example, the residual sphere monitoring period is set to 1500 ms, and the non-monitoring period is set to 2000 ms. Note that the remaining sphere monitoring period may be longer than the non-monitoring period.

  If the fraud is further detected when fraud is detected when fraud is detected, the security signal is turned on for Yms from the point of detection. In addition, if the fraud is further detected while the security signal is on, it may be turned on for Yms (60 s) in addition to the remaining time when the security signal is on from the point of detection. Good.

  The notification by the sub CPU 71 is performed over Ams (for example, 30 s) from the time point when the fraud is further detected when the fraud is further detected when the fraud is detected. When the notification by the sub CPU 71 is ON and further fraud is detected, even if the fraud notification by the sub CPU 71 is turned ON from the time of detection, it may be performed over Ams. Good.

  FIG. 42 shows the gaming state, the state of the first big prize opening 39, the state of the first count switch 391, the security signal, the big prize opening illegal winning command and the sub when the power interruption occurs immediately after the fraud is performed. The relationship between the notification state by the CPU 71 and the time is shown.

  In FIG. 42, each game ball whose winning is detected by the first count switch 391 from time t11 to time t13 and time t17 is determined as an illegally winning game ball by the main CPU 60, and an illegal winning mouth incorrect winning command is issued. By being set in the main RAM 62, the sub CPU 71 is supplied to the sub CPU 11 and receives or receives the illegal prize opening illegal winning command, and the fraud notification is started or continued.

  In particular, like the game ball in which a winning is detected by the first count switch 391 at time t11, the first count switch 391 is in a big hit, that is, in a period other than from the start of the hit start interval to the hit end interval. All the game balls for which a winning is detected by the main CPU 60 are determined to be game balls that have been illegally won.

  When the power interruption of the pachinko gaming machine 1 occurs at time t15 when Zms has elapsed when the minimum output period of the security signal has not passed Yms (60 s), the security signal is turned OFF and the notification by the sub CPU 71 is ended. When the pachinko gaming machine 1 returns from the power interruption at time t16, the security signal is turned ON for the time (Yms-Zms) obtained by subtracting Zms from Yms (60s) while the notification by the sub CPU 71 is finished. Note that when the pachinko gaming machine 1 returns from the power interruption at time t16, the notification by the sub CPU 71 may be turned on for a time (Ams-Zms) obtained by subtracting Zms from Ams (30 s).

  Thereby, even if the power interruption occurs immediately after the fraud is performed, the pachinko gaming machine 1 can continue to notify that the fraud has been performed after returning from the power interruption.

  As described above, the pachinko gaming machine 1 according to the present embodiment determines that the game medium is illegal when an excessive number of game media is detected in a regular winning detection period in which a game media win is detected. Therefore, it is possible to prevent fraudulent misjudgment while appropriately detecting fraud.

(Second Embodiment)
Hereinafter, with reference to FIGS. 43 to 46, a second embodiment of the gaming machine according to the present invention will be described. In the present embodiment, points that are different from the first embodiment of the present invention will be described, and descriptions of the same points will be omitted.

  In the first embodiment of the present invention, in the remaining ball monitoring timer update process (see FIG. 17), the main CPU 60 determines the value of the first or second illegal winning counter when the remaining ball monitoring period ends. By setting the number to 1, the number of game balls until it is determined that the winning prize is illegal after the last round residual ball monitoring period in the big hit gaming state, and the illegal winning prize after the residual ball monitoring period elapses in the interval between rounds. In the above description, it is assumed that both the number of game balls until it is determined to be 1 are 1.

  On the other hand, in the present embodiment, the first specified number that is the number of game balls until it is determined that the winning is illegal after the remaining ball monitoring period as a predetermined period in the hit end interval, and the interval between rounds The second specified number, which is the number of game balls until it is determined that the prize has been illegally won after the lapse of the remaining ball monitoring period as the predetermined period, is made different from each other. In particular, the second specified number is set to be less than the first specified number. In the present embodiment, the first specified number is 2, and the second specified number is 1.

[Residual sphere monitoring timer update processing]
FIG. 43 is a diagram for explaining the details of the residual sphere monitoring timer update process in the present embodiment.

  In step S501, the main CPU 60 determines whether or not the value of the residual sphere monitoring timer is zero. In this process, if the main CPU 60 determines that the value of the residual sphere monitoring timer is 0, the main CPU 60 ends the present subroutine. If the main CPU 60 determines that the value of the residual sphere monitoring timer is not 0, the main CPU 60 proceeds to step S502. Move processing.

  In step S502, the main CPU 60 subtracts 1 from the value of the residual sphere monitoring timer. In other words, in this process, the main CPU 60 determines that the game balls detected by the first or second count switches 391 and 392 after the first or second big prize opening 39 or 40 is closed are properly won. The residual sphere monitoring period to be determined is shortened with the passage of time. When this process ends, the main CPU 60 shifts the process to step S503.

  In step S503, the main CPU 60 performs a process of determining whether or not the value of the residual sphere monitoring timer is zero. In this process, it is determined that the value of the residual sphere monitoring timer is 0, which means that the residual sphere monitoring period has ended.

  Therefore, if the main CPU 60 determines that the value of the residual sphere monitoring timer is not 0, it determines that it is during the residual sphere monitoring period, and ends this subroutine. On the other hand, when determining that the value of the residual sphere monitoring timer is 0, the main CPU 60 determines that the residual sphere monitoring period has ended, and moves the process to step S504.

  In step S504, the main CPU 60 performs a process of determining whether or not the control state flag is 05H indicating the waiting time management before reopening the big winning opening. In this process, if the main CPU 60 determines that the control state flag is 05H, it moves the process to step S505, and if it determines that the control state flag is not 05H, the process proceeds to step S506. Move.

  In step S505, the main CPU 60 performs processing for setting the value of the first or second illegal winning counter to 1. In this process, if the main CPU 60 determines in step S504 that the control state flag is 05H indicating the waiting time management before reopening the big winning opening, that is, it is an interval between rounds, the first or second Set the value of the illegal prize counter to 1. When this process ends, the main CPU 60 ends this subroutine.

  In step S506, the main CPU 60 performs processing for setting the value of the first or second illegal winning counter to 2. In this process, when the main CPU 60 determines in step S504 that the control state flag is not 05H indicating the waiting time management before reopening of the big winning opening, that is, it is the hit end interval, the first or second Set the value of the illegal prize counter to 2. When this process ends, the main CPU 60 ends this subroutine.

[Grand prize winning fraud determination process]
As described above, the main CPU 60 according to the present embodiment, in the big hit gaming state, after the last round (the last advantageous game) is completed and the remaining ball monitoring period (predetermined period) has elapsed. In the final elapsed time until the big hit gaming state is finished, it is determined whether or not a first or a predetermined number (for example, 2) or more gaming balls are detected by the first or second count switch 391, 392. The final elapsed period determining means is configured.

  In addition, after the round other than the final round (the advantageous game excluding the advantageous game to be executed last) ends, the main CPU 60 waits for the remaining round monitoring period (predetermined period) and then the next round (the next advantageous game). The second specified number (this implementation) set to be less than the first specified number after the elapsed time period until the game is executed, that is, after the remaining ball monitoring period in the interval between rounds has elapsed and until the interval between rounds ends. In 1), it is determined whether 1) or more game balls are detected by the first or second count switch 391, 392. Thus, the main CPU 60 constitutes a continuous elapsed period determination unit.

  Further, the main CPU 60 sets the second upper limit determined to be less than the first upper limit number (2 in the present embodiment) during the non-special game period in which the game state is a state other than the big hit game state and the small hit game state. It is determined whether or not a number of game balls (1 in the present embodiment) or more are detected by the first or second count switches 391 and 392. Thus, the main CPU 60 constitutes a non-special game period determination unit.

  That is, in the present embodiment, when the number of game balls counted in the regular winning detection period is 10 or more, the main CPU 60 detects the game balls detected by the first or second count switch 391, 392 in the final elapsed period. The number of game balls detected by the first or second count switch 391, 392 in the continuous elapsed period is 1 or more, or the first or second in the non-special game period When the number of game balls detected by the count switches 391 and 392 is 1 or more, it is determined that fraud has been performed.

[Operation of this embodiment]
The operation of the pachinko gaming machine 1 according to the present embodiment as described above will be described with reference to FIGS.

  FIG. 44 shows the relationship between the gaming state, the state of the first big winning opening 39, the state of the first count switch 391, the security signal, the big winning opening illegal winning command and the notification state by the sub CPU 71, and the time. .

  In the present embodiment, after the remaining ball monitoring period in the interval between rounds has elapsed, the number of game balls determined to be illegally won is 1, whereas the remaining ball monitoring period of the final round in the big hit gaming state has elapsed. The number of game balls that are later determined to be illegally won is two.

  Therefore, in FIG. 44, each game ball in which a winning is detected by the first count switch 391 at time t21 to time t23 and time t25 is determined as an illegally winning game ball by the main CPU 60, and the big prize opening illegal winning is determined. When the command is set in the main RAM 62, the sub CPU 11 is supplied to the sub CPU 11, and the sub CPU 71 that has received the prize winning prize illegal winning command starts or continues the fraud notification.

  In particular, the game ball whose winning is detected by the first count switch 391 at time t24 was detected as the first ball after the last round of the remaining ball monitoring period in the big hit gaming state, so the main CPU 60 Is not determined to be a game ball won.

  On the other hand, the game ball whose winning is detected by the first count switch 391 at time t25 is the second ball that has been detected after the remaining ball monitoring period of the final round in the big hit gaming state. The game ball is determined to be illegally won.

  As an example, in the timing chart shown in FIG. 44, the opening pattern of the first big winning opening 39 is different for each round. Specifically, the first grand prize opening 39 is opened once for 25 seconds in the odd-numbered round, and is opened twice in the even-numbered round.

  Specifically, the first grand prize opening 39 is opened for, for example, 15 s in an even-numbered round, and is opened for 5 s after a closing period of 3500 ms, which is the same time as the interval between rounds, has elapsed. The first and second grand prize winning openings 39 and 40 may be opened three times or more in one round, may be opened several times in some rounds, or may be opened several times in all rounds. Good.

  FIG. 45 shows the gaming state, the state of the first and second big prize ports 39 and 40, the state of the first and second count switches 391 and 392, the security signal, the big prize port illegal prize command, and the state of notification by the sub CPU 71. And the relationship with time.

  In this example, the first grand prize opening 39 is opened in odd-numbered rounds, and is closed when the opened state has elapsed for 25 seconds or when eight game balls have entered the first big prize opening 39. When one game ball is detected by the first count switch 391, 15 game balls are paid out. In the first grand prize winning port 39, when 10 game balls (upper limit number + 2 balls) are detected by the first count switch 391 during one round and the remaining ball monitoring period, it is determined to be illegal.

  The second grand prize opening 40 is opened in even-numbered rounds, and is closed when the opened state has elapsed for 25 seconds or when seven game balls have entered the second big prize opening 40. When one game ball is detected by the second count switch 392, 10 game balls are paid out. In the second big prize opening 40, when 10 game balls (upper limit number + 3 balls) are detected by the second count switch 392 during one round and the remaining ball monitoring period, it is determined to be illegal.

  Therefore, in FIG. 45, each game ball whose winning is detected by the first or second count switch 391, 392 from time t31 to time t35 is determined as an illegally winning game ball by the main CPU 60, and the big winning mouth When the illegal winning command is set in the main RAM 62, it is supplied to the sub CPU 11, and the sub CPU 71 that receives the illegal winning mouth illegal winning command starts or continues the illegal notification.

  In this example, the winning for the first grand prize opening 39 is advantageous in that the number of winning balls per winning game ball and the upper limit per round are more advantageous than the winning for the second big winning opening 40. Yes. For this reason, the criteria for fraud determination are more stringent for winning for the first big prize opening 39 than for winning for the second big prize opening 40. Note that the winning for the second grand prize opening 40 may be stricter than the winning for the first big prize opening 39.

  In addition, one of the first and second grand prize winning openings 39 and 40 is performed in the interval between rounds, but is also performed while the other is open. In addition, the number of game balls that are determined to be illegally won after the elapse of the remaining ball monitoring period of the last round with respect to the second big prize opening 40 that is released in the last round in the big hit gaming state is two.

  On the other hand, the number of game balls determined to be illegally won after the elapse of the remaining ball monitoring period of the last round to be released is 1 for the first big prize opening 39 that is not released in the final round in the big hit gaming state. is there.

  That is, for the first or second big prize opening 39, 40 that is not released in the final round in the big hit gaming state, the game balls that are judged to have been won illegally after the remaining ball monitoring period of the last round opened The number is set to 1, which is equal to the number of game balls determined to be illegally won after the remaining ball monitoring period in the inter-round interval has elapsed until the end of the inter-round interval.

  It is to be noted that game balls that are determined to have been illegally won after the remaining ball monitoring period of the last round to be released with respect to the first or second big prize opening 39, 40 that is not released in the final round in the big hit gaming state. The number may be two, which is equal to the number of game balls that are determined to be illegally won after the remaining ball monitoring period in the hit end interval elapses until the hit end interval ends.

  In this example, the period in which the first grand prize opening 39 and the second grand prize opening 40 are alternately opened and both are closed is set as the interval between rounds, but the length of the interval between rounds may be zero. . That is, in this example, unlike the other examples shown in FIGS. 44 and 45, the remaining ball monitoring period is longer than the interval between rounds, but the rounds of the first big prize opening 39 and the second big prize opening 40 respectively. The interval is shorter than the closing period of each of the first big prize opening 39 and the second big prize opening 40.

  The transmission time of the security signal and the notification time of the sub CPU 71 are set to the same time regardless of which of the first and second prize winning openings 39 and 40 is detected. You may make it differ according to the detected special winning opening.

  In this case, it is preferable that the transmission time of the security signal to the big prize opening advantageous to the player and the notification time of the sub CPU 71 are relatively long. However, the transmission time and the sub time of the security signal to the big prize opening advantageous to the player are preferable. The notification time of the CPU 71 may be relatively shortened.

  As described above, when the transmission time of the security signal and the notification time of the sub CPU 71 are made different according to the big prize opening, either one of the transmission time of the security signal and the notification time of the sub CPU 71 is made different. May be.

  The pachinko gaming machine 1 according to the present embodiment described above is in the big hit gaming state, after the round excluding the final round ends, and after the remaining ball monitoring period elapses until the next round is executed. In addition, it is determined that fraud has been performed on the condition that the first or second number of game balls are detected by the first or second count switches 391 and 392.

  In addition, the pachinko gaming machine 1 according to the present embodiment has the first number in the jackpot gaming state after the last round ends and the gaming state is the jackpot gaming state after the remaining ball monitoring period elapses. It is determined that fraud has been performed on the condition that the first or second count switches 391 and 392 have detected more than the second predetermined number of game balls.

  That is, the pachinko gaming machine 1 according to the present embodiment is determined to be illegal during the period of detecting fraud after the final round, based on the number of game balls determined to be illegal during the period of detecting fraud in the interval between rounds. A large number of balls are defined.

  Therefore, even if the pachinko gaming machine 1 according to the present embodiment wins a game ball that is sandwiched between the first or second shutter 41, 42 and the game board 14 during a period in which fraud is detected after the final round. , It can be prevented from being erroneously determined to be illegal.

  As described above, the pachinko gaming machine 1 according to the present embodiment can prevent misjudgment from being erroneously detected while appropriately detecting fraud.

  In addition, the pachinko gaming machine 1 according to the present embodiment is a game that is detected while the game state is the jackpot gaming state after the remaining ball monitoring period has elapsed after the last round has ended in the jackpot gaming state. Since the game ball detected while the game state is in a state other than the big hit game state is more strictly judged than the ball, the cheating can be appropriately detected according to the game state.

  Note that the first and second embodiments of the present invention are not limited to the illegal winning with respect to the first and second big winning openings 39 and 40, such as a starting opening provided with an ordinary electric accessory (blade member). It is possible to detect fraudulent winnings with respect to other winning ports and starting ports.

  For example, FIG. 46 shows an example in which an illegal winning for the second start opening 35 is detected. FIG. 46 shows the game state related to the normal symbol, the state of the second start port 35, the state of the second start port switch 350, the security signal, the second winning port incorrect winning command and the state of notification by the sub CPU 71, and the time. Showing the relationship.

  In this example, the second starting port 35 has a maximum number of winnings of 8 game balls in a single symbol game per game, and the opening / closing period (denoted as “OPEN” in the figure) There are three 1.3 second releases with an interval of 0.2 seconds. In the opening / closing period and opening / closing end interval of the second start opening 35 (for example, 2 seconds, indicated as “ENDING” in the drawing), winning of game balls up to 11 of the upper limit winning number +3 balls is detected as an illegal winning. Instead, winning of 11 or more game balls of the upper limit winning number +3 balls is detected as an illegal winning.

  Therefore, in FIG. 46, the period in which the display of the normal symbol is fluctuating (indicated as “ordinary in the normal state”) and the period in which the normal symbol is being stopped (indicated as “confirmed” in the figure). A game ball in which a winning is detected by the second start port switch 350 at time t41 in an opening / closing start interval (for example, 1 second, indicated as “FAN” in the figure) after the game has been illegally won by the main CPU 60. It is determined as a sphere.

  In addition, since the game ball whose winning is detected by the second start opening switch 350 at the time t42 in the opening / closing period is the game ball whose winning is detected by the second start opening switch 350 during the opening / closing period, The main CPU 60 determines that the game ball has been won illegally.

  In addition, the game ball whose winning is detected by the second start opening switch 350 at the time t43 in the opening / closing period is detected by the second starting opening switch 350 after the remaining ball monitoring period in the opening / closing end interval. Since it is a game ball, the main CPU 60 determines that it is an illegally won game ball.

  In addition, the game ball whose winning is detected by the second start port switch 350 at time t44 in a period other than the winning game of the normal symbol game is determined by the main CPU 60 as an illegally winning game ball.

  In this way, when the main CPU 60 detects an illegally won game ball, it is supplied to the sub CPU 11 by setting a start port illegal prize command similar to the big prize mouth illegal prize command to the main RAM 62, The sub CPU 71 that has received the prize port illegal prize command starts or continues the fraud notice.

  In addition, in the opening / closing end interval of the second start port 35, if two game balls are detected by the second start port switch 350, it is detected as an illegal prize, but if one game ball is detected, it is illegal. It may be detected as a prize, or may be detected as an illegal prize when three or more specific number of game balls are detected.

  The illegal winning detection process for the second starting opening 35 is the same as the illegal winning detection process for the first and second large winning openings 39, 40, but the illegal winning detection process for the second starting opening 35 is performed by a power source. The difference is that the notification by the sub CPU 71 continues until it is turned off.

(Third embodiment)
Hereinafter, a third embodiment of the gaming machine according to the present invention will be described with reference to FIG. 47 and FIG. In the present embodiment, points different from the first and second embodiments of the present invention will be described, and description of the same points will be omitted.

[Time chart when sending illegal winning command]
FIG. 47 is a diagram showing a state in which any of the elements constituting the winning detection means has detected a winning when only the sub control circuit 7 is reset during the invalid winning period.

  As shown in FIG. 47, the sub CPU 71 controls the sub control circuit 7 so as to be instantaneously turned off when the sub control circuit 7 is reset, and not to be restored even when the power is turned on thereafter.

  Here, when any of the elements constituting the winning detection means detects a winning during the all winning invalid period, the main CPU 60 causes the command output port 65 to illegally win the command input port 70 of the sub-control circuit 7. Send a command.

  When the command input port 70 receives the unauthorized winning command, the sub CPU 71 starts the unauthorized notification again. Thus, even if the sub CPU 71 terminates the fraud notification by resetting the sub control circuit 7 after the fraud notification, the sub CPU 71 can recover the fraud notification by detecting the winning by the main CPU 60. become. Also, even if the sub CPU 71 is unexpectedly reset in the sub-control circuit 7 and the fraud notification is terminated, the fraud notification returns when winning, so that the fraud notification can be easily restored. Can do.

[Winning detection process]
FIG. 48 is a diagram for explaining the details of the winning detection process in the present embodiment.

  In step S601, the main CPU 60 performs a ball detection counter updating process for each winning area. In this process, the main CPU 60 updates the value of the winning detection counter in accordance with the detection status of the winning switch of each element constituting the winning detection means. When this process ends, the main CPU 60 shifts the process to step S602.

  In step S602, the main CPU 60 performs a process of determining whether or not there is a pitch detection counter that has detected a winning. In this processing, the main CPU 60 detects a winning in the winning detection counter corresponding to each element constituting the winning detection means, that is, the use area of any of the winning detection counters is “0011” (“LLHH”). If the winning detection counter detects a winning, the process proceeds to step S603, and if no winning detection counter detects a winning, this subroutine is terminated. To do.

  In step S603, the main CPU 60 performs a process of determining whether or not the all winning invalid flag is ON. In this process, the main CPU 60 determines whether or not the all winning invalid flag is ON, and if it is determined that the all winning invalid flag is ON, the main prize detected by the winning detection counter is an illegal winning. When the main CPU 60 determines that the all winning invalidity flag is not ON, the main CPU 60 shifts the process to step S605.

  In step S <b> 604, the main CPU 60 performs processing for setting an unauthorized winning detection command in a predetermined area of the main RAM 62. In this processing, the main CPU 60 sets an illegal winning detection command transmitted from the command output port 65 to the sub control circuit 7 in a predetermined area of the main RAM 62. When this process ends, the main CPU 60 shifts the process to step S605.

  In step S605, the main CPU 60 performs a process of setting the winning data in the corresponding winning detection counter. In this process, the main CPU 60 sets the bit of the winning detection counter corresponding to the element constituting the winning detecting means whose value of the winning detection counter is “0011” to 1 (ON). When this process ends, the main CPU 60 ends this subroutine.

[Command transmission control processing]
The command transmission control process according to the present embodiment processes an illegal winning detection command in the same manner as the big prize opening illegal winning command with respect to the command transmission control process described with reference to FIG.

  That is, the main CPU 60 in the present embodiment determines, for example, whether or not an unauthorized winning detection command is set as pre-processing in step S247, and determines that an unauthorized winning command is set. An illegal winning command transmission process is performed.

[Command analysis processing]
In the command analysis process according to the present embodiment, an illegal winning detection command is processed in the same way as the big prize opening illegal winning command, in contrast to the command analyzing process described with reference to FIG.

  That is, the sub CPU 71 in the present embodiment, for example, determines whether or not an illegal winning command has been received as the pre-processing in step S401. Do.

  In this way, the pachinko gaming machine 1 according to the present embodiment can specifically notify that an illegal act has been detected, regardless of what fraudulent act is performed. It is possible to deter cheating.

(Fourth embodiment)
Hereinafter, a fourth embodiment of the gaming machine according to the present invention will be described with reference to FIG. In the present embodiment, points different from the first to third embodiments of the present invention will be described, and descriptions of the same points will be omitted.

[Time chart for illegal radio wave detection]
FIG. 49 is a diagram showing processing when an unauthorized radio wave is detected in the present embodiment.

  As shown in FIG. 49, when the main CPU 60 determines that the radio wave sensor 500 has detected a radio wave once, the main CPU 60 determines that the radio wave sensor 500 has detected a radio wave and performs a winning invalidation process.

  In this configuration, the pachinko gaming machine 1 performs the detection of the radio wave by the radio wave sensor 500 and the detection of the winning for each element constituting the winning detection means, and then the winning information stored in the winning storage area of the winning detection counter. Are all cleared to zero.

  Here, when the 0 clear is performed prior to the detection of the radio wave by the radio wave sensor 500 by the timer interruption process and the detection of the winning for each element constituting the winning detection means, the main CPU 60 simultaneously receives the radio wave. There is a problem that winning information representing winning for each element constituting the winning detection means cannot be erased.

  In such a case, although the main CPU 60 notifies that the illegal act has been detected, the main CPU 60 does not perform the process of deleting the information that has detected the winning, so that a predetermined profit is given based on the information that has detected the winning. It will cause a lot of damage to the amusement hall.

  Therefore, the pachinko gaming machine 1 according to the present embodiment is provided for each element that constitutes the detection of the radio wave and the winning detection means by the radio wave sensor 500 in order to prevent the game hall side from being greatly damaged by fraud. After the winning detection is executed, all the winning information stored in the winning storage area of the winning detection counter is cleared to 0, so that the profit based on the winning information stored by the radio wave goto is provided to the fraudster. It is possible to prevent the amusement hall from receiving a great deal of damage.

  In addition, with this configuration, the pachinko gaming machine 1 according to the present embodiment performs the winning information erasure process after the winning determination process and the radio wave detection determination process are executed within the same interrupt process. Even when the storage of the winning information and the detection of the radio wave occur at the same time, the winning information by the radio wave can be deleted.

  As described above, the pachinko gaming machine 1 according to the present embodiment performs the winning information erasure process after the winning determination process and the radio wave detection determination process are executed in the same interrupt process, so that the winning information by the radio wave is lost. Even if the storage and the radio wave detection occur simultaneously, the winning information by the radio wave can be erased.

  In the present embodiment, the main CPU 60 determines that there is a radio wave when the radio wave is detected once. However, the main CPU 60 detects the noise twice such as chattering to detect a radio wave as noise. It may be determined that there was a radio wave at the time.

(Fifth embodiment)
Hereinafter, with reference to FIGS. 50 to 52, a fifth embodiment of the gaming machine according to the present invention will be described. In the present embodiment, points different from the first to fourth embodiments of the present invention will be described, and description of the same points will be omitted.

[Pitch / Winner Detection Counter]
In the present embodiment, the ball entry detection counter of each element constituting the winning detection means is constituted by a first ball entry detection counter and a second ball entry detection counter. The first entrance detection counter is configured in the same manner as the entrance detection counter according to the first to fourth embodiments of the present invention.

  Similar to the entrance detection counter according to the first to fourth embodiments of the present invention, the main RAM 62 includes an unused area for the first entrance detection counter and the second entrance detection counter, a use area, and Is assigned (see FIGS. 7A and 7B).

  As shown in FIG. 50, the second incoming detection counter determines the current detection result based on the previous value and the current value of the first incoming detection counter. Specifically, if the previous value and the current value of the first incoming detection counter are the same, the second incoming detection counter sets the current value of the first incoming detection counter as the current value, If the previous value of the first incoming detection counter is not the same as the current value, the previous value of the second incoming detection counter is set as the current value.

  For example, in the state shown in FIG. 50A, since the previous value “0” and the current value “0” of the first incoming detection counter are the same, the second incoming detection counter The current value “0” of the entrance detection counter is set as the current value. In this case, since the value of the second incoming ball detection counter does not change, it is determined that the state of the game ball remains unchanged in the non-detected state.

  In the state shown in FIG. 50B, since the previous value “0” and the current value “1” of the first incoming detection counter are not the same, the second incoming detection counter The previous value “0” of the sphere detection counter is set as the current value. In this case, since the value of the second incoming ball detection counter does not change, it is determined that the state of the game ball remains unchanged in the non-detected state.

  In the state shown in FIG. 50C, since the previous value “1” of the first incoming detection counter and the current value “0” are not the same, the second incoming detection counter The previous value “0” of the sphere detection counter is set as the current value. In this case, since the value of the second incoming ball detection counter does not change, it is determined that the state of the game ball remains unchanged in the non-detected state.

  In the state shown in FIG. 50 (d), since the previous value “1” and the current value “1” of the first incoming detection counter are the same, the second incoming detection counter The current value “1” of the entrance detection counter is set as the current value. In this case, since the value of the second incoming ball detection counter has changed from “0” to “1”, it is determined that the state of the game ball has changed from the non-detection state to the detection state.

  In the state shown in FIG. 50 (e), since the previous value “0” and the current value “0” of the first incoming detection counter are the same, the second incoming detection counter The current value “0” of the entrance detection counter is set as the current value. In this case, since the value of the second incoming ball detection counter has changed from “1” to “0”, it is determined that the state of the game ball has changed from the detection state to the non-detection state.

  In the state shown in FIG. 50 (f), since the previous value “0” and the current value “1” of the first incoming detection counter are not the same, the second incoming detection counter The previous value “1” of the sphere detection counter is set as the current value. In this case, since the value of the second entrance detection counter does not change, it is determined that the state of the game ball remains unchanged in the detection state.

  In the state shown in FIG. 50G, since the previous value “1” and the current value “0” of the first incoming detection counter are not the same, the second incoming detection counter The previous value “1” of the sphere detection counter is set as the current value. In this case, since the value of the second entrance detection counter does not change, it is determined that the state of the game ball remains unchanged in the detection state.

  In the state shown in FIG. 50 (h), since the previous value “1” and the current value “1” of the first incoming detection counter are the same, the second incoming detection counter The current detection result “1” of the entrance detection counter is the current detection result. In this case, since the value of the second entrance detection counter does not change, it is determined that the state of the game ball remains unchanged in the detection state.

  Thus, in the present embodiment, each element constituting the winning detection means constitutes a state detection means for detecting the state of the game ball as a game component for playing a game. In particular, in the present embodiment, the first count switch 391 and the second count switch 392 constitute state detection means. The first entrance detection counter constitutes a first storage unit that stores the detection result of the state detection unit.

  The main CPU 60 constitutes detection result determination means for determining the current detection result based on the detection result of the state detection means and the previous detection result stored in the first storage means. The second entrance detection counter constitutes a second storage unit that stores the detection result determined by the detection result determination unit.

  The main CPU 60 determines whether or not the state of the game ball has changed based on the detection result determined by the detection result determination unit and the previous detection result stored in the second storage unit. Determination means, detection result determination means for determining whether or not the detection result detected by the state detection means and the previous detection result stored in the first storage means are the same, and determination by the component state determination means And a control means for executing control based on the result.

[Winning detection process]
FIG. 51 is a diagram for explaining the details of the winning detection process in the present embodiment.

  In step S611, the main CPU 60 performs a first pitch detection counter update process for each winning area. In this process, the main CPU 60 updates the value of the first winning detection counter in accordance with the detection status of the winning switch of each element constituting the winning detection means. When this process ends, the main CPU 60 shifts the process to step S612.

  In step S612, the main CPU 60 performs a process of determining whether or not the value of the first entrance detection counter is the same between the current time and the previous time. In this process, when the main CPU 60 determines that the value of the first incoming detection counter is the same as the current time and the previous time, the main CPU 60 moves the process to step S613, and the value of the first incoming detection counter is the current value and the previous time. If it is determined that they are not the same, the process proceeds to step S614.

  In step S613, the main CPU 60 performs a process of setting the current value of the first incoming detection counter to the second incoming detection counter. When this process ends, the main CPU 60 shifts the process to step S615.

  In step S614, the main CPU 60 performs processing for setting the previous value of the second incoming detection counter to the second incoming detection counter. When this process ends, the main CPU 60 shifts the process to step S615.

  In step S615, the main CPU 60 performs a process of determining whether or not there is a second pitch detection counter that has detected a winning. In this process, the main CPU 60 detects a winning in the second winning detection counter corresponding to each element constituting the winning detection means, that is, the use area of the second winning detection counter is “01” (“LH”). And if it is determined that the second winning detection counter has detected a winning, the process proceeds to step S616, and it is determined that the second winning detection counter has not detected the winning. If so, this subroutine is terminated.

  In step S616, the main CPU 60 performs processing for setting winning data in the corresponding winning detection counter. In this process, the main CPU 60 sets the bit of the winning detection counter corresponding to the element constituting the winning detecting means whose value of the second winning detection counter is “01” to 1 (ON). When this process ends, the main CPU 60 ends this subroutine.

[Operation of this embodiment]
The operation of the pachinko gaming machine 1 according to the present embodiment as described above will be described with reference to FIG.

  FIG. 52A shows the values of the first, second, and winning detection counters in a time series in which the detection results of the elements constituting the winning detection means are not affected by chattering. Is shown.

  In this case, since the detection result of each element constituting the winning detection means is not affected by chattering, the winning information stored in the winning storage area for the winning detection counter is “0011” of the first winning detection counter. It becomes the same as the winning information based on the detection result.

  FIG. 52B shows, in time series, the values of the first ball detection counter, the second ball detection counter, and the winning detection counter in a state where the detection result of each element constituting the winning detection means is affected by chattering. Show.

  In this example, the eighth value from the left in the drawing of the first entrance detection counter is “1” due to the influence of chattering. However, since the seventh value from the left in the figure of the first incoming detection counter is “0”, the eighth value from the left in the figure of the second incoming detection counter is the same as the seventh from the left in the figure. The value is “0”, and the influence of chattering is removed.

  For this reason, a detection result such as “01” of the second entrance detection counter is obtained from the detection result from the left in the figure such as “1011” of the first entrance detection counter, and the winning detection is detected in the prize detection counter. Is done.

  FIG. 52 (c) shows a first entrance detection counter, a second entrance detection counter, and a detection result of each element constituting the winning detection means affected by chattering, as in FIG. 52 (b). The value of the winning detection counter is shown in time series.

  The state shown in FIG. 52C is more affected by chattering than the state shown in FIG. 52B, and the detection results of the elements constituting the winning detection means are greatly affected. The second, fourth and ninth values from the left in the figure are “1” due to the influence of chattering. Also in this example, the effect of chattering is removed from the value of the second winning detection counter, the seventh value from the left in the drawing of the winning detection counter becomes “1”, and the winning of the game ball is detected by the winning detection counter. The

  As described above, in the pachinko gaming machine 1 according to the present embodiment, the current detection result of each element constituting the winning detection means and the previous detection result stored in the first winning detection counter are obtained. If they are the same, the detection result of each element constituting the winning detection means is determined as the current detection result and stored in the first detection detection counter and the detection result of each element constituting the winning detection means. If the previous detection result is not the same, the previous detection result stored in the second entrance detection counter is determined as the current detection result, so that the detection result of each element constituting the winning detection means is chattering. Even if it is affected by this, the state of the game ball can be accurately detected.

  For example, in the pachinko gaming machine 1 according to the present embodiment, the game ball is in a detection state on condition that the detection results of each element constituting the winning detection means sequentially indicate “0011” (“LLHH”). In the pachinko machine to be determined, even if the detection result of each element constituting the winning detection means sequentially indicates “1011” (“HLHH”) due to chattering, each element constituting the winning detection means is the last When “1” (“H”) is detected, a game ball is detected because the previous detection result stored in the second incoming ball detection counter is different from the detection result determined by the main CPU 60. Therefore, it is possible to accurately detect the winning of the game ball.

  In each of the embodiments described above, the liquid crystal display device 13 is used as fraud notification means. However, the present invention is not limited to this. For example, a plasma display, a rear projection display, a CRT display, a lamp, a speaker, or a movable accessory can be used alone or You may use it in combination.

  Moreover, in each embodiment mentioned above, although the radio wave sensor 500 is provided in the glass door 10 of the pachinko game machine 1, it is not restricted to this, Other parts (the game board 14, the wooden frame 18, and the base door 15). Etc.) may be provided. The radio wave sensor 500 may be provided on both the glass door 10 and the game board 14.

  When the radio wave sensor 500 is provided on both the glass door 10 and the game board 14, the main CPU 60 is attached to the detection result of the radio wave sensor 500 attached to the glass door 10 and the game board 14 as shown in FIG. 53. The detection result of the received radio wave sensor 500 is electrically ORed to determine whether or not an illegal radio wave is detected.

  Further, in each of the above-described embodiments, the first hold display unit 37 and the second hold display unit 38 display the winning hold at the first starting port 34 and the winning hold at the second starting port 35. However, the present invention is not limited to this. For example, in addition to the first hold display unit 37 and the second hold display unit 38, the liquid crystal display device 13 holds the winning at the first start port 34 and the second start port 35. You may make it display the pending | holding of a prize.

  In each of the above-described embodiments, the sub-control circuit 7 stores programs and various tables in the program ROM 72, but is not limited to this, and is stored in another storage medium readable by a computer. Can be used.

  As a storage medium in this case, for example, a hard disk device, a CD-ROM, a DVD-ROM, or a ROM cartridge can be used. The program and various tables may be stored in both the program ROM 72 and other storage media that can be read by these computers. The program and various tables may be downloaded from a server external to the pachinko gaming machine 1 after the power is turned on and stored in the work RAM 73.

  In each of the above-described embodiments, the sub control circuit 7 uses the work RAM 73 as a temporary storage area of the sub CPU 71. However, the present invention is not limited to this, and other readable / writable storage media may be used. The work RAM 73 and other readable / writable storage media may be used simultaneously.

  In each of the above-described embodiments, the pachinko gaming machine 1 supplies a signal from the main control circuit 6 to the sub control circuit 7 and cannot supply a signal from the sub control circuit 7 to the main control circuit 6. However, the present invention is not limited to this. For example, a signal may be transmitted from the sub control circuit 7 to the main control circuit 6.

  Further, in each of the above-described embodiments, the main CPU 60 sets the total winning invalid period as the predetermined period X. However, the main CPU 60 is not limited thereto, and the total winning invalid period continues until the power of the pachinko gaming machine 1 is turned off. It may be.

  Further, in each of the above-described embodiments, the main CPU 60 is configured to invalidate the winnings detected by all the elements constituting the winning detection means during the all winning invalid period, but is not limited thereto. You may comprise so that the prize which detected only the one part component which comprises a prize detection means may be invalidated.

  In each of the above-described embodiments, the main CPU 60 is configured to output a security signal to the hall computer 90 via the external terminal board 80 by transmitting a radio wave detection command to the sub-control circuit 7. However, the present invention is not limited to this. For example, the security signal may be output to the hall computer 90 when the main CPU 60 sets the all winning invalidation period.

  Further, in each of the above-described embodiments, the main CPU 60 is configured to end the all winning invalid state by power interruption. However, the main CPU 60 is not limited to this, and after returning from power interruption, before a power interruption from a predetermined period X. The total winning invalidity may be continued for a period of time after the elapse of Zms, or may be again disabled for a predetermined period X after returning from the power interruption.

  Further, in each of the embodiments described above, the sub CPU 71 is configured to terminate the fraud notification when the pachinko gaming machine 1 is powered off. If the data in the work RAM 73 held by the power supplied from 77 is normal, the fraud notification may be restored.

  Further, in each of the above-described embodiments, the sub CPU 71 is configured not to terminate the fraud notification until the pachinko gaming machine 1 is turned off. Alternatively, the operation may be ended when a predetermined operation (for example, an operation button is provided at a place where the player cannot touch or is touched and the operation button is operated).

  Further, in each of the above-described embodiments, the main CPU 60 determines the time obtained by subtracting Zms from the minimum output period Y after returning from the power interruption when the power interruption occurs at the time when Zms has not elapsed. The security signal is configured to be transmitted to the hall computer 90. However, the present invention is not limited to this, and the security signal may be output to the hall computer 90 until the minimum output period Y elapses again. The security signal may be output during the minimum output period Y after the output is not performed, or after returning from the power interruption.

  Further, in each of the above-described embodiments, fraud notification is not restarted regardless of whether the data in the work RAM 73 held by the power supplied from the backup capacitor 77 is normal. If the data in the work RAM 73 held by the power supplied from the capacitor 77 is normal, the fraud notification may be resumed.

  In each of the above-described embodiments, the main CPU 60 is configured to output a security signal to the hall computer 90 via the external terminal board 80 by transmitting a radio wave detection command to the sub-control circuit 7. However, the present invention is not limited to this, and the security signal is output to the hall computer 90 via the external terminal board 80 when the main CPU 60 transmits an illegal winning command to the sub-control circuit 7. Also good. In addition, when an unauthorized winning command is received while the security signal is already being output, the external terminal board 80 may set the minimum output period Y again from the time when the unauthorized winning command is received.

  In addition, in the interruption processing of the main control circuit 6 and the sub control circuit 7, before the RAM write prohibition processing, new backup data for performing the interruption interruption processing is created and stored in the RAM work area. If the work area damage check value calculated in the interruption processing at power interruption and the work area damage check value calculated in the power interruption recovery process are the same when power is restored, backup is performed. The restoration process may be performed based on the data, and before the RAM write prohibition process, the newly created backup data is stored in another storage medium that is not the RAM work area, and the backup data is stored in the backup data. Based on this, a return process may be performed.

  Further, in each of the above-described embodiments, the main CPU 60 is configured to be in the all-winning invalid state when the radio wave sensor 500 detects radio waves three times in succession. Can be any number of times. In addition, when the main CPU 60 sets a predetermined timer in the initial radio wave detection and continues to detect the radio wave until the timer reaches 0, the main CPU 60 determines that there has been an illegal act and enters the all-winning invalid state. It may be configured.

  In each of the above-described embodiments, the main CPU 60 clears the winning detection information of each winning opening and the passing gate 36 after setting the winning ball command of each winning opening in a predetermined area of the main RAM 62 in the payout control process ( However, the present invention is not limited to this. For example, the random number value acquisition processing in the normal symbol related switch check processing is performed on the winning detection information of the passing gate 36 (see FIG. 22, step S211). It may be cleared after execution, and the winning detection information of each winning opening may be cleared separately after each winning ball command is set.

  In each of the above-described embodiments, the sub CPU 71 is configured to perform initialization processing when a command other than a power recovery command is received in the main processing (see FIG. 32, step S358). If the data in the work RAM 73 held by the power supplied from the backup capacitor 77 is normal, the return process may be executed even when a command other than the power recovery command is received.

  Further, in each of the above-described embodiments, the sub CPU 71 is configured not to return the fraud notification in the return process (see FIG. 32, step S358), but is not limited thereto, and may return the fraud notification. .

  Further, in each of the above-described embodiments, the sub CPU 71 is configured to notify each fraud until the power of the sub control circuit 7 is turned off. However, the present invention is not limited to this, and for example, that a predetermined period has elapsed. You may make it complete | finish fraud alert | report on condition.

  In each of the above-described embodiments, the pachinko gaming machine 1 is configured to detect a radio wave as a fraud, but is configured to include a magnetic sensor as a magnetic detection unit so as to detect a magnet. May be. In this configuration, the main CPU 60 constitutes a magnetic detection determination unit.

  Further, in the pachinko gaming machine 1 provided with the magnetic sensor, the magnetic sensor is provided at the same position as the radio wave sensor 500, and when detecting magnetism, the magnetic detection determination process similar to the radio wave detection determination process is performed. May be.

  In this case, the main CPU 60 is configured to transmit a magnetism detection command to the sub-control circuit 7 by detecting the magnetic goto, and to notify that the magnetism has been detected when the magnetism detection command is received. Yes. Further, when notifying that the magnetism has been detected, the main CPU 60 preferably notifies the user that the magnetism has been detected by notifying in a manner different from that when detecting the illegal radio wave and the illegal winning. .

  In addition, the pachinko gaming machine 1 may include both the radio wave sensor 500 and the magnetic sensor, and in that case, the invalid period and the output time of the security signal are set to be the same when detecting the illegal radio wave and detecting the illegal magnetism. Alternatively, it may be different.

  In this case, the main CPU 60 determines the order of the winning determination process, the winning information storage process, the radio wave detection determination process or the magnetic detection determination process, and the winning invalidation process as follows: Any order may be used as long as the winning information can be erased when the magnetic detection occurs simultaneously.

(Sixth embodiment)
The chattering removal technique by the winning detection process using the first and second incoming detection counters in the fifth embodiment of the present invention can also be applied to a pachislot machine.

  Hereinafter, with reference to FIGS. 54 to 63, a sixth embodiment of the gaming machine according to the present invention will be described. This embodiment shows an example in which the chattering removal technique in the fifth embodiment of the present invention is applied to a pachislot machine.

  First, a functional flow according to the embodiment of the pachislot machine will be described with reference to FIG.

  In the pachislot machine of this embodiment, medals are used as game media for playing games. In addition to the medals, coins, game balls, game point data, tokens, or the like can be applied as game media.

  When a player inserts a medal and operates a start lever (hereinafter also simply referred to as “lever”), a random number within a predetermined numerical range (for example, 0 to 65535) is set to one value (hereinafter, random). Number) is extracted.

  The internal lottery means performs lottery based on the extracted random number value and determines an internal winning combination. This internal lottery means is carried out by a main control circuit described later. By determining the internal winning combination, a combination of symbols that permits display along a winning determination line described later is determined.

  The types of symbol combinations include those related to “winning” in which benefits such as paying out medals, re-games, bonuses, etc. are given to players, and other so-called “loses”. Is provided.

  Further, when the start lever is operated, a plurality of reels are rotated. Thereafter, when the stop button is pressed by the player, the reel stop control means performs control to stop the rotation of the corresponding reel based on the internal winning combination and the timing when the stop button is pressed. The reel stop control means is responsible for a main control circuit described later.

  In a pachislot machine, basically, control for stopping the rotation of the corresponding reel is performed within a specified time (190 msec) from when the stop button is pressed. In the present embodiment, the number of symbols that move with the rotation of the reel within the specified time is referred to as “the number of sliding symbols”, and the maximum number is defined as four symbols.

  The reel stop control means displays the symbol combination as much as possible along the winning determination line using the specified time when the internal winning combination allowing the display of the symbol combination related to winning is determined. Stop the reel rotation so that

  Further, the reel stop control means stops the rotation of the reel using the specified time so that a combination of symbols that are not permitted to be displayed by the internal winning combination is not displayed along the winning determination line.

  Thus, when the rotation of the plurality of reels is all stopped, the winning determination means determines whether or not the combination of symbols displayed along the winning determination line is related to winning. This winning determination means is carried out by a main control circuit described later. When it is determined that the prize is related to a prize, a bonus such as a medal payout is given to the player. A series of flows as described above is performed as one game in the pachislot machine.

  In addition, in the pachislot machine, in the above-described series of flows, video display performed by a display device such as a liquid crystal display device, light output performed by various lamps, sound output performed by a speaker, or a combination thereof is used. Various productions are performed.

  When the start lever is operated, an effect random number value (hereinafter referred to as effect random number value) is extracted in addition to the random number value used for determining the internal winning combination. When the effect random number value is extracted, the effect content determining means determines, by lottery, what is to be executed this time from among a plurality of types of effect contents associated with the internal winning combination. This effect content determination means is carried out by a sub-control circuit described later.

  When the content of the production is determined, the production execution means is linked to each opportunity such as when the rotation of the reel is started, when the rotation of each reel is stopped, or when the presence / absence of a prize is determined. To proceed with the production. This effect executing means is carried out by a sub-control circuit described later.

  In this way, in the pachislot machine, the player has an opportunity to know or predict the determined internal winning combination (in other words, the combination of symbols to be aimed at) by executing the production contents associated with the internal winning combination. To improve the player's interest.

<Pachislot machine structure>
Next, the structure of the pachislot gaming machine 701 in the present embodiment will be described with reference to FIGS.

[Appearance structure]
FIG. 55 is a perspective view showing an external structure of the pachislot gaming machine 701.

  The exterior body 702 of the pachislot machine 701 includes a cabinet 702a that houses a reel, a circuit board, and the like, and a front door 702b that is attached to the cabinet 702a so as to be openable and closable. Handles 707 are provided on both side surfaces of the cabinet 702a. This handle 707 is a concave portion to be put on when carrying the pachislot gaming machine 701.

  Inside the cabinet 702a, three reels 703L, 703C, and 703R are provided side by side. Hereinafter, the reels 703L, 703C, and 703R are referred to as a left reel 703L, a middle reel 703C, and a right reel 703R, respectively.

  Each reel 703L, 703C, 703R has a reel body formed in a cylindrical shape and a translucent sheet material mounted on the peripheral surface of the reel body. A plurality of (for example, 21) symbols are drawn on the surface of the sheet material at predetermined intervals along the circumferential direction.

  An upper panel unit 710 and a liquid crystal display device 711 are provided above the center of the front door 702b. The upper panel unit 710 forms the upper part of the front door 702b.

  This upper panel unit 710 has a light source and performs an effect by light emitted from the light source. The liquid crystal display device 711 is disposed on the lower side of the upper panel unit 710, and performs an effect by displaying an image.

  A pedestal 712 is formed at the center of the front door 702b. The pedestal portion 712 is provided with a symbol display area 704 and various devices to be operated by the player.

  The symbol display area 704 is disposed on the front side overlapping the three reels 703L, 703C, and 703R when viewed from the front, and is provided corresponding to the three reels 703L, 703C, and 703R.

  The symbol display area 704 functions as a display window, and has a configuration capable of transmitting through the reels 703L, 703C, and 703R provided behind the display window. Hereinafter, the symbol display area 704 is referred to as a reel display window 704.

  When the reels 703L, 703C, and 703R provided at the back of the reel display window 704 are stopped, the reel display window 704 has an upper stage, a middle stage, and a lower stage in the frame among the plural types of symbols of the reels 703L, 703C, and 703R. One symbol (three in total) is displayed in each area.

  In the present embodiment, a pseudo line formed by combining any one of predetermined areas among the three regions including the upper, middle, and lower stages facing the reels 703L, 703C, and 703R of the reel display window 704, It is defined as a line (winning determination line) that is a target for determining whether or not a prize is won.

  The reel display window 704 is formed by a frame member 713 provided on the pedestal portion 712. The frame member 713 has a reel display window 704, an information display window 714, and a stop button attachment portion 715.

  The information display window 714 is provided continuously below the reel display window 704 and opens upward. That is, the reel display window 704 and the information display window 714 are formed as one continuous opening. The information display window 714 and the reel display window 704 are covered with a transparent window cover 716.

  The window cover 716 is disposed on the inner surface side of the frame member 713 and cannot be removed from the front surface side of the front door 702b. The frame member 713 has a sheet placement portion 717 that faces the opening of the information display window 714 with the window cover 716 interposed therebetween.

  Between the sheet placement portion 717 and the window cover 716, a sheet member (information sheet) on which information related to the game is described is disposed. Therefore, the information sheet is covered with the window cover 716 having a smooth surface without irregularities or gaps.

  The window cover 716 that constitutes the information sheet attachment portion cannot be removed from the front side of the front door 702b, and has a smooth surface without irregularities or gaps. Unauthorized access to the inside of the machine 701 can be prevented. The replacement of the information sheet will be described later with reference to FIG.

  In the present embodiment, the reel display window 704 and the information display window 714 are formed as one continuous opening. However, the information display window according to the gaming machine of the present invention may be provided below the reel display window and may not be continuous with the reel display window. That is, the reel display window and the information display window according to the gaming machine of the present invention may be formed as two openings arranged in the vertical direction.

  The stop button attachment portion 715 is provided below the information display window 714 and is formed on a plane facing the front. The stop button attaching portion 715 is provided with a through hole through which the stop buttons 719L, 719C, and 719R pass.

  Stop buttons 719L, 719C, and 719R are associated with each of the three reels 703L, 703C, and 703R, and are provided to stop the rotation of the corresponding reels. Hereinafter, the stop buttons 719L, 719C, and 719R are referred to as a left stop button 719L, a middle stop button 719C, and a right stop button 719R, respectively.

  The stop buttons 719L, 719C, and 719R indicate examples of various devices that are targets of operations by the player. The pedestal unit 712 is provided with a medal slot 721, a BET button 722, and a start lever 723 as various devices to be operated by the player.

  The medal slot 721 is provided for receiving a medal dropped from the outside by the player. The medals received in the medal slot 721 are inserted into one game with a predetermined number as the upper limit, and the amount exceeding the specified number can be deposited inside the pachislot machine 701. (So-called credit function).

  The BET button 722 is provided to determine the number of coins to be inserted into one game from medals deposited inside the pachislot gaming machine 701. The start lever 723 is provided to start the rotation of all the reels (703L, 703C, 703R).

  A 7-segment display 724 made up of 7-segment LEDs is provided on the left side of the reel display window 704 when viewed from the front. The 7-segment display 724 displays information such as the number of medals to be paid out to the player as a privilege (hereinafter referred to as the number of payouts) and the number of medals deposited in the pachislot machine 701 (hereinafter referred to as the number of credits). Digital display.

  Side panel units 726L and 726R are provided on both sides of the pedestal 712. Each of the side panel units 726L and 726R has a light source, and performs an effect by light emitted from the light source.

  A settlement button 727 is provided below the side panel unit 726L. The checkout button 727 is provided to pull out medals deposited inside the pachislot machine 701 to the outside.

  A waist panel unit 731 is provided below the pedestal 712. The waist panel unit 731 has a decorative panel on which an arbitrary image is drawn and a light source that emits light for illuminating the decorative panel from the back side.

  Below the waist panel unit 731, a medal payout port 732, speaker holes 733L and 733R, and a medal tray unit 734 are provided. The medal payout port 732 guides medals discharged by driving a medal payout device 751 described later to the outside.

  The medals discharged from the medal payout opening 732 are stored in the medal tray unit 734. The speaker holes 733L and 733R are provided for outputting sound such as sound effects and music according to the contents of the performance.

[Internal structure]
56 and 57 are perspective views showing the internal structure of the pachislot machine 701. FIG. FIG. 56 shows a state in which the front door 702b is opened and the middle door 741 provided on the back side of the front door 702b is closed with respect to the front door 702b.

  FIG. 57 shows a state where the front door 702b is opened and the middle door 741 is opened with respect to the front door 702b. FIG. 58 is an explanatory diagram showing the inside of the cabinet 702a. FIG. 59 is an explanatory view showing the back side of the front door 702b.

  The cabinet 702a includes a top plate 720a, a bottom plate 720b, left and right side plates 720c and 720d, and a back plate 720e (see FIG. 58). A cabinet-side speaker 742 is disposed on the upper side inside the cabinet 702a.

  The cabinet-side speaker 742 is attached to the back plate 720e of the cabinet 702a via attachment brackets 743L and 743R. The cabinet-side speaker 742 is a speaker for outputting sound effects, for example.

  A cabinet-side relay board 744 is disposed on the left side of the cabinet-side speaker 742 when the inside of the cabinet 702a is viewed from the front. The cabinet side relay board 744 is attached to the left side plate 720c of the cabinet 702a.

  The cabinet-side relay board 744 includes a main control board 771 (see FIG. 60), which will be described later, attached to the middle door 741 (see FIGS. 56 and 57), a hopper device 751, a medal auxiliary storage switch 775, a medal payout count switch ( It relays the wiring that connects (not shown).

  An amplifier board 745 that controls the output of sound from the cabinet-side speaker 742 is disposed in the center of the cabinet 702a. The amplifier board 745 is attached to a mounting shelf 746 fixed to the left and right side plates 720c and 720d.

  Further, an external concentrated terminal plate 747 is disposed on the right side of the amplifier board 745 when the inside of the cabinet 702a is viewed from the front. The external concentrated terminal plate 747 is attached to the right side plate 720d of the cabinet 702a. The external concentration terminal board 747 is provided to output signals such as a medal insertion signal, a medal payout signal, and a security signal to the outside of the pachislot machine 701.

  A sub power supply device 748 is disposed on the left side of the amplifier board 745 when the inside of the cabinet 702a is viewed from the front. The sub power supply device 748 is attached to the left side plate 720c of the cabinet 702a.

  The sub power supply device 748 supplies power with an AC voltage of 100 V to a power supply device 753 described later. In addition, the power of AC voltage 100V is converted to the power of DC voltage and supplied to the amplifier board 745.

  On the lower side inside the cabinet 702a, a medal payout device (hereinafter referred to as a hopper device) 751, a medal auxiliary storage 752, and a power supply device 753 are arranged.

  The hopper device 751 is attached to the central portion of the bottom plate 720b in the cabinet 702a. The hopper device 751 has a structure that can accommodate a large amount of medals and can discharge them one by one.

  The hopper device 751 pays out medals when the number of stored medals exceeds 50, for example, or when the settlement button 727 is pressed to settle the medals. The medals paid out by the hopper device 751 are discharged from the medal payout outlet 732 (see FIG. 55).

  The medal auxiliary storage 752 stores medals overflowing from the hopper device 751. The medal auxiliary storage 752 is disposed on the right side of the hopper device 751 when the inside of the cabinet 702a is viewed from the front. The medal auxiliary storage 752 is engaged with the bottom plate 720b of the cabinet 702a, and is configured to be detachable from the bottom plate 720b.

  The power supply device 753 includes a power switch 753a and a power supply board 753b (see FIG. 59). The power supply device 753 is disposed on the left side of the hopper device 751 when the inside of the cabinet 702a is viewed from the front, and is attached to the left side plate 720c. The power supply device 753 converts the power of the AC voltage 100V supplied from the sub power supply device 748 into the power of the DC voltage necessary for each part, and supplies the converted power to each part.

  As shown in FIGS. 56, 57 and 59, the middle door 741 is arranged at the center of the back surface of the front door 702b, and is configured to be able to open and close the reel display window 704 (see FIG. 57) from the back side.

  Door stoppers 741a, 741b, and 741c are provided on the upper and lower portions of the middle door 741, respectively. The door stoppers 741a, 741b, and 741c fix (prohibit) the opening operation of the middle door 741 with the reel display window 704 closed from the back side. That is, in order to open the middle door 741, it is necessary to rotate the door stoppers 741a, 741b, and 741c to release the middle door 741 from being fixed.

  A main control board case 755 that houses a main control board 771 (see FIG. 60) and three reels 703L, 703C, and 703R are attached to the middle door 741. Stepping motors are connected to the three reels 703L, 703C, and 703R through gears having a predetermined reduction ratio.

  As shown in FIG. 57, when the middle door 741 is opened, the back surface of the window cover 716 and the sheet placement portion 717 are exposed. As described above, an information sheet on which information related to a game is described is arranged between the back surface of the window cover 716 and the sheet placement portion 717.

  This information sheet is inserted into a gap formed between the back surface of the window cover 716 and the sheet placement portion 717 with the middle door 741 opened to expose the back surface of the window cover 716 and the sheet placement portion 717. The When exchanging information sheets, the information sheet is exchanged after the middle door 741 is opened.

  The main control board case 755 is provided with a setting key type switch 756. The setting key type switch 756 is used when changing the setting of the pachislot gaming machine 701 or confirming the setting of the pachislot gaming machine 701. In the present embodiment, a main control board unit is configured by the main control board case 755 and the main control board 771 accommodated in the main control board case 755.

  The main control board 771 accommodated in the main control board case 755 constitutes a main control circuit 791 (see FIG. 61) described later. The main control circuit 791 is a circuit that controls the main flow of the game in the pachislot machine 701, such as determination of an internal winning combination, rotation and stop of the reels 703L, 703C, and 703R, and determination of the presence or absence of winning. A specific configuration of the main control circuit 791 will be described later.

  A sub control board case 757 that houses a sub control board 772 (see FIG. 62) is disposed above the middle door 741. The sub control board 772 housed in the sub control board case 757 constitutes a sub control circuit 801 (see FIG. 62). The sub-control circuit 801 is a circuit that controls execution of effects by displaying images. A specific configuration of the sub control circuit 801 will be described later.

  A center speaker 758 is disposed above the sub control board case 757. A fan 759 is disposed on the left side of the center speaker 758 when the front door 702b is viewed from the back side.

  That is, the fan 759 is disposed at the upper part on the back surface side of the front door 702b. The fan 759 blows air downward to cool the inside of the pachislot machine 701.

  When the front door 702b is viewed from the back side, a sub relay board 761 is disposed on the right side of the sub control board case 757. The sub-relay board 761 relays the wiring that connects the sub-control board 772 and the main control board 771.

  In addition, the sub-control board 772 is a board that relays a wiring that connects the sub-control board 772 and a board disposed around the sub-control board 772. In addition, as a board | substrate arrange | positioned around the sub control board 772, LED board 762A, 762B mentioned later is mentioned.

  The LED boards 762A and 762B are disposed above the sub control board case 757 when viewed from the back side of the front door 702b. These LED boards 762A and 762B cause the LED 785 (see FIG. 60), which shows a specific example of the light source, to emit light in accordance with the effects executed by the control of the sub-control circuit 801 (see FIG. 62), and display a blinking pattern. To do. Note that the pachislot machine 701 of the present embodiment includes a plurality of LED boards in addition to the LED boards 762A and 762B.

  Below the sub-relay board 761, a 24h door opening / closing monitoring unit 763 is disposed. The 24h door opening / closing monitoring unit 763 stores the opening / closing history of the middle door 741. When the middle door 741 is opened, a signal for displaying an error on the liquid crystal display device 711 is output to the sub control board 772 (sub control circuit 801).

  A board speaker 764 and lower speakers 765L and 765R are disposed below the middle door 741. The board speaker 764 faces the waist panel unit 731 (see FIG. 55), and the lower speakers 765L and 765R face the speaker holes 733L and 733R (see FIG. 55), respectively.

  A selector 766 and a door open / close monitoring switch 767 are disposed above the lower speaker 765L. The selector 766 is a device that selects whether or not the material and shape of the medal are appropriate, and guides an appropriate medal inserted into the medal insertion port 721 to the hopper device 751. A medal sensor (not shown) for detecting that an appropriate medal has passed is provided on the path through which the medal passes in the selector 766.

  The door open / close monitoring switch 767 is arranged on the left side of the selector 766 when the front door 702b is viewed from the back side. The door open / close monitoring switch 767 outputs a security signal for notifying the opening / closing of the front door 702b to the outside of the pachislot machine 701.

  Further, a door relay terminal plate 768 is disposed in an area below the reel display window 704 and opened and closed by the middle door 741 (see FIG. 57). The door relay terminal plate 768 includes a main control board 771 (see FIG. 60) in the main control board case 755, various buttons and switches, a sub-control board 772 (see FIG. 60), a selector 766, and a game operation display board 781. It is a board | substrate which relays wiring with (refer FIG. 60).

  Examples of the various buttons and switches include a BET button 722, a settlement button 727, a door open / close monitoring switch 767, a BET switch 777, a start switch 779, which will be described later, and the like.

<Control system for pachislot machines>
Next, a control system provided in the pachislot gaming machine 701 will be described with reference to FIG. FIG. 60 is a block diagram showing a control system of the pachislot gaming machine 701.

  The pachislot gaming machine 701 has a main control board 771 disposed on the middle door 741 and a sub control board 772 disposed on the front door 702b. The main control board 771 includes a reel relay terminal board 774, a setting key switch 756, an external concentration terminal board 747, a hopper device 751, a medal auxiliary storage switch 775, and a power supply board 753b of the power supply 753. It is connected.

  The key switch for setting 756, the external concentration terminal board 747, the hopper device 751 and the medal auxiliary storage switch 775 are connected to the main control board 771 via the cabinet-side relay board 744. Since the external concentration terminal plate 747 and the hopper device 751 have been described above, description thereof will be omitted.

  The reel relay terminal plate 774 is disposed inside the reel body of each reel 703L, 703C, 703R. The reel relay terminal plate 774 is electrically connected to stepping motors (not shown) of the reels 703L, 703C, and 703R, and relays signals output from the main control board 771 to the stepping motor.

  The medal auxiliary storage switch 775 penetrates a later-described switch through hole of the medal auxiliary storage 752. This medal auxiliary storage switch 775 detects whether or not the medal auxiliary storage 752 is full of medals.

  A power switch 753 a is connected to the power supply board 753 b of the power supply device 753. The power switch 753a is turned on when supplying necessary power to the pachislot machine 701.

  The main control board 771 is connected to a selector 766, a door open / close monitoring switch 767, a BET switch 777, a settlement switch 778, a start switch 779, a stop switch board 780, a game operation display board 781 and the like via a door relay terminal plate 768. A sub relay board 761 is connected. Since the selector 766, the door opening / closing monitoring switch 767, and the sub relay board 761 have been described above, description thereof will be omitted.

  The BET switch 777 detects that the BET button 722 has been pressed by the player. The settlement switch 778 detects that the settlement button 727 has been pressed by the player. The start switch 779 detects that the start lever 723 has been operated by the player (start operation).

  The stop switch substrate 780 is a substrate that constitutes a circuit for stopping the rotating reel and a circuit for displaying the stopable reel by an LED or the like. The stop switch board 780 is provided with a stop switch. The stop switch detects that each stop button 719L, 719C, 719R has been pressed by the player (stop operation).

  The game operation display board 781 displays the number of inserted medals on the 7-segment display 724 when accepting insertion of medals, when the three reels 703L, 703C, and 703R are rotatable and when replaying. It is a substrate for making it.

  A 7-segment display 724 and an LED 782 are connected to the game operation display board 781. The LED 782 illuminates, for example, a mark for displaying the start of a game or a mark for performing a re-game.

  The sub control board 772 is connected to the main control board 771 via the door relay terminal board 768 and the sub relay board 761. A sound I / O board 784, LED boards 762A and 762B, and a 24h door open / close monitoring unit 763 are connected to the sub control board 772 via a sub relay board 761. Since these LED substrates 762A and 762B and the 24h door opening / closing monitoring unit 763 have been described above, description thereof will be omitted.

  The sound I / O board 784 outputs sound to a center speaker 758, a board speaker 764, lower speakers 765L and 765R, and a speaker (not shown) provided on the front door 702b.

  Further, a ROM cartridge substrate 786 and a liquid crystal relay substrate 787 are connected to the sub control substrate 772. The ROM cartridge substrate 786 and the liquid crystal relay substrate 787 are housed in the sub control substrate case 757 together with the sub control substrate 772.

  The ROM cartridge substrate 786 is a substrate for managing production images (video), sound, LED substrates 762A and 762B and other LED substrates (not shown), and communication data. The liquid crystal relay substrate 787 is a substrate that relays the wiring connecting the sub control substrate 772 and the liquid crystal display device 711.

<Main control circuit>
Next, a main control circuit 791 constituted by the main control board 771 will be described with reference to FIG. FIG. 61 is a block diagram showing a configuration example of the main control circuit 791 of the pachislot gaming machine 701.

  The main control circuit 791 includes a microcomputer 792 installed on the main control board 771 as a main component. The microcomputer 792 includes a main CPU 793, a main ROM 794, and a main RAM 795.

  The main ROM 794 stores a control program executed by the main CPU 793, a data table, data for transmitting various control commands (commands) to the sub control circuit 801, and the like. The main RAM 795 is provided with a storage area for storing various data such as an internal winning combination determined by executing the control program.

  To the main CPU 793, a clock pulse generation circuit 796, a frequency divider 797, a random number generator 798, and a sampling circuit 799 are connected. The clock pulse generation circuit 796 and the frequency divider 797 generate clock pulses. A storage area for storing various data such as an internal winning combination determined by execution is provided.

  The main CPU 793 executes a control program based on the generated clock pulse. The random number generator 798 generates a random number in a predetermined range (for example, 0 to 65535). The sampling circuit 799 extracts one value from the generated random numbers.

  The main CPU 793 counts the number of times pulses are output to the stepping motors of the reels 703L, 703C, and 703R after detecting the reel index. Thereby, the main CPU 793 manages the rotation angle of each reel 703L, 703C, 703R (mainly how many symbols the reel has rotated).

  The reel index is information indicating that the reel has made one revolution. This reel index is provided at a predetermined position of each of the reels 703L, 703C, and 703R, for example, with a light emitting unit and a light receiving unit, and the rotation of each reel 703L, 703C, and 703R causes the light emitting unit and the light receiving unit to rotate. Detection is performed by a reel position detection unit (not shown) including a detection piece interposed therebetween.

  Here, the management of the rotation angle of each reel 703L, 703C, 703R will be specifically described. The number of pulses output to the stepping motor is counted by a pulse counter provided in the main RAM 795.

  Each time the output of a predetermined number of pulses (for example, 16 times) necessary for rotation of one symbol is counted by the pulse counter, the symbol counter provided in the main RAM 795 is incremented by one.

  The symbol counter is provided for each reel 703L, 703C, 703R. The value of the symbol counter is cleared when a reel index is detected by a reel position detector (not shown).

  In other words, in the present embodiment, by managing the symbol counter, it is possible to manage how many symbols have been rotated since the reel index was detected. Therefore, the positions of the symbols on the reels 703L, 703C, and 703R are detected based on the position at which the reel index is detected.

  As described above, in the present embodiment, the maximum number of sliding symbols is set to four symbols. Therefore, when the left stop button 719L is pressed, the symbol of the left reel 703L in the middle of the reel display window 704 and each symbol within the range up to four symbols ahead are displayed in the middle of the reel display window 704. It becomes a symbol that can be stopped.

<Sub control circuit>
Next, the sub control circuit 801 constituted by the sub control board 772 will be described with reference to FIG. FIG. 62 is a block diagram showing a configuration example of the sub-control circuit 801 of the pachislot gaming machine 701.

  The sub control circuit 801 is electrically connected to the main control circuit 791 and performs processing such as determination and execution of effect contents based on a command transmitted from the main control circuit 791. The sub control circuit 801 basically includes a sub CPU 802, a sub RAM 803, a rendering processor 804, a drawing RAM 805, and a driver 806.

  The sub CPU 802 controls the output of video, sound, and light according to the control program stored in the ROM cartridge substrate 786 in accordance with the command transmitted from the main control circuit 791. The ROM cartridge substrate 786 basically includes a program storage area and a data storage area.

  In the program storage area, a control program executed by the sub CPU 802 is stored. For example, the control program includes a main board communication task for controlling communication with the main control circuit 791, and an effect registration task for extracting effect random numbers and determining and registering the effect contents (effect data). Is included.

  In addition, a drawing control task for controlling display of an image by the liquid crystal display device 711 (see FIG. 59) based on the determined contents of presentation, a lamp control task for controlling light output from a light source such as the LED 785, speakers 758, 764, 765L. , 765R and the like, and a voice control task for controlling the sound output from the speaker.

  The data storage area includes a storage area for storing various data tables, a storage area for storing effect data constituting each effect content, and a storage area for storing animation data related to creation of video. Also included are a storage area for storing sound data related to BGM and sound effects, a storage area for storing lamp data related to the light on / off pattern, and the like.

  The sub-RAM 803 is provided with a storage area for registering the determined contents and effects data, and a storage area for storing various data such as an internal winning combination transmitted from the main control circuit 791.

  The sub CPU 802, the rendering processor 804, the drawing RAM (including the frame buffer) 805, and the driver 806 create a video according to the animation data designated by the contents of the presentation, and display the created video on the liquid crystal display device 711.

  Further, the sub CPU 802 causes a sound such as BGM to be output from speakers such as speakers 758, 764, 765L, and 765R according to the sound data specified by the contents of the effect. Further, the sub CPU 802 controls turning on and off of the light source such as the LED 785 in accordance with the lamp data designated by the contents of the effect.

  In the present embodiment, the main CPU 793 constitutes a first lever detection counter and a second lever detection counter. The first lever detection counter and the second lever detection counter are configured in the same manner as the first ball detection counter and the second ball detection counter in the fifth embodiment of the present invention, respectively. Note that the values of the first lever detection counter and the second lever detection counter may be stored in a register configuring the main CPU 793 or may be stored in a predetermined area of the main RAM 795.

  That is, in the present embodiment, the start switch 779 constitutes a state detection unit that detects the state of the start lever 723 as a game component for playing a game. The first lever detection counter constitutes first storage means for storing the detection result of the state detection means.

  Specifically, the start switch 779 sets the detection result to “0” (“L”) when the start lever 723 is not operated and the detection result when the start lever 723 is operated. “1” (“H”). The first lever detection counter is configured to store the detection result of the start switch 779, similarly to the first incoming ball detection counter in the fifth embodiment of the present invention.

  The main CPU 793 constitutes a detection result determination unit that determines the current detection result based on the detection result of the state detection unit and the previous detection result stored in the first storage unit. A 2nd lever detection counter comprises the 2nd memory | storage means in which the detection result determined by the detection result determination means is memorize | stored.

  Specifically, the second lever detection counter is based on the previous value and the current value of the first lever detection counter, similarly to the second entrance detection counter in the fifth embodiment of the present invention. This detection result is decided.

  Specifically, if the previous value of the first lever detection counter is the same as the current value, the second lever detection counter sets the current value of the first lever detection counter as the current value, and detects the first lever detection. If the previous value of the counter is not the same as the current value, the previous value of the second lever detection counter is set as the current value.

  The main CPU 793 determines whether the state of the start lever 723 has changed based on the detection result determined by the detection result determination unit and the previous detection result stored in the second storage unit. The state determination means and detection result determination means for determining whether or not the detection result detected by the state detection means and the previous detection result stored in the first storage means are the same.

  Specifically, the main CPU 793 determines that the state of the start lever 723 has not changed if the previous value and the current value of the second lever detection counter are the same, and the previous and current values of the second lever detection counter are determined. If the values are different, it is determined that the state of the start lever 723 has changed.

[Lever detection processing]
FIG. 63 is a diagram for explaining the details of the lever detection processing in the present embodiment. Note that the lever detection process described below is repeatedly executed by the main CPU 793 during a period when the operation of the start lever 723 is permitted.

  In step S621, the main CPU 793 performs a first lever detection counter update process. In this process, the main CPU 793 updates the value of the first lever detection counter according to the operation on the start lever 723. When this process ends, the main CPU 793 moves the process to step S622.

  In step S622, the main CPU 793 performs a process of determining whether or not the value of the first lever detection counter is the same between the current time and the previous time. In this process, when the main CPU 793 determines that the value of the first lever detection counter is the same as this time and the previous time, the main CPU 793 moves to step S623, and the value of the first lever detection counter is the same as this time and the previous time. If it is determined that it is not, the process proceeds to step S624.

  In step S623, the main CPU 793 performs a process of setting the current value of the first lever detection counter to the second lever detection counter. When this process ends, the main CPU 793 moves the process to step S625.

  In step S624, the main CPU 793 performs a process of setting the previous value of the second lever detection counter to the second lever detection counter. When this process ends, the main CPU 793 moves the process to step S625.

  In step S625, the main CPU 793 performs a process of determining whether or not the second lever detection counter has detected a lever operation. In this process, the main CPU 793 detects the lever operation in the second lever detection counter, that is, determines whether or not the use area of the second lever detection counter is “01” (“LH”). If it is determined that the lever detection counter has detected a lever operation, the process proceeds to step S626. If it is determined that the second lever detection counter has not detected a lever operation, this subroutine is terminated.

  In step S <b> 626, the main CPU 793 executes processing according to the operation on the start lever 723. In this process, the main CPU 793 starts rotation of all the reels 703L, 703C, and 703R if various conditions are satisfied. When this process ends, the main CPU 793 ends this subroutine. In this way, the main CPU 793 constitutes a control unit that executes control based on the determination result of the component state determination unit.

  As described above, in the pachislot machine 701 according to the present embodiment, when the current detection result of the start switch 779 and the previous detection result stored in the first lever detection counter are the same. When the detection result of the start switch 779 is determined as the current detection result and the detection result of the start switch 779 is not the same as the previous detection result stored in the first lever detection counter, the second lever detection counter Since the previous detection result stored in is determined as the current detection result, the state of the start lever 723 can be accurately detected even if the detection result of the start switch 779 is affected by chattering.

  In this embodiment, an example in which the state of the start lever 723 is detected by lever detection processing has been described. However, the BET button 722, the settlement button 727, the door open / close monitoring switch 767, the BET switch 777, the start switch 779, and the like. The state of the buttons and switches may be detected by a process similar to the lever detection process. Further, the state of medals detected by various sensors such as the medal sensor in the selector 766 may be detected by a process similar to the lever detection process.

(Appendix)
In the gaming machine as described above, in the special gaming state, the gaming ball rolling in the gaming area is between a part of the opening / closing member that is being displaced to the closed state and the gaming part that forms the specific winning opening. It may get caught.

  Even if a game medium is sandwiched between the opening / closing member and the gaming part, if the opening / closing member is opened by continuing the special gaming state thereafter, the gaming medium sandwiched between the opening / closing member and the gaming part Since it is detected that the opening / closing member is in the open state and the specific winning opening is passed, it is not determined that fraud has been performed.

  However, in the gaming machine disclosed in Patent Document 1, after the special game state is finished without the open / close member being in the open state, the game is performed with the game medium sandwiched between the open / close member and the game component. Will be deceived.

  In such a case, the game medium sandwiched between the opening / closing member and the game component can be obtained by giving vibration to the game board by the player or by opening the opening / closing member by a store clerk in the game hall. Although it is released, it is highly possible that it is detected that the released game medium has entered the specific winning opening and has passed through the specific winning opening.

  Thus, in the gaming machine disclosed in Patent Document 1, when the game medium sandwiched between the opening / closing member and the gaming component is released, a predetermined period has elapsed since the opening / closing member is closed. In such a case, there is a problem in that it may be erroneously determined that fraud has been performed even though fraud has not been performed.

  In order to solve this problem, even if the fraud determination is not performed after the last open state of the opening / closing member in the special gaming state, the fraud after the final opening state of the opening / closing member in the special gaming state is not performed. It can no longer be detected.

  The present invention has been made in view of the above problems, and an object of the present invention is to provide a gaming machine that can prevent fraudulent misjudgment while appropriately detecting fraud.

  In order to achieve the above object, a gaming machine according to the present invention is provided in a gaming board (140) having a gaming area (14) capable of rolling a game medium (gaming ball), and in the gaming area. A winning area in which the medium can be won (for example, a first grand prize opening 39), a first state that makes it easier to win a gaming medium in the winning area, and a winning of the game medium in the winning area than in the first state An openable / closable member (for example, the first shutter 41) that is displaceable between the second state and the winning state, and a winning detection means (for example, a first count switch 391) that detects a game medium that has won the winning area. , Special gaming state control for controlling the gaming state so as to be in a special gaming state (for example, a big hit gaming state) advantageous to the player in response to establishment of a predetermined advantageous condition (for example, winning a special symbol lottery) Means (Mei CPU 60) and in the special gaming state, the opening / closing member is displaced from the second state to the first state, and a predetermined condition is satisfied (for example, seven game balls are won in the big prize opening). In accordance with the advantage game execution means (main CPU 60) for executing a plurality of advantageous games (round game) for executing a series of operations to be displaced from the first state to the second state at least once, in the special game state In the period from the end of the last advantageous game to the end of the special game state, it is determined whether or not a predetermined first prescribed number (for example, 2) or more of game media has been detected by the winning detection means. First period determination means (main CPU 60) that can be determined, and the opening / closing member between the start of the first advantageous game in the special gaming state and the start of the last advantageous game In each period of the second state, it is possible to determine whether or not a game medium equal to or greater than a second specified number (for example, 1) that is set in advance to be less than the first specified number has been detected by the winning detection means. At least one of the second period determining means (main CPU 60) and the first period determining means and the second period determining means detects the first and second prescribed number of game media respectively by the winning detection means. On the condition that it has been determined that a fraud has occurred, the fraud determination means (main CPU 60) determines that fraud has been performed, and the notifying means (sub CPU 11) capable of notifying that fraud has been performed. An unauthorized command transmitting means (main CPU 60) capable of transmitting an unauthorized winning command) and the outside of the gaming machine when the fraud determining means determines that the fraud has been performed. Security signal transmission means (main CPU 60) capable of transmitting a security signal for a predetermined time (minimum output period Yms) to the power source within a predetermined period after the fraud determination means determines that the fraud has been performed. When a disconnection occurs, the security signal transmission means continues the security signal to the outside of the gaming machine after power recovery so that the sum of the transmission time of the security signal before the disconnection becomes the predetermined time. On the other hand, the unauthorized command transmitting means does not transmit the unauthorized command to the notifying means after power recovery.

  With this configuration, in the gaming machine according to the present invention, the winning detection means detects a predetermined or more predetermined number of gaming media during the period from the end of the advantageous game to the end of the special gaming state. It is determined that fraud has been performed on the condition.

  In the gaming machine according to the present invention, the opening / closing member is displaced from the first state to the second state between the start of the first advantageous game in the special game state and the end of the last advantageous game. It is determined that fraud has been performed on the condition that the second prescribed number of game media previously determined to be less than the first prescribed number has been detected by the winning detection means in the period until the first state is subsequently changed again. To do.

  That is, the gaming machine according to the present invention is determined to be fraudulent during the period of detecting the fraud after the advantageous game executed last, based on the number of game media determined to be fraudulent during the period of detecting fraud between advantageous games. A large number of game media are set.

  Therefore, even if the gaming machine according to the present invention wins a game medium sandwiched between the opening / closing member and the gaming part during the period of detecting the illegality after the advantageous game that is executed last, it is erroneously determined to be illegal. Can be prevented.

  As described above, the gaming machine according to the present invention can prevent misjudgment from being erroneously detected while appropriately detecting fraud.

  The present invention can provide a gaming machine capable of preventing fraudulent misjudgment while appropriately detecting fraud.

1 Pachinko machine (game machine)
11 Sub CPU (notification means)
14 game board 41 1st shutter (opening and closing member)
42 Second shutter (opening / closing member)
35 Second start (winning area)
39 First Grand Prize Exit (Winning Area)
40 Second Grand Prize Entrance (Winning Area)
48 Blade member (opening / closing member)
60 main CPU (special game state control means, advantageous game execution means, final elapsed period determination means, first period determination means, continuous elapsed period determination means, second period determination means, fraud determination means, fraud command transmission means, security signal (Transmission means, counting means, non-special game period determination means)
140 gaming area 340 first start port switch (state detection means)
350 Second start port switch (winning detection means, status detection means)
360 Passing gate switch (state detection means)
391 first count switch (winning detection means, state detection means)
392 Second count switch (winning detection means, status detection means)
701 Pachislot machine (game machine)
723 Start lever (game parts)
779 Start switch (status detection means)
793 main CPU (detection result determination means, component state determination means, control means, detection result determination means)
795 Main RAM (first storage means, second storage means)

Claims (2)

Fraud determination means for determining whether fraud has been performed based on a predetermined condition;
Based on the determination result of the fraud determination means, an unauthorized command transmission means capable of transmitting an unauthorized command to the notification means capable of notifying that fraud has been performed;
An illegal command receiving means capable of receiving the illegal command;
Based on the reception of the illegal command by the illegal command receiving means, the notification means continues to execute a predetermined notification until a predetermined termination condition is satisfied, and the game is continued while the predetermined notification is continued. And a notification control means for terminating the predetermined notification when a power interruption occurs only in the effect control means of the game control means for controlling the effect and the effect control means for controlling the effect,
The fraud command transmission means determines that fraud has been performed by the fraud determination means regardless of whether or not the predetermined termination condition is satisfied after the predetermined notification is terminated due to the occurrence of the power interruption. In this case, the gaming machine is capable of transmitting the illegal command. A game board having a game area in which game media can roll;
A prize area provided in the game area and allowing a game medium to be awarded;
An opening / closing member that is displaceable between a first state that facilitates winning of a game medium in the winning area and a second state that makes it difficult to win a gaming medium in the winning area than in the first state;
A winning detection means for detecting a game medium won in the winning area;
Special gaming state control means for controlling the gaming state so as to be in a special gaming state advantageous to the player in response to the establishment of a predetermined advantageous condition;
In the special gaming state, after the opening / closing member is displaced from the second state to the first state, a series of operations for displacing the opening / closing member from the first state to the second state is executed at least once. Advantageous game execution means for executing the advantageous game a plurality of times,
2. The gaming machine according to claim 1, wherein the predetermined condition is that a predetermined number or more of game media are detected by the winning detection means in the special gaming state.

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