JP2018037476A - Method for manufacturing printed wiring board and printed wiring board - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a method for manufacturing a printed wiring board which can use a via without a recess and with a large diameter as heat dissipation conductor and in which dimensional behavior is not dispersed and work does not become complicated.SOLUTION: A method for manufacturing a printed wiring board includes the steps of: forming a prepared hole 3a for forming vias 3 and 4 in an insulation layer 1 in which a metal layer 5 is formed on at least one surface; selectively forming a plating in the prepared hole 3a for via formation and in a peripheral part of the hole; removing plating in a portion protruding from a surface of the metal layer 5; and forming a circuit 2 by a subtractive method.SELECTED DRAWING: Figure 2

Description

  The present disclosure relates to a method for manufacturing a printed wiring board and a printed wiring board.

  Conventionally, in electrolytic panel plating including vias, the vias are filled by thickening the entire panel (printed wiring board), but the vias are sufficiently plated due to interlayer thickness, via diameter, etc. May not be filled, and a recess of 6 μm or more may occur on the via surface. If this dent remains, via connection reliability and the like are reduced. Therefore, after the panel plating process, the entire panel is mechanically polished several times to reduce the dents, and after this dent enters the standard, chemical polishing (sulfuric acid / hydrogen peroxide aqueous soft Etching etc.) is performed to adjust to a desired conductor thickness.

  However, regardless of whether the polishing is mechanical polishing or chemical polishing, the entire panel surface cannot always be uniformly polished, and if the thick plating is removed by polishing, in-plane variation of polishing occurs. In mechanical polishing, the vertical and horizontal dimensions of the panel change due to friction. Therefore, if the number of polishings for each panel differs, the dimensional behavior for each panel varies. Further, if the conductor thickness varies due to polishing, the accuracy of the circuit width in the etching process (subtractive method) is lowered. On the other hand, for example, Patent Document 1 discloses a method of manufacturing a wiring board that separates an electrolytic plating process for depositing metal into the via and an electrolytic plating process for forming a wiring. As the number increases, the work becomes complicated.

JP 2001-053444 A

  In the printed wiring board manufacturing method of the present disclosure, a hole for forming a via is formed in an insulating layer having a metal layer formed on at least one surface, and plating is performed on the hole for forming the via and a peripheral portion of the hole. A circuit is formed by a subtractive method by selectively forming, removing the plating at a portion protruding from the surface of the metal layer.

  The printed wiring board of the present disclosure includes at least one via filled with plating and a circuit formed of a metal layer, and includes at least one insulating layer in which the surface of the via is flush with the surface of the circuit. The insulating layer is arranged so as to constitute at least one surface layer.

It is explanatory drawing which shows one Embodiment of the printed wiring board which concerns on this indication. It is explanatory drawing which shows one Embodiment of the manufacturing process of the printed wiring board of this indication. It is explanatory drawing which shows one Embodiment of the manufacturing process of the printed wiring board of this indication.

According to the method for manufacturing a printed wiring board of the present disclosure, a hole for forming a via is formed in an insulating layer having a metal layer formed on at least one surface, and plating is performed on the hole for forming the via and a peripheral portion of the hole. Then, the plating protruding from the surface of the metal layer is selectively removed. Therefore, the via surface cannot be dented, and the dimensional behavior of the printed wiring board does not vary. Further, since the plating is not performed except for the vias, the thickness of the metal layer does not vary, the circuit width accuracy is stabilized by the subtractive etching process, and the circuit width can be miniaturized.
In addition, since the printed wiring board of the present disclosure includes at least one insulating layer in which at least one surface layer is flush with the surface of the via and the surface of the circuit, the surface of the via (plating) has a dent. Connection reliability is improved.
Hereinafter, the present disclosure will be described in detail.

  As shown in FIG. 1, the printed wiring board 10 ′ includes an insulating layer 1 including a circuit 2 and vias 3 and 4 whose surfaces are flush with each other on at least one surface layer.

  The insulating layer 1 will not be specifically limited if it is formed with the raw material which has insulation. Examples of such an insulating material include organic resins such as epoxy resins, bismaleimide-triazine resins, and polyimide resins. These organic resins may be used in combination of two or more.

  When an organic resin is used as the insulating layer 1, it is preferable to use the organic resin with a reinforcing material. Examples of the reinforcing material include an insulating cloth material such as glass fiber, glass nonwoven fabric, aramid nonwoven fabric, aramid fiber, and polyester fiber. Two or more of these reinforcing materials may be used in combination. The insulating layer 1 is preferably formed from an organic resin containing a glass material such as glass fiber. Furthermore, the insulating layer 1 may contain inorganic fillers such as silica, barium sulfate, talc, clay, glass, calcium carbonate, and titanium oxide. The insulating layer 1 may have an insulating cloth material. The insulating layer 1 may have a single layer structure or a multilayer structure.

  On at least one surface of the insulating layer 1, at least one circuit 2 that is a conductive circuit that is electrically connected to another component or a substrate is formed. As will be described later, the circuit 2 is formed by exposing, developing, etching, and peeling a metal layer formed on the surface of the insulating layer 1 by a known subtractive method.

  The vias 3 and 4 are provided by forming a hole for forming a via in the insulator 1 by laser processing or the like, and selectively forming plating on the hole and the peripheral portion thereof. That is, the vias 3 and 4 are formed by plating (metal plating) in the inside and the peripheral edge thereof, and are electrically connected to the circuit 2 in the inner layer of the printed wiring board 10 ′. Further, it is sufficient that at least one via is provided on the printed wiring board 10 ', and the diameters of the vias may be different when a plurality of vias are provided. In the present embodiment, the via 3 has a larger diameter than the via 4.

  The insulating layer 1 including the circuit 2 and the vias 3 and 4 can be formed as a build-up layer having a multilayer structure by laminating an arbitrary number of layers. In the embodiment shown in FIG. 1, the printed wiring board 10 ′ has a two-layer structure, and is formed by laminating the insulating layer 1 including the circuit 2 and the vias 3 and 4 on the insulating layer 1 ′. . The two insulating layers 1 and 1 'are preferably formed of the same resin, and the vias 3 and 4 are formed on the vias 3' and 4 ', respectively. Since the vias 3 'and 4' are not formed on the surface layer of the printed wiring board 10 ', the surface may have a dent or the surface may not be flush.

  As described above, the vias 3 and 4 that have no dent on the surface and are flush with the circuit 2 are arranged so as to constitute at least one surface layer in the case of a build-up layer having a multilayer structure. It is effectively used for large-diameter vias (heat-dissipating conductors) used in directional heat dissipation structures. At least one of the heat dissipating conductors is provided on the printed wiring board, which transfers heat generated in the printed wiring board 10 'and releases it, and has a large via diameter.

The manufacturing method of the printed wiring board which concerns on one Embodiment of this indication includes the following process.
(I) A via forming hole is formed by laser processing or the like in an insulating layer having a metal layer formed on at least one surface.
(Ii) Plating is selectively formed on a hole for forming a via and a peripheral portion of the hole.
(Iii) The plating of the part which protruded from the metal layer surface is removed.
(Iv) A circuit is formed by a subtractive method.

  The manufacturing method of the printed wiring board of this indication is demonstrated based on FIG. In addition, the description about the member mentioned above is abbreviate | omitted.

  First, as shown in FIG. 2A, via formation pilot holes 3a and 4a are formed in the insulating layer 1 having the metal layer 5 formed on the surface thereof by laser processing or the like. Next, after filling the via holes 3a, 4a for forming vias with plating (conductor), a resist (for example, a dry film) is formed, and exposure, development, etching, and peeling are performed by a known method (subtractive method or the like). Then, the portions other than the formation positions of the vias 3 and 4 and the circuit 2 are removed, and the circuit 2 and the vias 3 and 4 are formed (FIG. 2B). At this time, the vias 3 and 4 are formed so as to have different diameters, and the plating filling amount for filling the via 4 does not sufficiently fill the via 3 with plating, so that a dent 9a is generated on the surface.

  Next, an insulating layer is formed and the same process as described above is appropriately performed to form a laminate 10a having an arbitrary number of layers and a metal layer 5 formed on the surface as shown in FIG. At this time, in the laminated body 10a, the entire panel is plated. Therefore, when a sufficient amount of plating is filled in the via 4 having a small diameter, a recess 9 is formed in the outermost layer of the via 3 having a large diameter. This recess 9 is a stack of the recesses 9a shown in FIG. 2B, and becomes larger as the number of layers of the laminate 10a increases. If a sufficient amount of plating is filled in the via 3, the entire panel becomes too thick, and a polishing problem occurs as in the case of removing the dent. Therefore, when worried about the problem of polishing, when plating on vias having different diameters, plating is performed with a plating amount that can sufficiently fill vias having smaller diameters.

Next, holes 30a and 40a for forming the outermost vias 30 and 40 that are electrically connected to the vias 3 and 4 of the stacked body 10a are formed by laser processing or the like. The metal layer 5 is made of, for example, a metal foil, and the metal foil is particularly preferably a copper foil. The holes 30a and 40a may have different diameters. In this embodiment, the hole 30a has a larger diameter than the hole 40a. Examples of laser light used in this laser processing include a CO ₂ laser and a UV-YAG laser. In addition, when the resin residue (not shown) of the laminated body 10a at the time of opening remains in the periphery of an opening part of the holes 30a and 40a, an inner wall surface, etc., a residue is removed by a desmear process.
Next, a plating resist 6 (for example, a dry film) is formed on the surface of the laminate 10a, and exposure and development are performed by a known method to open the positions where the holes 30a and 40a are formed. (Fig. 2 (d))

  Next, as shown in FIG. 2E, the conductors 50 are filled in the holes 30a and 40a. As a filling method, for example, a pattern plating method is preferable. At this time, the conductor 50 protrudes as the protruding portion 50a with respect to the holes 30a and 40a. Examples of the conductor 50 include electrolytic copper plating.

  Next, as shown in FIG. 3 (f), after removing the plating resist 6 by peeling, the protruding portion 50 a protruding from the surface of the metal layer 5 is polished and selected until it is flush with the metal layer 5. (Fig. 3 (g)). Since this polishing selectively polishes only the protrusions 50a, the protrusions 50a can be easily removed with a small number of polishings, and the dimensional behavior of the printed wiring board is stabilized. This polishing is preferably mechanical polishing, and in particular, buffing in which various abrasives are attached to the periphery (surface) of the polishing wheel (buff) and rotated to polish the material. As a material used for the buff, for example, a non-woven fabric or the like can be mentioned. Examples of this ceramic buff include CGSW (manufactured by Sankyo Rikagaku Co., Ltd.).

Next, as shown in FIG. 3H, a circuit is formed using a known subtractive method. That is, the etching resist 7 is disposed on the metal layer 5 at the position where the circuit 2 and the vias 30 and 40 are formed, and is exposed and developed. When the metal layer 5 other than the positions where the vias 30 and 40 and the circuit 2 are formed is removed by etching, and then the etching resist 7 is peeled off, the vias 30 and 40 having no dents on the surface, and the vias 30 and 40 and the surface face each other. A printed wiring board 10 having a single circuit 2 can be obtained (FIG. 3I).
Thereafter, the insulating layer 1 including the circuit 2 and the vias 3 and 4 may be further laminated to form a buildup layer, or a solder resist layer (not shown) may be formed in a desired portion.

  Although the printed wiring board manufacturing method and the printed wiring board of the present disclosure have been described above, the present invention is not limited to the above-described embodiment, and various improvements and improvements can be made. According to such a method for manufacturing a printed wiring board of the present disclosure, a plating hole can be sufficiently filled in a via forming hole of the printed wiring board, for example, even when there are at least two types of vias having different diameters, It is possible to improve the connection reliability. Furthermore, since the conductor is selectively polished, the via on the printed wiring board surface and the surface of the circuit are flush with each other, and a printed wiring board with stable dimensional behavior can be obtained. Further, in the printed wiring board of the present disclosure, a large-diameter via without a dent can be efficiently used as a heat radiating conductor.

DESCRIPTION OF SYMBOLS 1, 1 'Insulating layer 2 Circuit 3, 3', 30 Via 3a, 4a Pilot hole 4, 4 ', 40 Via 30a, 40a Hole 5 Metal layer 50 Conductor 50a Protrusion part 6 Plating resist 7 Etching resist 9, 9a Recess 10 10 'printed wiring board 10a laminate

Claims (6)

Forming a hole for forming a via in an insulating layer having a metal layer formed on at least one surface;
A plating is selectively formed on a hole for forming a via and a peripheral portion of the hole,
Remove the plating that protrudes from the surface of the metal layer,
A method of manufacturing a printed wiring board, wherein a circuit is formed by a subtractive method.   The manufacturing method according to claim 1, wherein plating of a portion protruding from the surface of the metal layer is selectively removed by a ceramic buff.   The manufacturing method according to claim 1, wherein the metal layer is formed of a metal foil.   The manufacturing method according to claim 1, wherein a plurality of holes for forming the vias are formed, and there are at least two kinds of holes having different diameters. Including at least one via filled with plating and a circuit formed of a metal layer, and including at least one insulating layer in which the surface of the via is flush with the surface of the circuit;
The printed wiring board, wherein the insulating layer is arranged to constitute at least one surface layer.   The printed wiring board according to claim 5, wherein at least one of the vias is a heat radiating conductor.

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