JP2018018880A - Semiconductor element mounting substrate - Google Patents

Semiconductor element mounting substrate Download PDF

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JP2018018880A
JP2018018880A JP2016146243A JP2016146243A JP2018018880A JP 2018018880 A JP2018018880 A JP 2018018880A JP 2016146243 A JP2016146243 A JP 2016146243A JP 2016146243 A JP2016146243 A JP 2016146243A JP 2018018880 A JP2018018880 A JP 2018018880A
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substrate
semiconductor element
semiconductor
mounting
terminal
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JP6710601B2 (en
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大喜 嶋田
Daiki Shimada
大喜 嶋田
福井 宏史
Hiroshi Fukui
宏史 福井
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Sansha Electric Manufacturing Co Ltd
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Sansha Electric Manufacturing Co Ltd
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Abstract

PROBLEM TO BE SOLVED: To facilitate work for mounting a terminal or a semiconductor element to a substrate and to save a space for a semiconductor element mounting substrate.SOLUTION: A component 8 to be connected to a semiconductor module 4 comprising mounting parts 16a-16c for connection to an external electric circuit is mounted onto a substrate 2, and through-holes 20a-20c corresponding to the mounting parts 16a-16c are formed on the substrate 2. Semiconductor connection patterns 22a-22c are formed around the through-holes 20a-20c in such a manner that the semiconductor connection patterns can be brought into contact with the mounting parts 16a-16c, and the semiconductor module 4 is disposed while matching the mounting parts 16a-16c with the through-holes 20a-20c. Portions of the terminals 6a-6c are brought into contact with the substrate 2 and while penetrating the portions, bolts 26a-26c are coupled to the mounting parts 16a-16c of the semiconductor module 4 via the through-holes 20a-20c of the substrate 2.SELECTED DRAWING: Figure 1

Description

本発明は、半導体素子が取り付けられた基板に関し、特に基板に他の部品も取り付けられたものに関する。   The present invention relates to a substrate on which a semiconductor element is attached, and more particularly to a substrate on which other components are attached.

従来、半導体素子が取り付けられた基板に、他の部品も取り付けたものとしては、例えば特許文献1に開示されたようなものがある。特許文献1の技術によれば、主基板にFETなどの半導体素子を実装し、主基板に垂直に立てた立ちプリント基板に、FETを固定するとともに、サージ電圧吸収用のスナバ回路を構成するスナバ抵抗、スナバコンデンサ及びスナバダイオードが取り付けられている。立ちプリント基板には、FETに対する放熱のために、多数の貫通孔が形成されている。立ちプリント基板を主基板に立てるために主基板に形成したスリットに、立ちプリント基板に形成した凸部を挿入してあるが、この挿入時に、これら立ちプリント基板に形成した配線パターンと、主基板に形成した配線パターンとが接続され、スナバ回路とFETとが接続される。また、FETは、主基板上の配線パターンを介して外部の電子回路に接続される。   2. Description of the Related Art Conventionally, for example, another component attached to a substrate on which a semiconductor element is attached is disclosed in Patent Document 1. According to the technique of Patent Document 1, a semiconductor device such as an FET is mounted on a main substrate, the FET is fixed to a standing printed circuit board that stands upright to the main substrate, and a snubber circuit configured to absorb a surge voltage is formed. A resistor, a snubber capacitor and a snubber diode are attached. A large number of through holes are formed in the standing printed circuit board for heat dissipation to the FET. Projections formed on the standing printed board are inserted into the slits formed on the main board in order to stand the standing printed board on the main board. At the time of this insertion, the wiring pattern formed on the standing printed board and the main board Are connected to the wiring pattern, and the snubber circuit and the FET are connected. Further, the FET is connected to an external electronic circuit via a wiring pattern on the main substrate.

特開2014−203855号公報JP 2014-203855 A

特許文献1の技術によれば、FETに対する放熱が行われる上に、FETに対する部品の接続も行えるが、主基板にFETを取り付けた上に、立ち基板に部品を取り付ける作業が必要なうえに、この立ちプリント基板を主基板に取り付けねばならず、その組み立て作業が面倒である。更に、主基板に立ちプリント基板を垂直に取り付けているので、大型になり、FETの放熱は、立ちプリント基板の表面と、FETの表面からしか行えず、さらなる放熱効果を得ることが困難であった。   According to the technique of Patent Document 1, heat dissipation to the FET is performed and components can be connected to the FET. However, after attaching the FET to the main substrate, it is necessary to attach the component to the standing substrate. This standing printed board must be attached to the main board, and the assembly work is troublesome. Furthermore, because the printed circuit board is mounted vertically on the main board, it becomes large in size, and the heat radiation of the FET can be performed only from the surface of the printed circuit board and the surface of the FET, making it difficult to obtain a further heat dissipation effect. It was.

本発明は、組み立て作業が容易である上に、スペースが小さい箇所にでも半導体素子取付基板を取り付けることができ、放熱効果の高い半導体素子取付基板を提供することを目的とする。   It is an object of the present invention to provide a semiconductor element mounting substrate that is easy to assemble and that can be attached to a semiconductor element mounting substrate even in a small space and has a high heat dissipation effect.

本発明の一態様の半導体素子取付基板は、半導体素子と基板と端子とを備えている。この半導体素子は、外部の電気回路への接続用の取付部を有している。基板には、半導体素子に接続される部品が取り付けられている。例えば基板の一方の面に部品が取り付けられている。更に、基板には前記半導体素子の前記取付部に対応する貫通孔が形成されている。貫通孔は、例えば基板の厚さ方向に貫通している。貫通孔の周囲に前記取付部と接触可能に半導体接続パターンが形成されている。半導体接続パターンは、例えば基板の他方の面側に設けることができる。また、前記部品を接続している配線パターンを基板に設けることもできる。配線パターンは、基板の一方の面に設け、前記貫通孔の周囲に位置するものを含むことが望ましい。前記半導体素子が前記取付部を前記貫通孔に一致させて配置されている。端子は、前記基板に一部が接触しており、その一部を貫通して前記基板の前記貫通孔を介して前記半導体素子の取付部に結合された結合手段によって前記基板及び半導体素子に取り付けられている。この締結によって、配線パターンと半導体接続パターンとが接続される。また、前記端子は、前記基板から外部に突出している。   A semiconductor element mounting substrate of one embodiment of the present invention includes a semiconductor element, a substrate, and a terminal. This semiconductor element has a mounting portion for connection to an external electric circuit. Components to be connected to the semiconductor element are attached to the substrate. For example, a component is attached to one surface of the substrate. Furthermore, a through hole corresponding to the mounting portion of the semiconductor element is formed in the substrate. The through hole penetrates in the thickness direction of the substrate, for example. A semiconductor connection pattern is formed around the through hole so as to be in contact with the mounting portion. The semiconductor connection pattern can be provided, for example, on the other surface side of the substrate. Also, a wiring pattern connecting the components can be provided on the substrate. The wiring pattern is preferably provided on one surface of the substrate and includes those located around the through hole. The semiconductor element is arranged with the mounting portion aligned with the through hole. A part of the terminal is in contact with the substrate, and is attached to the substrate and the semiconductor element by coupling means that penetrates part of the terminal and is coupled to the mounting part of the semiconductor element through the through hole of the substrate. It has been. By this fastening, the wiring pattern and the semiconductor connection pattern are connected. Further, the terminal protrudes from the substrate to the outside.

このように構成すると、基板を介して端子と半導体素子とを取り付けると、半導体素子の取付部と端子との電気的接続が行われる。従って、組み立て作業が容易である。また、半導体接続パターンを大きく取れるため、半導体素子の取付部と端子との接触面積を大きくでき、端子は基板から外部に突出していることから、端子の形状や面積も適宜設計できるため、半導体素子が発生する熱を、端子を介して効率よく放熱することができる。さらに、基板上に部品が取り付けられているので省スペースを図ることができる。   If comprised in this way, when a terminal and a semiconductor element are attached via a board | substrate, the electrical connection of the attachment part and terminal of a semiconductor element will be performed. Therefore, the assembly work is easy. In addition, since the semiconductor connection pattern can be made large, the contact area between the mounting portion of the semiconductor element and the terminal can be increased, and since the terminal protrudes from the substrate to the outside, the shape and area of the terminal can also be appropriately designed. The heat generated can be efficiently radiated through the terminals. Furthermore, since the components are attached on the substrate, space can be saved.

上記の態様において、前記部品は、前記基板に表面実装することができる。部品を表面実装していると、部品からリード線が突出せず、部品が基板上で中ぶらりにならず、搬送中に振動が加わっても、部品が断線する恐れがない。   In the above aspect, the component can be surface-mounted on the substrate. When the component is surface-mounted, the lead wire does not protrude from the component, the component does not sag on the board, and the component is not broken even if vibration is applied during conveyance.

さらに、前記半導体素子は、スナバ回路を構成するものとすることができる。例えばダイオードとすることができる。この場合、前記部品は、抵抗やコンデンサからなる前記スナバ回路の部品であり、好ましくは表面実装部品が用いられる。このように構成すると、スナバ回路は、表面実装によって基板に取り付けられているので、部品の基板への取付が容易となり、製造効率を高められる。   Furthermore, the semiconductor element may constitute a snubber circuit. For example, it can be a diode. In this case, the component is a component of the snubber circuit composed of a resistor or a capacitor, and preferably a surface-mounted component. If comprised in this way, since the snubber circuit is attached to the board | substrate by surface mounting, attachment to the board | substrate of components will become easy and manufacturing efficiency will be improved.

上記の態様において、前記貫通孔の周囲の半導体接続パターンは、前記半導体素子の前記取付部の面積よりも大きい面積を有するものとすることができる。このように構成すると、半導体素子の放熱効果を高めることができる。   Said aspect WHEREIN: The semiconductor connection pattern around the said through-hole shall have an area larger than the area of the said attaching part of the said semiconductor element. If comprised in this way, the thermal radiation effect of a semiconductor element can be improved.

以上のように、本発明によれば、端子や半導体素子の基板への取り付け作業が容易となり、半導体素子取付基板を省スペースとすることができる。   As described above, according to the present invention, it is easy to attach terminals and semiconductor elements to a substrate, and the semiconductor element mounting substrate can be saved in space.

(a)は本発明の一実施形態の半導体素子取付基板の正面図、(b)は図1(a)のb−b線に沿う断面図、(c)は図1(a)のc−c線に沿う断面図である。(A) is a front view of the semiconductor element mounting substrate of one embodiment of the present invention, (b) is a cross-sectional view taken along line bb of FIG. 1 (a), and (c) is c-- of FIG. 1 (a). It is sectional drawing which follows c line. (a)は図1の半導体素子取付基板に使用されている半導体モジュールの斜視図、(b)は半導体モジュールの縦断面図である。(A) is a perspective view of the semiconductor module used for the semiconductor element attachment board | substrate of FIG. 1, (b) is a longitudinal cross-sectional view of a semiconductor module. 図1の半導体素子取付基板の背面図である。It is a rear view of the semiconductor element attachment board | substrate of FIG. 図1の半導体素子取付基板で使用されている基板の背面図である。It is a rear view of the board | substrate currently used with the semiconductor element attachment board | substrate of FIG. 図1の半導体素子取付基板において基板に端子を取り付けた状態の背面図である。FIG. 2 is a rear view of the semiconductor element mounting substrate of FIG. 1 in a state where terminals are attached to the substrate.

本発明の1実施形態の半導体素子取付基板は、図1(a)乃至(c)に示すように、基板2に、半導体素子、例えば半導体モジュール4を取り付け、この半導体モジュール4の各電極を外部の電気回路に接続するための複数の端子、例えば端子6a、6b、6cに基板2上で半導体モジュール4に取り付け、これら端子6a、6b、6cに、基板2上に設けた別の複数の部品8を基板2上で接続したものである。   As shown in FIGS. 1A to 1C, a semiconductor element mounting substrate according to an embodiment of the present invention has a semiconductor element, for example, a semiconductor module 4 attached to a substrate 2, and each electrode of the semiconductor module 4 is connected to the outside. A plurality of terminals, for example, terminals 6a, 6b and 6c, which are attached to the semiconductor module 4 on the substrate 2, and a plurality of other components provided on the substrate 2 are connected to the terminals 6a, 6b and 6c. 8 are connected on the substrate 2.

半導体モジュール4は、図2(a)、(b)に示すように概略直方体状のハウジング10内に内蔵したベース12上に、半導体チップ14、具体的にはIGBTやFETのような半導体スイッチング素子チップや直列または並列に接続された複数のダイオードチップが配置されている。それらの複数の電極、この実施形態では3つの電極上にそれぞれリードが接続され、各リードの先端がハウジング10の1つの主表面上に、この主表面と間隔をおいて突出して、取付部16a、16b、16cとして互いに一列に配置されている。これら取付部16a、16b、16cには取付孔18a、18b、18cがそれぞれ形成され、これら取付孔18a、18b、18cに挿通された締結具、例えばボルトが、取付部16a、16b、16cに対応してハウジング10内に形成した凹所17a、17b、17c内に配置した3つのナット19a、19b、19cにそれぞれ螺合する。この半導体モジュール4は、その使用状態において、取付部16a、16b間、取付部16a、16c間に電位差を生じるものである。   As shown in FIGS. 2A and 2B, the semiconductor module 4 includes a semiconductor chip 14, specifically a semiconductor switching element such as an IGBT or FET, on a base 12 built in a housing 10 having a substantially rectangular parallelepiped shape. A chip and a plurality of diode chips connected in series or in parallel are arranged. A lead is connected to each of the plurality of electrodes, in this embodiment, three electrodes, and the tip of each lead protrudes on one main surface of the housing 10 at a distance from the main surface, and the mounting portion 16a. 16b and 16c are arranged in a line with each other. Mounting holes 18a, 18b, and 18c are formed in the mounting portions 16a, 16b, and 16c, respectively, and fasteners, for example, bolts inserted through the mounting holes 18a, 18b, and 18c correspond to the mounting portions 16a, 16b, and 16c. Then, they are screwed into the three nuts 19a, 19b, 19c arranged in the recesses 17a, 17b, 17c formed in the housing 10, respectively. The semiconductor module 4 generates a potential difference between the mounting portions 16a and 16b and between the mounting portions 16a and 16c in the usage state.

基板2は、図3及び図4に示すように、概略長方形状に形成され、その下縁の両端を切り落とした形状で、図3に示すように、その一方の表面、例えば裏面側に半導体モジュール4が取り付けられている。そのため、図4に示すように、半導体モジュール4の取付部16a乃至16cの取付孔18a乃至18cに対応して、基板2の裏面と、基板2の他方の面、例えば表面とを貫通して、基板2の中央部よりも下部には、貫通孔20a、20b、20cが形成されている。また、基板2の裏面側において、各貫通孔20a乃至20cそれぞれの周囲には、半導体モジュール4の各電極と接続するための半導体素子パターン22a、22b、22cがそれぞれ形成されている。これら半導体素子パターン22a、22b、22cは、取付部16a、16b、16cよりも面積が大きく形成されている。また、図1(b)、(c)に示すように、基板2の表面の貫通孔20a乃至20c周囲には、配線パターン23a乃至23cが後述する導電性のボルト26a乃至26cに対応する大きさに形成されている。   The substrate 2 is formed in a substantially rectangular shape as shown in FIGS. 3 and 4 and is formed by cutting off both ends of the lower edge thereof. As shown in FIG. 4 is attached. Therefore, as shown in FIG. 4, corresponding to the mounting holes 18a to 18c of the mounting portions 16a to 16c of the semiconductor module 4, the back surface of the substrate 2 and the other surface, for example, the front surface of the substrate 2 are penetrated. Through holes 20 a, 20 b, and 20 c are formed below the center portion of the substrate 2. Further, on the back side of the substrate 2, semiconductor element patterns 22a, 22b, and 22c for connecting to the respective electrodes of the semiconductor module 4 are formed around the respective through holes 20a to 20c. These semiconductor element patterns 22a, 22b, and 22c are formed to have larger areas than the attachment portions 16a, 16b, and 16c. Further, as shown in FIGS. 1B and 1C, the wiring patterns 23a to 23c have sizes corresponding to conductive bolts 26a to 26c described later around the through holes 20a to 20c on the surface of the substrate 2. Is formed.

図1(a)に示すように、基板2の表面側の中央部から上部には、半導体モジュール4に接続される部品8、例えばスナバ回路を構成する抵抗器やコンデンサやダイオード等が表面実装によって取り付けられている。   As shown in FIG. 1 (a), components 8 connected to the semiconductor module 4, such as resistors, capacitors, diodes, and the like connected to the semiconductor module 4 are mounted on the surface of the substrate 2 by surface mounting. It is attached.

基板2の裏面と半導体モジュール4の各取付部16a乃至16cとの間に、上述した端子6a乃至6cの一端部が挟み込まれている。第1の端子、例えば端子6aは、導電金属性のZ金具状のもので、その一端部が半導体モジュール4の中央にある取付部16aに対応する半導体素子パターン22aに接触しており、端子6aには、貫通孔20aに対応して図5に示すように、貫通孔24aが形成されている。結合手段、例えば図1(b)に示すように導電性のボルト26aが基板2の表面側から基板2の貫通孔20a及び端子6aの貫通孔24aに挿通されて、半導体モジュール4の取付部16aの取付孔18a内に侵入し、ハウジング10の凹所17a内のナット19aに螺合している。これによって、半導体モジュール4の取付部16aは基板2の裏面側で半導体素子接続パターン22aに接続されるとともに、基板2の表面側で配線パターン23aに接続され、部品8とともに回路が構成される。端子6aは、その中途、例えば基板2の下縁に対応する位置付近で、基板2の表面側に向けて折り曲げられており、その折り曲げ部分が、図1(b)に示すように、基板2に形成した空間部、例えば基板2の下縁中央に形成した切り欠き27を通過して基板2の表面よりも更に前方に突出し、その突出部分から下方に伸びた他端部が基板2の下縁よりも下方に位置している。このように、端子6aは、基板2から外部に突出している。この端子6aの突出した他端部に、図1(b)、図5に示すように、貫通ねじ孔28が形成されており、外部の電気回路に半導体モジュール4の中央の電極を接続するための取付金具30が、基板2の表面側で貫通ねじ穴28に重ねて配置され、図1(a)に示すように導電性のボルト32aによって端子6aの他端に取り付けられている。これによって、半導体モジュール4の取付部16aは、外部の電気回路に接続されている。   One end portions of the terminals 6a to 6c described above are sandwiched between the back surface of the substrate 2 and the mounting portions 16a to 16c of the semiconductor module 4. The first terminal, for example, the terminal 6a is in the shape of a conductive metal Z metal fitting, one end of which is in contact with the semiconductor element pattern 22a corresponding to the mounting portion 16a in the center of the semiconductor module 4, and the terminal 6a. As shown in FIG. 5, a through hole 24a is formed corresponding to the through hole 20a. As shown in FIG. 1B, for example, a conductive bolt 26a is inserted into the through hole 20a of the substrate 2 and the through hole 24a of the terminal 6a as shown in FIG. Is inserted into the mounting hole 18a and screwed into the nut 19a in the recess 17a of the housing 10. As a result, the mounting portion 16 a of the semiconductor module 4 is connected to the semiconductor element connection pattern 22 a on the back surface side of the substrate 2, and is connected to the wiring pattern 23 a on the front surface side of the substrate 2. The terminal 6a is bent toward the surface side of the substrate 2 in the middle thereof, for example, in the vicinity of a position corresponding to the lower edge of the substrate 2, and the bent portion is formed on the substrate 2 as shown in FIG. The other end portion that protrudes further forward than the surface of the substrate 2 through the notch 27 formed in the center of the lower edge of the substrate 2, for example, the lower end of the substrate 2 is below the substrate 2. It is located below the edge. Thus, the terminal 6a protrudes from the substrate 2 to the outside. As shown in FIG. 1B and FIG. 5, a through screw hole 28 is formed at the protruding other end of the terminal 6a to connect the central electrode of the semiconductor module 4 to an external electric circuit. The mounting bracket 30 is placed on the surface of the substrate 2 so as to overlap the through screw hole 28, and is attached to the other end of the terminal 6a by a conductive bolt 32a as shown in FIG. Thereby, the mounting portion 16a of the semiconductor module 4 is connected to an external electric circuit.

第2の端子、例えば端子6b及び第3の端子、例えば端子6cは、導電金属性で、端子6aよりも幅広のL字金具状のもので、その一端部が半導体モジュール4において、中央の取付部16aの両側にある取付部16b、16cに対応する半導体素子パターン22b、22cに接触しており、貫通孔20b、20cにそれぞれ対応して図5に示すように貫通孔24b、24cが形成されている。図1(c)に示すように、基板2の貫通孔20b、20c及び端子6b、6cの貫通孔24b、24cに挿通されて、半導体モジュール4の表面側から挿通された導電性のボルト26b、26cが取付部16b、16cの取付孔18b、18c内に侵入し、ハウジング10の凹所17b、17c内のナット19b、19cにそれぞれ螺合している。これによって、半導体モジュール4の取付部16b、16cは基板2の裏面側で半導体素子接続パターン22b、22cに接続されると共に、基板2の表面側で配線パターン23b、23cに接続され、部品8とともに回路を構成している。そして、後述するように、端子6b、6cの他端は基板から下方に向けて、基板2から外部に突出している。このようにして、ボルト26a、26b、26cによって、端子6a、端子6b及び端子6cと、半導体モジュール4の基板2の裏面への取付と接続とが行われている。   The second terminal, for example, the terminal 6b and the third terminal, for example, the terminal 6c, are conductive metallic and have an L-shaped bracket shape wider than the terminal 6a. One end of the second terminal is attached to the center of the semiconductor module 4. The semiconductor element patterns 22b and 22c corresponding to the mounting portions 16b and 16c on both sides of the portion 16a are in contact with each other, and through holes 24b and 24c are formed corresponding to the through holes 20b and 20c, respectively, as shown in FIG. ing. As shown in FIG. 1C, conductive bolts 26b inserted through the through holes 20b and 20c of the substrate 2 and the through holes 24b and 24c of the terminals 6b and 6c and inserted from the surface side of the semiconductor module 4, 26c enters the mounting holes 18b and 18c of the mounting portions 16b and 16c, and is screwed into the nuts 19b and 19c in the recesses 17b and 17c of the housing 10, respectively. As a result, the mounting portions 16 b and 16 c of the semiconductor module 4 are connected to the semiconductor element connection patterns 22 b and 22 c on the back surface side of the substrate 2, and are connected to the wiring patterns 23 b and 23 c on the front surface side of the substrate 2. The circuit is configured. As will be described later, the other ends of the terminals 6b and 6c protrude outward from the substrate 2 downward from the substrate. In this manner, the terminals 6a, 6b, and 6c and the attachment and connection of the semiconductor module 4 to the back surface of the substrate 2 are performed by the bolts 26a, 26b, and 26c.

端子6b、6cは、いずれもそれらの一端部から端子6aよりも広い面積を持ってまっすぐに下方に伸びて、基板2の下縁を通過して、第1の端子6aの下端よりもさらに下方に所定距離だけ伸びて、下端部が基板2の表側に折り曲げられている。これらの折り曲げ部分に、ボルト32b、32b、32c、32cによってブロック34、34、36、36に固定されて、基板2がブロック34、34、36、36上に機械的に支持されている。このように、端子6b、6cは広い面積を持って基板2の外部に突出しているため、半導体モジュール4からの熱が、端子6b、6cの広い面から効率よく放熱される。   Each of the terminals 6b and 6c extends straight downward from one end of the terminal 6b with a larger area than the terminal 6a, passes through the lower edge of the substrate 2, and is further below the lower end of the first terminal 6a. The lower end is bent to the front side of the substrate 2. These bent portions are fixed to the blocks 34, 34, 36, and 36 by bolts 32b, 32b, 32c, and 32c, and the substrate 2 is mechanically supported on the blocks 34, 34, 36, and 36. Thus, since the terminals 6b and 6c have a large area and protrude outside the substrate 2, the heat from the semiconductor module 4 is efficiently radiated from the wide surfaces of the terminals 6b and 6c.

また、各半導体モジュール4における取付部16a、16b、16cが設けられている面と反対側の面(ベース12側の面)は、図1(b)、(c)に示すように放熱手段、例えばヒートシンク37に取り付けられている。ヒートシンク37は、基板2の上端よりも上部に位置し、基板2の裏面側全域を覆う大きさに形成されている。   Moreover, the surface (surface on the base 12 side) opposite to the surface on which the mounting portions 16a, 16b, and 16c in each semiconductor module 4 are provided is a heat radiating means, as shown in FIGS. For example, it is attached to the heat sink 37. The heat sink 37 is located above the upper end of the substrate 2 and is sized to cover the entire back side of the substrate 2.

端子6aの折り曲げ部分が切り欠き27内にあるので、切り欠き27を形成せずに、基板2の下縁に端子6aの折り曲げ部分を通過させた場合よりも基板2の上下方向に絶縁距離を大きくなっている。   Since the bent portion of the terminal 6a is in the notch 27, the insulation distance is increased in the vertical direction of the substrate 2 as compared with the case where the bent portion of the terminal 6a is passed through the lower edge of the substrate 2 without forming the notch 27. It is getting bigger.

なお、端子6b、端子6cの両側は、それらの上端が切り落とされて、基板2の切り落とされた下縁と共同して、空間を形成しているが、これは取付金具30が接続されているコード38を、基板2の裏面側に引き出しやすくするためである。   In addition, both sides of the terminal 6b and the terminal 6c have their upper ends cut off to form a space together with the lower edge of the board 2 cut off, and this is connected to the mounting bracket 30. This is because the code 38 is easily pulled out to the back side of the substrate 2.

この半導体素子取付基板では、部品8が表面実装されている基板2の裏面側の半導体素子パターン22a、22b、22c上に端子6a、6b、6cと半導体モジュール4の取付部16a、16b、16cを配置して、基板2の表面側からボルト26a、26b、26cで端子6a、6b、6cと半導体モジュール4を基板2に取り付けることができる上に、電気的に接続することができる。このように、ボルト26a、26b、26cの螺合のみによって半導体モジュール4の基板2への取付、半導体モジュール4の端子6a、6b、6cへの接続、部品8の半導体モジュール4の接続が行え、組み立て作業を容易にすることができる。そして、端子6a、6b、6cは、基板2から外部に延在し、且つ端子6aの突出した他端は基板2の表面側に、その両隣の端子6b、6cとは基板2の裏面側に、基板2を挟んで前後に離間していることから、夫々の端子6a、6b、6cの突出した部分の大きさや形状の設計の自由度が増し、その面積を大きくすることができる。そのため、半導体モジュール4の熱を、広い面積を持つ端子6a、6b、6cから効率よく放熱することができる。   In this semiconductor element mounting substrate, terminals 6a, 6b, 6c and mounting portions 16a, 16b, 16c of the semiconductor module 4 are provided on the semiconductor element patterns 22a, 22b, 22c on the back surface side of the substrate 2 on which the component 8 is surface-mounted. The terminals 6a, 6b, 6c and the semiconductor module 4 can be attached to the substrate 2 with bolts 26a, 26b, 26c from the surface side of the substrate 2 and can be electrically connected. Thus, the mounting of the semiconductor module 4 to the substrate 2, the connection to the terminals 6a, 6b, 6c of the semiconductor module 4 and the connection of the semiconductor module 4 of the component 8 can be performed only by screwing the bolts 26a, 26b, 26c. Assembly work can be facilitated. The terminals 6a, 6b, and 6c extend from the substrate 2 to the outside, and the other end protruding from the terminal 6a is on the front surface side of the substrate 2, and the adjacent terminals 6b and 6c are on the back surface side of the substrate 2. Since the board 2 is spaced forward and backward, the size of the protruding portion of each terminal 6a, 6b, 6c and the degree of freedom in designing the shape are increased, and the area can be increased. Therefore, the heat of the semiconductor module 4 can be efficiently radiated from the terminals 6a, 6b, and 6c having a large area.

また、半導体素子パターン22a、22b、22cは、半導体モジュール4の取付部16a、16b、16cよりも大きな面積を有しているので、半導体モジュール4の放熱効果を高めることができる。   Moreover, since the semiconductor element patterns 22a, 22b, and 22c have a larger area than the mounting portions 16a, 16b, and 16c of the semiconductor module 4, the heat dissipation effect of the semiconductor module 4 can be enhanced.

また基板2に部品8を面実装しているので、部品8はリードを有さず、基板2上に固定されているので、半導体素子取付基板を使用した装置を搬送する際に、振動が半導体素子取付基板に加わっても、部品のリードの断線による故障が生じない。また、半導体モジュール用のヒートシンク37は、基板2の裏面全域を覆うことが可能な大きさであるので、部品8から放出された熱が、ヒートシンク37によって吸収される。   Since the component 8 is surface-mounted on the substrate 2, the component 8 does not have a lead and is fixed on the substrate 2. Therefore, when the device using the semiconductor element mounting substrate is transported, vibration is generated in the semiconductor. Even if it is added to the element mounting board, failure due to disconnection of component leads does not occur. Further, since the heat sink 37 for the semiconductor module is large enough to cover the entire back surface of the substrate 2, the heat released from the component 8 is absorbed by the heat sink 37.

上記の各実施形態では、半導体モジュール4には、3つの取付部を有するものを示したが、これに限ったものではなく、少なくとも2つの取付部を有する半導体モジュールを使用することができる。上記の実施形態では、部品8はスナバ回路用のものとしたが、これに限ったものではなく、半導体モジュール4の用途に応じた部品を使用することができる。また、部品8は、基板2の表面側に設けたが、表面側に代えて或いは表面側に加えて裏面側に部品を取り付けることもできる。上記の実施形態では、端子6aはZ金具状のものを、端子6b、6cは、L字金具状のものを使用したが、これらに限ったものではなく、全ての端子が基板2の一方の面に対して取付可能なものであれば、その形状は任意である。   In each of the above embodiments, the semiconductor module 4 has three attachment portions. However, the present invention is not limited to this, and a semiconductor module having at least two attachment portions can be used. In the above embodiment, the component 8 is for the snubber circuit. However, the present invention is not limited to this, and a component according to the application of the semiconductor module 4 can be used. Moreover, although the component 8 was provided in the surface side of the board | substrate 2, it can replace with the surface side or can attach a component to the back surface side in addition to the surface side. In the above embodiment, the terminal 6a is a Z-fitting-shaped one, and the terminals 6b and 6c are L-shaped fittings. However, the present invention is not limited to these, and all the terminals are one of the substrates 2. Any shape can be used as long as it can be attached to the surface.

2 基板
4 半導体モジュール(半導体素子)
6a 6b 6c 端子
8 部品
26a 26b 26c ボルト(結合手段)
2 Substrate 4 Semiconductor module (semiconductor element)
6a 6b 6c Terminal 8 Parts 26a 26b 26c Bolt (coupling means)

Claims (4)

外部の電気回路への接続用の取付部を有する半導体素子と、
前記半導体素子に接続される部品が取り付けられ、前記半導体素子の前記取付部に対応する貫通孔を有し、前記貫通孔の周囲に前記取付部と接触可能に設けられた半導体接続パターンが形成され、前記半導体素子の前記取付部が前記貫通孔に一致させて配置された基板と、
前記基板に一部が接触しており、その一部を貫通して前記基板の前記貫通孔を介して前記半導体素子の取付部に結合された結合手段によって前記基板及び半導体素子に取り付けられた端子とを、
有し、
前記端子が前記基板から外部に突出している半導体素子取付基板。
A semiconductor element having a mounting portion for connection to an external electric circuit;
A component to be connected to the semiconductor element is attached, and a semiconductor connection pattern having a through hole corresponding to the attachment portion of the semiconductor element and provided in contact with the attachment portion is formed around the through hole. A substrate in which the mounting portion of the semiconductor element is arranged so as to coincide with the through hole;
Terminals attached to the substrate and the semiconductor element by coupling means partially contacting the substrate and penetrating through the part and coupled to the mounting portion of the semiconductor element through the through hole of the substrate And
Have
A semiconductor element mounting substrate in which the terminals protrude outward from the substrate.
請求項1記載の半導体素子取付基板において、前記部品は、前記基板に表面実装されている半導体素子取付基板。   2. The semiconductor element mounting board according to claim 1, wherein the component is surface-mounted on the board. 請求項2記載の半導体素子取付基板において、前記半導体素子は、スナバ回路を構成するものであり、前記部品は、前記スナバ回路の部品である半導体素子取付基板。   3. The semiconductor element mounting substrate according to claim 2, wherein the semiconductor element constitutes a snubber circuit, and the component is a component of the snubber circuit. 請求項1記載の半導体素子取付基板において、前記貫通孔の周囲の半導体接続パターンは、前記半導体素子の前記取付部の面積よりも大きい面積を有する半導体素子取付基板。   2. The semiconductor element mounting board according to claim 1, wherein a semiconductor connection pattern around the through hole has an area larger than an area of the mounting portion of the semiconductor element.
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WO2021059947A1 (en) * 2019-09-27 2021-04-01 ローム株式会社 Semiconductor device

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JPH04345082A (en) * 1991-05-22 1992-12-01 Mitsubishi Electric Corp Large current wiring board
JPH0613539A (en) * 1992-06-26 1994-01-21 Fuji Electric Co Ltd Semiconductor device
JPH0729874U (en) * 1993-11-12 1995-06-02 株式会社明電舎 Connection structure of high current printed board
WO2010047366A1 (en) * 2008-10-23 2010-04-29 株式会社日立製作所 Power converter and in-car electrical system

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JPH04345082A (en) * 1991-05-22 1992-12-01 Mitsubishi Electric Corp Large current wiring board
JPH0613539A (en) * 1992-06-26 1994-01-21 Fuji Electric Co Ltd Semiconductor device
JPH0729874U (en) * 1993-11-12 1995-06-02 株式会社明電舎 Connection structure of high current printed board
WO2010047366A1 (en) * 2008-10-23 2010-04-29 株式会社日立製作所 Power converter and in-car electrical system

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2021059947A1 (en) * 2019-09-27 2021-04-01 ローム株式会社 Semiconductor device

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