JP2017510890A5 - - Google Patents

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Publication number
JP2017510890A5
JP2017510890A5 JP2016554451A JP2016554451A JP2017510890A5 JP 2017510890 A5 JP2017510890 A5 JP 2017510890A5 JP 2016554451 A JP2016554451 A JP 2016554451A JP 2016554451 A JP2016554451 A JP 2016554451A JP 2017510890 A5 JP2017510890 A5 JP 2017510890A5
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JP
Japan
Prior art keywords
neuron model
instance
memory
parameters
state variables
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Ceased
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JP2016554451A
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English (en)
Japanese (ja)
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JP2017510890A (ja
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Publication date
Priority claimed from US14/267,394 external-priority patent/US9672464B2/en
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Publication of JP2017510890A publication Critical patent/JP2017510890A/ja
Publication of JP2017510890A5 publication Critical patent/JP2017510890A5/ja
Ceased legal-status Critical Current

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JP2016554451A 2014-02-28 2015-02-12 一般的なニューロンモデルの効率的な実装のための方法および装置 Ceased JP2017510890A (ja)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US201461946051P 2014-02-28 2014-02-28
US61/946,051 2014-02-28
US14/267,394 2014-05-01
US14/267,394 US9672464B2 (en) 2014-02-28 2014-05-01 Method and apparatus for efficient implementation of common neuron models
PCT/US2015/015637 WO2015130476A2 (en) 2014-02-28 2015-02-12 Method and apparatus for efficient implementation of common neuron models

Publications (2)

Publication Number Publication Date
JP2017510890A JP2017510890A (ja) 2017-04-13
JP2017510890A5 true JP2017510890A5 (enExample) 2018-03-01

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JP2016554451A Ceased JP2017510890A (ja) 2014-02-28 2015-02-12 一般的なニューロンモデルの効率的な実装のための方法および装置

Country Status (7)

Country Link
US (1) US9672464B2 (enExample)
EP (1) EP3111378A2 (enExample)
JP (1) JP2017510890A (enExample)
KR (1) KR20160125967A (enExample)
CN (1) CN106068519B (enExample)
CA (1) CA2937945A1 (enExample)
WO (1) WO2015130476A2 (enExample)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10068170B2 (en) * 2013-09-23 2018-09-04 Oracle International Corporation Minimizing global error in an artificial neural network
KR102372423B1 (ko) * 2017-05-16 2022-03-10 한국전자통신연구원 파라미터 공유 장치 및 방법
US11507806B2 (en) * 2017-09-08 2022-11-22 Rohit Seth Parallel neural processor for Artificial Intelligence
US11195079B2 (en) * 2017-11-22 2021-12-07 Intel Corporation Reconfigurable neuro-synaptic cores for spiking neural network
US11347998B2 (en) * 2018-02-26 2022-05-31 Fredric William Narcross Nervous system on a chip
CN108830379B (zh) * 2018-05-23 2021-12-17 电子科技大学 一种基于参数量化共享的神经形态处理器
CN109886384B (zh) * 2019-02-15 2021-01-05 北京工业大学 一种基于鼠脑海马网格细胞重构的仿生导航方法
US11270195B2 (en) 2019-03-05 2022-03-08 International Business Machines Corporation Neuromorphic computing in dynamic random access memory
WO2021137601A1 (ko) * 2019-12-30 2021-07-08 매니코어소프트주식회사 강화 학습 기반의 프로그램 최적화 방법

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5222196A (en) * 1990-02-20 1993-06-22 International Business Machines Corporation Neural network shell for application programs
JPH05128083A (ja) * 1991-10-31 1993-05-25 Ricoh Co Ltd 信号処理装置
US6167390A (en) * 1993-12-08 2000-12-26 3M Innovative Properties Company Facet classification neural network
EP1172763A3 (en) 2000-07-13 2008-11-05 International Business Machines Corporation Method and circuits for associating a norm to each component of an input pattern presented to a neural network
TW538381B (en) * 2000-07-13 2003-06-21 Ibm Method and circuits for associating a norm to each component of an input pattern presented to a neural network
US8027942B2 (en) * 2000-12-13 2011-09-27 International Business Machines Corporation Method and circuits for associating a complex operator to each component of an input pattern presented to an artificial neural network
JP4710931B2 (ja) 2008-07-09 2011-06-29 ソニー株式会社 学習装置、学習方法、およびプログラム
CN102947818B (zh) 2010-05-19 2015-07-22 加利福尼亚大学董事会 神经处理单元
US8650008B2 (en) 2010-08-05 2014-02-11 International Business Machines Corporation Method and system of developing corner models for various classes on nonlinear systems
KR101888468B1 (ko) 2011-06-08 2018-08-16 삼성전자주식회사 Stdp 기능 셀을 위한 시냅스, stdp 기능 셀 및 stdp 기능 셀을 이용한 뉴로모픽 회로
US9111224B2 (en) * 2011-10-19 2015-08-18 Qualcomm Incorporated Method and apparatus for neural learning of natural multi-spike trains in spiking neural networks
US9111225B2 (en) * 2012-02-08 2015-08-18 Qualcomm Incorporated Methods and apparatus for spiking neural computation
US9256823B2 (en) 2012-07-27 2016-02-09 Qualcomm Technologies Inc. Apparatus and methods for efficient updates in spiking neuron network
US9256215B2 (en) 2012-07-27 2016-02-09 Brain Corporation Apparatus and methods for generalized state-dependent learning in spiking neuron networks

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