JP2017228106A - Analog output device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an analog output device capable of preventing output of a fraudulent analog signal even when an error occurs.SOLUTION: An analog output device 1 arranged between control object equipment 3 and a host control device 2 controlling the control object equipment 3 includes: an analogue output section 5 converting a digital signal from the host control device 2 with respect to the control object equipment 3 into an analog signal and outputting the analog signal to the control object equipment 3; a microcomputer 4 controlling operation of the analogue output section 5; and an error detection section 8 detecting an error related to operation of the analog output device 1. The analogue output section 5 has a plurality of modes with respect to the error, and transmits the analog signal corresponding to a mode set from the plurality of modes from the host control device 2 to the control object equipment 3 when the error detection section 8 detects the error.SELECTED DRAWING: Figure 1

Description

  The present invention relates to an analog output device that converts a control digital signal from a host control device into, for example, an analog signal of current or voltage and outputs the analog signal to, for example, a control target device of a nuclear power plant.

  A conventional analog output device uses a D / A (digital analog) converter or an operational amplifier in a control system for controlling an industrial plant or the like, and converts a control digital signal to a specified current or voltage. It converts into an analog signal and outputs it to the external load used as a control object (for example, refer patent documents).

JP 2014-183431 A

  The conventional analog output device has a problem that when an error occurs around a microcomputer or a control circuit, an abnormal output is performed, which greatly affects plant equipment.

  The present invention has been made to solve the above-described problems, and an object thereof is to provide an analog output device that can prevent an illegal analog signal from being output even when an error occurs.

The analog output device of the present invention is
An analog output device disposed between a control target device and a host control device that controls the control target device,
An analog output unit that converts a digital signal from the host controller for the control target device into an analog signal and outputs the analog signal to the control target device;
A control unit for controlling the operation of the analog output unit;
An error detection unit for detecting an error related to the operation of the analog output device;
The analog output unit has a plurality of modes for the error, and when the error detection unit detects the error, the analog output unit outputs an analog signal corresponding to the mode set from the plurality of modes from the host controller. Transmit to the control target device.

According to the analog output device of the present invention,
Even when an error occurs, it is possible to prevent an illegal analog signal from being output.

It is a block diagram which shows the structure of the analog output device of embodiment of this invention. It is a figure which shows the structure of the microcomputer and analog output part of the analog output device shown in FIG. It is a flowchart which shows operation | movement of the analog output device shown in FIG. It is a flowchart which shows operation | movement of the analog output device shown in FIG.

Embodiment 1 FIG.
Embodiments of the present invention will be described below. An object of the analog output device according to the embodiment of the present invention is to prevent an illegal analog signal from being output even when an error occurs in the analog output device such as a clock loss.
FIG. 1 is a block diagram showing a configuration of an analog output device according to an embodiment of the present invention.
FIG. 2 is a diagram showing a configuration of the microcomputer and the analog output unit of the analog output device shown in FIG.
FIG. 3 is a flowchart showing software processing of the analog output device shown in FIG.
FIG. 4 is a flowchart showing hardware processing of the analog output device shown in FIG.

  In the figure, the analog output device 1 is connected to a host control device 2 and a control target device 3 controlled by the host control device 2. The analog output device 1 includes a microcomputer 4 as a control unit, an analog output unit 5, an analog input unit 6, and a communication input / output unit 7. The microcomputer 4 controls the entire analog output device 1, that is, controls the analog output unit 5, the analog input unit 6, and the communication input / output unit 7. The analog output unit 5 converts the digital signal of the host control device 2 into an analog signal and transmits the analog signal to the control target device 3.

  The analog input unit 6 converts an analog signal of the control target device 3 into a digital signal and transmits the digital signal to the communication input / output unit 7. The communication input / output unit 7 transmits / receives digital signals to / from the host control device 2. The microcomputer 4 of the analog output device 1 performs control to convert the digital signal in the control of the host control device 2 into an analog signal and output it to the control target device 3. The microcomputer 4 of the analog output device 1 performs control to convert the analog signal output from the control target device 3 into a digital signal and output it to the host control device 2.

  In FIG. 2, the microcomputer 4 includes an analysis unit 11, a mode setting unit 12, and a command value setting unit 13. Each of these units is a unit for setting a mode at the time of error (at the time of failure) from the host control device 2 to the analog output device 1 in the microcomputer 4. The analysis unit 11 analyzes whether or not the command signal received from the host controller 2 includes a mode setting signal other than the command value signal.

  The mode setting unit 12 stores the mode of the mode setting signal analyzed by the analysis unit 11 in the mode storage unit 21. In addition, the mode setting unit 12 stores the specified value included in the command signal in the specified value storage unit 22 when the mode at the time of error is a specified value mode described later. The command value setting unit 13 stores the command value included in the command signal of the host control device 2 in the command value storage unit 23.

  The analog output device 1 includes a main clock unit 31, a sub clock unit 32, and an error detection unit 8. The main clock unit 31 supplies a main clock that controls all operations of the analog output device 1. The sub clock unit 32 supplies a sub clock only to a later-described sub DAC I / F 26 of the analog output unit 5.

  The error detection unit 8 detects an illegal state related to the operation of the microcomputer 4 and the analog output device 1 as an error. For example, the error detection unit 8 may be a clock loss error in which the main clock supplied to the microcomputer 4 and the analog output device 1 is lost (removed), or a WDT (Watch Dog Timer) when processing of the microcomputer 4 is not completed within a specified time. Detect errors such as watchdog timer errors. The error detection unit 8 sends the detected error to an error storage unit 24 described later.

  The analog output unit 5 includes an error storage unit 24, a mode storage unit 21, a specified value storage unit 22, a command value storage unit 23, a first selector 41, a second selector 42, a third selector 43, a main DAC I / F. (D / A converter interface) 25, sub DACI / F 26, D / A converter 27, and relay unit 28. The error storage unit 24 sends a switching signal to the first selector 41, the second selector 42, the third selector 43, and the relay unit 28 in response to the error detected by the error detection unit 8.

  The mode storage unit 21 sets a mode when an error is detected. The mode storage unit 21 transmits a switching signal corresponding to the set mode to the first selector 41, the second selector 42, and the relay unit 28, respectively. There are three modes when an error is detected: an output cut mode, a specified value mode, and a previous value mode. The output cutoff mode is a mode for stopping output. The designated value mode is a mode for outputting a designated value set in advance. The previous value mode is a mode for outputting the previous command value in which an error is detected. The switching signal is sent to the first selector 41 in the previous value mode, to the second selector 42 in the designated value mode, and to the relay unit 28 in the output cutoff mode.

  The specified value storage unit 22 stores a specified value that is output when the error mode is set to the specified value mode, and transmits the specified value. The command value storage unit 23 stores the command value from the host controller 2 and sends the command value. The main DAC I / F 25 sends the command value selected by the first selector 41 or the designated value selected by the second selector 42 to the D / A converter 27. The main DAC I / F 25 operates with a main clock supplied to the entire analog output device 1 generated by the main clock unit 31.

  The sub DACI / F 26 sends the command value selected by the first selector 41 or the designated value selected by the second selector 42 to the D / A converter 27, similarly to the main DACI / F 25. The sub DAC I / F 26 operates with a sub clock generated by the sub clock unit 32.

  The first selector 41 selects the command value stored in the command value storage unit 23 when normal. The first selector 41 receives the switching signal and sends out the previous command value stored in the command value storage unit 23 in the previous value mode when there is an error. The second selector 42 does not operate so that the command value selected by the first selector 41 is sent out in a normal state. The second selector 42 receives the switching signal and sends the specified value stored in the specified value storage unit 22 in the specified value mode when there is an error. The third selector 43 sends the output value from the main DAC I / F 25 to the D / A converter 27 when it is normal. The third selector 43 sends an output value from the sub DAC I / F 26 to the D / A converter 27 in response to a switching signal when an error is detected and a clock loss error that causes the main clock to be lost is detected.

  Next, the operation of the analog output device 1 of the embodiment configured as described above will be described. First, the analog output device 1 is paired between, for example, a host controller 2 that controls a nuclear facility plant and a control target device 3 that is controlled by the host controller 2 as, for example, a plant device of the nuclear facility plant. 1 is arranged. The analog output device 1 converts the control digital signal from the host control device 2 into a current or voltage analog signal via the analog output unit 5 under the control of the microcomputer 4 and outputs the analog signal to the control target device 3. The control target device 3 is controlled by the host control device 2.

  The analog output device 1 has a function of controlling output according to a set mode when an error occurs in preparation for an error that affects the operation of the analog output device 1. Even when the analog output device 1 falls into an error (failure), the output of an abnormal signal to the control target device 3 is prevented.

  Hereinafter, an operation when the analog output device 1 falls into an error will be described. The analog output device 1 sets the error mode in the mode storage unit 21 of the analog output unit 5 via the microcomputer 4 in response to a command signal from the host control device 2. As described above, the error mode is the “specified value mode” that outputs the specified value set in advance, the “previous value mode” that outputs the previous output value, and the “output cutoff mode” that disconnects the output. One of the three types of modes.

  When the error detection unit 8 detects that an error relating to the operation of the microcomputer 4 and the analog output unit 5 has occurred, the analog output device 1 notifies the error storage unit 24. Then, the error storage unit 24 sends a switching signal corresponding to the error, and switches the first selector 41, the second selector 42, the third selector 43, or the relay unit 28. Then, an output corresponding to the set mode is performed for the error. Further, when a clock loss error occurs in which the main clock supplied to the microcomputer 4 and the analog output unit 5 is lost, the output value becomes D via the sub DAC I / F 26 operated by the sub clock generated from the sub clock unit 32. / A is sent to the converter 27.

  Next, processing when an error is detected in the analog output device 1 will be described with reference to FIG. The setting of the error output mode of the analog output device 1 is performed by software processing from the host control device 2. First, a command signal is sent from the host control device 2 to the analog output device 1. Next, the analysis unit 11 includes a mode setting signal for setting the mode at the time of error in addition to the command value for commanding the control target device 3 in the command signal from the host control device 2. The analysis of whether or not is performed (step S1 in FIG. 3).

  Next, it is determined whether or not the command signal is received from the host controller 2 for the first time, or whether or not the mode setting signal is included (step S2 in FIG. 3). Then, when the command signal is not received from the host controller 2 for the first time and the mode setting signal is not included (NO), the command value for the control target device 3 in the command signal is stored in the command value storage unit. 23 (step S6 in FIG. 3). When the command signal is received for the first time or when there is a mode setting signal (YES), the mode setting unit 12 sets any of the three modes of the output cutoff mode, the specified value mode, and the previous value mode. Is stored in the mode storage unit 21.

  If the mode has been changed since the previous time, the mode is stored in the mode storage unit 21 in the same manner. Next, it is determined whether or not the set mode is the designated value mode (step S4 in FIG. 3). If the mode set by the host controller 2 is the designated value mode (YES), the designated value included in the command signal is stored in the designated value storage unit 22 (step S5 in FIG. 3).

  In addition, when the mode specified by the host controller 2 is not the specified value mode, that is, when the output cutoff mode or the previous value mode (NO), and after storing the specified value in step S5, the host controller The command value of the command signal from 2 is stored in the command value storage unit 23 (step S6 in FIG. 3).

  Next, the hardware processing of the analog output device 1 at the time of an error will be described using FIG. Until an error occurs, the command value stored in the command value storage unit 23 is selected by the first selector 41, the main DAC I / F 25, the third selector 43, the D / C converter 27, the relay unit. 28 is sent out as an analog signal.

  First, as an error indicating an illegal state related to the operation of the microcomputer 4 and the analog output unit 5, a clock loss error in which the main clock supplied to the microcomputer 4 and the analog output unit 5 is lost, or the processing of the microcomputer 4 within a specified time An error such as a WDT (Watch Dog Timer) error occurs when the process does not end.

  Then, the error detection unit 8 detects the occurrence of an error (step S10 in FIG. 4). Next, an error signal corresponding to the error is stored in the error storage unit 24 (step S11 in FIG. 4). Next, it is determined whether or not the stored error signal is a clock loss error in which the main clock supplied to the microcomputer 4 and the analog output unit 5 is lost (step S12 in FIG. 4). In the case of a clock loss error (YES), a switching signal is output to the third selector 43.

  Then, the main DAC I / F 25 that sends the output value to the D / A converter 27 is switched to the sub DAC I / F 26 that operates based on the sub clock generated from the sub clock unit 32 (step S13 in FIG. 4). If it is not a clock loss error (NO) and after step S13, the mode at the time of the error in the mode storage unit 21 is confirmed (step S14 in FIG. 4). Here, as previously indicated, the mode preset in the mode storage unit 21 is confirmed in step S3.

  When the mode is the designated value mode, the second selector 42 is switched (step S15 in FIG. 4), and the designated value stored in the designated value storage unit 22 in advance is read in step S5. The data is sent to the A converter 27 (step S16 in FIG. 4). When the previous value mode is selected, the first selector 41 is switched (step S17 in FIG. 4), and the previous command value stored in the command value storage unit 23 is sent to the D / A converter 27. Is done. If the output cut-off mode is set, the relay unit 28 is turned off (step S18 in FIG. 4), and the output value becomes zero.

  According to the analog output device of the embodiment configured as described above, when an error that affects the operation of the analog output device occurs, an analog output is used to control the output by setting a plurality of modes for the error. Even when the device falls into an error, the output of an abnormal signal to the control target device is prevented.

  In addition, the mode when an error is detected is the output cutoff mode that stops output, the specified value mode that outputs a preset specified value, or the previous value mode that outputs a command value before an error is detected Therefore, it is possible to further prevent an abnormal output to the control target device against an error.

  In addition, when a clock loss error occurs in which the main clock supplied to the microcomputer and the analog output device is lost, the analog output unit operates by the sub clock, so that output according to the mode setting at the time of error is possible.

  In the present invention, the embodiments can be appropriately modified and omitted within the scope of the invention.

1 Analog output device, 2 Host control device, 3 Controlled device, 4 Microcomputer,
5 Analog output section, 6 Analog input section, 7 Communication input / output section, 8 Error detection section,
11 analysis unit, 12 mode setting unit, 13 command value setting unit, 21 mode storage unit,
22 specified value storage unit, 23 command value storage unit, 24 error storage unit,
25 main DACI / F, 26 sub DACI / F, 27 D / A converter,
28 relay section, 31 main clock section, 32 sub clock section, 41 first selector, 42 second selector, 43 third selector.

Claims (3)

An analog output device disposed between a control target device and a host control device that controls the control target device,
An analog output unit that converts a digital signal from the host controller for the control target device into an analog signal and outputs the analog signal to the control target device;
A control unit for controlling the operation of the analog output unit;
An error detection unit for detecting an error related to the operation of the analog output device;
The analog output unit has a plurality of modes for the error, and when the error detection unit detects the error, the analog output unit outputs an analog signal corresponding to the mode set from the plurality of modes from the host controller. An analog output device that transmits to the device to be controlled. The mode for the error includes an output cutoff mode for stopping output, a specified value mode for outputting a preset specified value, and a previous value mode for outputting a command value before the error is detected. The analog output device according to 1. A main clock unit for supplying a main clock to the analog output device;
A sub clock unit for supplying a sub clock to the analog output unit,
When detecting a clock loss error in which the main clock is lost in the error detection unit,
The analog output device according to claim 1, wherein the sub clock unit supplies the sub clock to the analog output unit.

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