JP2017224648A - Wiring structure and method of manufacturing wiring structure - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a wiring structure in which adhesiveness of wiring to a substrate is improved even when an area of a first metal layer is narrowed due to the influence of side etching, and also to provide a method of manufacturing the same.SOLUTION: A wiring structure comprises: a substrate 1 having a first direction and a second direction which is perpendicular to the first direction; a first metal layer 2 including a metal material, which includes a first region 2A extending in the first direction and having a first width Wa in the second direction on the substrate, and a second region 2B having a second width Wb different from the first width in the second direction; and a second metal layer 10 which covers at least one side surface in the second direction in the first region in a cross-sectional view seen from the first direction on the first metal layer, extends in the first direction and includes the metal material.SELECTED DRAWING: Figure 1

Description

  The present disclosure relates to a wiring structure and a manufacturing method thereof, and more particularly, to a miniaturized and highly reliable wiring structure and a manufacturing method of the wiring structure.

  In recent years, electronic devices have been increased in density and size, and integrated circuits mounted on the electronic devices have been further miniaturized. Along with this, miniaturization of wiring of integrated circuits (reduction of wiring width) has been demanded.

  As a method for forming the wiring, a subtractive method or a semi-additive method is known. For example, Patent Document 1 discloses a wiring structure in which a second metal layer is plated on a first metal layer (seed layer) formed by a semi-additive method.

JP 2006-245558 A

  In general, in the semi-additive method, after the second metal layer is formed, the resist layer is peeled off, and the exposed first metal layer (feeding layer) is removed. The first metal layer is usually removed by wet etching. When wet etching is performed, depending on the etching solution used, isotropic etching is performed. Therefore, the first metal layer disposed between the second metal layer and the substrate is side-etched, and the width of the first metal layer is reduced. Become.

  As the wiring structure is miniaturized and the wiring width becomes narrower, when side etching of the first metal layer occurs, problems such as the wiring falling occur. In addition, by reducing the thickness of the first metal layer, side etching of the first metal layer can be suppressed. However, when the second metal layer is formed on the first metal layer by electrolytic plating, If the metal layer is thin, the electrical resistance becomes high, causing a problem that current does not easily flow through the first metal layer. In addition, when the etching is performed by dry etching that does not cause side etching of the first metal layer in place of wet etching, there is a problem that an expensive facility is required and manufacturing cost increases.

  In view of the above circumstances, the present disclosure provides a miniaturized wiring structure that can improve the adhesion of wiring to a substrate even when the area of the first metal layer is reduced due to the influence of side etching, and its An object is to provide a manufacturing method.

  According to a wiring structure according to an embodiment of the present disclosure, a substrate having a first direction and a second direction perpendicular to the first direction, and extending on the substrate in the first direction, A first metal having a metal material and having a first region having a first width in the second direction and a second region having a second width different from the first width in the second direction A layer and a first metal layer that covers at least one side surface of the first region in the second direction in a cross-sectional view as viewed from the first direction, extends in the first direction, and includes a metal material. A wiring structure comprising two metal layers is provided.

  According to the manufacturing method of the wiring structure according to the embodiment of the present disclosure, the first pattern portion extending in the first direction on the substrate having the first direction and the second direction perpendicular to the first direction. And a step of forming a first metal layer including a metal material having a pattern having a second pattern portion extending in a direction different from the first direction and connected to the first pattern portion, and in plan view The first metal on the substrate so as to expose at least a part of the surface of the first pattern portion and at least one side surface of the first pattern portion in a second direction perpendicular to the first direction. Forming a resist layer so as to expose at least a part of the layer, and forming a second metal layer covering the first metal layer exposed from the resist layer in a cross-sectional view seen from the first direction. And removing the resist layer A step of manufacturing method of the wiring structure of the exposed first metal layer comprises removing by etching, is provided.

  According to the present disclosure, in the miniaturized wiring structure, even when the area of the first metal layer becomes narrow due to the influence of side etching, the adhesion of the wiring to the substrate can be improved.

FIG. 3A is a partially enlarged plan view of the wiring structure according to the first embodiment. (B) is sectional drawing which follows the B1-B2 line of (A). (C) is sectional drawing which follows the A1-A2 line of (A). It is a partial enlarged plan view of the 1st metal layer in a wiring structure. (A) is the top view which looked at the part of the 1st metal layer of the wiring structure from upper direction. (B) is sectional drawing which follows the B1-B2 line of (A). (C) is sectional drawing which follows the A1-A2 line of (A). (A) is a top view which shows a mode that the resist layer was formed with respect to the state of FIG. (B) is sectional drawing which follows the B1-B2 line of (A), (C) is sectional drawing which follows the A1-A2 line of (A). (A) is a top view which shows a mode that the 2nd metal layer was formed with respect to the state of FIG. (B) is sectional drawing which follows the B1-B2 line of (A), (C) is sectional drawing which follows the A1-A2 line of (A). (A) is a top view which shows a mode that the resist layer was removed with respect to the state of FIG. (B) is sectional drawing which follows the B1-B2 line of (A), (C) is sectional drawing which follows the A1-A2 line of (A). (A) is a top view which shows a mode that the 1st metal layer was removed by etching. (B) is sectional drawing which follows the B1-B2 line of (A), (C) is sectional drawing which follows the A1-A2 line of (A). It is sectional drawing which shows the manufacturing process of 1st area | region. It is sectional drawing which shows the manufacturing process of 2nd area | region. FIG. 6A is a partially enlarged plan view of a wiring structure according to a second embodiment. (B) is sectional drawing which follows the B1-B2 line of (A), (C) is sectional drawing which follows the A1-A2 line of (A). It is a partial enlarged plan view of the 1st metal layer in a wiring structure. (A) is a top view which shows a mode that the resist layer was formed with respect to the state of FIG. (B) is sectional drawing which follows the B1-B2 line of (A), (C) is sectional drawing which follows the A1-A2 line of (A). (A) is a top view which shows a mode that the 2nd metal layer was formed with respect to the state of FIG. (B) is sectional drawing which follows the B1-B2 line of (A), (C) is sectional drawing which follows the A1-A2 line of (A). (A) is a top view which shows a mode that the resist layer was removed with respect to the state of FIG. (B) is sectional drawing which follows the B1-B2 line of (A), (C) is sectional drawing which follows the A1-A2 line of (A). (A) is a top view which shows a mode that the 1st metal layer was removed by the etching with respect to the state of FIG. (B) is sectional drawing which follows the B1-B2 line of (A), (C) is sectional drawing which follows the A1-A2 line of (A). It is sectional drawing which shows the manufacturing process of 1st area | region. It is sectional drawing which shows the manufacturing process of 2nd area | region.

  Hereinafter, embodiments of the present disclosure will be described with reference to the drawings. However, the present disclosure can be implemented in many different modes and should not be construed as being limited to the description of the embodiments exemplified below. In addition, the drawings may be schematically represented with respect to the width, thickness, shape, and the like of each part in comparison with actual aspects for clarity of explanation, but are merely examples, and the interpretation of the present disclosure may be interpreted. It is not limited. In addition, in the present specification and each drawing, elements similar to those described above with reference to the previous drawings are denoted by the same reference numerals, and detailed description may be omitted as appropriate. In addition, for convenience of explanation, the description will be made using the terms “upper” or “lower”, but the vertical direction may be reversed.

(First embodiment)
FIG. 1A is a partially enlarged plan view of the wiring structure 200 according to the first embodiment of the present disclosure as viewed from a direction perpendicular to the surface of the substrate 1. FIG. 1B is a cross-sectional view taken along line B1-B2 of FIG. FIG. 1C is a cross-sectional view taken along line A1-A2 of FIG. FIG. 2 is a partially enlarged cross-sectional view of the first metal layer 2 serving as a seed layer of the wiring structure 200 as seen from a direction perpendicular to the surface of the substrate 1. As shown in FIGS. 1 and 2, the wiring structure 200 includes a substrate 1, a first metal layer 2, and a second metal layer 10. In FIG. 2, the description of the second metal layer 10 is omitted.

(substrate)
The material of the substrate 1 is not particularly limited. For example, a semiconductor substrate such as a glass substrate or a silicon substrate is used. Moreover, the board | substrate 1 is not limited to a glass substrate or a semiconductor substrate, Substrates and film forms, such as a sapphire substrate, a ceramic substrate, and a resin substrate, may be sufficient.

(First metal layer)
The first metal layer 2 is provided on the substrate 1. 1 and 2, the first metal layer 2 is disposed immediately above the substrate 1, but another layer (for example, an insulating layer) is disposed between the substrate 1 and the first metal layer 2. It may be. The first metal layer 2 includes a metal material such as a metal such as titanium, iron, nickel, copper, sodium, and zinc, or an alloy in combination of these metals. The first metal layer 2 may include a photosensitive material in addition to the metal material.

  In the present embodiment, the first metal layer 2 extends in a predetermined first direction (wiring direction). The first metal layer 2 is different from the first region 2A having the first width Wa in the second direction (wiring width direction) perpendicular to the first direction, and the first width Wa in the second direction. And a second region 2B having a second width Wb. In the present embodiment, a configuration in which the first width Wa of the first region 2A is larger than the second width Wb of the second region 2B will be described.

(Second metal layer)
The second metal layer 10 is provided on the first metal layer 2 and includes a metal material such as copper. The second metal layer 10 covers at least one side surface (at least one of the side surface P1 and the side surface P2) in the second direction in the first region 2A in a cross-sectional view viewed from the first direction. In the wiring structure 200 according to the present embodiment, as shown in FIGS. 1A and 1C, both the side surface P1 and the side surface P2 in the second direction of the first metal layer 2 in the first region 2A. Covering. Therefore, the second metal layer 10 has a metal layer width Wc wider than the first width Wa and the second width Wb in the second direction. The second metal layer 10 may cover one of the side surfaces P1 and P2 in the second direction of the first metal layer 2 in the first region 2A. The first metal layer 2 and the second metal layer 10 constitute a wiring 5.

  In the present embodiment, the second width Wb of the first metal layer 2 in the second region 2B is equal to the first metal layer 2 in the first region 2A by isotropic etching of the first metal layer 2 in the manufacturing process described later. It is narrower than the first width Wa. Further, in the second region 2B, the second metal layer 10 does not exist on the side surface of the first metal layer 2 in the second direction. Therefore, in the second region 2B of the first metal layer 2, the contact area between the substrate 1 and the first metal layer 2 is reduced, and the bonding strength between the substrate 1 and the first metal layer 2 is reduced.

  On the other hand, in the first region 2A, the first metal layer 2 has a first width Wa wider than the second width Wb in the second direction. As described above, in the first region 2A, the contact area between the substrate 1 and the first metal layer 2 is larger than that in the second region 2B, and the bonding strength between the substrate 1 and the first metal layer 2 is larger than that in the second region 2B. strong.

  As a result, the effect of reinforcing the bond strength of the first region 2A with the decrease in the bond strength of the second region 2B is realized, and there is a problem that the wire 5 is peeled off from the substrate 1 or the wire 5 falls down. It can be prevented from occurring. In the first region 2 </ b> A, the side surface P <b> 1 and the side surface P <b> 2 in the second direction of the first metal layer 2 are covered with the second metal layer 10. Therefore, the adhesion portion between the second metal layer 10 and the substrate 1 functions to further improve the bonding strength between the wiring 5 and the substrate 1.

  Although not shown, the first regions 2A and the second regions 2B may be alternately arranged at predetermined intervals in the first direction. According to such a configuration, unevenness in the bonding strength of the first metal layer 2 with respect to the substrate 1 for each predetermined length is suppressed. Moreover, as long as the 1st area | region 2A and the 2nd area | region 2B are arrange | positioned alternately, it does not necessarily need to be every predetermined space | interval.

(Method for manufacturing wiring structure)
Next, a method for manufacturing the wiring structure 200 will be described with reference to FIGS. First, a first metal layer 2 containing a metal material is formed on the entire surface of the substrate 1 as shown in FIG. The first metal layer 2 may be formed by, for example, a sputtering method, a vapor deposition method, electroless copper plating, or the like. The thickness of the first metal layer 2 may be about 200 nm.

  Next, as shown in FIG. 3, the first metal layer 2 is patterned (first metal layer forming step). The pattern of the first metal layer 2 extends in a direction (third direction) different from the first pattern portion J1 extending in the first direction (wiring direction) and connected to the first pattern portion J1 (this embodiment). In the example of the form, the second pattern portion J2 is included. In the present embodiment, the direction different from the first direction coincides with the second direction (wiring width direction) perpendicular to the first direction (wiring direction), that is, the width direction of the first pattern portion J1. That is, the first pattern portion J1 and the second pattern portion J2 are orthogonal to each other. Note that the direction different from the first direction does not necessarily coincide with the second direction. That is, since the second pattern portion J2 only needs to connect the first pattern portions J1 to each other, the second pattern portion J2 does not need to be perpendicular to the first pattern portion J1. Further, the second pattern portion J2 for supplying power may not be provided on the entire surface of the substrate 1. The first pattern portions J1 remaining as wirings are patterned so that the second pattern portions J2 are linearly connected with a predetermined width by the second pattern portions J2, or the first pattern portions J1 remaining as wiring and the outer peripheral supply wirings are second pattern portions J2. May be patterned so as to be connected in a line with a predetermined width.

  The first metal layer 2 is patterned to include the first pattern portion J1 and the second pattern portion J2 by photolithography or the like. Here, an example in which the first metal layer 2 is formed on the entire surface of the substrate 1 and then the first metal layer 2 is patterned has been described. However, the method of forming the pattern of the first metal layer 2 is not limited thereto. I don't mean. For example, a desired first metal layer 2 may be printed on the substrate 1 by using a printing method such as offset printing or screen printing, and a firing process may be performed as necessary. This is because it is necessary to burn off the resin component and the solvent component for making an ink.

  For example, a resist layer 3 is formed on the substrate 1 in a region where the pattern of the first metal layer 2 is not formed, and then the first metal layer 2 is formed on the entire surface of the substrate 1 and then formed on the substrate 1. The pattern of the first metal layer 2 may be formed by removing a part of the first metal layer 2 together with the removal of the resist layer 3 formed.

  FIG. 4A is a plan view showing a state in which the resist layer 3 is formed with respect to the state of FIG. 4B is a cross-sectional view taken along line B1-B2 in FIG. 4A, and FIG. 4C is a cross-sectional view taken along line A1-A2 in FIG. As shown in FIG. 4A, a resist layer 3 is formed on the substrate 1 so as to expose at least part of the pattern of the first metal layer 2 (resist layer forming step). The resist layer 3 includes at least a part of the upper surface P3 of the first pattern portion J1 of the first metal layer 2 (the upper surface of the first pattern portion J1 in plan view) and the first pattern of the first metal layer 2 in the second direction. At least one side surface of the part J1 is exposed.

  In the present embodiment, as shown in FIGS. 4A and 4C, the resist layer 3 is formed on both the entire upper surface P3 of the first pattern portion J1 and the first pattern portion J1 in the second direction. The side surface P1 and the side surface P2 are exposed. Further, as shown in FIGS. 4A and 4B, the resist layer 3 is formed by exposing the entire upper surface P3 of the first pattern portion J1.

  Therefore, the resist layer 3 exposes the first metal layer 2 and the substrate 1 to the outer position R1 and the outer position R2 that are separated from the side surface P1 and the side surface P2 in the second direction of the first pattern portion J1 by a predetermined distance. It is formed.

  The reason for forming the resist layer 3 after the formation of the first metal layer 2 is that if the second metal layer 10 is formed by electrolytic plating in a state where the resist layer 3 is not formed, the first metal layer Since the second metal layer 10 is isotropically formed around 2, the thickness direction and the lateral direction have the same growth rate, making it difficult to form thin wiring. The resist layer 3 is necessary to control the lateral growth.

  FIG. 5A is a plan view showing a state in which the second metal layer 10 is formed in the state of FIG. 5B is a cross-sectional view taken along line B1-B2 in FIG. 5A, and FIG. 5C is a cross-sectional view taken along line A1-A2 in FIG. As shown in FIG. 5, the second metal layer 10 is formed on the exposed pattern of the first metal layer 2 (second metal layer forming step). The second metal layer 10 is formed by electrolytic plating. A copper sulfate plating solution may be used as the plating solution.

  As shown in FIG. 5C, in the portion of the first pattern portion J1 where the second pattern portion J2 does not intersect, on the entire upper surface P3 of the first pattern portion J1 and in the second direction of the first pattern portion J1. The side surface P1 and the side surface P2 on both sides are also covered with the second metal layer 10. On the other hand, as shown in FIG. 5B, in the portion where the second pattern portion J2 intersects in the first pattern portion J1, the second metal layer 10 is the upper surface of the first pattern portion J1 of the first metal layer 2. Cover the entire surface of P3.

  FIG. 6A is a plan view showing a state in which the resist layer 3 is removed with respect to the state of FIG. 6B is a cross-sectional view taken along line B1-B2 in FIG. 6A, and FIG. 6C is a cross-sectional view taken along line A1-A2 in FIG. As shown in FIG. 6, the resist layer 3 is removed (resist layer removal step). At this time, the first metal layer 2 has the second pattern portion J2 in addition to the first pattern portion J1.

  FIG. 7A is a plan view showing a state in which the second pattern portion J2 of the first metal layer 2 has been removed by etching. FIG. 7B is a cross-sectional view taken along line B1-B2 in FIG. 7A, and FIG. 7C is a cross-sectional view taken along line A1-A2 in FIG. As shown in FIGS. 7A and 7B, the second pattern portion J2 of the first metal layer 2 is removed by wet etching (first metal layer etching step). Specifically, the second pattern portion J2 exposed from the second metal layer 10 and extending in the second direction is removed by etching.

  By removing the second pattern portion J2, the wiring 5 is formed by the first pattern portion J1 and the second metal layer 10 of the first metal layer 2 remaining on the substrate 1. The adjacent wirings 5 are electrically insulated from each other by removing the second pattern portion J2. Thus, the wiring structure 100 is formed.

  When the second pattern portion J2 of the first metal layer 2 is removed by etching, as shown in FIG. 7C, in the portion where the second pattern portion J2 does not intersect in the first pattern portion J1, the second direction Since both the side surface P1 and the side surface P2 are covered with the second metal layer 10, the first pattern portion J1 is not etched in the second direction.

  On the other hand, as shown in FIG. 7B, in the portion where the second pattern portion J2 intersects in the first pattern portion J1, when the second pattern portion J2 is removed by etching, the second pattern The first pattern portion J1 is also etched in the second direction along with the etching of the portion J2. Specifically, as shown in FIG. 7B, the first pattern portion J1 is moved in the second direction from the side surface P1 and the side surface P2 side in the second direction of the first pattern portion J1 by isotropic etching. A part is etched. Accordingly, as shown in FIGS. 7B and 7C, the first region 2A having the first width Wa in the second direction perpendicular to the first direction and the first in the second direction. A second region 2B having a second width Wb different from the width Wa of the first metal layer 2 is formed.

  In the first region 2A, the contact area between the substrate 1 and the first metal layer 2 is larger than the contact area between the substrate 1 and the first metal layer 2 in the second region 2B. Is stronger than the second region 2B. On the other hand, in the second region 2B, the contact area between the substrate 1 and the first metal layer 2 becomes small, and the bonding strength between the substrate 1 and the first metal layer 2 becomes weaker than that in the first region 2A.

  Therefore, the bonding strength between the substrate 1 and the first metal layer 2 in the first region 2A is stronger than the bonding strength in the second region 2B. As a result, the bond strength between the substrate 1 and the first metal layer 2 in the first region 2A can reinforce the decrease in the bond strength between the substrate 1 and the first metal layer 2 in the second region 2B.

  As a result, when the wiring structure 200 is manufactured, even when the width between the wirings 5 made of the second metal layer 10 and the first metal layer 2 is narrow, that is, when the wiring 5 is miniaturized. The contact area between the substrate 1 and the first metal layer 2 that can prevent the wiring 5 from falling or peeling from the substrate 1 is secured, and the bonding strength between the substrate 1 and the first metal layer 2 is increased. Can be maintained. Therefore, it is possible to realize a miniaturized and highly reliable wiring structure 200.

  FIG. 8 is a cross-sectional view showing the manufacturing process of the first region 2A in the first metal layer 2. As shown in FIG. The manufacturing process in the first region 2A described above will be described in an easy-to-understand manner as follows. As shown in FIG. 8A, in the portion where the second pattern portion J2 of the first pattern portion J1 does not intersect, the first metal layer 2 having the first width Wa in the second direction on the substrate 1. The first pattern portion J1 is formed.

  As shown in FIG. 8B, the side surface P1 and the side surface P2 on both sides in the second direction of the first pattern portion J1 are exposed in the portion where the second pattern portion J2 of the first pattern portion J1 does not intersect. Then, the resist layer 3 is formed. As shown in FIG. 8C, in the portion where the second pattern portion J2 of the first pattern portion J1 does not intersect, the second metal layer 10 is formed on the upper surface P3 of the first pattern portion J1 of the first metal layer 2. It is formed so as to cover the entire surface and the side surface P1 and the side surface P2 in the second direction.

  As shown in FIG. 8D, the resist layer 3 is removed. As shown in FIG. 8E, when the second pattern portion J2 of the first metal layer 2 is etched, the portion where the second pattern portion J2 of the first pattern portion J1 does not intersect is not etched. The state of the wiring structure 200 is the same as the state of FIG. Thus, the wiring structure 200 is completed.

  As a result of the process of FIGS. 8A to 8E described above, the first region 2A having the first width Wa in the second direction is formed in the first pattern portion J1 of the first metal layer 2.

  FIG. 9 is a cross-sectional view showing the manufacturing process of the second region 2B. The manufacturing process in the second region 2B described above will be described in an easy-to-understand manner as follows. As shown in FIG. 9A, in the portion where the second pattern portion J2 of the first pattern portion J1 intersects, the second pattern portion J2 of the first metal layer 2 extending in the second direction on the substrate 1. Is formed.

  At a portion where the second pattern portion J2 of the first pattern portion J1 intersects, the resist layer 3 is formed on the second pattern portion J2 of the first metal layer 2 as shown in FIG. 9B. As shown in FIG. 9C, the second metal layer 10 is formed so as to cover the upper surface P3 of the first metal layer 2 exposed from the resist layer 3. FIG. 9D shows a state where the resist layer 3 is removed after the second metal layer 10 is formed.

  Then, when the exposed second pattern portion J2 of the first metal layer 2 is etched, as shown in FIG. 9E, one of the first pattern portions J1 and the second pattern portion J1 are formed by isotropic etching. The part is etched in the second direction. As a result, in the portion where the second pattern portion J2 of the first pattern portion J1 does not intersect, the first metal layer 2 has a second width Wb that is smaller than the first width Wa in the second direction. Region 2B is formed.

(Second Embodiment)
FIG. 10A is a partially enlarged plan view of the wiring structure 300 according to the second embodiment of the present disclosure as viewed from a direction perpendicular to the surface of the substrate 1. FIG. 10B is a cross-sectional view taken along line B1-B2 of FIG. FIG. 10C is a cross-sectional view taken along line A1-A2 of FIG. FIG. 11 is a cross-sectional view of the first metal layer 2 as viewed from a direction perpendicular to the surface of the substrate 1. In FIG. 12, the description of the second metal layer 10 is omitted. Moreover, the description which overlaps with the manufacturing method of the wiring structure 200 according to the first embodiment will be omitted or simplified.

  As shown in FIGS. 10 and 11, the wiring structure 300 includes a substrate 1, a first metal layer 2, and a second metal layer 10. The first metal layer 2 is provided on the substrate 1 and includes a metal material and extends in the first direction (first direction).

  The first metal layer 2 includes a first region 2A having a first width Wa in a second direction perpendicular to the first direction, and a second region in a second direction different from the first width Wa in the second direction. And a second region 2B having a width Wb. The second metal layer 10 is provided around the first region 2A including one side surface P2 in the second direction in a cross-sectional view as viewed from the first direction, and the first width Wa and the second width in the second direction. It has a metal layer width Wc wider than Wb. However, the second metal layer 10 is not formed on the other side surface P1 side in the second direction in the first region 2A.

  Next, a method for manufacturing the wiring structure 300 will be described with reference to FIGS. 3 and 12 to 17. First, similarly to the first embodiment, as shown in FIG. 3, the first metal layer 2 is formed on the substrate 1 so as to include the first pattern portion J1 and the second pattern portion J2 (first metal layer forming step). .

  FIG. 12A is a partially enlarged plan view showing a state in which the resist layer 3 is formed with respect to the state of FIG. 12B is a cross-sectional view taken along line B1-B2 in FIG. 12A, and FIG. 12C is a cross-sectional view taken along line A1-A2 in FIG. As shown in FIG. 12A, a resist layer 3 is formed on the substrate 1 so as to expose at least part of the pattern of the first metal layer 2 (resist layer forming step).

  The resist layer 3 exposes at least a part of the upper surface P3 of the first pattern portion J1 of the first metal layer 2 and at least one side surface of the first pattern portion J1 of the first metal layer 2 in the second direction. It is formed. In the present embodiment, as shown in FIGS. 12A and 12C, the resist layer 3 is the upper surface of the first pattern portion J1 in the portion where the second pattern portion J2 does not intersect in the first pattern portion J1. A part of P3 and one side surface P2 of the first pattern portion J1 in the second direction are formed to be exposed. Further, as shown in FIGS. 12A and 12B, in the portion where the second pattern portion J2 intersects in the first pattern portion J1, the resist layer 3 is a part of the upper surface P3 of the first pattern portion J1. And a part of the upper surface P4 of the second pattern portion J2 in the second direction is exposed.

  As shown in FIG. 12C, in the portion where the second pattern portion J2 does not intersect in the first pattern portion J1, the resist layer 3 is the other in the second direction of the first pattern portion J1 of the first metal layer 2. Is formed up to the inner position Q1 so as to cover (fill) the side surface P1. The resist layer 3 is formed so as to expose one side surface P2 in the second direction of the first pattern portion J1 of the first metal layer 2. Therefore, the resist layer 3 is formed so as to expose the first metal layer 2 and the substrate 1 to an outer position R2 that is a predetermined distance away from one side surface P2 in the second direction of the first pattern portion J1.

  FIG. 13A is a plan view showing a state in which the second metal layer 10 is formed in the state of FIG. 13B is a cross-sectional view taken along line B1-B2 in FIG. 13A, and FIG. 13C is a cross-sectional view taken along line A1-A2 in FIG. As shown in FIG. 13, the second metal layer 10 is formed on the exposed upper surface P3 of the first metal layer 2 (second metal layer forming step).

  As shown in FIG. 13C, in the portion of the first pattern portion J1 where the second pattern portion J2 does not intersect, a part of the upper surface P3 of the first pattern portion J1 and the second portion of the first pattern portion J1. One side surface P2 in the direction is also covered by the second metal layer 10. On the other hand, as shown in FIG. 13B, in the portion where the second pattern portion J2 intersects in the first pattern portion J1, the second metal layer 10 is the upper surface of the first pattern portion J1 of the first metal layer 2. A part of P3 and a part of the second pattern portion J2 are covered.

  FIG. 14A is a plan view showing a state in which the resist layer 3 is removed with respect to the state of FIG. 14B is a cross-sectional view taken along line B1-B2 in FIG. 14A, and FIG. 14C is a cross-sectional view taken along line A1-A2 in FIG. As shown in FIG. 14, the resist layer 3 is removed (resist layer removal step). At this time, the first metal layer 2 remains in a state including the first pattern portion J1 and the second pattern portion J2.

  FIG. 15A is a plan view showing a state where the second pattern portion J2 of the first metal layer 2 is removed. 15B is a cross-sectional view taken along line B1-B2 in FIG. 15A, and FIG. 15C is a cross-sectional view taken along line A1-A2 in FIG. As shown in FIGS. 15A and 15B, the second pattern portion J2 of the first metal layer 2 is removed by wet etching. Specifically, the second pattern portion J2 that is exposed from the second metal layer 10 and extends in the second direction is removed by etching (first metal layer etching step).

  By removing the second pattern portion J2, the wiring 5 is formed by the first pattern portion J1 and the second metal layer 10 of the first metal layer 2 remaining on the substrate 1. The adjacent wirings 5 are electrically insulated from each other by removing the second pattern portion J2. Thus, the wiring structure 300 is formed.

  As shown in FIG. 15B, both side surfaces P1 and P2 in the second direction are etched and recessed at the location of the second region 2B where the first metal layer 2 intersects. Therefore, the dimension of the first metal layer 2 in the second direction is formed to a second width Wb that is narrower than the metal layer width Wc of the second metal layer 10.

  When the second pattern portion J2 of the first metal layer 2 is removed, as shown in FIG. 15C, in the portion where the second pattern portion J2 does not intersect in the first pattern portion J1, one side surface P2 side is previously Since it is covered with the second metal layer 10, the first pattern portion J1 is not etched. The other side surface P1 is exposed and etched. Therefore, the dimension of the first metal layer 2 in the second direction is formed to a first width Wa that is narrower than the metal layer width Wc of the second metal layer 10. However, the second metal layer 10 has a function of reinforcing the bonding strength with the substrate 1 beside the first metal layer 2 in the second direction. As a result, the first region 2A can reinforce the strength of the wiring structure 300 even when the second region 2B has a narrow width.

  FIG. 15 shows a configuration in which the second width Wb of the second region 2B is larger than the first width Wa of the first region 2A. However, a configuration in which the first width Wa of the first region 2A is larger than the second width Wb of the second region 2B is also possible depending on the progress of etching.

  FIG. 16 is a cross-sectional view showing the manufacturing process of the first region 2A. The manufacturing process of the first metal layer 2 described above will be described in an easy-to-understand manner as follows. As shown in FIG. 16A, in the portion where the second pattern portion J2 of the first pattern portion J1 does not intersect, the first metal layer 2 having the first width Wa in the second direction is formed on the substrate 1. It is formed.

  As shown in FIG. 16 (B), a part of the upper surface P3 of the first metal layer 2, one side surface P2, and one side surface P2 on the substrate 1 to the outer position R2 are exposed while filling the other side surface P1. Thus, the resist layer 3 is formed. Then, as shown in FIG. 16C, the second metal layer 10 is formed so as to cover a part of the upper surface P3 of the first metal layer 2 and the one side surface P2 in the second direction, as shown in FIG. Thus, the resist layer 3 is removed. Then, the first metal layer 2 is etched to form the first metal layer 2 with the first width Wa in the second direction, the second metal layer 10 is formed with the width in the second direction to the metal layer width Wc, The wiring structure 300 is completed.

  As a result of the process of FIG. 16 described above, the first metal layer 2 shrinks to the first width Wa in the second direction, but the second metal layer 10 exists beside the first metal layer 2 in the second direction. As a result, the strength of the wiring structure 300 is suppressed from being lowered, and the strength of the wiring structure 300 is ensured.

  FIG. 17 is a cross-sectional view showing the manufacturing process of the second region 2B. The manufacturing process in the second region 2B described above will be described in an easy-to-understand manner as follows. As shown in FIG. 17A, the second pattern portion J2 of the first metal layer 2 extending in the second direction on the substrate 1 at the portion where the second pattern portion J2 of the first pattern portion J1 intersects. Is formed.

  In a portion where the second pattern portion J2 of the first pattern portion J1 intersects, the resist layer 3 is formed on the second pattern portion J2 of the first metal layer 2 as shown in FIG. As shown in FIG. 17C, the second metal layer 10 is formed so as to cover the upper surface P3 of the first metal layer 2 exposed from the resist layer 3. FIG. 17D shows a state where the resist layer 3 is removed after the second metal layer 10 is formed.

  Then, when the exposed second pattern portion J2 of the first metal layer 2 is etched, as shown in 17 (E), isotropic etching causes a part of the first pattern portion J1 together with the second pattern portion J2. Are etched in the second direction. As a result, in the portion where the second pattern portion J2 of the first pattern portion J1 does not intersect, the first metal layer 2 has a second width Wb that is smaller than the first width Wa in the second direction. Region 2B is formed.

  With the configuration of the first embodiment 1 or the second embodiment described above, the contact area between the second metal layer 10 and the substrate 1 via the first metal layer 2 can be increased. There is no problem when the wiring width is about 10 μm, but it becomes significant to apply the configuration of this embodiment particularly when a configuration with a narrow plating wiring width is required.

  Note that the wiring structure 200 and the wiring structure 300 of the first embodiment and the second embodiment may be applied in combination on the surface of the same substrate 1 as appropriate. Further, a configuration in which two or more of a part of the configuration of the wiring structure 200 and a part of the configuration of the wiring structure 300 are combined is also possible.

  The width of the first metal layer 2 extending in the second direction may be narrower than the width of the first metal layer 2 extending in the first direction.

DESCRIPTION OF SYMBOLS 1 Board | substrate, 2 1st metal layer, 2A 1st area | region, 2B 2nd area | region, 10 2nd metal layer, 2A 1st area | region, 2B 2nd area | region, 200,300 Wiring structure, J1 1st pattern part, J2 1st 2 pattern portions, P1 side surface, P2 side surface, P3 upper surface, P4 upper surface, R1 outer position, R2 outer position, Wa first width, Wb second width, Wc metal layer width

Claims (10)

A substrate having a first direction and a second direction perpendicular to the first direction;
A first region extending in the first direction and having a first width in the second direction on the substrate, and a second having a second width different from the first width in the second direction. A first metal layer having a region and including a metal material;
On the first metal layer, a second metal layer that covers at least one side surface of the first region in the second direction in a cross-sectional view as viewed from the first direction, extends in the first direction, and includes a metal material. When,
A wiring structure comprising:   The wiring structure according to claim 1, wherein the first region and the second region are alternately arranged in the first direction.   The wiring structure according to claim 1, wherein the first width is wider than the second width.   The wiring structure according to claim 1, wherein the second width is wider than the first width. A first pattern portion extending in a first direction on a substrate having a first direction and a second direction perpendicular to the first direction, and the first pattern portion extending in a direction different from the first direction. Forming a first metal layer including a metal material having a pattern having a second pattern portion connected to the pattern portion;
On the substrate so as to expose at least a part of the surface of the first pattern portion in a plan view and at least one side surface of the first pattern portion in a second direction perpendicular to the first direction; Forming a resist layer to expose at least a portion of the first metal layer;
Forming a second metal layer covering the first metal layer exposed from the resist layer in a cross-sectional view as viewed from the first direction;
Removing the resist layer;
Removing the exposed first metal layer by etching;
A method for manufacturing a wiring structure including:   The method of manufacturing a wiring structure according to claim 5, wherein the exposed first metal layer is removed by wet etching. When both side surfaces of the first pattern portion in the second direction are exposed from the resist layer,
In the removal of the first metal layer, in a cross-sectional view seen from the first direction,
The first pattern portion is not etched in a portion where the second pattern portion does not intersect in the first pattern portion,
In the portion where the second pattern portion intersects in the first pattern portion, both side surfaces of the first pattern portion in the second direction are etched.
The manufacturing method of the wiring structure of Claim 5 or Claim 6. When one side surface of the first pattern portion in the second direction is exposed from the resist layer,
In the removal of the first metal layer, in a cross-sectional view seen from the first direction,
In the portion where the second pattern portion does not intersect in the first pattern portion, the other side surface in the second direction is etched in the first pattern portion,
In the portion where the second pattern portion intersects in the first pattern portion, both side surfaces of the first pattern portion in the second direction are etched.
The manufacturing method of the wiring structure of Claim 5 or Claim 6.   9. The method of manufacturing a wiring structure according to claim 5, wherein a width of the second pattern portion is formed narrower than a width of the first pattern portion extending in the first direction.   The manufacturing method of a wiring structure which combined any two or more of the manufacturing methods of the wiring structure of any one of Claim 5 thru | or 9.

Images