JP2017212330A - Method of manufacturing magnetic storage element and magnetic storage element - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a method of manufacturing magnetic storage element capable of accurately manufacturing a magnetic storage element and a magnetic storage element.SOLUTION: A method of manufacturing a magnetic storage element includes: a magnetic tunnel junction element 1 that has a structure that an insulator layer 13 is disposed between a free magnetic layer 11 and a fixed magnetic layer 12 and the resistance state changes depending on the magnetization direction of the free magnetic layer; and a first electrode 21 and a second electrode 22 which include the magnetic tunnel junction element therebetween. The manufacturing method includes the steps of: a series of first processing in which, after patterning the first electrode, subjecting the surface of the first electrode to a chemical treatment; and a second processing in which the magnetic tunnel junction element is processed by using the first electrode as a mask.SELECTED DRAWING: Figure 6

Description

  The present invention relates to a method for manufacturing a magnetic memory element and a magnetic memory element.

  In recent years, attention has been focused on applying a magnetic tunnel junction (MTJ) element using a resistance change caused by a difference in magnetization direction to a magnetoresistive memory (MRAM).

  The MTJ element used in the MRAM includes, for example, a fixed magnetization layer (fixed magnetic layer) having a fixed magnetization direction, a free magnetization layer (free magnetic layer) having a variable magnetization direction, and tunnel insulation disposed between the two. Including layers.

  Here, the resistance of the MTJ element is low when the magnetization directions of the free magnetic layer and the pinned magnetic layer are parallel (same direction), and is high when the magnetization direction is antiparallel (opposite direction). The state corresponds to, for example, data “0” and “1”.

  In addition, MRAM is classified into, for example, a write wiring type and a spin injection type from the viewpoint of a writing method. In the write wiring type MRAM, the magnetization direction of the free magnetic layer is controlled based on the magnetic field generated by the current flowing in the write word line. On the other hand, in the spin injection type MRAM, the magnetization direction of the free magnetic layer is controlled by the spin transfer effect generated when a current is passed through the MTJ element.

  As described above, the magnetic memory element to which the MTJ element is applied (MRAM to which the MTJ element is applied) changes the magnetization direction (resistance state) by passing a current through the MTJ element, and thus has a problem that power consumption is large. is there. Therefore, an attempt has been made to change the magnetization direction of the free magnetic layer not by current but by voltage.

  By the way, conventionally, various methods for manufacturing a magnetic memory element (magnetoresistance memory) using an MTJ element have been proposed.

JP 2006-060044 A JP 2002-305290 A JP 2002-038285 A International Publication No. 2009/096328

  As described above, for example, a magnetic memory element to which an MTJ element is applied has a problem that the magnetization direction is changed by passing a current through the MTJ element. Technology to control the direction has been developed.

  Various types of magnetic memory elements such as two terminals and three terminals have been proposed as magnetic memory elements that change the magnetization direction (resistance state) of the MTJ element by this voltage. However, in these magnetic memory elements, for example, tantalum (Ta) having conductivity is used as the upper electrode (first electrode) and the lower electrode (second electrode) sandwiching the MTJ element.

  By the way, when manufacturing a magnetic memory element (MRAM), since an MTJ element uses a magnetic material, the reactive ion etching (RIE) usually used in microfabrication scrapes the magnetic material. It is difficult. Therefore, the MTJ element is etched by sufficiently increasing the thickness of the resist mask (resist). In this case, it is difficult to form the MTJ element with high accuracy based on the shape of the resist mask.

  In other words, when etching is performed using a thick resist mask, not only the thickness direction of the resist mask but also the width direction is removed, so that, for example, the resist mask size (width direction) has a margin, and with high accuracy. It becomes difficult to manufacture a magnetic memory element.

  In one aspect, a magnetic tunnel junction element having a structure in which an insulating layer is sandwiched between a free magnetic layer and a pinned magnetic layer, the resistance state of which varies depending on the magnetization direction of the free magnetic layer, and a first that sandwiches the magnetic tunnel junction element. According to a method of manufacturing a magnetic memory element including an electrode and a second electrode, after patterning the first electrode, a first process of chemically treating a surface of the first electrode, and using the first electrode as a mask, A second process for processing the magnetic tunnel junction element.

  As one aspect, the magnetic memory element can be manufactured with high accuracy.

FIG. 1 is a diagram for explaining the operation of the magnetic tunnel junction element. FIG. 2 is a diagram schematically illustrating an example of a magnetic memory element. FIG. 3 is a diagram showing an electric field in the magnetic memory element shown in FIG. FIG. 4 is an equivalent circuit diagram showing one memory cell when a magnetoresistive memory is formed by the magnetic memory element shown in FIG. FIG. 5 is a diagram for explaining an example of a method of manufacturing a magnetoresistive element. FIG. 6 is a view (No. 1) for describing an example of the method for manufacturing the magnetic memory element according to the embodiment. FIG. 7 is a view (No. 2) for explaining an example of the method for manufacturing the magnetic memory element according to the present embodiment. FIG. 8 is a diagram (No. 3) for explaining an example of the method for manufacturing the magnetic memory element according to the present embodiment. FIG. 9 is a diagram schematically showing an example of the magnetic memory element according to the present embodiment. FIG. 10 is a diagram for explaining an example of a typical structure of the magnetic memory element manufactured by the method of manufacturing the magnetic memory element shown in FIGS.

  First, before describing in detail an example of a method for manufacturing a magnetic memory element according to this embodiment, an example of a magnetic memory element and its problems will be described with reference to FIGS.

  FIG. 1 is a diagram for explaining the operation of a magnetic tunnel junction (MTJ) element, and for explaining the operation of an MTJ element applied to a spin injection type magnetoresistive memory (MRAM). As shown in FIG. 1, the MTJ element 1 has an insulating layer (tunnel insulating layer) 13 sandwiched between a free magnetic layer (free magnetic layer) 11 and a fixed magnetic layer (fixed magnetic layer) 12.

  1A and 1C show a high resistance state (when the magnetization directions of the free magnetic layer 11 and the pinned magnetic layer 12 are antiparallel (opposite directions)), and FIG. Indicates a low resistance state (when the magnetization directions of the free magnetic layer 11 and the pinned magnetic layer 12 are parallel (the same direction)).

  First, as shown in FIG. 1A, for example, the free magnetic layer 11 corresponding to the data “0” and the pinned magnetic layer 12 are free of magnetization in the opposite directions (antiparallel) of the MTJ element 1. When a predetermined current (positive current) from the magnetic layer 11 toward the pinned magnetic layer 12 is passed, the state changes as shown in FIG. The magnetization direction in the fixed magnetic layer 12 is fixed.

  That is, by passing a positive current through the MTJ element 1, the magnetization direction in the free magnetic layer 11 is reversed, and the magnetization directions of the free magnetic layer 11 and the pinned magnetic layer 12 are the same (parallel). For example, data “1” is held (written).

  Further, as shown in FIG. 1B, for example, the free magnetic layer 11 and the fixed magnetic layer 12 corresponding to the data “1” are free from the fixed magnetic layer 12 with respect to the MTJ element 1 in which the magnetization directions are parallel. When a predetermined current (negative current) directed to the magnetic layer 11 is passed, it changes as shown in FIG.

  That is, by passing a negative current through the MTJ element 1, the magnetization direction in the free magnetic layer 11 is reversed, and the magnetization directions of the free magnetic layer 11 and the pinned magnetic layer 12 are antiparallel. Data “0” is held again.

  In the MTJ element 1 shown in FIG. 1, the magnetization directions in the free magnetic layer 11 and the pinned magnetic layer 12 are perpendicular (orthogonal) to the bonding surfaces of the free magnetic layer 11, the pinned magnetic layer 12, and the insulating layer 13. However, data “0” and “1” can be held even with the same MTJ element as the bonding surface.

  FIG. 2 is a diagram schematically showing an example of the magnetic memory element, and shows an example of the two-terminal type magnetic memory element 100. Here, the MTJ element has the same configuration as described with reference to FIG.

  In FIG. 2, reference numeral 1 is an MTJ element, 11 is a free magnetic layer, 12 is a fixed magnetic layer, 13 is an insulating layer (tunnel insulating layer), 21 is a first electrode (upper electrode), 22 is a second electrode (lower) Electrode), 31 is a first wiring, 32 is a second wiring, 41 is a cover film, and 42 is an interlayer film.

  As shown in FIG. 2, the first electrode 21 is provided on the MTJ element 1 (free magnetic layer 11), and the first electrode 21 is electrically connected to the first wiring 31. . The second electrode 22 is provided below the MTJ element 1 (pinned magnetic layer 12), and the second electrode 22 is electrically connected to the second wiring 32.

  3 is a diagram showing an electric field in the magnetic memory element shown in FIG. 2, and FIG. 4 is an equivalent circuit diagram showing one memory cell when a magnetoresistive memory is formed by the magnetic memory element shown in FIG. .

  First, as described with reference to FIG. 1 (FIGS. 1A to 1C), the current flowing in the MTJ element 1 is held in the MTJ element 1 by making it a positive current or a negative current. Data is controlled to “0” or “1”.

  As shown in FIG. 3, when a positive current is passed through the MTJ element 1 sandwiched between the first electrode 21 and the second electrode 22, the MTJ element 1 has the first electrode 21 to the second electrode 22. The MTJ element 1 is in a low resistance state as shown in FIG. 1B, for example.

  Here, the first wiring 31 and the second wiring 32 connected to the first electrode 21 and the second electrode 22 are used by the MTJ element 1 to form a memory cell of a magnetoresistive memory (MRAM).

  As shown in FIG. 4, one memory cell in the MRAM can be formed by a magnetic memory element (variable resistor) 100 and a transistor 9 that controls access (read / write) of the memory cell.

  That is, for example, the first wiring 31 connected to the first electrode 21 is connected to the bit line BL, and the second wiring 32 connected to the second electrode 22 is connected to the drain of the transistor 9. Here, the source of the transistor 9 is grounded, and the gate of the transistor 9 is connected to the word line WL.

  Note that a plurality of memory cells (magnetic storage element 100 and transistor 9) shown in FIG. 4 are arranged in a matrix, and a known row decoder, column decoder, write circuit, read circuit, etc. are applied to the MRAM (magnetic resistance). Memory) can be formed.

  FIG. 5 is a diagram for explaining an example of a method of manufacturing a magnetoresistive element. Here, FIG. 5A shows a state in which each layer is laminated on the substrate 5, FIG. 5B shows a resist mask 61 formed on the first electrode 21, and FIG. Shows a state where the resist mask 61 is used to process (etching) the surface of the second electrode 22. 5A to 5C, the same reference numerals as those of the magnetic memory element 100 in FIG. 2 described above denote the same components.

In an example of a method for manufacturing a magnetoresistive element, first, as shown in FIG. 5A, for example, a wafer in which an interlayer film 42 (for example, SiO ₂ , SiN, etc.) is formed on a silicon substrate 5 is formed. The second electrode 22, the magnetic layer 12, the insulating layer 13, the magnetic layer 11, and the first electrode 21 are sequentially formed. Here, the magnetic layer 12, the insulating layer 13, and the magnetic layer 11 correspond to the pinned magnetic layer 12, the tunnel insulating layer 13, and the free magnetic layer 11 of the MTJ element 1.

  Next, as shown in FIG. 5 (b), a resist mask 61 is formed on the first electrode 21, that is, a resist is applied on the first electrode 21 and exposed, and a mask 61 made of resist having a predetermined shape is formed. Form.

  Further, as shown in FIG. 5C, using the resist mask 61, the magnetic layer 12, the insulating layer 13, and the magnetic layer 11 are formed together with the first electrode 21 by, for example, reactive ion etching (RIE). The MTJ element 1 is formed by shaving. Here, the MTJ element 1 includes magnetic layers 11 and 12 such as cobalt iron boron (CoFeB), and these magnetic layers 11 and 12 are difficult to cut by RIE. For example, RIE is performed by forming the resist mask 61 with a considerably large thickness. In this case, it is difficult to form the MTJ element 1 (magnetic memory element) in a desired shape with high accuracy.

  Hereinafter, examples of the method for manufacturing a magnetic memory element according to the present embodiment will be described in detail with reference to the accompanying drawings.

  6 to 8 are diagrams for explaining an example of the method of manufacturing the magnetic memory element according to this embodiment. The processes in FIGS. 6A to 6E are the same as those in FIG. This corresponds to the processing of (a) to FIG. Here, the processes of FIGS. 7A to 7C and FIGS. 8A to 8C are examples of processes for manufacturing the magnetic memory element shown in FIG. When the magnetic memory element shown in FIG. 2 is manufactured, the same processing is performed after the processing of FIGS. 5 (a) to 5 (c).

  FIG. 9 is a diagram schematically showing an example of the magnetic memory element according to the present embodiment, and shows an example of the magnetic memory element manufactured by the method for manufacturing the magnetic memory element shown in FIGS. It is. FIG. 10 is a diagram for explaining an example of a typical structure of the magnetic memory element manufactured by the method of manufacturing the magnetic memory element shown in FIGS.

  In FIG. 9, the two-terminal magnetic memory element corresponding to FIG. 2 described above is illustrated, but the magnetic memory element according to the present embodiment is not limited to the two-terminal magnetic memory element. Needless to say, it may be a three-terminal type or other shape magnetic memory element.

  As is clear from a comparison between FIG. 9 and FIG. 2 described above, in one example of the magnetic memory element 300 according to this embodiment, the first electrode (upper electrode) 21 is composed of the upper first electrode 21a and the lower first electrode. 21b is a two-layer structure.

  However, regarding the application of the method for manufacturing a magnetic memory element according to this embodiment, the first electrode 21 does not necessarily have a two-layer structure. Further, in the magnetic memory element 300 shown in FIG. 9, a portion 21c whose surface is oxidized remains on the side surface (periphery) of the upper first electrode 21a, but this oxidized portion 21c does not cause a problem.

Next, an example of a method for manufacturing the magnetic memory element according to this embodiment will be described in detail with reference to FIGS. First, as shown in FIG. 6A, for example, the second electrode 22, the magnetic layer 12, and the insulation are formed on a wafer in which an interlayer film 42 (eg, SiO ₂ , SiN, etc.) is formed on the silicon substrate 5. The layer 13, the magnetic layer 11, the lower first electrode 21b, and the upper first electrode 21a are sequentially formed. 5A, the magnetic layer 12, the insulating layer 13, and the magnetic layer 11 correspond to the fixed magnetic layer 12, the tunnel insulating layer 13, and the free magnetic layer 11 of the MTJ element 1.

  Here, the first electrode 21 has a two-layer structure of an upper first electrode 21a and a lower first electrode 21b. As will be described in detail later, the upper first electrode 21a is formed of a first metal material whose processing resistance is improved when the surface is chemically treated, and the lower first electrode 21b is a second material that can ensure conductivity even by the chemical treatment. It is made of a metal material. The lower first electrode 21b is preferably made of a material that is not easily oxidized or that sublimes when oxidized (no oxide remains).

  Specifically, when the chemical treatment of the surface of the upper first electrode 21a is an oxidation treatment, for example, tantalum (Ta) is applied as the first metal material, and ruthenium (Ru), platinum (Pt) or the second metal material. Iridium (Ir) can be applied. When the chemical treatment is a nitriding treatment, for example, aluminum (Al), tungsten (W), titanium (Ti) or tantalum (Ta) is applied as the first metal material, and ruthenium (Ru) as the second metal material. Platinum (Pt) or iridium (Ir) can be applied.

  The second electrode 22, the MTJ element 1, and the first electrode 21 (21b, 21a) are formed on the silicon substrate 5 provided with the interlayer film 42 in the order of ix → viii →... → ii → i in FIG. Will form. Further, the second electrode 22 in FIG. 10 includes, in order from the top, tantalum (Ta) functioning as a stop layer when the MTJ element 1 is formed by etching, ruthenium (Ru) for lowering the resistance of the second electrode, and an interlayer. A laminated structure of tantalum (Ta) that improves adhesion to the film 42 is employed. Here, the structure, material, film thickness, and the like shown in FIG. 10 are merely examples, and it goes without saying that various changes and modifications can be made.

Next, as shown in FIG. 6B, a resist mask 62 is formed on the upper first electrode 21a (first electrode 21), that is, a resist is applied on the upper first electrode 21a and exposed. A mask 62 of resist having a predetermined shape is formed. Here, the patterning of the upper first electrode 21a is performed, for example, by dry etching using the resist mask 62 as a mask and sulfur hexafluoride (SF ₆ ) as an etching gas. Further, the thickness of the resist mask (resist) 62 is sufficiently thinner than the resist mask 61 in FIG. 5B described above because it is only necessary to etch (inductively coupled plasma (ICP) etching) the upper first electrode 21a. can do.

  Further, as shown in FIG. 6C, the upper first electrode 21a is patterned into a predetermined shape by, for example, reactive ion etching (RIE) using the resist mask 62, and thereafter, FIG. As shown in d), the surface of the upper first electrode 21a is chemically treated. That is, as described above, the surface of the upper first electrode 21a is oxidized or nitrided to improve the processing resistance.

  Specifically, for example, the surface of the upper first electrode 21a made of tantalum (Ta) is oxidized to form a tantalum oxide film on the surface 21c of the upper first electrode 21a, thereby forming the MTJ element 1. To improve the resistance in the etching process. Here, the oxidation treatment of the upper first electrode 21a is controlled such that only the surface 21c is oxidized because conductivity (electric conductivity) is lost if all of the oxidation is performed.

  When the first electrode 21 is not a two-layer structure of the upper first electrode 21a and the lower first electrode 21b but is left as a single layer, the first electrode 21 is used, for example, by RIE using the resist mask 62. 21 is patterned into a predetermined shape. Thereafter, as shown in FIG. 6D, the surface of the first electrode 21 can be chemically treated (oxidation treatment or nitridation treatment) to improve the processing resistance. However, when the first electrode 21 is formed as a single layer of tantalum (Ta), for example, it is required to oxidize only the surface of the first electrode 21 and to control it so as to ensure sufficient conductivity. Therefore, as described above, it is easier to implement the first electrode 21 having two layers.

  In the present embodiment, the process shown in FIG. 6D is performed by irradiating oxygen plasma in the etching apparatus performing the process shown in FIG. 6C for processing the upper first electrode 21a. The surface 21c of the electrode 21a was oxidized. Specifically, as oxygen plasma conditions, for example, source power / bias power = 300 W / 100 W, and oxygen was irradiated at 2 Pascals (Pa) for 5 minutes. However, this oxidation method and conditions are merely examples, and it goes without saying that various modifications and changes are possible.

Further, the nitriding treatment of the surface 21c of the upper first electrode 21a can be realized by, for example, plasma irradiation with nitrogen gas (N ₂ ), ammonia gas (NH ₃ ), or a mixed gas thereof. Furthermore, for example, oxygen gas and nitrogen gas can be mixed to perform oxidation treatment and nitridation treatment at the same time. In this case, the surface 21c of the upper first electrode 21a is made of a mixed film of an oxide film and a nitride film. It is formed. 6D in the present embodiment, if the surface of the upper first electrode 21a (first electrode 21) is processed to improve the processing resistance, oxidation treatment and nitriding treatment, and It is not limited to the mixing process of both.

Then, as shown in FIG. 6E, the MTJ element 1 is processed using the upper first electrode 21a whose surface 21c is oxidized to improve the processing resistance as a hard mask. In the process shown in FIG. 6E, for example, the lower first electrode 21b and the MTJ element 1 are dry-etched using methanol (CH ₃ OH) as an etching gas.

  By the way, the size of the MTJ element 1 is, for example, about 20 nm to 50 nm, but the size of the MTJ element 1 is small in order to increase the density of the magnetic memory element 300 (to increase the capacity of the magnetoresistive memory (MRAM)). Is preferred. For example, the size of the MTJ element 1 is preferably small in order to reduce the magnetization reversal current (= power consumption) for reversing the magnetization of the free magnetic layer 11.

  In the present embodiment, the thickness of the resist mask 62 can be made sufficiently thinner than, for example, the resist mask 61 in FIG. 5B, so that a margin with respect to the size (width direction) of the resist mask can be reduced. . Further, the upper first electrode 21a having the oxidized surface 21c has a high processing resistance against the etching process for forming the MTJ element 1, so that the MTJ element 1 (magnetic memory element 300) has high accuracy. Can be manufactured. As a result, the size of the MTJ element 1 can be reduced to increase the density of the magnetic memory element and to increase the capacity and power consumption of the MRAM.

Further, as shown in FIG. 7A, a cover film 41 (cover insulating layer: for example, SiN, SiO _2, etc.) of the MTJ element 1 is formed. Here, the film thickness of the cover film 41 can be, for example, about 5 nm to 30 nm.

Thereafter, as shown in FIG. 7 (b), a resist 63 is formed, exposure for processing the second electrode 22 of the MTJ element 1 is performed, and as shown in FIG. 7 (c), a cover is formed. The film 41 and the second electrode 22 are etched. Here, as described with reference to FIG. 10, the second electrode 22 has a laminated structure of tantalum (Ta) / ruthenium (Ru) / tantalum (Ta). For example, chlorine and argon (Cl It is possible to perform batch processing by dry etching using ₂ + Ar) as an etching gas. However, for example, Ta and Ru can be divided and processed under the respective conditions.

Then, as shown in FIG. 8A, in order to embed the MTJ element 1, an interlayer film (for example, SiO ₂ ) 42 is formed. The formation of the interlayer film 42 can be performed, for example, by applying a general chemical vapor deposition (CVD) method. Here, when the interlayer film 42 on the substrate 5 described with reference to FIG. 6A is formed of SiO ₂ , it is integrated with the interlayer film 42 formed on the cover film 41.

  Next, as shown in FIG. 8B, the interlayer film 42, the cover film 41, and the surface 21c of the upper first electrode 21a are applied by, for example, a chemical mechanical polishing (CMP) method. It planarizes and the upper 1st electrode 21a is exposed directly. Further, as shown in FIG. 8C, a contact hole 80 for wiring with the second electrode 22 is formed.

  Then, as shown in FIG. 9, the first wiring 31 is formed on the upper first electrode 21 a (first electrode 21), and the second wiring 32 is formed on the second electrode 22 through the contact hole 80. To do. Here, the second electrode 22 and the second wiring 32 are electrically connected to the contact hole 80 using, for example, aluminum Al (copper (Cu) depending on a device). Further, when the wirings 31 and 32 are formed, usually, sputter etching for cleaning the surface of the interlayer film 42 is performed, and thus, for example, oxidized tantalum (Ta) on the upper surface of the upper first electrode 21a is removed. The electrical connection with the 1st wiring 31 is ensured by removing.

  Thus, the magnetic memory element 300 of this embodiment shown in FIG. 9 can be formed. The manufacturing method (processing step) of the magnetic memory element described with reference to FIGS. 6 to 8 is merely an example. For example, the surface of the upper first electrode 21a (first electrode 21) is subjected to oxidation treatment or the like. Various treatment steps can be applied including a chemical treatment step for performing nitriding treatment or the like.

  Although the embodiment has been described above, all examples and conditions described herein are described for the purpose of helping understanding of the concept of the invention applied to the invention and the technology. It is not intended to limit the scope of the invention. Nor does such a description of the specification indicate an advantage or disadvantage of the invention. Although embodiments of the invention have been described in detail, it should be understood that various changes, substitutions and modifications can be made without departing from the spirit and scope of the invention.

Regarding the embodiment including the above examples, the following supplementary notes are further disclosed.
(Appendix 1)
A magnetic tunnel junction element having a structure in which an insulating layer is sandwiched between a free magnetic layer and a pinned magnetic layer, and the resistance state changes depending on the magnetization direction of the free magnetic layer;
A method of manufacturing a magnetic memory element including a first electrode and a second electrode sandwiching the magnetic tunnel junction element,
A first treatment for chemically treating the surface of the first electrode after patterning the first electrode;
A second process for processing the magnetic tunnel junction element using the first electrode as a mask,
A method of manufacturing a magnetic memory element.

(Appendix 2)
The first electrode includes an upper first electrode and a lower first electrode,
In the first treatment, after patterning the upper first electrode,
Chemically treating the surface of the upper first electrode;
The second process is a process of processing the lower first electrode and the magnetic tunnel junction element using the upper first electrode as a mask.
The method for manufacturing a magnetic memory element according to appendix 1, wherein:

(Appendix 3)
The upper first electrode is a first metal material whose work resistance is improved by chemical treatment,
The lower first electrode is a second metal material that can ensure conductivity even by the chemical treatment.
The method for manufacturing a magnetic memory element according to appendix 2, wherein:

(Appendix 4)
The chemical treatment is an oxidation treatment,
The first metal material includes tantalum,
The second metal material includes ruthenium, platinum or iridium.
The method for manufacturing a magnetic memory element according to appendix 3, wherein:

(Appendix 5)
The chemical treatment is a nitriding treatment,
The first metal material includes aluminum, tungsten, titanium, or tantalum,
The second metal material includes ruthenium, platinum or iridium.
The method for manufacturing a magnetic memory element according to appendix 3, wherein:

(Appendix 6)
Patterning the upper first electrode is performed by dry etching using an exposed resist as a mask and sulfur hexafluoride as an etching gas.
6. The method for manufacturing a magnetic memory element according to any one of appendix 2 to appendix 5, wherein:

(Appendix 7)
Processing the lower first electrode and the magnetic tunnel junction element using the upper first electrode as a mask is performed by dry etching using methanol as an etching gas.
The method of manufacturing a magnetic memory element according to any one of appendix 2 to appendix 6, wherein:

(Appendix 8)
The dry etching is inductively coupled plasma etching.
The method for manufacturing a magnetic memory element according to appendix 6 or appendix 7, wherein:

(Appendix 9)
A magnetic tunnel junction element having a structure in which an insulating layer is sandwiched between a free magnetic layer and a pinned magnetic layer, and the resistance state changes depending on the magnetization direction of the free magnetic layer;
A magnetic memory element including a first electrode and a second electrode sandwiching the magnetic tunnel junction element,
The first electrode is
An upper first electrode of a first metal material whose processing resistance is improved by chemically treating the surface;
A lower first electrode of a second metal material that is provided between the upper first electrode and the magnetic tunnel junction element and can ensure conductivity even by the chemical treatment,
A magnetic memory element.

(Appendix 10)
The chemical treatment is an oxidation treatment,
The first metal material includes tantalum,
The second metal material includes ruthenium, platinum or iridium.
The magnetic memory element according to appendix 9, wherein:

(Appendix 11)
The chemical treatment is a nitriding treatment,
The first metal material includes aluminum, tungsten, titanium, or tantalum,
The second metal material includes ruthenium, platinum or iridium.
The magnetic memory element according to appendix 9, wherein:

1 Magnetic tunnel junction element (MTJ element)
5 Substrate 9 Transistor 11 Free magnetic layer 12 Fixed magnetic layer 13 Insulating layer (tunnel insulating layer)
21 First electrode (upper electrode)
21a Upper first electrode 21b Lower first electrode 21c Surface of upper first electrode 22 Second electrode (lower electrode)
31 1st wiring (bit line: BL)
32 Second wiring 33 Third wiring 41 Cover film (cover insulating layer)
42 Interlayer film 100, 300 Magnetic memory element 61, 62, 63 Resist mask (resist)
80 contact hole

Claims (8)

A magnetic tunnel junction element having a structure in which an insulating layer is sandwiched between a free magnetic layer and a pinned magnetic layer, and the resistance state changes depending on the magnetization direction of the free magnetic layer;
A method of manufacturing a magnetic memory element including a first electrode and a second electrode sandwiching the magnetic tunnel junction element,
A first treatment for chemically treating the surface of the first electrode after patterning the first electrode;
A second process for processing the magnetic tunnel junction element using the first electrode as a mask,
A method of manufacturing a magnetic memory element. The first electrode includes an upper first electrode and a lower first electrode,
In the first treatment, after patterning the upper first electrode,
Chemically treating the surface of the upper first electrode;
The second process is a process of processing the lower first electrode and the magnetic tunnel junction element using the upper first electrode as a mask.
The method of manufacturing a magnetic memory element according to claim 1. The upper first electrode is a first metal material whose work resistance is improved by chemical treatment,
The lower first electrode is a second metal material that can ensure conductivity even by the chemical treatment.
The method of manufacturing a magnetic memory element according to claim 2. The chemical treatment is an oxidation treatment,
The first metal material includes tantalum,
The second metal material includes ruthenium, platinum or iridium.
The method of manufacturing a magnetic memory element according to claim 3. The chemical treatment is a nitriding treatment,
The first metal material includes aluminum, tungsten, titanium, or tantalum,
The second metal material includes ruthenium, platinum or iridium.
The method of manufacturing a magnetic memory element according to claim 3. A magnetic tunnel junction element having a structure in which an insulating layer is sandwiched between a free magnetic layer and a pinned magnetic layer, and the resistance state changes depending on the magnetization direction of the free magnetic layer;
A magnetic memory element including a first electrode and a second electrode sandwiching the magnetic tunnel junction element,
The first electrode is
An upper first electrode of a first metal material whose processing resistance is improved by chemically treating the surface;
A lower first electrode of a second metal material that is provided between the upper first electrode and the magnetic tunnel junction element and can ensure conductivity even by the chemical treatment,
A magnetic memory element. The chemical treatment is an oxidation treatment,
The first metal material includes tantalum,
The second metal material includes ruthenium, platinum or iridium.
The magnetic memory element according to claim 6. The chemical treatment is a nitriding treatment,
The first metal material includes aluminum, tungsten, titanium, or tantalum,
The second metal material includes ruthenium, platinum or iridium.
The magnetic memory element according to claim 6.

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