JP2012244051A - Magnetoresistive element and magnetic storage device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a highly reliable magnetoresistive element which enhances the memory retention characteristics while ensuring high thermal fluctuation resistance and reducing the switching current, and allows for further high-speed operation and high integration, and to provide a magnetic storage device.SOLUTION: An MTJ 10 is configured to have an antiferromagnetic layer 51 and a synthetic ferrimagnet pinned layer 50, a tunnel barrier layer 2, and a multilayer magnetization free layer 11 having a first magnetic layer 3 and a second magnetic layer 5 sandwiching a nonmagnetic layer 4. The MTJ 10 has a pair of grooves 10a, 10b formed in the circumference thereof in a direction perpendicular to the direction of the axis of easy magnetization in the plane of the MTJ 10.

Description

  The present invention relates to a magnetoresistive element and a magnetic storage device.

  One of the nonvolatile memory elements whose memory is not lost even when the power is turned off is a magnetic random access memory (MRAM). The MRAM can perform a high-speed read / write operation comparable to that of an SRAM, and has advantages such as that power consumption is about 1/10 that of a flash memory and that high integration is possible. That is, the MRAM has almost important attributes as a memory element. Therefore, application as a so-called universal memory having all the functions of SRAM (high-speed operation), DRAM (high integration), and flash memory (non-volatile) is expected.

JP 2008-198875 A

J. Hayakawa, S. Ikeda, Y. M. Lee, R. Sasaki, T. Meguro, F. Matsukura, H. Takahashi, and H. Ohno, Jpn. J. Appl. Phys., Part 2 45, L1057 (2006). S. Yakata, H. Kubota, T. Sugano, T. Seki, K. Yakushiji, A. Fukushima, S. Yuasa, and K. Ando, Appl. Phys. Lett., 95, 242504 (2009). K. J. Lee and B. Dieny, Appl. Phys. Lett., 88, 132506 (2006).

  A spin injection tunneling magnetoresistive element (Magnetic Tunnel Junction: MTJ) is formed by sequentially laminating a magnetization fixed layer, a tunnel barrier layer, and a magnetization free layer. The MTJ stores information by utilizing the fact that the resistance differs depending on the magnetization direction of the magnetization fixed layer and the magnetization free layer, and rewrites it by flowing a bidirectional current.

In order to realize further high-speed operation and high integration of the MRAM, it is indispensable to simultaneously reduce the write current (switching current: J _C ) and maintain the memory retention characteristic of the write information. Since the switching current is proportional to the element volume, it can be reduced by reducing the element size. However, if the element size is reduced, the thermal stability of the MRAM is impaired and the stored information cannot be held, and the memory holding characteristics deteriorate. In other words, in MRAM, there is a trade-off between reducing switching current and improving memory retention characteristics.

  The present invention has been made in view of the above problems, and provides a highly reliable magnetoresistive element and magnetic storage device that can achieve higher speed operation and higher integration while ensuring high thermal fluctuation resistance. The purpose is to provide.

  One aspect of the magnetoresistive element includes a magnetization fixed layer, a tunnel barrier layer, and a laminated magnetization free layer having a first magnetic layer and a second magnetic layer sandwiching a nonmagnetic layer therebetween, The laminated magnetization free layer has grooves formed in the direction perpendicular to the direction of the in-plane magnetization easy axis of the laminated magnetization free layer.

  One aspect of the magnetic memory device is a magnetic memory device in which a plurality of memory cells each including a magnetoresistive element and a drive transistor are arranged, and the magnetoresistive element includes a magnetization fixed layer, a tunnel barrier layer, and a non-magnetic layer. A laminated magnetization free layer having a first magnetic layer and a second magnetic layer sandwiched between the layers, and the laminated magnetization free layer has an in-plane magnetization easy of the laminated magnetization free layer at the periphery thereof Grooves are formed in portions that are non-perpendicular to the axial direction.

  According to the above aspects, it is possible to achieve a highly reliable magnetoresistive element and magnetic memory device that enable higher speed operation and higher integration while ensuring high thermal fluctuation resistance.

It is a schematic diagram which shows schematic structure of MTJ by 1st Embodiment. It is a schematic diagram which shows the other various forms of MTJ by 1st Embodiment. It is a schematic diagram which shows the other form of MTJ by 1st Embodiment. It is a figure which shows the experimental result by micromagnetics simulation. It is a figure which shows the experimental result by micromagnetics simulation. It is a top view which shows the simulation result which the magnetic vortex generate | occur | produced in 1 ns in MTJ. It is a figure which shows the experimental result by micromagnetics simulation. It is a figure which shows the experimental result by micromagnetics simulation. It is a figure which shows the experimental result by micromagnetics simulation. It is a figure which shows the experimental result by micromagnetics simulation. It is a top view which shows schematic structure of MRAM by 2nd Embodiment. It is a schematic sectional drawing which shows the manufacturing method of MRAM by 2nd Embodiment to process order. It is a schematic sectional drawing which shows the manufacturing method of the magnetic memory element of MRAM by 2nd Embodiment to process order. It is a schematic plan view which shows the formed hard mask. FIG. 14 is a schematic cross-sectional view showing the method of manufacturing the magnetic memory element of the MRAM according to the second embodiment in order of processes following FIG. 13.

  Hereinafter, specific embodiments of the magnetoresistive element and the magnetic memory device will be described in detail with reference to the drawings.

(First embodiment)
In the present embodiment, the structure of the MTJ is disclosed.
FIG. 1 is a schematic diagram showing a schematic configuration of an MTJ according to the first embodiment, in which (a) is a cross-sectional view and (b) is a plan view.

As shown in FIG. 1A, the MTJ 10 according to the present embodiment includes an antiferromagnetic layer 51, a laminated ferry pinned layer 50, a tunnel barrier layer 2, and a laminated magnetization free layer 11 in order from the bottom. The laminated ferry pinned layer 50 includes a CoFe layer 52, a Ru layer 53, and a CoFeB layer 54 that are sequentially laminated from the lower side. The antiferromagnetic layer 51 is made of PtMn and can have a thickness of, for example, 10 nm to 20 nm. The tunnel barrier layer 2 is made of MgO and can have a thickness of, for example, 0.8 nm to 1.2 nm (1.0 nm in this embodiment).
A laminated magnetization free layer 11 is formed on the tunnel barrier layer 2.

The laminated magnetization free layer 11 has an in-plane easy magnetization axis, for example, a first magnetic layer 3 made of CoFeB or the like and a second magnetic layer 5 made of non-magnetic layer 4 made of Ru or the like. It is configured with. The second magnetic layer 5 is formed thicker than the first magnetic layer 3. The first magnetic layer 3 is formed to a thickness in the range of about 1.5 nm to 2 nm, for example, and the second magnetic layer 5 is formed to a thickness in the range of about 3 nm to 5 nm, for example. By making the second magnetic layer 5 thicker than the first magnetic layer 3, the thermal fluctuation resistance is improved. On the other hand, when the first magnetic layer 3 is thickened, the switching current (J _C ) increases. By defining the first and second magnetic layers 3 and 5 to have a thickness within the above range so that the latter is thicker than the former, the switching current can be kept small and thermal fluctuation resistance can be secured. it can.

  In the present embodiment, as shown in FIG. 1B, the MTJ 10 is formed in a horizontally long shape, in this case, an elliptical shape in plan view. Grooves 10a and 10b cut out from the second magnetic layer 5 to the antiferromagnetic layer 51 are formed at substantially central portions of the two sides along the longitudinal direction (long axis direction) of the periphery so as to face each other. ing. The grooves 10a and 10b have a longitudinal direction in a direction perpendicular to the direction of the in-plane magnetization easy axis of the laminated magnetization free layer 11, for example, a maximum width of about 10 nm and a maximum depth of about 10 nm. The free layer 11, the tunnel barrier layer 2, the laminated ferry pinned layer 50, and the antiferromagnetic layer 51 are formed as long groove cutouts having substantially the same shape.

Other embodiments of the MTJ 10 are shown in FIGS.
In the MTJ 10 of FIG. 2A, a groove 10a cut out from the second magnetic layer 5 to the antiferromagnetic layer 51 is formed only on one side along the longitudinal direction of the peripheral edge, here the substantially central portion of the upper side. Has been. The maximum width and maximum depth of the groove 10a are the same as those of the groove 10a of FIG. 2A, and the stacked magnetization is in a direction in which the longitudinal direction is perpendicular to the direction of the in-plane magnetization easy axis of the stacked magnetization free layer 11. The free layer 11, the tunnel barrier layer 2, the laminated ferry pinned layer 50, and the antiferromagnetic layer 51 are formed as long groove cutouts having substantially the same shape.

  The MTJ 10 in FIG. 2B has grooves 10c and 10d cut out from the second magnetic layer 5 to the antiferromagnetic layer 51 at portions that are deviated from each other on two sides along the longitudinal direction of the periphery. Yes. The groove 10c is located on the left side, and the groove 10d is located on the right side, respectively, at a position deviated from the central portion of each long side. The maximum width and maximum depth of the grooves 10c and 10d are the same as the grooves 10a and 10b in FIG. 2A, and the longitudinal direction thereof is perpendicular to the direction of the in-plane magnetization easy axis of the stacked magnetization free layer 11. In the direction, the laminated magnetization free layer 11, the tunnel barrier layer 2, the laminated ferry pinned layer 50, and the antiferromagnetic layer 51 are formed as long-groove cutouts having substantially the same shape.

  In the MTJ 10 of FIG. 2C, grooves 10c and 10d cut out from the second magnetic layer 5 to the antiferromagnetic layer 51 are formed at portions that are deviated from each other along two sides along the longitudinal direction of the periphery. Yes. The groove 10c is located on the right side, and the groove 10d is located on the left side, respectively, at a portion deviated from the central portion of each long side. The maximum width and maximum depth of the grooves 10e and 10f are the same as those of the grooves 10a and 10b in FIG. 2A, and the longitudinal direction thereof is perpendicular to the direction of the in-plane magnetization easy axis of the stacked magnetization free layer 11. In the direction, the laminated magnetization free layer 11, the tunnel barrier layer 2, the laminated ferry pinned layer 50, and the antiferromagnetic layer 51 are formed as long-groove cutouts having substantially the same shape.

  The MTJ 10 of FIG. 3 is formed with grooves 10A and 10B in which only the laminated magnetization free layer 11 is cut out so as to be opposed to each other at substantially central portions of two long sides. The grooves 10A and 10B have the same maximum width and maximum depth as the grooves 10a and 10b in FIG. 2A, and the direction in which the longitudinal direction is perpendicular to the direction of the in-plane magnetization easy axis of the stacked magnetization free layer 11 In addition, the second magnetic layer 5, the nonmagnetic layer 4, and the first magnetic layer 3 constituting the laminated magnetization free layer 11 are formed as long groove-shaped notches having substantially the same shape.

In the MTJ 10, the magnetization free layer is not a single layer, but has a laminated structure including the first magnetic layer 3 and the second magnetic layer 5 with the nonmagnetic layer 4 sandwiched therebetween as described above. The free layer 11 is used.
In a single-layer magnetization free layer, the switching current can be reduced when the film thickness is reduced, but the memory retention characteristic is deteriorated, and the switching current is increased when the film thickness is increased.
By using a magnetization free layer having a laminated structure, the memory retention characteristic can be improved without increasing the switching current as much as that of a single magnetization free layer.

In the laminated magnetization free layer, by changing the thickness of the nonmagnetic layer, the exchange coupling force (J _EX ) acting between the first and second ferromagnetic layers changes, and antiferromagnetic coupling (J _EX <0), And ferromagnetic coupling (J _EX > 0) is known (see Non-Patent Documents 1 and 2). By using the laminated magnetization free layer, the resistance to thermal fluctuation is improved. On the other hand, in order to operate the magnetic memory element at high speed (to increase the time for rewriting information), it is necessary to further reduce the switching current. In the present embodiment, in order to realize this, a groove is formed in the MTJ as described above.

Using the micromagnetics simulation, the MTJ spin injection magnetization reversal was calculated and the following points were clarified.
In the MTJ laminated magnetization free layer, the lower first ferromagnetic layer is an M1 layer, and the upper second ferromagnetic layer is an M2 layer. In the model used for the calculation, the materials of the M1 layer and the M2 layer are both CoFeB, and the material of the nonmagnetic layer is Ru. Considering that the switching current is kept small and thermal fluctuation resistance is secured, the case where the thickness of M1 is constant (for example, 1.4 nm) and the thickness of the M2 layer is large (about 3 nm to 5 nm) was examined.

FIG. 4 shows the magnetization reversal process in the case where the MTJ having no groove of this embodiment is an antiparallel coupled laminated magnetization free layer (J _EX = −0.15 mJ / m ² ) and the M2 layer has a thickness of 4 nm. Show. A case where magnetization reversal was observed after applying a 2.4 ns width current pulse (J = 38 MA / cm ² ) and a case where magnetization reversal was not observed (J = 37 MA / cm ² ) (a) Shown in Moreover, the magnetization distribution of the laminated magnetization free layer at each time is shown in (b).

When magnetization reversal was observed (J = 38 MA / cm ² ), it was confirmed that a magnetization vortex was generated in the M2 layer. In this case, the magnetic vortex is generated at a time of 0.75 ns and exists stably until the end of the current pulse. When the current is turned off, the magnetic vortex disappears, and accordingly, the magnetization of the M1 layer takes a stable antiparallel state.
On the other hand, when no magnetization reversal is observed (J = 37 MA / cm ² ), no magnetization vortex is generated in the M2 layer. Even in this case, it was confirmed that magnetization reversal occurred when the pulse width was increased to 4.8 ns. At this time, magnetic vortices are generated in the M2 layer around time 4.5 ns.

  Magnetic vortices are observed when the M2 layer is thicker than 2.8 nm, and it has been found that magnetic vortices are always generated in the MJ layer of the MTJ where magnetization reversal was observed. That is, it is considered that magnetization reversal is caused by a magnetic vortex as a trigger. The occurrence of magnetic vortices seems to be a stochastic event.

Magnetic vortices are generated both in the case of low resistance (spin: anti-parallel to parallel) and in the case of high resistance (spin: parallel to anti-parallel), and in parallel coupled films (J _EX In the case of> 0), the same observation was made. In addition, when the thickness of the M2 layer was relatively thin (in the case of about 2.8 nm or less), generation of magnetic vortex was not observed. When the magnetic vortex is formed, the magnetization of the M2 layer is fixed, but the M1 layer continues to be affected by the spin torque, which is considered to cause magnetization reversal.
The generation of magnetic vortices has been reported even in the case of a single magnetization free layer. It is considered that the magnetic vortex generated in the single magnetization free layer delays the magnetization reversal and functions differently from the magnetic vortex in the laminated magnetization free layer.

  Based on the above simulation results, in the present embodiment, as in MTJ 10 shown in FIG. 1, the second magnetic layer 5 has an anti-strength so as to face each other at the substantially central portion of the two long sides. Grooves 10a and 10b cut out to the magnetic layer 51 are formed. As a result, magnetic vortices are easily generated, and even with a relatively small switching current, magnetization reversal can be reliably caused in a short time with a high-speed pulse.

Using an MTJ having a groove according to the present embodiment, the presence or absence of magnetic vortex generation in the case of J = 37 MA / cm ² in which magnetization reversal was not observed in the above simulation was examined by micromagnetic simulation. As a comparative example, an MTJ having no groove was also examined in the same manner.

The simulation result is shown in FIG. Consider a case in which a current of J = 37 MA / cm ² is passed through an MTJ (J _EX = −0.15 mJ / m ² ) antiparallel coupled with a thickness of M2 of 4 nm. In the MTJ having a groove, generation of a magnetic vortex was confirmed in 1 ns. It can be seen that the MTJ without grooves has a magnetic vortex generation time of 4.5 ns, whereas the MTJ with grooves has a significantly reduced magnetic vortex generation time. Accordingly, in the MTJ having a groove, magnetization reversal was observed even when the width of the write current pulse, which was 4.8 ns in the MTJ having no groove, was reduced to 2.0 ns.

  FIG. 6 shows how magnetic vortices are generated in 1 ns in the MTJ 10 having the grooves 10a and 10b according to the present embodiment. In the MTJ 10 according to the present embodiment, a pair of grooves 10a and 10b are formed so as to be opposed to each other at an approximately central part of two sides which are elliptical with a length of 80 nm and a width of 160 nm and which are long sides. In FIG. 6, the direction of the in-plane easy magnetization axis is shown between the magnetization my in the major axis direction of the MTJ 10 from +1 (rightward) to −1 (leftward). In the vicinity of the grooves 10a and 10b in the MTJ 10, the magnetic vortex is formed so that the formation direction of the grooves 10a and 10b (the direction along the short direction of the MTJ 10) is non-perpendicular to the direction of the in-plane magnetization easy axis. Is formed.

The effective formation position of the groove in the MTJ was examined by micromagnetic simulation. The simulation result is shown in FIG. Along with the MTJ 10 according to the present embodiment (FIG. 7C), a pair of MTJ 101 having no groove (FIG. 7B), not the long side but the short side (the part along the short side at the periphery) The MTJ 101 (FIG. 7D) having the grooves 101a and 101b was examined.
Similar to FIG. 5, consider a case where a current of J = 37 MA / cm ² is passed through an MTJ (J _EX = −0.15 mJ / m ² ) having an M2 thickness of 4 nm and antiparallel coupling. As shown in FIG. 7D, the generation of magnetic vortex was not confirmed in the MTJ 101 having the pair of grooves 101a and 101b on the two short sides. Therefore, it was confirmed that the long side of the elliptical MTJ is an effective groove forming position.

  As described above, in the MTJ according to the present embodiment, magnetic vortices are easily generated while ensuring high thermal fluctuation resistance, and magnetization reversal can be surely caused in a short time with a high-speed pulse even with a relatively small switching current. Can do.

With respect to other forms of the MTJ according to the present embodiment shown in FIGS. 2 and 3, the presence or absence of the generation of magnetic vortices was examined by micromagnetic simulation.
A simulation result for the MTJ 10 of FIG. 2A is shown in FIG. Consider a case in which a current of J = 37 MA / cm ² is passed through an MTJ (J _EX = −0.15 mJ / m ² ) antiparallel coupled with a thickness of M2 of 4 nm. In the MTJ having one groove (FIG. 8C), generation of a magnetic vortex was confirmed at 3.25 ns. In the MTJ having no groove (FIG. 8B), the generation time of the magnetic vortex was 4.5 ns, whereas in the MTJ having one groove, the generation time of the magnetic vortex was shortened. Accordingly, in the MTJ having one groove, magnetization reversal was observed even when the width of the write current pulse, which was 4.8 ns in the MTJ having no groove, was reduced to 4 ns.

A simulation result for the MTJ 10 shown in FIGS. 2B and 2C is shown in FIG. Consider a case in which a current of J = 37 MA / cm ² is passed through an MTJ (J _EX = −0.15 mJ / m ² ) antiparallel coupled with a thickness of M2 of 4 nm. In the MTJ having a pair of grooves biased to the left on the upper side and to the right on the lower side (FIG. 9B), generation of a magnetic vortex was confirmed at 1.5 ns. In the MTJ (FIG. 9C) having a pair of grooves biased to the right on the upper side and to the left on the lower side, generation of a magnetic vortex was confirmed at 2.0 ns. It can be seen that the generation time of magnetic vortex was 4.5 ns in the MTJ having no groove, whereas the generation time of magnetic vortex was significantly reduced in the MTJ having a pair of grooves biased to the left and right. Accordingly, in the MTJ having a pair of grooves biased to the left and right, magnetization reversal was observed even when the width of the write current pulse that was 4.8 ns in the MTJ having no groove was reduced to 2.5 ns.

A simulation result for the MTJ 10 of FIG. 3 is shown in FIG. Consider a case in which a current of J = 37 MA / cm ² is passed through an MTJ (J _EX = −0.15 mJ / m ² ) antiparallel coupled with a thickness of M2 of 4 nm. In the MTJ having the pair of grooves shown in FIG. 1B (FIG. 10B), generation of a magnetic vortex was confirmed at 1.0 ns. In the MTJ having a pair of grooves only in the laminated magnetization free layer (FIG. 10C), generation of magnetic vortex was not confirmed. At this time, the magnetization of the laminated ferrimagnetic pinned layer 24 was about 0.4T. When an MTJ having a pair of grooves only in the laminated magnetization free layer and the magnetization of the laminated ferrimagnetic pinned layer is reduced to about 0.2 T to suppress the influence of the leakage magnetic field (FIG. 10D), FIG. The generation of magnetic vortices was confirmed at 0.75 ns shorter than b). Based on the result of FIG. 10C, in order to switch the MTJ at high speed, it is necessary to adjust not only the groove but also the magnitude of the leakage magnetic field.

  In the MTJ having no groove, the generation time of magnetic vortex was 4.5 ns, whereas in the MTJ having a pair of grooves only in the layer magnetization free layer and the magnetization of the magnetization fixed layer being reduced, generation of magnetic vortex It can be seen that the time is greatly reduced. Accordingly, in the MTJ, magnetization reversal was observed even when the width of the write current pulse, which was 4.8 ns in the MTJ having no groove, was reduced to 2.5 ns.

  As described above, in each MTJ shown in FIGS. 2 and 3, magnetic vortices are easily generated while ensuring high thermal fluctuation resistance, and even with a relatively small switching current, magnetization reversal can be performed in a short time with a high-speed pulse. Can surely occur.

(Second Embodiment)
In the present embodiment, an MRAM including the MTJ according to the first embodiment is disclosed. The structure of the MRAM will be described together with its manufacturing method. In addition, the same code | symbol is attached | subjected about the structural member etc. which are the same as 1st Embodiment.

  In the MRAM according to the present embodiment, as shown in FIG. 11, a plurality of memory cells MC are arranged in a matrix. In each memory cell MC arranged in the column direction, the gate electrode 24 is common, and each gate electrode 24 functions as a word line. Thus, instead of making the gate electrode 24 common to each column, a word line for electrically connecting the gate electrode 24 of each memory cell MC to each column may be provided separately. The bit lines 33 are common to the memory cells MC arranged in the row direction. The word line and the bit line 33 are insulated from each other and intersect with each other.

  12 to 15 are schematic views showing the method of manufacturing the MRAM according to the present embodiment in the order of steps. In this embodiment, a case where a memory cell including the MTJ 10 shown in FIGS. 1A and 1B in the first embodiment is formed is illustrated.

First, as shown in FIG. 12A, a MOS transistor functioning as a selection transistor is formed on the silicon substrate 20 in the memory cell region.
Specifically, the element isolation structure 21 is formed on the surface layer of the silicon substrate 20 by, for example, STI (Shallow Trench Isolation) method to determine the element active region.
Next, an impurity, here boron (B ⁺ ), is ion-implanted into the element active region under conditions of a dose amount of 3.0 × 10 ¹³ / cm ² and an acceleration energy of 300 keV to form the well 22.

  Next, a thin gate insulating film 23 is formed in the element active region by thermal oxidation or the like, a polycrystalline silicon film is deposited on the gate insulating film 23 by a CVD method, and the polycrystalline silicon film and the gate insulating film 23 are formed by lithography and the same. The gate electrode 24 is patterned on the gate insulating film 23 by processing into an electrode shape by subsequent dry etching.

Next, an impurity, here arsenic (As ⁺ ), which is an n-type impurity, is ion-implanted into the active region using the gate electrode 24 as a mask. As a result, impurity diffusion regions 25 functioning as source / drains are formed on both sides of the gate electrode 24 in the element active region.
As the impurity diffusion region 25, after forming a shallow LDD region (extension region), a source / drain may be formed so as to partially overlap this.
Thus, a MOS transistor that functions as a selection transistor in each memory cell is formed.

Subsequently, as shown in FIG. 12B, after forming an interlayer insulating film 26 covering the MOS transistor, contact plugs 27 and 28 electrically connected to the impurity diffusion region 25 of the MOS transistor are formed.
Specifically, for example, silicon oxide is deposited by CVD so as to cover the MOS transistor, and the surface of the silicon oxide is planarized by, for example, chemical mechanical polishing (CMP). Thereby, the interlayer insulating film 26 is formed.

The interlayer insulating film 26 is processed by lithography and subsequent dry etching until a part of the surface of the impurity diffusion region 25 is exposed. As a result, contact holes 26 a and 26 b are formed in the interlayer insulating film 26.
For example, a Ti film and a TiN film are sequentially deposited by sputtering so as to cover the inner wall surfaces of the contact holes 26a and 26b, thereby forming a base film (glue film) (not shown). Then, for example, a W film is deposited so as to fill the contact holes 26a and 26b through the glue film by the CVD method. Thereafter, the W film and the glue film are polished by CMP using the interlayer insulating film 26 as a stopper. Thus, the contact plugs 27 and 28 are formed at the same time so as to fill the contact holes 26a and 26b with W through the glue film.

Subsequently, as shown in FIG. 12C, the wiring 34, the magnetic memory element 30 including the MTJ 10 disclosed in the first embodiment, and the like are formed.
A method for manufacturing the magnetic memory element 30 will be described with reference to FIGS. Here, only the magnetic memory element 30 and its peripheral part are shown enlarged.

  A wiring material, for example, an Al alloy is deposited on the interlayer insulating film 26 by a sputtering method or the like, and the Al alloy is processed by lithography and dry etching. Thereby, the wiring 34 electrically connected to the contact plug 27 is formed.

As shown in FIG. 13A, an electrode layer 41, an MTJ layer 42, and a hard mask 43 are continuously formed on the interlayer insulating film 26 by, for example, sputtering.
The electrode layer 41 is formed to a thickness of about 5 nm / 25 nm / 15 nm using, for example, Ta / Ru / Ta as a conductive material.
As shown in FIG. 1A, the MTJ layer 42 has PtMn of 15 nm, CoFe of about 2.5 nm, MgO of about 1.0 nm, CoFeB of about 1.4 nm, Ru of about 0.65 nm, and CoFeB of Each is deposited to a thickness of about 4.0 nm. Thereby, the antiferromagnetic layer 51, the laminated ferry pinned layer 50, the tunnel barrier layer 2, the first magnetic layer 3, the nonmagnetic layer 4, and the second magnetic layer 5 are formed. As described above, the MTJ layer 42 including the antiferromagnetic layer 51 and the laminated ferry pinned layer 50 and having the laminated magnetization free layer 11 is formed on the laminated ferry pinned layer 50 via the tunnel barrier layer 2.
The hard mask 43 is made of, for example, Ta and has a thickness of about 50 nm.

As shown in FIG. 13B, a resist mask 44 is formed.
Specifically, a resist is applied on the hard mask 43, and the resist is processed by lithography. Thereby, a resist mask 44 is formed.

As shown in FIG. 13C, the hard mask 43 is processed.
Specifically, using the resist mask 44, the hard mask 43 is dry etched by reactive ion etching (RIE) using Cl gas, CF ₄ gas or the like as an etching gas. Thereby, the hard mask 43 is processed following the shape of the resist mask 44. As shown in FIG. 14, the hard mask 43 has a substantially elliptical shape in plan view, and a substantially central portion of two sides along the longitudinal direction (major axis direction) of the periphery thereof, as shown in FIG. 14 to process the MTJ layer 42 later. A pair of grooves 43a and 43b facing each other are formed.
The resist mask 44 is removed by ashing or the like.

As shown in FIG. 13D, the MTJ layer 42 is processed to form the MTJ 10.
Specifically, using the hard mask 43, the MTJ layer 42 is dry etched by RIE using CO gas + NH ₃ gas or the like as an etching gas. Thereby, the MTJ 10 is processed following the shape of the hard mask 43 to form the MTJ 10.
The hard mask 43 on the MTJ 10 becomes a part of the upper electrode of the MTJ 10.

As shown in FIG. 15A, a resist mask 45 is formed.
Specifically, a resist is applied on the electrode film 41 so as to cover the MTJ 10, and the resist is processed by lithography. Thereby, a resist mask 45 is formed.

As shown in FIG. 15B, the electrode film 41 is processed.
Specifically, the electrode film 41 is dry etched using the resist mask 45. Thereby, the electrode film 41 is processed in accordance with the shape of the resist mask 45, and the electrode 31 is formed. The lower surface of the electrode 31 is electrically connected to the contact plug 28.
The resist mask 45 is removed by ashing or the like.
Thus, the magnetic memory element 30 including the MTJ 10 is formed on the electrode 31.

As shown in FIG. 15C, an interlayer insulating film 29 is formed.
Specifically, for example, silicon oxide is deposited by CVD so as to cover the wiring 34 and the magnetic memory element 30 in FIG. 13C, and the surface of the silicon oxide is planarized by, for example, CMP. Thereby, an interlayer insulating film 29 is formed.

As shown in FIG. 15D, the via plug 32 is formed.
Specifically, the interlayer insulating film 29 is processed by lithography and subsequent dry etching until a part of the surface of the MTJ 10 is exposed. As a result, a via hole 29 a is formed in the interlayer insulating film 29.
For example, a Ti film and a TiN film are sequentially deposited by a sputtering method so as to cover the inner wall surface of the via hole 29a to form a base film (glue film) (not shown). Then, for example, a W film is deposited so as to fill the via hole 29a through the glue film by the CVD method. Thereafter, the W film and the glue film are polished by CMP using the interlayer insulating film 29 as a stopper. As a result, the via plug 32 that fills the via hole 29a with W via the glue film is formed.

  Then, as shown in FIG. 12C, a wiring material, for example, an Al alloy is deposited on the interlayer insulating film 29 by sputtering or the like, and the Al alloy is processed by lithography and dry etching. Thereby, the bit line 33 electrically connected to the via plug 32 is formed.

  In this embodiment, the case where the memory cell including the MTJ 10 shown in FIGS. 1A and 1B is formed in the first embodiment is illustrated, but FIGS. 2A to 2D are used. The same applies to the case of forming a memory cell including the MTJ 10 shown. That is, in FIG. 13C, a hard mask having grooves corresponding to the grooves of the MTJ 10 in FIGS. 2A to 2D may be formed.

In the case of forming a memory cell including the MTJ 10 shown in FIG. 3, for example, the following may be considered in the processes of FIGS.
A first hard mask for forming only the trenches 10A and 10B is formed, and this is used, using the tunnel barrier layer 2 as an etching stopper, the second magnetic layer 5 of the MTJ layer 42, the magnetic layer 4, and the first hard mask Only the magnetic layer 3 is dry-etched. Thus, the grooves 10A and 10B in FIG. 3 are formed only in the second magnetic layer 5, the magnetic layer 4, and the first magnetic layer 3. The first hard mask is removed. An elliptical second hard mask is formed, and the MTJ layer 42 is dry-etched from the second magnetic layer 5 to the antiferromagnetic layer 51 using the second hard mask. The second hard mask is removed. Thus, the MTJ 10 shown in FIG. 3 is formed.

  As described above, according to the present embodiment, the MTJ 10 according to the first embodiment is applied to the magnetic memory element 30 to configure the MRAM, thereby reducing the switching current while ensuring high thermal fluctuation resistance. However, the memory retention characteristics can be improved, and further higher speed operation and higher integration can be achieved.

  Hereinafter, various aspects of the magnetoresistive element and the magnetic memory device will be collectively described as additional notes.

(Supplementary note 1) having a magnetization fixed layer, a tunnel barrier layer, and a laminated magnetization free layer having a first magnetic layer and a second magnetic layer sandwiching a nonmagnetic layer therebetween,
The magnetoresistive element according to claim 1, wherein a groove is formed at a periphery of the laminated magnetization free layer in a direction perpendicular to a direction of an in-plane magnetization easy axis of the laminated magnetization free layer.

  (Supplementary note 2) The magnetoresistive element according to supplementary note 1, wherein the groove extends to the tunnel barrier layer and the magnetization fixed layer.

  (Appendix 3) The magnetoresistive element according to appendix 1 or 2, wherein the laminated magnetization free layer has a horizontally long shape, and the groove is formed in a portion along the longitudinal direction of the peripheral edge thereof.

  (Additional remark 4) The said groove | channel is each formed in the position mutually biased in the site | part along the longitudinal direction of the peripheral edge of the said lamination | stacking magnetization free layer as a pair of groove | channel, The magnetoresistance of Additional remark 3 characterized by the above-mentioned. element.

  (Appendix 5) The magnetoresistive element according to any one of appendices 1 to 4, wherein the second magnetic layer is thicker than the first magnetic layer.

(Appendix 6) A magnetic storage device in which a plurality of memory cells each including a magnetoresistive element and a drive transistor are arranged,
The magnetoresistive element includes a magnetization fixed layer, a tunnel barrier layer, and a laminated magnetization free layer having a first magnetic layer and a second magnetic layer sandwiching a nonmagnetic layer therebetween,
2. A magnetic storage device according to claim 1, wherein a groove is formed at a periphery of the laminated magnetization free layer in a direction perpendicular to a direction of an in-plane magnetization easy axis of the laminated magnetization free layer.

  (Supplementary note 7) The magnetic memory device according to supplementary note 6, wherein the groove is formed to extend to the tunnel barrier layer and the magnetization fixed layer.

  (Supplementary note 8) The magnetic memory device according to supplementary note 6 or 7, wherein the laminated magnetization free layer has a horizontally long shape, and the groove is formed in a portion along a longitudinal direction of a peripheral edge thereof.

  (Supplementary note 9) The magnetic memory according to supplementary note 8, wherein the grooves are formed as a pair of grooves at positions deviated from each other in a portion along the longitudinal direction of the peripheral edge of the multilayer magnetization free layer. apparatus.

  (Supplementary note 10) The magnetic storage device according to any one of supplementary notes 6 to 9, wherein the second magnetic layer is thicker than the first magnetic layer.

2 Tunnel barrier film 3 First ferromagnetic layer (M1)
4 Nonmagnetic layer 5 Second ferromagnetic layer (M2)
10 MTJ
10a, 10b, 10c, 10d, 10e, 10f, 10A, 10B, 43a, 43b Groove 11 Laminated magnetization free layer 20 Silicon substrate 21 Element isolation structure 22 Well 23 Gate insulating film 24 Gate electrode 25 Impurity diffusion region 26, 29 Interlayer insulation Film 26a, 26b Contact hole 27, 28 Contact plug 29a Via hole 32 Via plug 30 Magnetic memory element 31 Electrode 33 Bit line 34 Wire 41 Electrode layer 42 MTJ layer 43 Hard mask 44, 45 Resist mask 50 Multilayer ferry pinned layer 51 Antiferromagnetic Layer 52 CoFe layer 53 Ru layer 54 CoFeB layer MC memory cell

Claims (5)

A magnetization fixed layer, a tunnel barrier layer, and a laminated magnetization free layer having a first magnetic layer and a second magnetic layer sandwiching a nonmagnetic layer therebetween,
The magnetoresistive element according to claim 1, wherein a groove is formed at a periphery of the laminated magnetization free layer in a direction perpendicular to a direction of an in-plane magnetization easy axis of the laminated magnetization free layer.   The magnetoresistive element according to claim 1, wherein the groove is formed to extend to the tunnel barrier layer and the fixed magnetization layer.   3. The magnetoresistive element according to claim 1, wherein the laminated magnetization free layer has a horizontally long shape, and the groove is formed at a portion along a longitudinal direction of a peripheral edge thereof.   4. The magnetoresistive element according to claim 3, wherein the grooves are formed as a pair of grooves at positions deviated from each other in a portion along a longitudinal direction of a peripheral edge of the laminated magnetization free layer. A magnetic storage device in which a plurality of memory cells each including a magnetoresistive element and a drive transistor are arranged,
The magnetoresistive element includes a magnetization fixed layer, a tunnel barrier layer, and a laminated magnetization free layer having a first magnetic layer and a second magnetic layer sandwiching a nonmagnetic layer therebetween,
2. A magnetic storage device according to claim 1, wherein a groove is formed at a periphery of the laminated magnetization free layer in a direction perpendicular to a direction of an in-plane magnetization easy axis of the laminated magnetization free layer.

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