JP2017208449A - Semiconductor integrated circuit and electronic apparatus - Google Patents

Abstract

PROBLEM TO BE SOLVED: To achieve a semiconductor integrated circuit capable of accurately acquiring temperature information by arranging a temperature detection circuit at an optimum position in the semiconductor integrated circuit.SOLUTION: In the semiconductor integrated circuit in which a plurality of circuit portions including a temperature detection circuit is arranged, the temperature detection circuit is disposed at a position adjacent to an outer peripheral region where heat is easy to escape in the semiconductor integrated circuit, and at such a position that a lower temperature is detected inside the semiconductor integrated circuit.SELECTED DRAWING: Figure 2

Description

  The present invention relates to an arrangement of a temperature sensor in a semiconductor integrated circuit.

  In recent years, in order to realize multifunction and high performance of electronic devices, semiconductor integrated circuit chips (hereinafter referred to as LSI (Large Scale Integration) chips) mounted on electronic devices have been increased in speed and scale. Conventionally, functions provided by a plurality of LSI chips are integrated into one chip as a system LSI or SoC (System on Chip), thereby reducing cost and power consumption. In the LSI chip made into one chip in this way, low power consumption is an important issue. By the way, the LSI chip has a characteristic that the operation speed (delay) changes according to the temperature change. By using this characteristic, the operating voltage of the LSI chip can be lowered and the power consumption can be reduced. Patent Document 1 discloses a technique called temperature AVS (Adaptive Voltage Scaling) that controls the operating voltage of a functional circuit based on temperature information obtained by a temperature sensor. This temperature AVS is a technique for reducing power consumption by lowering the voltage corresponding to the speed margin obtained by the delay change of the internal circuit elements due to the temperature rise of the LSI chip.

Special table 2012-532383 gazette

  However, when the temperature AVS is performed, if there is an error in the temperature information obtained by the temperature sensor, the LSI chip may not operate normally. Since the operation state and heat dissipation of the circuit are not uniform inside the LSI chip, the temperature distribution is biased. For this reason, the temperature information obtained by the temperature sensor is not necessarily the lowest temperature inside the LSI chip, and a temperature higher than the actual temperature may be detected.

  Further, a method of implementing the temperature AVS by providing a margin for the temperature information obtained by the temperature sensor is also conceivable. However, for example, when performing fine control that lowers the voltage of 10 mV every 5 ° C., there is a possibility that the opportunity for control is lost by providing a margin and the effect is reduced. A method of increasing the accuracy by arranging a plurality of temperature sensors inside the LSI chip is also conceivable, but this is difficult to realize because it leads to an increase in area and cost of the LSI chip.

  The present invention has been made in view of the above problems, and an object thereof is to realize a semiconductor integrated circuit capable of obtaining temperature information with high accuracy by arranging a temperature detection circuit at an optimum position in the semiconductor integrated circuit. It is.

  In order to solve the above problems and achieve the object, a semiconductor integrated circuit according to the present invention is a semiconductor integrated circuit in which a plurality of circuit portions including a temperature detection circuit are arranged, and the temperature detection circuit is connected to the semiconductor integrated circuit. It is located at a position adjacent to the outer peripheral region where heat can easily escape and at a position where a lower temperature is detected inside the semiconductor integrated circuit.

  According to the present invention, temperature information with high accuracy can be acquired by optimally arranging the temperature detection circuit in the semiconductor integrated circuit, and the operating voltage can be controlled based on the accurate temperature information, so that low power consumption can be realized.

1 is a block diagram illustrating a main configuration of a semiconductor integrated circuit according to Embodiment 1; FIG. 3 is a diagram illustrating a layout of each circuit unit of the semiconductor integrated circuit according to the first embodiment. FIG. 4 is a block diagram illustrating a main configuration of a semiconductor integrated circuit according to Embodiment 2; 6 is a diagram illustrating a layout of each circuit unit of the semiconductor integrated circuit according to Embodiment 2. FIG. 4 is a diagram illustrating the relationship between the temperature and the operating voltage of the semiconductor integrated circuit of this embodiment. FIG.

  Hereinafter, embodiments for carrying out the present invention will be described in detail. The embodiment described below is an example for realizing the present invention, and should be appropriately modified or changed according to the configuration and various conditions of the apparatus to which the present invention is applied. It is not limited to the embodiment. Moreover, you may comprise combining suitably one part of each embodiment mentioned later.

[Embodiment 1]
First, with reference to FIG. 1, a configuration of a semiconductor integrated circuit for adapting and efficiently implementing the temperature AVS in the present embodiment will be described.

  FIG. 1 is a diagram illustrating a configuration of a main part of an imaging apparatus including a semiconductor integrated circuit 100 according to the present embodiment. In FIG. 1, a semiconductor integrated circuit 100 according to the present embodiment is configured as a system LSI chip in which a plurality of functions are integrated into one chip, and is mounted on a circuit board of an imaging apparatus. The semiconductor integrated circuit 100 includes a control unit 101, an input / output terminal 102, a camera signal processing unit 103, an encoding unit 104, a memory control unit 105, a memory interface 106, a display control unit 107, a decoding unit 108, an external communication unit 109, an external A circuit block (hereinafter, a circuit unit) for each function such as the communication interface 110 and the temperature sensor 111 is included.

  The control unit 101 includes a microprocessor such as an MPU or CPU, a nonvolatile memory such as a ROM, and a volatile memory such as a RAM. The microprocessor can be realized in the form of a one-chip microcomputer, and the entire apparatus such as generation of image data captured and recorded by the imaging apparatus, analysis of various commands, various settings, lens driving and display control, etc. Control the overall operation.

  The input / output terminal 102 is assigned to each circuit unit of the semiconductor integrated circuit 100 and is a terminal for inputting / outputting a signal to / from each circuit unit. The input / output terminal 102 is used for each operation mode of the semiconductor integrated circuit 100 such that the input / output terminal used by the control unit 101 in the first mode is used by the display control unit 107 in the second mode. In addition, it is possible to change the object to be used and the purpose of use.

  The camera signal processing unit 103 inputs an image signal picked up by an optical system (not shown) and an image sensor mounted on the image pickup device via the input / output terminal 102, and performs matrix processing to obtain a luminance signal and a color difference signal. Generate. Further, the camera signal processing unit 103 performs image processing such as flaw correction and gamma correction on the luminance signal and the color difference signal, and then outputs them to the memory 112 via the memory control unit 105 described later.

  The encoding unit 104 reads out the image data generated by the camera signal processing unit 103 and stored in the memory 112 via the memory control unit 105 described later. The encoding unit 104 applies MPEG or H.264 to the image data read from the memory 112. The encoded data is generated by performing encoding processing such as H.264 and JPEG, and is output to the memory 112 via the memory control unit 105 described later.

  The memory control unit 105 performs processing for arbitrating access requests to the memory 112 from the respective circuit units, and data is transmitted via the memory interface 106 that is used exclusively for the memory control unit 105 to access the memory 112. I / O is performed.

  Since the memory control unit 105 and the memory interface 106 are blocks having functions indispensable for operating each circuit unit, they always operate at a high frequency in each operation mode of the semiconductor integrated circuit 100.

  As the memory 112, for example, a DDR (Double-Data-Rate) SDRAM that performs burst transfer of data in synchronization with both rising and falling of the clock is used. The display control unit 107 reads the image data generated by the camera signal processing unit 103 and stored in the memory 112, converts the image data into a predetermined format, and outputs it to the display device 113 via the input / output terminal 102.

  The display device 113 displays an image based on the signal generated by the display control unit 107. The decoding unit 108 reads out encoded data stored in the memory 112 by the encoding unit 104 or the external communication unit 109 described later, performs decoding processing, and outputs the decoded data to the memory 112 via the memory control unit 105.

  The external communication unit 109 reads the encoded data generated by the encoding unit 104 and stored in the memory 112. Then, the external communication unit 109 transmits the encoded data read from the memory 112 to a storage medium (not shown) or the like outside the semiconductor integrated circuit 100 via the external communication interface 110 dedicated to the external communication unit 109. Output to the semiconductor integrated circuit. The external communication unit 109 inputs data from a storage medium (not shown) outside the semiconductor integrated circuit 100 or another semiconductor integrated circuit via the external communication interface 110, and enters the memory 112 via the memory control unit 105. Output.

  The external communication interface 110 conforms to, for example, the PCI Express standard that transmits and receives data using a differential signal. The temperature sensor 111 includes a temperature detection circuit such as a thermistor that detects the internal temperature of the semiconductor integrated circuit 100, and outputs detected temperature information to the control unit 101 in accordance with control from the control unit 101.

  Based on the temperature information acquired from the temperature sensor 111, the control unit 101 stops the clock to the circuit unit unnecessary for operation, shuts off the power, etc., when the temperature inside the semiconductor integrated circuit 100 is likely to reach a predetermined upper limit. Perform the process. In addition, the control unit 101 controls the power control unit 114 (described later) provided outside the semiconductor integrated circuit 100 based on the temperature information acquired from the temperature sensor 111, and performs the temperature AVS. The control unit 101 outputs a control command based on the temperature information acquired from the temperature sensor 111 to the power control unit 114 via the input / output terminal 102, and the power control unit 114 detects the temperature based on the control command from the control unit 101. A change process of the operating voltage by AVS is performed. The power supply control unit 114 is a circuit for controlling the power supplied to the semiconductor integrated circuit 100, and supplies the semiconductor integrated circuit 100 with a voltage required by the semiconductor integrated circuit 100.

  Here, the temperature AVS in the semiconductor integrated circuit 100 of the present embodiment will be described with reference to FIG. FIG. 5 shows the relationship between the temperature at which the semiconductor integrated circuit 100 can operate at a certain frequency and the lower limit voltage.

  The semiconductor elements constituting each circuit portion of the semiconductor integrated circuit 100 of this embodiment have a higher temperature even when operating at the same frequency because the delay of the semiconductor elements decreases and the speed at which an electric signal is transmitted increases at higher temperatures. Can be operated at a low voltage. Therefore, in the present embodiment, the temperature AVS for reducing the power consumption by reducing the operating voltage in accordance with the delay change of the internal semiconductor element that decreases as the temperature of the semiconductor integrated circuit 100 increases is performed.

  When power is supplied to the semiconductor integrated circuit 100 by turning on the power switch of the imaging device, the power supply control unit 114 applies a first voltage (eg, 1.20 V) that can operate at any temperature. To do. After the power is turned on, the control unit 101 acquires temperature information from the temperature sensor 111. For example, if the temperature information is 0 ° C., the control unit 101 sets the second voltage (eg, 1.15 V), which is an operable lower limit voltage. The power control unit 114 is controlled to change.

  Further, during imaging, if the temperature information acquired from the temperature sensor 111 during imaging or the like exceeds a predetermined temperature (for example, 50 ° C.), the control unit 101 performs temperature AVS. For example, the control unit 101 refers to the table of FIG. 5 and sets a voltage applied to the semiconductor integrated circuit 100 based on the temperature information acquired from the temperature sensor 111 to a third voltage lower than the second voltage (for example, , 1.10V), the power supply control unit 114 is controlled. As described above, the control unit 101 has a table in which the temperature and the operable lower limit voltage are associated with each operating frequency as illustrated in FIG. 5, and controls the power supply control unit 114 based on the temperature information, and the semiconductor The temperature AVS is implemented by controlling the voltage applied to the integrated circuit 100. Specifically, control is performed such that the higher the temperature detected by the temperature sensor 111, the lower the voltage applied to the semiconductor integrated circuit 100.

  Next, the layout of the temperature sensor 111 in the semiconductor integrated circuit 100 of this embodiment will be described with reference to FIG.

  FIG. 2 shows a state in which each circuit portion of the semiconductor integrated circuit 100 of FIG. 1 is laid out by applying this embodiment, and the same components as those in FIG.

  In FIG. 2, the semiconductor integrated circuit 100 has an outer peripheral region 200 in which a plurality of IO cells are arranged around. Each IO cell has an electrode part and is connected to the electrode of the package using wire bonding or the like. The adjacent region 201 adjacent to the temperature sensor 111 is provided between the outer peripheral region 200 located on the outer periphery of the semiconductor integrated circuit 100 and the temperature sensor 111. In this adjacent region 201, at least one of a dummy cell, a spacer, a power supply wiring, a GND region, and a voltage conversion cell is arranged except for a circuit unit that performs a logical operation.

  The temperature sensor 111 is disposed with an adjacent region 201 interposed between the temperature sensor 111 and the outer peripheral region 200 of the semiconductor integrated circuit 100. The temperature sensor 111 is arranged so as not to be adjacent to the circuit units of the semiconductor integrated circuit 100 such as the memory control unit 105, the memory interface 106, the external communication unit 109, and the external communication interface 110 that operate at a high frequency. Is done.

  As described above, according to the present embodiment, in the semiconductor integrated circuit 100, the temperature sensor 111 is disposed as close as possible to the outer peripheral region 200 where heat is likely to escape. Further, the temperature sensor 111 is arranged apart from the circuit part that easily generates heat as compared with other circuit parts. The circuit unit that easily generates heat is, for example, the external communication unit 109 or the external communication interface 110 that operates at a high frequency using a differential signal, or the memory control unit 105 or the memory interface 106 that always operates at a high frequency. As a result, the temperature sensor 111 is disposed at a position where a lower temperature is detected inside the semiconductor integrated circuit 100, and temperature information inside the semiconductor integrated circuit 100 can be obtained with high accuracy. As a result, since the temperature AVS can be efficiently performed based on accurate temperature information, the power consumption of the semiconductor integrated circuit 100 can be reduced.

  In the present embodiment, an example in which a dummy cell, a spacer, a power supply wiring, a GND region, and a voltage conversion cell are provided in the adjacent region 201 of the temperature sensor 111 has been described. However, the temperature sensor 111 is disposed as far as possible. From this point of view, only the spacers may be arranged in the adjacent region 201 of the temperature sensor 111, and the adjacent region 201 of the temperature sensor 111 may be made as small as possible to approach the outer peripheral region 200.

[Embodiment 2]
In the first embodiment described above, the example in which the temperature sensor 111 is disposed apart from the circuit unit that operates at a high frequency has been described. On the other hand, in the present embodiment, an example will be described in which the temperature sensor 111 is disposed adjacent to a circuit unit that operates at a low frequency during image recording or is not operated by shutting off the power supply.

  First, with reference to FIG. 3, a configuration of a semiconductor integrated circuit for adapting and efficiently implementing the temperature AVS in the present embodiment will be described.

  The semiconductor integrated circuit 300 shown in FIG. 3 is different from the configuration of FIG. 1 in that the external communication unit 301 can access a recording medium 302 such as a memory card outside the semiconductor integrated circuit 300 via the input / output terminal 102. It is a point. In FIG. 3, the same components as those in FIG.

  The external communication unit 301 reads the encoded image data generated by the encoding unit 104 and stored in the memory 112 via the memory control unit 105 via the memory control unit 105 and connects to the outside of the semiconductor integrated circuit 300. To the recorded recording medium 302 via the input / output terminal 102. The external communication unit 301 acquires image data from the recording medium 302 via the input / output terminal 102, outputs the image data to the memory control unit 105, and stores the image data in the memory 112.

Next, a state where the operation rate in the semiconductor integrated circuit 300 is high will be described.
In the semiconductor integrated circuit 300, the operation rate of the circuit unit is high, and the semiconductor integrated circuit 300 operates at a high frequency when, for example, recorded image data is recorded on the recording medium 302. During image recording, the camera signal processing unit 103 performs camera signal processing on the data input from the input / output terminal 102. During recording, the encoding unit 104 performs encoding processing on the data generated by the camera signal processing unit 103. Further, during recording, the display control unit 107 converts the image data generated by the camera signal processing unit 103 into a predetermined format for display by the display device 113 outside the semiconductor integrated circuit 300 and outputs it from the input / output terminal 102. doing.

  Further, during recording, the control unit 101 is in a state of constantly controlling each circuit unit. In addition, during recording, the memory control unit 105 constantly generates access requests to the memory 112 from each circuit unit, and performs arbitration processing at all times to control the memory 112 and transmit / receive data. It is. Further, during recording, the external communication unit 301 outputs the encoded data generated by the encoding unit 104 to the recording medium 302. Since the external communication unit 301 handles the data encoded by the encoding unit 104, the amount of data is smaller than that of other circuit units. Therefore, control at a frequency lower than that of other circuit units is possible. Note that the decoding unit 108 is not operating during recording, so the power is shut off.

  As described above, most of the circuit units mounted on the semiconductor integrated circuit 300 are operating during recording, the operation rate is high, and the average frequency is also higher than a predetermined frequency.

  4 shows a state in which each circuit portion of the semiconductor integrated circuit 300 of FIG. 3 is laid out in the present embodiment, and the same components as those in FIG. 3 are denoted by the same reference numerals.

  In FIG. 4, the temperature sensor 111 is arranged with an adjacent region 201 sandwiched between the semiconductor integrated circuit 300 and the outer peripheral region 200 where heat is likely to escape. The temperature sensor 111 is disposed adjacent to the decoding unit 108 and the external communication unit 301. The decoding unit 108 and the external communication unit 301 are circuit units that operate at a relatively low frequency in a state where the operation rate of the semiconductor integrated circuit 300 is high, or that are not operated by shutting off the power supply. By disposing the temperature sensor 111 in the vicinity of the outer peripheral region 200 and in the vicinity of the decoding unit 108 and the external communication unit 301 in this way, in the operation mode in which the operating rate of the semiconductor integrated circuit 300 is high and the average frequency is also high, The temperature information obtained by the sensor 111 is information indicating a lower temperature, preferably the lowest temperature, in the semiconductor integrated circuit 300.

  As described above, according to the present embodiment, the temperature sensor 111 is disposed as close as possible to the outer peripheral region 200 of the semiconductor integrated circuit 300 where heat easily escapes. In addition, the temperature sensor 111 is disposed near a circuit portion that operates at a relatively low frequency in a state where the operation rate of the semiconductor integrated circuit 300 is high, or that does not operate by shutting off the power source. Accordingly, the temperature sensor 111 is disposed at a position where a lower temperature is detected in the semiconductor integrated circuit 300 in an operation mode in which the semiconductor integrated circuit 300 has a high operation rate and a high average frequency. The temperature information inside 300 can be accurately acquired. As a result, since the temperature AVS can be efficiently performed based on accurate temperature information, the power consumption of the semiconductor integrated circuit 300 can be reduced.

  In each of the above-described embodiments, the example in which the input / output terminals 102 are arranged in the outer peripheral area 200 of the semiconductor integrated circuits 100 and 300 has been described. However, the input / output terminals may be arranged inward of the outer peripheral area. Also in this case, the present invention can be applied to the outside of the semiconductor integrated circuit because heat is more likely to escape.

  In the above-described embodiment, the example in which the input / output terminals are densely arranged in the outer peripheral region has been described. However, the number of input / output terminals is small, and not only the input / output terminals but also a normal circuit unit is provided in the outer peripheral region. It may be arranged. Also in this case, since the heat outside the semiconductor integrated circuit is more easily escaped, in the semiconductor integrated circuit, the scribe area and the like further outside the input / output terminal is regarded as the outer peripheral area. Is applicable.

  In the above-described embodiment, the example of the semiconductor integrated circuit mounted on an imaging apparatus such as a digital camera has been described. It is also applicable to.

DESCRIPTION OF SYMBOLS 100,300 ... Semiconductor integrated circuit, 101 ... Control part, 102 ... Input / output terminal, 104 ... Coding part, 108 ... Decoding part, 109, 301 ... External communication part, 110 ... External communication interface, 111 ... Temperature sensor, 200 ... peripheral area, 201 ... adjacent area

Claims (11)

In a semiconductor integrated circuit in which a plurality of circuit portions including a temperature detection circuit are arranged,
The temperature detection circuit is disposed at a position adjacent to an outer peripheral region where heat is easily escaped in the semiconductor integrated circuit so that a lower temperature is detected inside the semiconductor integrated circuit. Semiconductor integrated circuit.   The temperature detection circuit is disposed at a position adjacent to the outer peripheral region of the semiconductor integrated circuit and at a position separated from a circuit portion that is more likely to generate heat than the other circuit portions among the plurality of circuit portions. The semiconductor integrated circuit according to claim 1.   3. The semiconductor integrated circuit according to claim 2, wherein the circuit unit that easily generates heat is a circuit unit that operates at a higher frequency than the other circuit unit.   4. The semiconductor integrated circuit according to claim 1, wherein input / output terminals are arranged in the outer peripheral region.   The adjacent region is provided between the outer peripheral region and the temperature detection circuit, and a predetermined circuit unit excluding a circuit unit that performs a logical operation is disposed in the adjacent region. Semiconductor integrated circuit.   The semiconductor integrated circuit according to claim 5, wherein the predetermined circuit includes at least one of a dummy cell, a spacer, a power supply wiring, a GND region, and a voltage conversion cell.   4. The semiconductor integrated circuit according to claim 3, wherein the circuit unit operating at a high frequency includes a communication unit that transmits and receives data using a differential signal.   When the semiconductor integrated circuit operates at a predetermined frequency or higher, the temperature detection circuit is adjacent to a circuit unit that operates at a frequency lower than the predetermined frequency, or a circuit unit that is not operating by shutting off the power supply. The semiconductor integrated circuit according to claim 1, wherein the semiconductor integrated circuit is arranged as follows.   The plurality of circuit units include a control unit that controls to lower the operating voltage of the circuit unit as the temperature is higher based on temperature information inside the semiconductor integrated circuit obtained by the temperature detection circuit. A semiconductor integrated circuit according to claim 1.   The semiconductor integrated circuit according to claim 1, wherein the semiconductor integrated circuit is configured by integrating the plurality of circuit units into one chip. A semiconductor integrated circuit having a plurality of circuit portions including a temperature detection circuit;
A power supply controller for supplying power to the semiconductor integrated circuit,
In the semiconductor integrated circuit, the temperature detection circuit is disposed at a position adjacent to an outer peripheral region where heat is easily escaped in the semiconductor integrated circuit so that a lower temperature is detected inside the semiconductor integrated circuit. The plurality of circuit units control the power supply control unit so as to lower the operating voltage of the circuit unit as the temperature is higher, based on temperature information inside the semiconductor integrated circuit obtained by the temperature detection circuit. An electronic device including a control unit.

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