JP2017199818A - Semiconductor device - Google Patents

Semiconductor device Download PDF

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JP2017199818A
JP2017199818A JP2016090030A JP2016090030A JP2017199818A JP 2017199818 A JP2017199818 A JP 2017199818A JP 2016090030 A JP2016090030 A JP 2016090030A JP 2016090030 A JP2016090030 A JP 2016090030A JP 2017199818 A JP2017199818 A JP 2017199818A
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external connection
semiconductor device
surface portion
portions
vibration
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JP6701926B2 (en
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貴弘 西島
Takahiro Nishijima
貴弘 西島
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Fuji Electric Co Ltd
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Fuji Electric Co Ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484Connecting portions
    • H01L2224/4847Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
    • H01L2224/48472Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/4911Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain
    • H01L2224/49111Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain the connectors connecting two common bonding areas, e.g. Litz or braid wires
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation

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  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)

Abstract

PROBLEM TO BE SOLVED: To inhibit deterioration in adhesion between an external connection terminal and a wire while improving adhesion of an encapsulation resin with a resin case.SOLUTION: A semiconductor device 100 comprises: a resin case 150 which has grooves 152a-152g formed along a circumference of a bottom face 151 and on both sides of external connection parts 130a2-130e2; and vibration suppression parts 153a-153e formed within ranges of the grooves 152a, 152b, 152d, 152f, 152g, which are adjacent to internal connection parts 130a1-130e1. With this configuration, when wires 140a-140e are joined to the internal connection parts 130a1-130e1 of the external connection terminals 130a-130e by ultrasonic joining, vibration of the external connection terminals 130a-130e is suppressed.SELECTED DRAWING: Figure 1

Description

本発明は、半導体装置に関する。   The present invention relates to a semiconductor device.

半導体装置は、パワー半導体素子を含み、電力変換装置、または、スイッチング装置として利用されている。例えば、半導体装置は、IGBT(Insulated Gate Bipolar Transistor)、パワーMOSFET(Metal Oxide Semiconductor Field Effect Transistor)等を含む半導体素子を含み、スイッチング装置として機能することができる。   The semiconductor device includes a power semiconductor element and is used as a power conversion device or a switching device. For example, the semiconductor device includes a semiconductor element including an IGBT (Insulated Gate Bipolar Transistor), a power MOSFET (Metal Oxide Semiconductor Field Effect Transistor), and the like, and can function as a switching device.

半導体装置の一例として、外部接続端子(リードフレーム)がインサート成形によって一体的に設けられた樹脂ケースに、半導体素子と制御素子とが配置された積層基板が収納されている。また、半導体装置では、当該外部接続端子と、半導体素子及び制御素子とをそれぞれワイヤによって電気的に接続して、封止樹脂により樹脂ケース内が封止される。   As an example of a semiconductor device, a laminated substrate in which a semiconductor element and a control element are arranged is housed in a resin case in which external connection terminals (lead frames) are integrally provided by insert molding. In the semiconductor device, the external connection terminal, the semiconductor element, and the control element are electrically connected by wires, and the inside of the resin case is sealed with a sealing resin.

このような半導体装置では、樹脂ケースと一体成形された外部接続端子は、樹脂ケースから外部に延出されている。このため、外部接続端子は、樹脂ケースとの間に微小な隙間が生じる場合がある。この隙間が、樹脂ケース内側から外側まで延出する外部接続端子に沿って形成されていると、当該隙間を通じて外部から樹脂ケース内に水分が浸入するおそれがある。樹脂ケースに水分が浸入すると、半導体装置の故障等が生じ、半導体装置の信頼性が低下してしまう場合がある。このような隙間をできる限り塞ぐために、例えば、樹脂ケースと封止樹脂との密着性を向上させる必要がある。   In such a semiconductor device, the external connection terminal integrally formed with the resin case extends from the resin case to the outside. For this reason, a minute gap may be generated between the external connection terminal and the resin case. If this gap is formed along the external connection terminal extending from the inside to the outside of the resin case, moisture may enter the resin case from the outside through the gap. If moisture enters the resin case, the semiconductor device may fail or the like, which may reduce the reliability of the semiconductor device. In order to close such a gap as much as possible, for example, it is necessary to improve the adhesion between the resin case and the sealing resin.

そこで、積層基板が配置された樹脂ケースの底面部の周縁に沿って、外部接続端子の両側に溝部を形成することで、封止樹脂と樹脂ケースとの密着面積を増加させて、封止樹脂と樹脂ケースとの密着性を向上させることが可能となる(例えば、特許文献1参照)。   Therefore, by forming grooves on both sides of the external connection terminal along the periphery of the bottom surface portion of the resin case where the multilayer substrate is arranged, the contact area between the sealing resin and the resin case is increased, and the sealing resin It is possible to improve the adhesion between the resin case and the resin case (see, for example, Patent Document 1).

特開2014−157925号公報JP 2014-157925 A

しかし、上記の樹脂ケース内に溝部が形成された半導体装置において、外部接続端子にワイヤを超音波接合により接合すると、超音波の振動により外部接続端子が振動してしまう。これに伴い、ワイヤに印加される超音波が分散して、外部接続端子に対するワイヤの接合性が低下してしまう。このため、ワイヤは外部接続端子から剥がれやすくなり、半導体装置の信頼性の低下につながる。   However, in the semiconductor device in which the groove portion is formed in the resin case, when the wire is bonded to the external connection terminal by ultrasonic bonding, the external connection terminal is vibrated by ultrasonic vibration. Along with this, ultrasonic waves applied to the wires are dispersed, and the bondability of the wires to the external connection terminals is degraded. For this reason, the wires are easily peeled off from the external connection terminals, leading to a decrease in the reliability of the semiconductor device.

本発明は、このような点に鑑みてなされたものであり、樹脂ケースに対する封止樹脂の密着性を向上させつつ、外部接続端子とワイヤとの密着性の低下を抑制することができる半導体装置を提供することを目的とする。   The present invention has been made in view of such a point, and can improve the adhesion of the sealing resin to the resin case and can suppress a decrease in the adhesion between the external connection terminal and the wire. The purpose is to provide.

本発明の一観点によれば、絶縁板と、前記絶縁板上に配置された回路板と、を有する積層基板と、中央部に形成された開口部に前記積層基板が配置された底面部と、前記底面部の周囲に沿って設けられた側面部と、前記底面部上に前記積層基板の周縁に対して平行に設けられ、前記回路板とワイヤで接続される内部接続部及び前記内部接続部に接続され、前記側面部から外部に延出する外部接続部を有する外部接続端子と、を備え、前記底面部の周縁に沿って前記外部接続部の両側に溝部が形成されたケースと、前記溝部の、前記内部接続部に隣接する範囲内に形成された振動抑制部と、を有する半導体装置が提供される。   According to one aspect of the present invention, a laminated substrate having an insulating plate and a circuit board disposed on the insulating plate, and a bottom surface portion in which the laminated substrate is disposed in an opening formed in a central portion. A side surface portion provided along the periphery of the bottom surface portion, an internal connection portion provided on the bottom surface portion in parallel to the peripheral edge of the multilayer substrate, and connected to the circuit board by a wire and the internal connection An external connection terminal having an external connection portion connected to a portion and extending from the side surface portion to the outside, and a case in which grooves are formed on both sides of the external connection portion along the periphery of the bottom surface portion, There is provided a semiconductor device having a vibration suppressing portion formed in a range of the groove portion adjacent to the internal connection portion.

開示の技術によれば、半導体装置の信頼性の低下を抑制することができる。   According to the disclosed technology, it is possible to suppress a decrease in reliability of the semiconductor device.

第1の実施の形態の半導体装置の上面図である。1 is a top view of a semiconductor device according to a first embodiment. 第1の実施の形態の半導体装置の断面図である。1 is a cross-sectional view of a semiconductor device according to a first embodiment. 第1の実施の形態の半導体装置の要部断面図(その1)である。FIG. 2 is a main part cross-sectional view (part 1) of the semiconductor device according to the first embodiment; 第1の実施の形態の半導体装置の要部断面図(その2)である。FIG. 3 is a main-portion cross-sectional view (part 2) of the semiconductor device according to the first embodiment; 第1の実施の形態の半導体装置の要部断面図(その3)である。FIG. 3 is a main-portion cross-sectional view (part 3) of the semiconductor device according to the first embodiment; 第1の実施の形態の半導体装置の外部接合端子に対するワイヤの接合強度を示すグラフである。It is a graph which shows the joining strength of the wire with respect to the external joining terminal of the semiconductor device of 1st Embodiment. 第2の実施の形態の半導体装置の要部上面図である。It is a principal part top view of the semiconductor device of 2nd Embodiment.

以下、実施の形態について図面を用いて説明する。
[第1の実施の形態]
第1の実施の形態の半導体装置について、図1〜図5を用いて説明する。
Hereinafter, embodiments will be described with reference to the drawings.
[First Embodiment]
The semiconductor device of the first embodiment will be described with reference to FIGS.

図1は、第1の実施の形態の半導体装置の上面図である。
図2は、第1の実施の形態の半導体装置の断面図である。
なお、図2は、図1の一点鎖線Y−Yにおける断面図である。
FIG. 1 is a top view of the semiconductor device according to the first embodiment.
FIG. 2 is a cross-sectional view of the semiconductor device according to the first embodiment.
2 is a cross-sectional view taken along one-dot chain line YY in FIG.

図3〜図5は、第1の実施の形態の半導体装置の要部断面図である。
なお、図3は、図1の一点鎖線X1−X1の、図4は、図1の一点鎖線X2−X2の、図5は、図1の一点鎖線X3−X3のそれぞれにおける断面図である。
3 to 5 are fragmentary cross-sectional views of the semiconductor device according to the first embodiment.
3 is a cross-sectional view taken along one-dot chain line X1-X1 in FIG. 1, FIG. 4 is a cross-sectional view taken along one-dot chain line X2-X2 in FIG. 1, and FIG.

半導体装置100は、図1及び図2に示されるように、積層基板110と、樹脂ケース150と、を有し、樹脂ケース150内の積層基板110は、封止樹脂160により封止されている。なお、図1では、封止樹脂160の図示を省略している。   As illustrated in FIGS. 1 and 2, the semiconductor device 100 includes a multilayer substrate 110 and a resin case 150, and the multilayer substrate 110 in the resin case 150 is sealed with a sealing resin 160. . In FIG. 1, illustration of the sealing resin 160 is omitted.

積層基板110は、絶縁板111と、絶縁板111のおもて面に配置された回路板112a〜112eと、絶縁板111の裏面に配置された金属板113と、を有する。
絶縁板111は、アルミナ、窒化アルミニウム、窒化シリコン等のセラミックスの絶縁性の材質により構成されている。
The laminated substrate 110 includes an insulating plate 111, circuit boards 112 a to 112 e arranged on the front surface of the insulating plate 111, and a metal plate 113 arranged on the back surface of the insulating plate 111.
The insulating plate 111 is made of a ceramic insulating material such as alumina, aluminum nitride, or silicon nitride.

回路板112a〜112eは、銅等の導電性を有する材質により構成されている。
金属板113は、銅、アルミニウム等の熱伝導性を有する材質により構成されている。
また、このような積層基板110の回路板112a上には、はんだ(図示を省略)を介して、IGBT、パワーMOSFET、FWD(Free Wheeling Diode)等の半導体素子120a,120bが配置されている。また、回路板112e上には、所定の機能を有する制御素子120cが配置されている。半導体素子120a,120b及び制御素子120cは、ワイヤ(図示を省略)によって回路板112a〜112dに電気的に接続されてもよく、半導体素子120a,120b及び制御素子120cのそれぞれの表面電極が互いにワイヤによって接続されてもよい。
The circuit boards 112a to 112e are made of a conductive material such as copper.
The metal plate 113 is made of a material having thermal conductivity such as copper or aluminum.
On the circuit board 112a of the multilayer substrate 110, semiconductor elements 120a and 120b such as IGBTs, power MOSFETs, and FWDs (Free Wheeling Diodes) are arranged via solder (not shown). Further, a control element 120c having a predetermined function is disposed on the circuit board 112e. The semiconductor elements 120a and 120b and the control element 120c may be electrically connected to the circuit boards 112a to 112d by wires (not shown), and the surface electrodes of the semiconductor elements 120a and 120b and the control element 120c are connected to each other. May be connected by.

樹脂ケース150は、ポリフェニレンサルファイド(PPS)、ポリブチレンテレフタレート(PBT)樹脂、ポリアミド(PA)樹脂、または、アクリロニトリルブタジエンスチレン(ABS)樹脂等の樹脂により構成されている。このような樹脂ケース150は、底面部151と、側面部154と、を有する。さらに、樹脂ケース150は、外部接続端子130a〜130eが一体成形されている。   The resin case 150 is made of a resin such as polyphenylene sulfide (PPS), polybutylene terephthalate (PBT) resin, polyamide (PA) resin, or acrylonitrile butadiene styrene (ABS) resin. Such a resin case 150 has a bottom surface portion 151 and a side surface portion 154. Further, the resin case 150 is integrally formed with the external connection terminals 130a to 130e.

底面部151は、中央部に矩形型の開口部155が形成されており、図1及び図2に示されるように、開口部155に積層基板110が配置されている。なお、積層基板110は、樹脂ケース150の裏面側から、底面部151の開口部155の周縁に沿って塗布した接着剤により取り付けられている。   The bottom surface portion 151 has a rectangular opening 155 formed at the center, and the laminated substrate 110 is disposed in the opening 155 as shown in FIGS. 1 and 2. The laminated substrate 110 is attached from the back surface side of the resin case 150 by an adhesive applied along the periphery of the opening 155 of the bottom surface portion 151.

側面部154は、底面部151の周囲に沿って一体的に設けられている。
外部接続端子130a〜130eは、銅等の導電性を有する材質により構成されており、この厚さは、例えば、0.5mm程度であり、幅は、2.0mm以上、3.0mm以下程度である。このような外部接続端子130a〜130eは、まず、底面部151上に積層基板110の周縁に対して平行に設けられ、回路板112a〜112eとワイヤ140a〜140eで電気的に接続される内部接続部130a1〜130e1を有する。さらに、外部接続端子130a〜130eは、内部接続部130a1〜130e1に接続され、側面部154から外部に延出する外部接続部130a2〜130e2を有する。なお、外部接続端子130a〜130eでは、外部接続部130a2〜130e2は、内部接続部130a1〜130e1に対してそれぞれ直角を成すように接続されている。
The side surface portion 154 is provided integrally along the periphery of the bottom surface portion 151.
The external connection terminals 130a to 130e are made of a conductive material such as copper, and the thickness is about 0.5 mm, for example, and the width is about 2.0 mm or more and 3.0 mm or less. is there. Such external connection terminals 130a to 130e are first provided on the bottom portion 151 in parallel to the peripheral edge of the multilayer substrate 110, and are electrically connected to the circuit boards 112a to 112e and the wires 140a to 140e. Parts 130a1 to 130e1. Furthermore, the external connection terminals 130a to 130e have external connection portions 130a2 to 130e2 that are connected to the internal connection portions 130a1 to 130e1 and extend to the outside from the side surface portion 154. In the external connection terminals 130a to 130e, the external connection portions 130a2 to 130e2 are connected to form a right angle with respect to the internal connection portions 130a1 to 130e1, respectively.

また、このような樹脂ケース150の底面部151には、底面部151の外部接続端子130a〜130eが配置された側の辺(周縁)に沿って、外部接続部130a2〜130e2の両側に溝部152a〜152gがそれぞれ形成されている。   Further, in the bottom surface portion 151 of the resin case 150, the groove portions 152a are formed on both sides of the external connection portions 130a2 to 130e2 along the side (periphery) of the bottom surface portion 151 on which the external connection terminals 130a to 130e are arranged. To 152 g are formed.

例えば、溝部152fは、図3に示されるように、外部接続端子130eの内部接続部130e1が配置された底面部151の周縁に沿って、内部接続部130e1の外側に形成されており、底面部151と側面部154との間に位置する。   For example, as shown in FIG. 3, the groove 152 f is formed outside the internal connection 130 e 1 along the periphery of the bottom 151 where the internal connection 130 e 1 of the external connection terminal 130 e is disposed. 151 and the side surface portion 154.

なお、溝部152fの深さDは、4.5mm程度であり、幅Wは0.5mm程度であり、底面部151の裏面から溝部152fの底面までの厚さは、1.0mm程度である。他の溝部152a〜152e,152gについても、樹脂ケース150と内部接続部130a1〜130c1,130e1に対して溝部152fの場合と同様に形成されており、同様の厚さD、幅Wを成すものである。   The depth D of the groove 152f is about 4.5 mm, the width W is about 0.5 mm, and the thickness from the bottom surface of the bottom surface 151 to the bottom surface of the groove 152f is about 1.0 mm. Other groove portions 152a to 152e and 152g are formed in the same manner as the groove portion 152f with respect to the resin case 150 and the internal connection portions 130a1 to 130c1 and 130e1, and have the same thickness D and width W. is there.

なお、溝部152a〜152gは、既述の通り、底面部151の外部接続端子130a〜130eが配置された側の辺に沿って、外部接続部130a2〜130e2の両側にそれぞれ形成されている。このため、例えば、外部接続端子130dの外部接続部130d2は、図4に示されるように、外部接続部130d2の下部には溝部が形成されておらず、底面部151上に配置されている。他の外部接続部130a2〜130c2,130e2も、外部接続部130d2と同様に、外部接続部130a2〜130c2,130e2の下部には溝部が形成されておらず、底面部151上に配置されている。   As described above, the groove portions 152a to 152g are formed on both sides of the external connection portions 130a2 to 130e2 along the sides of the bottom surface portion 151 where the external connection terminals 130a to 130e are disposed. Therefore, for example, as shown in FIG. 4, the external connection portion 130d2 of the external connection terminal 130d is not formed with a groove in the lower portion of the external connection portion 130d2, but is disposed on the bottom surface portion 151. The other external connection portions 130a2 to 130c2 and 130e2 are also formed on the bottom surface portion 151 without forming a groove portion below the external connection portions 130a2 to 130c2 and 130e2, similarly to the external connection portion 130d2.

樹脂ケース150には、このような溝部152a〜152gが形成されている。このため、例えば、図3に示したように、底面部151上の側面部154で囲まれた領域が封止樹脂160で封止されると、樹脂ケース150(底面部151)と封止樹脂160との密着面積が増加して、樹脂ケース150に対する封止樹脂160の密着性が向上する。特に、外部接続端子130a〜130eの外部接続部130a2〜130e2の両隣が封止樹脂160により封止されるために、外部接続部130a2〜130e2が通じる側面部154の隙間が塞がれて、外部から当該隙間を通じた水分の浸入が防止されるようになる。   Such groove portions 152 a to 152 g are formed in the resin case 150. Therefore, for example, as illustrated in FIG. 3, when the region surrounded by the side surface portion 154 on the bottom surface portion 151 is sealed with the sealing resin 160, the resin case 150 (the bottom surface portion 151) and the sealing resin are sealed. The contact area with 160 is increased, and the adhesion of the sealing resin 160 to the resin case 150 is improved. In particular, since both sides of the external connection portions 130a2 to 130e2 of the external connection terminals 130a to 130e are sealed with the sealing resin 160, the gap between the side surface portions 154 through which the external connection portions 130a2 to 130e2 communicate is closed. Intrusion of moisture through the gap is prevented.

なお、溝部152a〜152gの深さDと幅Wは外部接続端子130a〜130dの厚さ以上であれば溝部152a〜152g内に封止樹脂160を充填することができ、樹脂ケース150と封止樹脂160との密着性を保ち、水分の浸入を防止することができる。   If the depth D and width W of the groove portions 152a to 152g are equal to or greater than the thickness of the external connection terminals 130a to 130d, the sealing resin 160 can be filled in the groove portions 152a to 152g. Adhesion with the resin 160 can be maintained, and moisture can be prevented from entering.

このような構成を有する半導体装置100の樹脂ケース150において、溝部152a,152b,152d,152f,152gの、内部接続部130a1〜130e1に隣接する範囲内に振動抑制部153a〜153eがそれぞれ形成されている。   In the resin case 150 of the semiconductor device 100 having such a configuration, the vibration suppressing portions 153a to 153e are formed in the ranges adjacent to the internal connection portions 130a1 to 130e1 of the groove portions 152a, 152b, 152d, 152f, and 152g, respectively. Yes.

例えば、振動抑制部153dは、図1及び図5に示されるように、外部接続端子130dの内部接続部130d1が配置された底面部151と側面部154との間の溝部152fに配置されている。この際、振動抑制部153dの上面の位置は、底面部151に配置された内部接続部130d1の上面以上、側面部154の上面以下である。なお、図5では、振動抑制部153dの上面の位置が、内部接続部130d1の上面と同じ位置の場合を示している。   For example, as illustrated in FIGS. 1 and 5, the vibration suppression unit 153 d is disposed in the groove 152 f between the bottom surface 151 and the side surface 154 where the internal connection 130 d 1 of the external connection terminal 130 d is disposed. . At this time, the position of the upper surface of the vibration suppressing portion 153d is not lower than the upper surface of the internal connection portion 130d1 disposed on the bottom surface portion 151 and lower than the upper surface of the side surface portion 154. FIG. 5 shows the case where the position of the upper surface of the vibration suppressing portion 153d is the same position as the upper surface of the internal connection portion 130d1.

このような振動抑制部153dにより、ワイヤ140dの他端を外部接続端子130dの内部接続部130d1に超音波接合により接合しても、超音波の振動に伴う外部接続端子130dの振動が抑制されるようになる。このため、外部接続端子130dの内部接続部130d1にワイヤ140dを確実に接合することができるようになる。   By virtue of the vibration suppressing portion 153d, even if the other end of the wire 140d is joined to the internal connection portion 130d1 of the external connection terminal 130d by ultrasonic bonding, the vibration of the external connection terminal 130d due to ultrasonic vibration is suppressed. It becomes like this. For this reason, the wire 140d can be reliably joined to the internal connection portion 130d1 of the external connection terminal 130d.

なお、振動抑制部153dは、ワイヤ140dが超音波接合される際の外部接続端子130dの振動を抑制するためにも、溝部152fの、内部接続部130d1に隣接する範囲内に形成される。特に、ワイヤ140dの超音波接合の振動に伴う外部接続端子130dの振動を確実に抑制するためには、振動抑制部153dは、上記範囲内の、内部接続部130d1に接合されたワイヤ140dの他端の接合箇所に対向する位置に配置されることが好ましい。   The vibration suppressing portion 153d is formed in a range adjacent to the internal connection portion 130d1 of the groove portion 152f in order to suppress vibration of the external connection terminal 130d when the wire 140d is ultrasonically bonded. In particular, in order to reliably suppress the vibration of the external connection terminal 130d due to the vibration of the ultrasonic bonding of the wire 140d, the vibration suppression unit 153d is used in addition to the wire 140d bonded to the internal connection 130d1 within the above range. It is preferable that it is arranged at a position facing the joint portion at the end.

また、第1の実施の形態では、振動抑制部153dを溝部152fに形成した場合に外部接続端子130dの振動が抑制される場合を例に挙げて説明した。一方、他の振動抑制部153a〜153c,153eを溝部152a,152b,152d,152gにそれぞれ形成した場合も同様に外部接続端子130a〜130c,130eの振動を抑制することができる。   In the first embodiment, the case where the vibration of the external connection terminal 130d is suppressed when the vibration suppressing unit 153d is formed in the groove 152f has been described as an example. On the other hand, when the other vibration suppressing portions 153a to 153c and 153e are formed in the groove portions 152a, 152b, 152d and 152g, the vibrations of the external connection terminals 130a to 130c and 130e can be similarly suppressed.

また、このような樹脂ケース150は、外部接続端子130a〜130eがセットされた所定の金型に既出の樹脂を流し込んで硬化させるインサート成形により形成される。この際、金型内に、溝部152a〜152gに対応するような凸部を設け、さらに、当該凸部内に振動抑制部153a〜153eに対応するような凹部を設けておく。このようにして形成された樹脂ケース150は、溝部152a〜152gが形成されて、溝部152a,152b,152c,152f,152g内に振動抑制部153a〜153eが形成される。   Further, such a resin case 150 is formed by insert molding in which the above-described resin is poured into a predetermined mold in which the external connection terminals 130a to 130e are set and cured. At this time, convex portions corresponding to the groove portions 152a to 152g are provided in the mold, and further concave portions corresponding to the vibration suppressing portions 153a to 153e are provided in the convex portions. In the resin case 150 formed in this way, grooves 152a to 152g are formed, and vibration suppressing portions 153a to 153e are formed in the grooves 152a, 152b, 152c, 152f, and 152g.

または、インサート成形を行う金型内に、溝部152a〜152gに対応するような凸部のみを設けて、溝部152a〜152gが備えられた樹脂ケース150を先に形成しておく。続けて、このようにして形成された溝部152a,152b,152c,152f,152g内に振動抑制部153a〜153eを、接着剤を介して配置させるようにすることも可能である。この場合、振動抑制部153a〜153eは、樹脂ケース150に充填する際に加熱された封止樹脂160に対する耐熱性(200℃程度)と共に、外部接続端子130a〜130eに対する絶縁性とを備える材質により構成されることが必要となる。   Or only the convex part corresponding to the groove parts 152a-152g is provided in the metal mold | die which performs insert molding, and the resin case 150 provided with the groove parts 152a-152g is formed previously. Subsequently, the vibration suppressing portions 153a to 153e can be disposed through the adhesive in the grooves 152a, 152b, 152c, 152f, and 152g formed as described above. In this case, the vibration suppressing portions 153a to 153e are made of a material having heat resistance (about 200 ° C.) with respect to the sealing resin 160 heated when filling the resin case 150 and insulation with respect to the external connection terminals 130a to 130e. It needs to be configured.

また、半導体装置100を製造するにあたり、まず、上記のような振動抑制部153a〜153eを備える樹脂ケース150を予め用意する。次いで、樹脂ケース150の底面部151の開口部155に積層基板110を配置する。このようにして配置された積層基板110の回路板112a〜112eと、外部接続端子130a〜130eの内部接続部130a1〜130e1とをワイヤ140a〜140eでそれぞれ接続する。樹脂ケース150に、溶融した樹脂を充填して、積層基板110と、外部接続端子130a〜130eと、ワイヤ140a〜140eとを封止して、当該樹脂を硬化させることで、半導体装置100が製造される。   In manufacturing the semiconductor device 100, first, the resin case 150 including the vibration suppression units 153 a to 153 e as described above is prepared in advance. Next, the laminated substrate 110 is disposed in the opening 155 of the bottom surface portion 151 of the resin case 150. The circuit boards 112a to 112e of the multilayer substrate 110 thus arranged and the internal connection portions 130a1 to 130e1 of the external connection terminals 130a to 130e are connected by wires 140a to 140e, respectively. The semiconductor device 100 is manufactured by filling the resin case 150 with a molten resin, sealing the laminated substrate 110, the external connection terminals 130a to 130e, and the wires 140a to 140e and curing the resin. Is done.

次に、振動抑制部153a〜153eの有無に応じた、ワイヤ140a〜140eの外部接続端子130a〜130eに対する接合強度について、図6を用いて説明する。
図6は、第1の実施の形態の半導体装置の外部接続端子に対するワイヤの接合強度を示すグラフである。
Next, the bonding strength of the wires 140a to 140e with respect to the external connection terminals 130a to 130e according to the presence or absence of the vibration suppression units 153a to 153e will be described with reference to FIG.
FIG. 6 is a graph showing the bonding strength of the wire to the external connection terminal of the semiconductor device of the first embodiment.

なお、図6における横軸は、半導体装置の種別(参考例の半導体装置、第1の実施の形態の半導体装置100)を表しており、縦軸は、外部接続端子に対するワイヤの接合強度(「a.u.」(任意単位))を表している。   Note that the horizontal axis in FIG. 6 represents the type of semiconductor device (the semiconductor device of the reference example, the semiconductor device 100 of the first embodiment), and the vertical axis represents the bonding strength of the wire to the external connection terminal (“ a.u. "(arbitrary unit)).

また、参考例の半導体装置(図示を省略)とは、第1の実施の形態の半導体装置100において、振動抑制部153a〜153eのみを取り除いたものであり、それ以外は半導体装置100と同様の構成を成している。   The semiconductor device of the reference example (not shown) is the same as the semiconductor device 100 except that only the vibration suppressing units 153a to 153e are removed from the semiconductor device 100 of the first embodiment. It is composed.

外部接続端子130a〜130eに対するワイヤ140a〜140eの接合強度の測定には、シェアテストが行われた。シェアテストは、外部接続端子130a〜130eに接続されたワイヤ140a〜140eの接合箇所をシェアツールで押して、当該接合箇所の破壊時の荷重を接合強度として測定するものである。   A shear test was performed to measure the bonding strength of the wires 140a to 140e with respect to the external connection terminals 130a to 130e. The shear test is to measure the load at the time of destruction of the joint portion as the joint strength by pressing the joint portion of the wires 140a to 140e connected to the external connection terminals 130a to 130e with a shear tool.

なお、ワイヤ140a〜140eは、例えば、アルミニウムにより構成されており、ワイヤ140a〜140eの径は、300μm以上、500μm以下程度である。
この結果、参考例の半導体装置の場合には、外部接続端子130a〜130eに対するワイヤ140a〜140eの接合強度の最大値がおよそ1960、最小値がおよそ1080であって、平均値がおよそ1660であった。
The wires 140a to 140e are made of, for example, aluminum, and the diameters of the wires 140a to 140e are about 300 μm or more and 500 μm or less.
As a result, in the semiconductor device of the reference example, the maximum value of the bonding strength of the wires 140a to 140e to the external connection terminals 130a to 130e is about 1960, the minimum value is about 1080, and the average value is about 1660. It was.

一方、第1の実施の形態の半導体装置100の場合には、外部接続端子130a〜130eに対するワイヤ140a〜140eの接合強度の最大値がおよそ2030、最小値がおよそ1640であって、平均値がおよそ1840であった。   On the other hand, in the case of the semiconductor device 100 of the first embodiment, the maximum value of the bonding strength of the wires 140a to 140e to the external connection terminals 130a to 130e is about 2030, the minimum value is about 1640, and the average value is It was approximately 1840.

すなわち、第1の実施の形態の半導体装置100は、振動抑制部153a〜153eを備えない半導体装置に対して、外部接続端子130a〜130eに対するワイヤ140a〜140eの接合強度の最大値でおよそ4%、最小値でおよそ51%、平均値でおよそ11%といずれも向上していることがわかる。また、ばらつき(σ)はおよそ47%低減している。これは、振動抑制部153a〜153eが溝部152a,152b,152d,152f,152gにそれぞれ配置されていることで、外部接続端子130a〜130eに対してワイヤ140a〜140eを超音波接合により接合する際の外部接続端子130a〜130eの振動が抑制され、外部接続端子130a〜130eにワイヤ140a〜140eを確実に接合できていることが考えられる。   That is, in the semiconductor device 100 of the first embodiment, the maximum value of the bonding strength of the wires 140a to 140e with respect to the external connection terminals 130a to 130e is about 4% with respect to the semiconductor device that does not include the vibration suppression units 153a to 153e. It can be seen that both the minimum value is about 51% and the average value is about 11%. Further, the variation (σ) is reduced by about 47%. This is because the vibration suppressing portions 153a to 153e are disposed in the groove portions 152a, 152b, 152d, 152f, and 152g, respectively, so that the wires 140a to 140e are bonded to the external connection terminals 130a to 130e by ultrasonic bonding. It is conceivable that the vibrations of the external connection terminals 130a to 130e are suppressed, and the wires 140a to 140e can be reliably bonded to the external connection terminals 130a to 130e.

なお、このような振動抑制部153a〜153eは、例えば、溝部152a,152b,152d,152f,152gを全て埋めてしまうような長さにすると、外部接続端子130a〜130eに対してワイヤ140a〜140eを確実に接合することが可能となる。しかしながら、溝部152a,152b,152d,152f,152gに対する封止樹脂160の密着面積が低下して、封止樹脂160の樹脂ケース150に対する密着性も低下してしまう。このため、振動抑制部153a〜153eの長さを、超音波接合時の外部接続端子130a〜130eの振動を抑制できる程度に短くする。これにより、溝部152a,152b,152d,152f,152gの領域をできる限り多く確保することができ、樹脂ケース150と封止樹脂160との密着性の低下も抑制することができる。   For example, when the vibration suppressing portions 153a to 153e are long enough to fill the grooves 152a, 152b, 152d, 152f, and 152g, the wires 140a to 140e are connected to the external connection terminals 130a to 130e. Can be reliably bonded. However, the adhesion area of the sealing resin 160 to the grooves 152a, 152b, 152d, 152f, and 152g decreases, and the adhesion of the sealing resin 160 to the resin case 150 also decreases. For this reason, the lengths of the vibration suppressing portions 153a to 153e are shortened to such an extent that the vibrations of the external connection terminals 130a to 130e during ultrasonic bonding can be suppressed. Thereby, as many regions as possible of the groove portions 152a, 152b, 152d, 152f, and 152g can be secured, and a decrease in adhesion between the resin case 150 and the sealing resin 160 can be suppressed.

このような半導体装置100は、絶縁板111及び絶縁板111上に配置された回路板112a〜112eを有する積層基板110と、樹脂ケース150と、振動抑制部153a〜153eと、を有する。   Such a semiconductor device 100 includes an insulating plate 111 and a laminated substrate 110 having circuit boards 112a to 112e arranged on the insulating plate 111, a resin case 150, and vibration suppressing portions 153a to 153e.

樹脂ケース150は、中央部に形成された開口部155に積層基板110が配置された底面部151と、底面部151の周囲に沿って設けられた側面部154と、を有する。また、樹脂ケース150は、底面部151上に積層基板110の周縁に対して平行に設けられ、回路板112a〜112dとワイヤ140a〜140eで接続される内部接続部130a1〜130e1及び内部接続部130a1〜130e1に接続され、側面部154から外部に延出する外部接続部130a2〜130e2を有する外部接続端子130a〜130eを有する。さらに、樹脂ケース150は、底面部151の周縁に沿って外部接続部130a2〜130e2の両側に溝部152a〜152gが形成されている。   The resin case 150 has a bottom surface portion 151 in which the laminated substrate 110 is disposed in an opening 155 formed in the center portion, and a side surface portion 154 provided along the periphery of the bottom surface portion 151. In addition, the resin case 150 is provided on the bottom surface portion 151 in parallel with the peripheral edge of the multilayer substrate 110, and is connected to the circuit boards 112a to 112d and the wires 140a to 140e with the internal connection portions 130a1 to 130e1 and the internal connection portion 130a1. To external connection terminals 130a to 130e having external connection portions 130a2 to 130e2 that are connected to .about.130e1 and extend to the outside from the side surface portion 154. Further, the resin case 150 has groove portions 152a to 152g formed on both sides of the external connection portions 130a2 to 130e2 along the periphery of the bottom surface portion 151.

振動抑制部153a〜153eは、溝部152a,152b,152d,152f,152gの、内部接続部130a1〜130e1に隣接する範囲内に形成されている。
このため、外部接続端子130a〜130eの内部接続部130a1〜130e1にワイヤ140a〜140eを超音波接合により接合する際、超音波の振動に伴う外部接続端子130a〜130eの振動が抑制されるようになる。これにより、外部接続端子130a〜130eの内部接続部130a1〜130e1にワイヤ140a〜140eを確実に接合することができる。
The vibration suppressing portions 153a to 153e are formed in the range adjacent to the internal connection portions 130a1 to 130e1 of the groove portions 152a, 152b, 152d, 152f, and 152g.
For this reason, when bonding the wires 140a to 140e to the internal connection portions 130a1 to 130e1 of the external connection terminals 130a to 130e by ultrasonic bonding, the vibration of the external connection terminals 130a to 130e due to ultrasonic vibration is suppressed. Become. Thereby, the wires 140a-140e can be reliably joined to the internal connection portions 130a1-130e1 of the external connection terminals 130a-130e.

さらに、樹脂ケース150に封止樹脂160を充填すると、溝部152a〜152gに封止樹脂160が入り込み、樹脂ケース150に対する封止樹脂160の密着面積が増加して、封止樹脂160の密着性が向上し、外部からの水分の浸入が防止される。   Further, when the resin case 150 is filled with the sealing resin 160, the sealing resin 160 enters the grooves 152a to 152g, the adhesion area of the sealing resin 160 to the resin case 150 is increased, and the adhesion of the sealing resin 160 is improved. And the ingress of moisture from the outside is prevented.

したがって、半導体装置100の信頼性の低下が抑制されるようになる。
[第2の実施の形態]
第2の実施の形態では、半導体装置において、溝部の、外部接続端子の内部接続部に隣接する各範囲内に、振動抑制部を複数配置した場合について、図7を用いて説明する。
Therefore, a decrease in the reliability of the semiconductor device 100 is suppressed.
[Second Embodiment]
In the second embodiment, a case where a plurality of vibration suppression units are arranged in each range adjacent to the internal connection part of the external connection terminal in the semiconductor device will be described with reference to FIG.

図7は、第2の実施の形態の半導体装置の要部上面図である。
図7に示す半導体装置200は、振動抑制部以外は半導体装置100と同様の構成を成している。
FIG. 7 is a top view of an essential part of the semiconductor device according to the second embodiment.
The semiconductor device 200 shown in FIG. 7 has the same configuration as that of the semiconductor device 100 except for the vibration suppressing unit.

なお、図7では、半導体装置200の外部接続端子130d付近を拡大して表している。
半導体装置200では、溝部152fの、外部接続端子130dの内部接続部130d1に隣接する範囲内に、複数の振動抑制部153da〜153dfが配置されている。なお、この場合の振動抑制部153da〜153dfの上面の位置は、第1の実施の形態の振動抑制部153a〜153eと同様に、底面部151に配置された内部接続部130d1の上面以上、側面部154の上面以下である。
In FIG. 7, the vicinity of the external connection terminal 130d of the semiconductor device 200 is shown in an enlarged manner.
In the semiconductor device 200, a plurality of vibration suppressing portions 153da to 153df are disposed in a range of the groove portion 152f adjacent to the internal connection portion 130d1 of the external connection terminal 130d. In this case, the positions of the upper surfaces of the vibration suppression units 153da to 153df are equal to or higher than the upper surface of the internal connection unit 130d1 disposed on the bottom surface unit 151, similarly to the vibration suppression units 153a to 153e of the first embodiment. It is below the upper surface of the part 154.

この場合において、樹脂ケース150に封止樹脂160を充填すると、振動抑制部153da〜153dfの間に封止樹脂160が充填される。
なお、外部接続端子130a〜130dの厚さは0.5mmとする。
In this case, when the resin case 150 is filled with the sealing resin 160, the sealing resin 160 is filled between the vibration suppressing portions 153da to 153df.
The thickness of the external connection terminals 130a to 130d is 0.5 mm.

すなわち、複数の振動抑制部153da〜153dfの間隔Iを空けて配置することで、超音波接合時の外部接続端子130a〜130eの振動を確実に抑制しつつ、樹脂ケース150に対する封止樹脂160の密着面積の減少を抑制することができるようになる。   That is, by arranging the plurality of vibration suppressing portions 153 da to 153 df at an interval I, the vibration of the external connection terminals 130 a to 130 e at the time of ultrasonic bonding can be reliably suppressed, and the sealing resin 160 with respect to the resin case 150 can be prevented. A reduction in the contact area can be suppressed.

但し、振動抑制部153da〜153dfは、その隙間が狭すぎると、振動抑制部153da〜153dfの間に封止樹脂160が適切に充填されないおそれがある。このため、振動抑制部153da〜153dfの間隔Iは、少なくとも、0.5mm程度以上は空けることを必要とする。   However, if the clearance between the vibration suppression units 153da to 153df is too narrow, the sealing resin 160 may not be appropriately filled between the vibration suppression units 153da to 153df. For this reason, the interval I between the vibration suppressing portions 153da to 153df needs to be at least about 0.5 mm or more.

また、振動抑制部153daと外部接続端子130dの外部接続部130d2との間隔Iが狭すぎると、上記と同様に、この間隔Iに封止樹脂160が適切に充填されないおそれがある。この場合、樹脂ケース150に対する封止樹脂160の密着性が低下して、外部接続端子130dの外部接続部130d2が延出する側面部154の隙間を十分に封止することができなくなる場合がある。すると、外部接続部130d2が延出する側面部154の隙間から外部により水分が浸入してしまい、半導体装置200の故障等が生じ、半導体装置200の信頼性が低下してしまう。このため、振動抑制部153daと外部接続端子130dの外部接続部130d2との間に、(図7中横方向の)長さが、0.5mm程度以上のスペース156を設けることを必要とする。   In addition, if the interval I between the vibration suppressing portion 153da and the external connection portion 130d2 of the external connection terminal 130d is too narrow, the sealing resin 160 may not be properly filled in the interval I as described above. In this case, the adhesiveness of the sealing resin 160 to the resin case 150 is lowered, and the gap between the side surface portions 154 where the external connection portions 130d2 of the external connection terminals 130d extend may not be sufficiently sealed. . Then, moisture enters from the outside through the gap of the side surface portion 154 from which the external connection portion 130d2 extends, resulting in a failure of the semiconductor device 200 and the reliability of the semiconductor device 200. For this reason, it is necessary to provide a space 156 having a length (in the horizontal direction in FIG. 7) of about 0.5 mm or more between the vibration suppressing portion 153da and the external connection portion 130d2 of the external connection terminal 130d.

なお、外部接続端子130a〜130c,130eに対して溝部152a,152b,152d,152gにも、上記同様に、複数の振動抑制部を配置することが可能である。
このように半導体装置200では、複数の振動抑制部が、溝部152a,152b,152d,152f,152gの、外部接続端子130a〜130eの内部接続部130a1〜130e1に隣接する範囲内に、少なくとも、0.5mm程度以上の間隔Iを空けてそれぞれ備えられる。
In addition, it is possible to arrange | position a some vibration suppression part also to the groove part 152a, 152b, 152d, 152g with respect to the external connection terminals 130a-130c, 130e similarly to the above.
As described above, in the semiconductor device 200, the plurality of vibration suppressing portions are at least 0 within the range of the groove portions 152a, 152b, 152d, 152f, and 152g adjacent to the internal connection portions 130a1 to 130e1 of the external connection terminals 130a to 130e. Each is provided with an interval I of about 5 mm or more.

これにより、ワイヤ140a〜140dを外部接続端子130a〜130eに超音波接合する際の超音波の振動に伴う外部接続端子130a〜130eの振動を確実に抑制しつつ、樹脂ケース150に対する封止樹脂160の密着面積の減少を抑制することができる。このため、これにより、外部接続端子130a〜130eの内部接続部130a1〜130e1にワイヤ140a〜140eを確実に接合することができ、樹脂ケース150に対する封止樹脂160の密着性の低下を抑制することができる。   Accordingly, the sealing resin 160 for the resin case 150 is reliably suppressed while suppressing the vibration of the external connection terminals 130a to 130e due to the ultrasonic vibration when the wires 140a to 140d are ultrasonically bonded to the external connection terminals 130a to 130e. It is possible to suppress a decrease in the adhesion area. For this reason, this makes it possible to reliably bond the wires 140a to 140e to the internal connection portions 130a1 to 130e1 of the external connection terminals 130a to 130e, and to suppress a decrease in the adhesion of the sealing resin 160 to the resin case 150. Can do.

また、このような振動抑制部は、外部接続端子130a〜130eの外部接続部130a2〜130e2から、少なくとも、0.5mm程度以上の間隔Iを空けて上記範囲内に備えられる。   Moreover, such a vibration suppression part is provided in the said range at intervals of about 0.5 mm or more from the external connection parts 130a2-130e2 of the external connection terminals 130a-130e.

なお、第2の実施の形態では外部接続端子130a〜130dの厚さを0.5mmとし、間隔Iを0.5mm以上空けているがこれに限定されるものでなく、間隔Iが外部接続端子130a〜130dの厚さ以上であれば、溝部152a〜152g内に封止樹脂160を充填することができ、樹脂ケース150と封止樹脂160の密着性を保ち、水分の浸入を防止することができる。   In the second embodiment, the thickness of the external connection terminals 130a to 130d is 0.5 mm and the interval I is 0.5 mm or more. However, the present invention is not limited to this, and the interval I is the external connection terminal. If the thickness is 130a to 130d or more, the sealing resin 160 can be filled in the groove portions 152a to 152g, the adhesion between the resin case 150 and the sealing resin 160 can be maintained, and the intrusion of moisture can be prevented. it can.

これにより、外部接続端子130a〜130eの外部接続部130a2〜130e2の溝部152a,152b,152d,152gに沿った外部接続部130a2〜130e2の両側を確実に封止することができるようになる。このため、外部接続部130a2〜130e2が延出する側面部154の隙間を塞ぐことができ、当該隙間に対する外部からの水分の浸入を防止することができる。   As a result, both sides of the external connection portions 130a2 to 130e2 along the grooves 152a, 152b, 152d, and 152g of the external connection portions 130a2 to 130e2 of the external connection terminals 130a to 130e can be reliably sealed. For this reason, the clearance gap between the side surface parts 154 from which the external connection portions 130a2 to 130e2 extend can be closed, and moisture from the outside can be prevented from entering the clearance.

したがって、半導体装置200の信頼性の低下が抑制されるようになる。   Therefore, a decrease in the reliability of the semiconductor device 200 is suppressed.

100,200 半導体装置
110 積層基板
111 絶縁板
112a,112b,112c,112d,112e 回路板
113 金属板
120a,120b 半導体素子
120c 制御素子
130a,130b,130c,130d,130e 外部接続端子
130a1,130b1,130c1,130d1,130e1 内部接続部
130a2,130b2,130c2,130d2,130e2 外部接続部
140a,140b,140c,140d,140e ワイヤ
150 樹脂ケース
151 底面部
152a,152b,152c,152d,152e,152f,152g 溝部
153a,153b,153c,153d,153e,153da,153db,153dc,153dd,153de,153df 振動抑制部
154 側面部
155 開口部
156 スペース
160 封止樹脂
D 深さ
W 幅
I 間隔
100, 200 Semiconductor device 110 Multilayer substrate 111 Insulating plate 112a, 112b, 112c, 112d, 112e Circuit board 113 Metal plate 120a, 120b Semiconductor element 120c Control element 130a, 130b, 130c, 130d, 130e External connection terminal 130a1, 130b1, 130c1 , 130d1, 130e1 Internal connection part 130a2, 130b2, 130c2, 130d2, 130e2 External connection part 140a, 140b, 140c, 140d, 140e Wire 150 Resin case 151 Bottom surface part 152a, 152b, 152c, 152d, 152e, 152f, 152g Groove part 153a , 153b, 153c, 153d, 153e, 153da, 153db, 153dc, 153dd, 153de, 153df Vibration suppression unit 154 Side 155 Opening 156 Space 160 Sealing resin D Depth W Width I Interval

Claims (7)

絶縁板と、前記絶縁板上に配置された回路板と、を有する積層基板と、
中央部に形成された開口部に前記積層基板が配置された底面部と、前記底面部の周囲に沿って設けられた側面部と、前記底面部上に前記積層基板の周縁に対して平行に設けられ、前記回路板とワイヤで接続される内部接続部及び前記内部接続部に接続され、前記側面部から外部に延出する外部接続部を有する外部接続端子と、を備え、前記底面部の周縁に沿って前記外部接続部の両側に溝部が形成されたケースと、
前記溝部の、前記内部接続部に隣接する範囲内に形成された振動抑制部と、
を有する半導体装置。
A laminated substrate having an insulating plate and a circuit board disposed on the insulating plate;
A bottom surface portion in which the multilayer substrate is disposed in an opening formed in a central portion, a side surface portion provided along the periphery of the bottom surface portion, and on the bottom surface portion in parallel to the periphery of the multilayer substrate Provided with an internal connection portion connected to the circuit board with a wire and an external connection terminal connected to the internal connection portion and having an external connection portion extending from the side surface portion to the outside. A case in which grooves are formed on both sides of the external connection portion along the periphery;
A vibration suppressing portion formed in a range of the groove portion adjacent to the internal connection portion;
A semiconductor device.
前記ケース内に充填されて、前記積層基板、前記ワイヤ、前記外部接続端子の前記内部接続部を封止する封止樹脂、
をさらに有する請求項1記載の半導体装置。
A sealing resin that fills the case and seals the internal connection portion of the multilayer substrate, the wire, and the external connection terminal;
The semiconductor device according to claim 1, further comprising:
前記振動抑制部は、前記範囲内の、前記内部接続部に接続された前記ワイヤの接合箇所に対向する位置に備えられている、
請求項1または2に記載の半導体装置。
The vibration suppressing unit is provided in a position facing the bonding portion of the wire connected to the internal connection unit within the range.
The semiconductor device according to claim 1.
前記振動抑制部は、前記底面部に一体成形されている、
請求項1乃至3のいずれかに記載の半導体装置。
The vibration suppressing portion is integrally formed with the bottom surface portion.
The semiconductor device according to claim 1.
前記振動抑制部の上面は、前記内部接合部の上面以上、前記側面部の上面以下である、
請求項1乃至4のいずれかに記載の半導体装置。
The upper surface of the vibration suppressing portion is not less than the upper surface of the internal joint portion and not more than the upper surface of the side surface portion.
The semiconductor device according to claim 1.
複数の前記振動抑制部が、前記範囲内に第1間隔を空けてそれぞれ備えられている、
請求項1乃至5のいずれかに記載の半導体装置。
A plurality of the vibration suppression units are respectively provided with a first interval in the range,
The semiconductor device according to claim 1.
前記振動抑制部は、前記外部接続部から第2間隔を空けて前記範囲内に備えられている、
請求項6記載の半導体装置。
The vibration suppression unit is provided in the range with a second interval from the external connection unit,
The semiconductor device according to claim 6.
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