JP2017168714A - Method of manufacturing light emitting device - Google Patents

Method of manufacturing light emitting device Download PDF

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JP2017168714A
JP2017168714A JP2016053590A JP2016053590A JP2017168714A JP 2017168714 A JP2017168714 A JP 2017168714A JP 2016053590 A JP2016053590 A JP 2016053590A JP 2016053590 A JP2016053590 A JP 2016053590A JP 2017168714 A JP2017168714 A JP 2017168714A
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electrode
silicon oxide
semiconductor element
substrate
semiconductor
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JP2017168714A5 (en
JP6736923B2 (en
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優 東原
Yu Higashihara
優 東原
健作 ▲濱▼田
健作 ▲濱▼田
Kensaku Hamada
健太 梅鶯
Kenta Baio
健太 梅鶯
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Nichia Chemical Industries Ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484Connecting portions
    • H01L2224/48463Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48465Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/78Apparatus for connecting with wire connectors
    • H01L2224/7825Means for applying energy, e.g. heating means
    • H01L2224/783Means for applying energy, e.g. heating means by means of pressure
    • H01L2224/78301Capillary
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319Arrangement of the layer connectors prior to mounting
    • H01L2224/83192Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/8512Aligning
    • H01L2224/85148Aligning involving movement of a part of the bonding apparatus
    • H01L2224/85169Aligning involving movement of a part of the bonding apparatus being the upper part of the bonding apparatus, i.e. bonding head, e.g. capillary or wedge
    • H01L2224/8518Translational movements
    • H01L2224/85181Translational movements connecting first on the semiconductor or solid-state body, i.e. on-chip, regular stitch
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/91Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
    • H01L2224/92Specific sequence of method steps
    • H01L2224/922Connecting different surfaces of the semiconductor or solid-state body with connectors of different types
    • H01L2224/9222Sequential connecting processes
    • H01L2224/92242Sequential connecting processes the first connecting process involving a layer connector
    • H01L2224/92247Sequential connecting processes the first connecting process involving a layer connector the second connecting process involving a wire connector

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  • Drying Of Semiconductors (AREA)
  • Wire Bonding (AREA)
  • Led Device Packages (AREA)

Abstract

PROBLEM TO BE SOLVED: To provide a method for suppressing discoloration of an electrode of a semiconductor element.SOLUTION: The method of manufacturing semiconductor device includes steps of: preparing a semiconductor element having an electrode on its upper surface; covering the entire surface of the electrode with silicon oxide; performing plasma treatment of the silicon oxide with a mixed gas containing argon and fluorocarbon to remove the silicon oxide to expose the electrode; and bonding a metal member on the exposed electrode.SELECTED DRAWING: Figure 2

Description

本発明は発光装置の製造方法に関する。   The present invention relates to a method for manufacturing a light emitting device.

半導体発光素子(以下、発光素子)を用いたLED(Light Emitting Diode、発光ダイオード)が知られている。発光素子は半導体層と電極とを備えており、発光素子の電極と基板の配線とは、ワイヤ等の導電部材を介して電気的に接続される。発光素子の電極または基板の配線は、それらの表面をプラズマ処理することが知られている(例えば、特許文献1)。   2. Description of the Related Art LEDs (Light Emitting Diodes) using semiconductor light emitting elements (hereinafter referred to as light emitting elements) are known. The light emitting element includes a semiconductor layer and an electrode, and the electrode of the light emitting element and the wiring of the substrate are electrically connected via a conductive member such as a wire. It is known that the electrode of the light emitting element or the wiring of the substrate is subjected to plasma treatment on the surface thereof (for example, Patent Document 1).

特開2014−17816号公報JP 2014-17816 A

特許文献1には、フルオロカーボンを含む混合ガスのプラズマにより汚染物を除去することが開示されている。しかしながら、プラズマ条件によっては、電極が変色する場合がある。   Patent Document 1 discloses that contaminants are removed by plasma of a mixed gas containing a fluorocarbon. However, depending on the plasma conditions, the electrode may change color.

上記課題を解決するため、本発明の実施形態は、以下の構成を含む。
上面に電極を備えた半導体素子を準備する工程と、電極の全面をケイ素酸化物で被覆する工程と、ケイ素酸化物を、アルゴン及びフルオロカーボンを含む混合ガスを用いてプラズマ処理し、ケイ素酸化物を除去することで前記電極を露出させる工程と、露出された電極上に金属部材を接合させる工程と、を備える半導体装置の製造方法。
In order to solve the above-described problems, an embodiment of the present invention includes the following configuration.
A step of preparing a semiconductor element having an electrode on its upper surface, a step of covering the entire surface of the electrode with silicon oxide, a silicon oxide is plasma-treated using a mixed gas containing argon and fluorocarbon, A method of manufacturing a semiconductor device, comprising: removing the electrode by removing; and bonding a metal member on the exposed electrode.

以上により、電極の変色を抑制することができる。   As described above, discoloration of the electrode can be suppressed.

図1は、実施形態に係る半導体装置の製造方法の概略図である。FIG. 1 is a schematic view of a method for manufacturing a semiconductor device according to an embodiment. 図2は、実施形態に係る半導体装置の製造方法の概略図である。FIG. 2 is a schematic view of the method for manufacturing the semiconductor device according to the embodiment. 図3は、実施形態に係る半導体装置の製造方法の概略図である。FIG. 3 is a schematic view of the method for manufacturing the semiconductor device according to the embodiment. 図4は、実施形態に係る半導体装置の製造方法の概略図である。FIG. 4 is a schematic view of the method for manufacturing the semiconductor device according to the embodiment. 図5は、実施形態に係る半導体装置の製造方法の概略図である。FIG. 5 is a schematic view of the method for manufacturing the semiconductor device according to the embodiment.

本発明を実施するための形態を、以下に図面を参照しながら説明する。ただし、以下に示す形態は、本発明の技術思想を具体化するための発光装置の製造方法を例示するものであって、本発明は、発光装置の製造方法を以下に限定するものではない。   A mode for carrying out the present invention will be described below with reference to the drawings. However, the form shown below illustrates the manufacturing method of the light-emitting device for materializing the technical idea of this invention, and this invention does not limit the manufacturing method of a light-emitting device below.

また、本明細書は、特許請求の範囲に示される部材を、実施の形態の部材に特定するものでは決してない。特に、実施の形態に記載されている構成部品の寸法、材質、形状、その相対的配置等は、特定的な記載がない限りは、本発明の範囲をそれのみに限定する趣旨ではない。尚、各図面が示す部材の大きさや位置関係等は、説明を明確にするため誇張していることがある。さらに以下の説明において、同一の名称、符号については同一もしくは同質の部材を示しており、詳細説明を適宜省略する。   Further, the present specification by no means specifies the member shown in the claims as the member of the embodiment. In particular, the dimensions, materials, shapes, relative arrangements, and the like of the component parts described in the embodiments are not intended to limit the scope of the present invention only to that extent unless otherwise specified. It should be noted that the size and positional relationship of the members shown in each drawing may be exaggerated for clarity of explanation. Furthermore, in the following description, the same name and symbol indicate the same or the same members, and detailed description thereof will be omitted as appropriate.

(半導体素子を準備する工程)
上面に電極を備えた半導体素子を準備する。半導体素子としては、半導体発光素子(LED素子、レーザ素子)、受光素子、保護素子、トランジスタ等が挙げられる。半導体素子は、半導体層と一対の電極となるp電極及びn電極とを備える。
(Process for preparing semiconductor elements)
A semiconductor element having an electrode on its upper surface is prepared. Examples of semiconductor elements include semiconductor light emitting elements (LED elements, laser elements), light receiving elements, protective elements, transistors, and the like. The semiconductor element includes a semiconductor layer and a p-electrode and an n-electrode that form a pair of electrodes.

半導体発光素子の半導体層としては、例えば、紫外光、青色光、緑色光の発光素子としては、ZnSeや窒化物系半導体(InAlGa1−X−YN、0≦X、0≦Y、X+Y≦1)を用いたものを用いることができる。また、赤色の発光素子としては、GaAs、InPなどを用いることができる。受光素子の半導体層としてはGaAs、InGaAsなどが挙げられる。保護素子としてはツェナーダイオードなどが挙げられ、例えば、ツェナーダイオードの半導体層としては、Si、Geなどが挙げられる。 As a semiconductor layer of the semiconductor light emitting device, for example, as a light emitting device for ultraviolet light, blue light, and green light, ZnSe or nitride semiconductor (In X Al Y Ga 1- XYN, 0 ≦ X, 0 ≦ Those using Y, X + Y ≦ 1) can be used. As the red light emitting element, GaAs, InP, or the like can be used. Examples of the semiconductor layer of the light receiving element include GaAs and InGaAs. Examples of the protective element include a Zener diode, and examples of the semiconductor layer of the Zener diode include Si and Ge.

半導体素子の電極は、半導体層の同一面側に一対、または、対向する面に少なくとも一対配置されている。これらの一対の電極は、それらが設けられる半導体層と、それぞれ電流−電圧特性が直線または略直線となるようなオーミック接続されるものであればよい。各電極は単層構造でもよいし、積層構造でもよい。また、電極は、半導体層と接してオーミック接続される全面電極(半導体層の上面または下面の略全面を覆う電極)と、そのオーミック電極上に形成されるパッド電極(ワイヤが接続される電極)など、複数の機能に分けられた構造の電極とすることができる。このような構造の場合、金属部材と接合される部分の電極の汚染物を除去することができればよい。   A pair of electrodes of the semiconductor element are arranged on the same surface side of the semiconductor layer, or at least a pair of electrodes on opposite surfaces. The pair of electrodes may be any ohmic connection with the semiconductor layer in which the electrodes are provided so that the current-voltage characteristics are linear or substantially linear. Each electrode may have a single layer structure or a laminated structure. In addition, the electrodes are a whole surface electrode that is in ohmic contact with the semiconductor layer (an electrode that covers substantially the entire upper or lower surface of the semiconductor layer), and a pad electrode that is formed on the ohmic electrode (an electrode to which a wire is connected). For example, the electrode can be divided into a plurality of functions. In the case of such a structure, it is only necessary that contaminants on the electrode joined to the metal member can be removed.

半導体素子の電極としては、当該分野で公知の材料を用いることができる。例えば、Au、Ag、Cuなどが挙げられる。   As the electrode of the semiconductor element, a material known in this field can be used. For example, Au, Ag, Cu, etc. are mentioned.

(電極の全面をケイ素酸化物で被覆する工程)
半導体素子を、電極を有する上面を上にして基板上に載置する。1つの基板に複数の半導体素子を載置することができる。
(Process for coating the entire surface of the electrode with silicon oxide)
The semiconductor element is placed on the substrate with the upper surface having the electrodes facing upward. A plurality of semiconductor elements can be mounted on one substrate.

半導体素子を載置する基板は、半導体装置の一部を構成する基板を用いることができる。例えば、半導体装置の電極及び基体を構成する基板を用いることができる。このような基板としては、リードを備えた樹脂パッケージ、配線を備えたセラミック基板、配線を備えたガラスエポキシ基板、配線を備えた可撓性基板等が挙げられる。   As the substrate on which the semiconductor element is mounted, a substrate that forms part of the semiconductor device can be used. For example, a substrate constituting an electrode and a base of a semiconductor device can be used. Examples of such a substrate include a resin package having leads, a ceramic substrate having wiring, a glass epoxy substrate having wiring, a flexible substrate having wiring, and the like.

また、半導体素子を載置する基板は、後工程で除去することで半導体装置の構成には含まれない基板を用いることができる。例えば、ウエハシート、搬送用基板など、作業工程内においてのみ用いられる基板が挙げられる。   Further, the substrate on which the semiconductor element is mounted can be a substrate that is not included in the structure of the semiconductor device by being removed in a later process. For example, a substrate used only in a work process, such as a wafer sheet and a transfer substrate, can be used.

上述で挙げた基板は、1枚の基板に1個または複数個の半導体素子を載置することができ、半導体素子の数や配置、さらに組成などについては適宜選択することができる。   One or a plurality of semiconductor elements can be mounted on one substrate, and the number and arrangement of the semiconductor elements, and the composition can be selected as appropriate.

上記のように基板上に載置された半導体素子の電極の全面をケイ素酸化物で被覆する工程としては、a)プラズマ照射、b)スパッタ、c)蒸着等が挙げられる。   Examples of the step of covering the entire surface of the electrode of the semiconductor element placed on the substrate with silicon oxide as described above include a) plasma irradiation, b) sputtering, and c) vapor deposition.

a)プラズマ照射でケイ素酸化物を形成
図1(a)〜図2(b)を用いて、ケイ素酸化物を形成する工程について説明する。ここでは、最終的に半導体装置の一部を構成する基板10上に載置された半導体素子20の電極24に、ケイ素酸化物を形成する工程について説明する。
a) Formation of silicon oxide by plasma irradiation A process of forming silicon oxide will be described with reference to FIGS. 1 (a) to 2 (b). Here, a process of forming silicon oxide on the electrode 24 of the semiconductor element 20 that is finally placed on the substrate 10 constituting a part of the semiconductor device will be described.

図1(a)に示すように、接合部材30が配置された基板10と、半導体素子20と、を準備する。接合部材30は、半導体素子20の底面積よりも大きな面積で設けることが好ましい。例えば、半導体素子20の底面積の0.5〜2倍程度とすることが好ましい。接合部材30の形成方法は、溶融状態の接合部材を滴下、ポッティング、転写、印刷、スプレー等によって目的とする位置に形成する。1枚の基板10には、複数個の半導体素子20が載置可能であり、ここでは半導体素子20を2つ例示して説明する。複数個所に形成される接合部材30は、それぞれ離間するように設けられ。   As shown in FIG. 1A, a substrate 10 on which a bonding member 30 is disposed and a semiconductor element 20 are prepared. The bonding member 30 is preferably provided with an area larger than the bottom area of the semiconductor element 20. For example, the bottom area of the semiconductor element 20 is preferably about 0.5 to 2 times. As a method for forming the bonding member 30, a molten bonding member is formed at a target position by dropping, potting, transfer, printing, spraying, or the like. A plurality of semiconductor elements 20 can be mounted on one substrate 10, and two semiconductor elements 20 will be described as an example here. The joining members 30 formed at a plurality of locations are provided so as to be separated from each other.

接合部材30として、シリコーン系樹脂部材を用いる。詳細には、ジメチルシリコーン樹脂、シリコーン変性エポキシ樹脂などが挙げられる。   A silicone resin member is used as the bonding member 30. In detail, a dimethyl silicone resin, a silicone modified epoxy resin, etc. are mentioned.

次いで、図1(b)に示すように、接合部材30上に半導体素子20を載置する。半導体素子は半導体層22の上面に電極24を備えており、この上面が上側になるように基板10上に載置される。半導体素子20を載置する際に、上方から押圧することで接合部材30の一部を変形させる。これにより、接合部材30は半導体素子20の下面及び半導体素子20の側面の一部と接するように設けられる。   Next, as shown in FIG. 1B, the semiconductor element 20 is placed on the bonding member 30. The semiconductor element includes an electrode 24 on the upper surface of the semiconductor layer 22 and is placed on the substrate 10 so that the upper surface is on the upper side. When the semiconductor element 20 is placed, a part of the bonding member 30 is deformed by pressing from above. Accordingly, the bonding member 30 is provided so as to be in contact with the lower surface of the semiconductor element 20 and a part of the side surface of the semiconductor element 20.

次いで、図2(a)に示すように密封可能な保管容器40内に基板10ごと収容して保管する。保管条件としては、例えば、保管容器内の温度は約23℃〜80℃、保管容器内の圧力は10Pa〜大気圧、保管容器内の湿度は10%〜85%、保管容器内での保管時間は0.5時間以上が挙げられる。また、保管容器内は、空気の他、一般的な不活性ガス等で充填されている。   Next, as shown in FIG. 2A, the substrate 10 is housed and stored in a sealable storage container 40. As storage conditions, for example, the temperature in the storage container is about 23 ° C. to 80 ° C., the pressure in the storage container is 10 Pa to atmospheric pressure, the humidity in the storage container is 10% to 85%, and the storage time in the storage container For 0.5 hour or longer. Further, the inside of the storage container is filled with a general inert gas or the like in addition to air.

シリコーン系樹脂(接合部材30)は、シリコーン樹脂を主成分としており、約90℃〜180℃程度の温度で加熱することで硬化する性質を備える。上述のような保管条件、特に約23℃〜80℃程度の温度という、シリコーン系樹脂部材の硬化温度より低い温度での保管条件では、シリコーン系樹脂部材は完全に硬化することはない。しかしながら、このような低温の保管条件であっても、主成分のシリコーン樹脂に加え揮発成分を含むシリコーン系樹脂部材からは、シロキサンを含む成分が揮発する。すなわち、図2(a)に示すように、ケイ素含有揮発物30aが保管容器40内において生成され、接合部材30から離れて保管容器40の空間内に飛散する。   The silicone-based resin (joining member 30) has a silicone resin as a main component and has a property of being cured by heating at a temperature of about 90 ° C. to 180 ° C. Under the storage conditions as described above, in particular, the storage conditions at a temperature lower than the curing temperature of the silicone resin member, such as a temperature of about 23 ° C. to 80 ° C., the silicone resin member will not be completely cured. However, even under such low-temperature storage conditions, a component containing siloxane volatilizes from a silicone resin member containing a volatile component in addition to the main component silicone resin. That is, as shown in FIG. 2A, the silicon-containing volatiles 30 a are generated in the storage container 40 and scattered away from the joining member 30 into the space of the storage container 40.

飛散したケイ素含有揮発物30aは、周辺にある別の部材、すなわち、基板及び半導体素子の表面に付着する。付着した後、再度揮発する場合もあるが、そのまま付着した状態となり、薄い被膜を形成する。このようにして、図2(b)に示すように、半導体素子20の電極24の表面の略全面を覆うようにケイ素含有揮発物30aを設けることができる。   The scattered silicon-containing volatile material 30a adheres to another member in the periphery, that is, the surface of the substrate and the semiconductor element. After adhering, it may volatilize again, but it remains adhering and forms a thin film. In this way, as shown in FIG. 2B, the silicon-containing volatile material 30a can be provided so as to cover substantially the entire surface of the electrode 24 of the semiconductor element 20.

尚、上述した保管条件は、接合部材として用いたシリコーン系樹脂部材から、ケイ素を含む成分が揮発することが可能な保管条件の一例である。保管容器の大きさや、その内部に載置される半導体素子の電極の組成や形状、さらに、シリコーン系樹脂の量や配置(半導体素子の電極との距離)によっては、上述の範囲に限らず、適した条件下において保管することができる。   In addition, the storage conditions mentioned above are an example of the storage conditions which can volatilize the component containing silicon from the silicone type resin member used as a joining member. Depending on the size of the storage container, the composition and shape of the electrode of the semiconductor element placed inside, and the amount and arrangement of the silicone resin (distance from the electrode of the semiconductor element), not limited to the above range, It can be stored under suitable conditions.

上述の保管条件で保管し、半導体素子の電極の略全面がケイ素含有揮発物で覆われた後に、プラズマ処理を行う。   After storing under the above-mentioned storage conditions and substantially covering the entire surface of the electrode of the semiconductor element with the silicon-containing volatile material, plasma treatment is performed.

図3にプラズマ処理装置の概略図を示す。プラズマ処理装置50は、上部電極52及び下部電極53を備えたチャンバ51と、キャリアガス及びプラズマガスを供給する開閉バルブ54と、チャンバ51内の圧力を制御する減圧ポンプ55と、高周波電源56と、を備える。   FIG. 3 shows a schematic diagram of the plasma processing apparatus. The plasma processing apparatus 50 includes a chamber 51 having an upper electrode 52 and a lower electrode 53, an open / close valve 54 for supplying a carrier gas and a plasma gas, a decompression pump 55 for controlling the pressure in the chamber 51, and a high-frequency power source 56. .

チャンバ51内に、ケイ素含有揮発物30aが付着した電極24を含む半導体素子20及び基板10を、基板10ごと載置する。その後、開閉バルブ54を通じて、アルゴン(Ar)を含むガスをチャンバ51内に注入する。チャンバ51内の圧力を、8Pa〜25Paとし、次いで、高周波電界を発生させてアルゴンプラズマを生成させる。生成されたアルゴンプラズマを、電極24を備えた半導体素子20及び基板10の表面に照射することで、ケイ素含有揮発物30aがケイ素酸化物30bへと変化する。これにより、半導体素子20の上面に形成される電極24の表面の略全面を、図4に示すように、ケイ素酸化物30bで被覆することができる。得られるケイ素酸化物30bは、例えば、膜厚25Å以下である。このような膜厚とすることで、後工程のアルゴン及びフルオロカーボンを含む混合ガスのプラズマで、容易に除去することができる。尚、プラズマ条件によっては、これよりも厚い膜厚のケイ素酸化物であっても除去することが可能である。   The semiconductor element 20 and the substrate 10 including the electrode 24 to which the silicon-containing volatile material 30a is attached are placed in the chamber 51 together with the substrate 10. Thereafter, a gas containing argon (Ar) is injected into the chamber 51 through the opening / closing valve 54. The pressure in the chamber 51 is set to 8 Pa to 25 Pa, and then a high frequency electric field is generated to generate argon plasma. By irradiating the generated argon plasma onto the surfaces of the semiconductor element 20 and the substrate 10 provided with the electrodes 24, the silicon-containing volatiles 30a are changed into silicon oxides 30b. Thereby, substantially the entire surface of the electrode 24 formed on the upper surface of the semiconductor element 20 can be covered with the silicon oxide 30b as shown in FIG. The obtained silicon oxide 30b has a film thickness of 25 mm or less, for example. By setting it as such a film thickness, it can remove easily with the plasma of the mixed gas containing argon and fluorocarbon of a post process. Depending on the plasma conditions, even a silicon oxide having a film thickness larger than this can be removed.

以上のように、半導体素子の電極を被覆するケイ素酸化物の原料であるシリコーン系樹脂部材を、半導体素子と基板との接合部材として用いることで、新たに工程を増やすことなく、保管条件を管理するだけで、ケイ素酸化物を形成することができる。   As described above, by using a silicone-based resin member, which is a raw material of silicon oxide that covers the electrodes of the semiconductor element, as a bonding member between the semiconductor element and the substrate, storage conditions can be managed without adding new processes. By doing so, a silicon oxide can be formed.

シリコーン系樹脂部材を接合部材として用いる場合、ケイ素酸化物を付着させた状態で加熱して接合部材を硬化させた後に、後述のケイ素酸化物の除去工程を行う。   When using a silicone-based resin member as a bonding member, the silicon oxide is heated in a state in which silicon oxide is adhered to cure the bonding member, and then a silicon oxide removal step described later is performed.

また、ケイ素酸化物の原料となるシリコーン系樹脂部材は、接合部材として用いられるもの以外のものを用いてもよい。例えば、半導体装置の一部となる基板上であって、半導体素子を載置しない場所に配置することができる。あるいは、基板上ではなく、基板を収容する保管容器内にシリコーン系樹脂部材を配置させてもよい。つまり、電極を被覆するケイ素酸化物の原料のみとして用いるシリコーン系樹脂部材を用いてもよい。このような場合は、シリコーン系樹脂部材の特性として、半導体素子と基板との接合性を考慮する必要はない。さらに、最終的に半導体装置に残存しないため、耐光性、耐湿性など、半導体装置に求められる特性を考慮する必要もない。そのため、材料の選択肢を増やすことができる。   In addition, as the silicon-based resin member used as a raw material for silicon oxide, a material other than that used as a bonding member may be used. For example, the semiconductor element can be disposed on a substrate which is a part of the semiconductor device and where no semiconductor element is placed. Alternatively, the silicone resin member may be disposed not in the substrate but in a storage container that accommodates the substrate. That is, you may use the silicone type resin member used only as a raw material of the silicon oxide which coat | covers an electrode. In such a case, it is not necessary to consider the bondability between the semiconductor element and the substrate as a characteristic of the silicone-based resin member. Furthermore, since it does not finally remain in the semiconductor device, it is not necessary to consider characteristics required for the semiconductor device such as light resistance and moisture resistance. Therefore, the choice of materials can be increased.

接合部材以外の部材として用いられるシリコーン樹脂部材は、硬化工程などを必要とせず、ケイ素酸化物を形成した後に除去してもよいし、シリコーン系樹脂部材以外の接合部材を加熱して硬化させる際に、一緒に加熱しても特に問題はない。

Figure 2017168714
The silicone resin member used as a member other than the bonding member does not require a curing step and may be removed after forming the silicon oxide, or when the bonding member other than the silicone resin member is heated and cured. In addition, there is no particular problem even if heated together.
Figure 2017168714

シリコーン系樹脂部材を、基板と半導体素子との接合部材として用いない場合は、接合部材としてエポキシ系樹脂部材、アクリル系樹脂部材などの絶縁性の接合部材や、Agペースト、バンプ、共晶などの導電性の接合部材を用いることができる。そして、このような接合部材を用いて基板上に接合された半導体素子を準備する工程を、上述の半導体素子を準備する工程に換えることができる。   When a silicone resin member is not used as a bonding member between a substrate and a semiconductor element, an insulating bonding member such as an epoxy resin member or an acrylic resin member, an Ag paste, a bump, or a eutectic crystal is used as the bonding member. A conductive bonding member can be used. And the process of preparing the semiconductor element joined on the board | substrate using such a joining member can be changed into the process of preparing the above-mentioned semiconductor element.

b)スパッタでケイ素酸化物を形成
ケイ素含有酸化物は、スパッタにより形成してもよい。上述のa)において基板及び半導体素子を特定の保管条件下において保管する工程及びその後のアルゴンプラズマ照射する工程の代わりに、スパッタでケイ素酸化物を形成する。スパッタは、例えば、真空密閉可能な装置において、ケイ素酸化物を含むターゲットを用いてスパッタする。
b) Formation of silicon oxide by sputtering The silicon-containing oxide may be formed by sputtering. In the above-described a), silicon oxide is formed by sputtering instead of the step of storing the substrate and the semiconductor element under specific storage conditions and the subsequent step of irradiating with argon plasma. Sputtering is performed using, for example, a target containing silicon oxide in a vacuum sealable apparatus.

まず、中間体を搬送用治具に取り付け、その搬送用治具ごとスパッタ装置の密閉室に載置し、高真空状態とする。密閉室内には、SiOのターゲット材が配置されている。次いで、アルゴンガスを密閉室内に導入し、プラズマ放電することにより、アルゴンイオンがターゲット材にぶつかり、ターゲット材から飛び出したSiOが中間体の透光性部材上に付着する。これにより、透光性部材の表面にケイ素含有化合物が形成される。 First, the intermediate body is attached to a transfer jig, and the transfer jig is placed together with the transfer jig in a sealed chamber of the sputtering apparatus to obtain a high vacuum state. A SiO 2 target material is disposed in the sealed chamber. Subsequently, argon gas is introduced into the sealed chamber and plasma discharge is performed, whereby argon ions collide with the target material, and SiO 2 that has jumped out of the target material adheres to the light-transmitting member as an intermediate. Thereby, a silicon-containing compound is formed on the surface of the translucent member.

c)蒸着でケイ素酸化物を形成
また、ケイ素含有酸化物は、蒸着により形成してもよい。上述のa)において基板及び半導体素子を特定の保管条件下において保管する工程及びその後のアルゴンプラズマ照射する工程の代わりに、蒸着によりケイ素酸化物を形成する。
c) Formation of silicon oxide by vapor deposition The silicon-containing oxide may be formed by vapor deposition. In the above a), silicon oxide is formed by vapor deposition instead of the step of storing the substrate and the semiconductor element under specific storage conditions and the subsequent step of irradiating with argon plasma.

まず、中間体を搬送用治具に取り付け、その搬送用治具ごと蒸着装置の密閉室に載置し、高真空状態とする。密閉室内には、SiOの蒸着材が配置されており、高真空状態とすることでSiOが蒸発して中間体の透光性部材上に付着する。これにより、透光性部材の表面にケイ素含有化合物が形成される。 First, the intermediate body is attached to a transfer jig, and the transfer jig is placed together with the transfer jig in a hermetic chamber of the vapor deposition apparatus to obtain a high vacuum state. The enclosed chamber is arranged SiO 2 deposition material, SiO 2 is deposited on the transparent member evaporates intermediate be a high vacuum state. Thereby, a silicon-containing compound is formed on the surface of the translucent member.

ケイ素酸化物を形成する工程を、半導体装置の一部となる基板を用いない場合、すなわち、ウエハシートなどを基板として用いてケイ素酸化物を形成した場合は、後述のケイ素酸化物を除去する工程の前に、半導体装置の一部となる基板に載置させる必要がある。つまり、ケイ素酸化物を形成する際に半導体素子を載置する基板と、ケイ素酸化物を除去する際に半導体素子を載置する基板とを、異なる基板としている。これにより、ケイ素酸化物を形成する際の条件によっては、後の工程で何らかの影響を受ける可能性がある基板を用いることなく、ケイ素酸化物を形成することができる。   The step of forming silicon oxide is a step of removing silicon oxide, which will be described later, when a silicon oxide is formed using a wafer sheet or the like as a substrate when a substrate that is a part of a semiconductor device is not used. Before this, it is necessary to place the substrate on a substrate that becomes a part of the semiconductor device. That is, the substrate on which the semiconductor element is placed when forming the silicon oxide and the substrate on which the semiconductor element is placed when removing the silicon oxide are different substrates. Thereby, depending on the conditions for forming the silicon oxide, the silicon oxide can be formed without using a substrate that may be affected in some way in a later step.

また、上述のように半導体素子の電極を被覆するシロキサン化合物は、半導体素子の電極と接続される金属部材(例えばワイヤやバンプ)の表面を覆ってもよい。   Further, as described above, the siloxane compound that covers the electrode of the semiconductor element may cover the surface of a metal member (for example, a wire or a bump) connected to the electrode of the semiconductor element.

(プラズマ照射してケイ素酸化物を除去する工程)
上述のようにして得られたケイ素酸化物30bで表面を覆われた電極24を備えた半導体素子20を、基板10ごとプラズマ装置内に配置する。プラズマ装置は、上述の設ネイにおいて用いたプラズマ装置と同様のものを用いることができ、ここではプラズマガスの種類をアルゴン(Ar)及びフルオロカーボン(CF)を含む混合ガスを用いる。
(Process to remove silicon oxide by plasma irradiation)
The semiconductor element 20 including the electrode 24 whose surface is covered with the silicon oxide 30b obtained as described above is disposed in the plasma apparatus together with the substrate 10. A plasma apparatus similar to the plasma apparatus used in the above-described installation can be used. Here, a mixed gas containing argon (Ar) and fluorocarbon (CF 4 ) is used as the type of plasma gas.

アルゴンとフルオロカーボンの混合比は、10:90〜90:100の範囲とすることができる。アルゴンとフルオロカーボンの混合ガスのプラズマを照射することで、半導体素子の電極の表面のケイ素酸化物が除去され、電極の表面が露出される。露出された電極は、変色がなく、汚染物が付着していない表面である。   The mixing ratio of argon and fluorocarbon can be in the range of 10:90 to 90: 100. By irradiating plasma of a mixed gas of argon and fluorocarbon, silicon oxide on the surface of the electrode of the semiconductor element is removed, and the surface of the electrode is exposed. The exposed electrode is a surface that is not discolored and free of contaminants.

金属部材の表面にケイ素酸化物を形成させる場合も、上述と同様の混合ガスのプラズマを照射することで、汚染物が付着していない表面を備えた金属部材とすることができる。   Even when silicon oxide is formed on the surface of the metal member, a metal member having a surface to which contaminants are not attached can be obtained by irradiating the same mixed gas plasma as described above.

アルゴン(Ar)とフルオロカーボン(CF)の混合ガスのプラズマを照射することでシロキサン化合物が除去されるメカニズムは、プラズマ照射により、電子、Arイオン、CFラジカルが生成し、これらによってケイ素酸化物中のSi−O間の結合が切断され分解されると考えられことが特許文献1に開示されている。本実施形態では、そのような分解可能なケイ素酸化物を、工程内において意図せずに形成された汚染物ではなく、保護膜として用いるために意図的に形成している。 The mechanism by which the siloxane compound is removed by irradiating plasma of a mixed gas of argon (Ar) and fluorocarbon (CF 4 ) is that electrons, Ar ions, and CF radicals are generated by the plasma irradiation, and these are generated in silicon oxide It is disclosed in Patent Document 1 that it is considered that the bond between Si—O is broken and decomposed. In the present embodiment, such a decomposable silicon oxide is intentionally formed for use as a protective film, not a contaminant formed unintentionally in the process.

(電極上に金属部材を接合させる工程)
ケイ素酸化物を除去し、表面が露出された電極上に、金属部材を接合させる。図5では、金属部材60としてワイヤを用いた例を示している。金属部材としては、ワイヤの他にバンプを用いてもよい。
(Step of joining a metal member on the electrode)
The silicon oxide is removed, and a metal member is bonded onto the electrode whose surface is exposed. FIG. 5 shows an example in which a wire is used as the metal member 60. As the metal member, a bump may be used in addition to the wire.

上述の工程の後、半導体素子を樹脂などで被覆し、基板を切断して個片化することで、半導体装置とすることができる。   After the above-described steps, the semiconductor element is covered with a resin or the like, and the substrate is cut into pieces to obtain a semiconductor device.

本開示の実施形態に係る半導体装置の製造方法は、広範囲の用途に用いられる半導体装置に利用することができる。   The method for manufacturing a semiconductor device according to an embodiment of the present disclosure can be used for a semiconductor device used for a wide range of applications.

10…基板
20…半導体素子
22…半導体層
24…電極
30…接合部材(シリコーン系樹脂部材)
30a…ケイ素含有揮発物
30b…ケイ素酸化物
40…保管容器
50…プラズマ処理装置
51…チャンバ
52…上部電極
53…下部電極
54…開閉バルブ
55…減圧ポンプ
56…高周波電源
60…金属部材
DESCRIPTION OF SYMBOLS 10 ... Board | substrate 20 ... Semiconductor element 22 ... Semiconductor layer 24 ... Electrode 30 ... Joining member (silicone resin member)
30a ... Silicon-containing volatiles 30b ... Silicon oxide 40 ... Storage container 50 ... Plasma processing apparatus 51 ... Chamber 52 ... Upper electrode 53 ... Lower electrode 54 ... Opening / closing valve 55 ... Pressure reducing pump 56 ... High frequency power supply 60 ... Metal member

Claims (3)

上面に電極を備えた半導体素子を準備する工程と、
前記電極の全面をケイ素酸化物で被覆する工程と、
前記ケイ素酸化物を、アルゴン及びフルオロカーボンを含む混合ガスを用いてプラズマ処理し、前記ケイ素酸化物を除去することで前記電極を露出させる工程と、
前記露出された前記電極上に金属部材を接合させる工程と、
を備える半導体装置の製造方法。
Preparing a semiconductor element having an electrode on the upper surface;
Coating the entire surface of the electrode with silicon oxide;
Plasma-treating the silicon oxide using a mixed gas containing argon and fluorocarbon, and removing the silicon oxide to expose the electrode;
Bonding a metal member onto the exposed electrode;
A method for manufacturing a semiconductor device comprising:
前記ケイ素酸化物は、シリコーン系樹脂部材を揮発させて得られるケイ素含有揮発物にプラズマを照射して形成される請求項1記載の半導体装置の製造方法。   The method of manufacturing a semiconductor device according to claim 1, wherein the silicon oxide is formed by irradiating a silicon-containing volatile material obtained by volatilizing a silicone resin member with plasma. 前記半導体装置は前記半導体素子が載置される基板を備え、前記シリコーン系樹脂部材は、前記基板と前記半導体素子を接合する接合部材である請求項2記載の半導体装置の製造方法。   The method of manufacturing a semiconductor device according to claim 2, wherein the semiconductor device includes a substrate on which the semiconductor element is placed, and the silicone resin member is a bonding member that bonds the substrate and the semiconductor element.
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JP2013110152A (en) * 2011-11-17 2013-06-06 Panasonic Corp Method for manufacturing semiconductor light-emitting device, and cleaning method with plasma
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