JP2017147375A - Printed wiring board and method for manufacturing the same - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a printed wiring board and a method for manufacturing the printed wiring board, in which haloing in an interface between a conductor pad and a solder resist layer can be prevented.SOLUTION: A printed wiring board 1 has a build-up structure in which insulation layers 12, 14 and wiring layers 13, 15 are alternately deposited on either side of a core substrate 10 to sandwich the substrate. The wiring layer 15 includes a plurality of conductor pads 19 formed on the insulation layer 14. A solder resist layer 20 having an opening 20a for exposing a part of a surface 21 of the conductor pad 19 to the outside is formed on the insulation layer 14 and the wiring layer 15. In the surface 21, a projection 19a is disposed in an interface 21b with the solder resist layer 20. The projection 19a extends in a circumference direction of the conductor pad 19.SELECTED DRAWING: Figure 1

Description

  The present invention relates to a printed wiring board and a manufacturing method thereof.

  In a printed wiring board, a solder resist layer is often formed on the surface of the wiring board in order to prevent solder adhesion to unnecessary portions and protect the wiring board surface. Examples of the method for forming the solder resist layer include a photolithography method and a laser processing method described in Patent Document 1. In the photolithography method, a photocurable resin for forming a solder resist layer is applied to the entire surface of the wiring board, and then an exposure development process is performed to form an opening that exposes a part of the conductor pad of the wiring board. On the other hand, in the laser processing method, after applying a thermosetting resin for forming a solder resist layer on the entire surface of the wiring board, an opening for exposing a part of the conductor pad is formed by laser irradiation.

JP 2010-258147 A

  However, in the above-described photolithography method or laser processing method, the interface portion between the conductor pad and the solder resist layer (that is, the portion of the surface of the conductor pad that is covered with the solder resist layer) is flat. Ing is likely to occur. Specifically, in the case of the photolithography method, it is assumed that the developer used for the development process easily enters the inside along the interface portion between the conductor pad and the solder resist layer, and this easily causes a gap in the interface portion. Is done.

  On the other hand, in the case of the laser processing method, since the desmear process using the etching solution is performed to remove the resin residue, the etching solution easily enters the interface portion between the conductor pad and the solder resist layer, and a part of the conductor pad is formed. It is assumed that gaps are likely to be formed by melting. When such haloing occurs, it is considered that the conductor pad and the solder resist layer are in poor contact and the solder resist layer may be peeled off in some cases.

  The printed wiring board of the present invention that solves the above problems includes an insulating layer, a wiring layer formed on the insulating layer and including a plurality of conductive pads, and the conductive pads on the insulating layer and the wiring layer. A solder resist layer formed so that a part of the surface of the conductive pad is exposed to the outside, and at least a convex portion of the surface of the conductor pad at the interface with the solder resist layer. Any one of a part and a recessed part is formed, and the said convex part or the said recessed part is extended along the circumferential direction of the said conductor pad.

  The printed wiring board manufacturing method according to the present invention includes a first step of forming a wiring layer including a plurality of conductive pads on an insulating layer, and at least a convex portion or a concave portion on a peripheral portion of the surface of the conductive pad. A solder resist layer is formed on the insulating layer and the wiring layer so as to cover the insulating layer and the wiring layer, and a surface of the conductor pad is formed. And a third step of forming a plurality of openings in the solder resist layer that expose a portion other than the peripheral portion to the outside.

  According to the present invention, it is possible to prevent the occurrence of haloing at the interface portion between the conductor pad and the solder resist layer.

It is a schematic sectional drawing which shows the printed wiring board which concerns on 1st Embodiment. It is a schematic plan view which shows a printed wiring board. It is process drawing explaining the manufacturing method of a printed wiring board. It is process drawing explaining the manufacturing method of a printed wiring board. It is process drawing explaining the manufacturing method of a printed wiring board. It is process drawing explaining the manufacturing method of a printed wiring board. It is process drawing explaining the manufacturing method of a printed wiring board. It is process drawing explaining the manufacturing method of a printed wiring board. It is process drawing explaining the manufacturing method of a printed wiring board. It is process drawing explaining the manufacturing method of a printed wiring board. It is process drawing explaining the manufacturing method of a printed wiring board. It is process drawing explaining the manufacturing method of a printed wiring board. It is process drawing explaining the manufacturing method of a printed wiring board. It is a schematic sectional drawing which shows the printed wiring board which concerns on 2nd Embodiment. It is a schematic sectional drawing which shows the printed wiring board which concerns on 3rd Embodiment. It is a schematic sectional drawing which shows the printed wiring board which concerns on 4th Embodiment.

  Embodiments of a printed wiring board and a manufacturing method thereof according to the present invention will be described below with reference to the drawings. In the description of the drawings, the same elements are denoted by the same reference numerals, and redundant description is omitted.

<First Embodiment>
FIG. 1 is a schematic cross-sectional view showing a printed wiring board according to the first embodiment. The printed wiring board 1 of the present embodiment has a build-up structure in which a core substrate 10 and insulating layers 12 and 14 and wiring layers 13 and 15 are alternately stacked on both sides of the core substrate 10. Since this printed wiring board 1 is vertically symmetrical with respect to the central axis L of the core substrate 10, only one side (upper side) will be described in the following description.

  The core substrate 10 is a substrate formed by impregnating a core material made of, for example, a glass fiber cloth with an epoxy resin, and a conductor pad 11 made of an electroless plating layer 11a and an electrolytic plating layer 11b is formed thereon. ing. The conductor pad 11 is electrically connected to a conductor pad 11 (not shown) on the opposite side via a through-hole conductor 10a provided inside the core substrate 10.

  On the core substrate 10, an insulating layer 12 covering the conductor pads 11, a wiring layer 13 formed on the insulating layer 12, an insulating layer 14 covering the wiring layer 13, and a wiring layer formed on the insulating layer 14 15 are stacked in this order. In addition, the wiring layer of this embodiment refers to the conductor layer which comprises an electric circuit, and may include a conductor pad, wiring, etc. depending on the arrangement position, and may include only a conductor pad. In FIG. 1, the case of only a conductor pad is shown.

  The insulating layer 12 and the insulating layer 14 are made of, for example, a thermosetting epoxy resin. A plurality of via conductors 16 are formed inside the insulating layer 12, and a plurality of via conductors 17 are formed inside the insulating layer 14. Each of these via conductors 16 and 17 has a truncated cone shape and has a diameter increased along a direction away from the core substrate 10 (from the bottom to the top in FIG. 1).

  The wiring layer 13 is formed of the electroless plating layer 11a and the electrolytic plating layer 11b similarly to the conductor pad 11, and includes a plurality of conductor pads 18. The conductor pad 18 is formed on the insulating layer 12 and is electrically connected to the conductor pad 11 via a via conductor 16 formed inside the insulating layer 12.

  The wiring layer 15 is formed by the electroless plating layer 11 a and the electrolytic plating layer 11 b similarly to the conductor pad 11, and includes a plurality of conductor pads 19. Some of the plurality of conductor pads 19 are electrically connected to the conductor pads 18 via via conductors 17 formed inside the insulating layer 14. As shown in FIG. 1, a part of the through-hole conductor 10a and the via conductors 16 and 17 are stacked in a straight line along the stacking direction of the insulating layers 12 and 14 to form a stack structure, and the other part is stacked. They are stacked while shifting their positions along the direction to form an offset structure.

  FIG. 2 is a schematic plan view showing the printed wiring board, and FIG. 1 is a cross-sectional view taken along line XX in FIG. As shown in FIG. 2, the conductor pads 19 are formed in a circular shape and arranged on the insulating layer 14 at a constant pitch. A solder resist layer 20 is further laminated on the insulating layer 14 and the wiring layer 15 (see FIG. 1). The solder resist layer 20 has a plurality of openings 20a for exposing a part of the surface 21 of the conductor pad 19 to the outside.

  A part of the surface 21 of the conductor pad 19 (here, the central portion of the surface 21) is exposed to the outside from the opening 20a to form an exposed portion 21a, and the rest (mainly the peripheral portion of the surface 21). Is covered with the solder resist layer 20 and constitutes an interface portion 21 b with the solder resist layer 20. That is, the surface 21 is divided into an exposed portion 21 a from the opening 20 a and an interface portion 21 b between the solder resist layer 20.

  As shown in FIG. 2, the exposed portion 21a of the surface 21 has a circular shape, and can serve as a mounting surface when mounted on an external electronic component or the like. The interface portion 21b with the solder resist layer 20 is formed in an annular shape so as to surround the exposed portion 21a. The interface portion 21b is provided with a convex portion 19a. The convex portion 19a is disposed at the peripheral portion of the surface 21, and protrudes upward from the surface 21 with a predetermined height. In plan view, the convex portion 19 a extends along the circumferential direction of the conductor pad 19 and is formed in an annular shape.

  In the printed wiring board 1 having the above structure, since the convex portion 19a is formed on the interface portion 21b with the solder resist layer 20 on the surface 21 of the conductor pad 19, the conventional interface portion is flat. In comparison, the interface portion 21b with the solder resist layer 20 becomes longer. For this reason, since the path | route for liquids, such as a developing solution and an etching liquid, approachs inside along this interface part 21b becomes long, the approach of a liquid becomes difficult.

  In addition, since the convex portion 19a protrudes upward from the surface 21, it brings about an effect of preventing liquids such as a developer and an etching solution from entering the inside. As a result, the occurrence of haloing at the interface portion 21b between the conductor pad 19 and the solder resist layer 20 can be reliably prevented, and the adhesion between the conductor pad 19 and the solder resist layer 20 can be maintained. Furthermore, since the convex part 19a also has an anchor effect, the adhesiveness between the conductor pad 19 and the solder resist layer 20 can be enhanced.

  Hereinafter, a method for manufacturing the printed wiring board 1 of the present embodiment will be described with reference to FIGS. 3A to 5C. Since the printed wiring board 1 is formed by sequentially laminating an insulating layer and a wiring layer on both upper and lower sides with the core substrate 10 interposed therebetween, only the one side (upper side) will be described in the description after FIG. 3C.

<First step>
First, the core substrate 10 is prepared. For the core substrate 10, for example, a substrate formed by impregnating an epoxy resin into a core material made of glass fiber cloth is used. Subsequently, a copper foil 103 is formed on each of the upper surface and the lower surface of the core substrate 10.

Next, a plurality of through holes 101 are formed in the core substrate 10. Specifically, for example, by using a CO ₂ laser, the through holes 101 are formed in the core substrate 10 by alternately irradiating from the upper surface side and the lower surface side of the core substrate 10 (see FIG. 3A). After the formation of the through-hole 101, it is preferable to perform a desmear treatment by immersing the core substrate 10 in a solution containing a predetermined concentration of permanganic acid. By performing the desmear process in this way, unnecessary conduction (short circuit) can be suppressed.

  Next, the through-hole conductor 10 a is formed inside the through hole 101, and the conductor pad 11 is formed on the core substrate 10. Specifically, the core substrate 10 is immersed in an electroless plating solution, and the electroless plating layer 11a is formed on the upper and lower surfaces of the core substrate 10 on which the copper foil is formed and the inner wall surface of the through hole 101. Examples of the material for forming the electroless plating layer 11a include copper and nickel. Subsequently, the electroless plating layer 11b is formed thereon using the electroless plating layer 11a as a seed layer. Thus, the through hole 101 is filled with the electroless plating layer 11a and the electrolytic plating layer 11b, and the filled electroless plating layer 11a and the electrolytic plating layer 11b constitute a through-hole conductor 10a (see FIG. 3B).

  Subsequently, a predetermined resist pattern is formed on the electrolytic plating layer 11b, and portions of the electroless plating layer 11a, the electrolytic plating layer 11b, and the copper foil that are not covered with the resist pattern are removed. Thereafter, the resist pattern is removed using a solution containing monoethanolamine. Then, the copper foil 103, the electroless plating layer 11a, and the electrolytic plating layer 11b left on the surface of the core substrate 10 constitute a conductor pad 11 (see FIG. 3C). In FIG. 3D and subsequent drawings, the copper foil 103 is omitted in order to make the drawings easy to see.

Subsequently, an insulating layer 12 is formed by applying a thermosetting epoxy resin on the core substrate 10 and the conductor pads 11 (see FIG. 3D). Next, a via hole 12a is formed at a position corresponding to the conductor pad 11 of the insulating layer 12 by CO ₂ laser irradiation. Thereafter, the electroless plating layer 11a is formed on the surface of the insulating layer 12, the inner wall surface of the via hole 12a, and the surface of the conductor pad 11 exposed from the via hole 12a. Subsequently, a predetermined resist pattern 102 is formed on the electroless plating layer 11a (see FIG. 4A).

  Next, the electrolytic plating layer 11b is formed on the portion of the electroless plating layer 11a that is not covered with the predetermined resist pattern 102 (see FIG. 4B). Thereby, the via hole 12a is filled with the electroless plating layer 11a and the electrolytic plating layer 11b, and the filled electroless plating layer 11a and the electrolytic plating layer 11b constitute the via conductor 16. Subsequently, the resist pattern 102 is removed using a solution containing monoethanolamine.

  Further, the electroless plating layer 11a exposed by removing the resist pattern 102 is removed by etching. Thereby, the electroless plating layer 11a and the electrolytic plating layer 11b left on the surface of the insulating layer 12 constitute the wiring layer 13 including the conductor pads 18 (see FIG. 4C). Subsequently, by repeating the above-described steps, the insulating layer 14, the via conductor 17, and the conductor pad 19 'are sequentially formed (see FIG. 4D). The conductor pad 19 'is a precursor of the conductor pad 19, and includes an electroless plating layer 11a and an electrolytic plating layer 11b'. The electroplating layer 11b 'of the conductor pad 19' is formed thicker than the electroplating layer 11b of the conductor pad 18.

<Second step>
Next, the convex part 19a is formed in the peripheral part of the surface of conductor pad 19 'along the circumferential direction of this conductor pad 19'. Specifically, the central portion of the electroplating layer 11b ′ of the conductor pad 19 ′ is cut using laser processing. At this time, the electroplating layer 11 b ′ is shaved so that the thickness of the remaining portion is the same as that of the electroplating layer 11 b of the conductor pad 18. Here, the electrolytic plating layer 11b ′ may be cut using an etching solution instead of laser processing.

  As shown in FIG. 5A, the peripheral portion of the surface becomes relatively high by cutting the central portion of the surface of the electrolytic plating layer 11b '. By doing in this way, the annular convex part 19a is formed in the peripheral part of the surface. The electroless plating layer 11 a and the electrolytic plating layer 11 b left on the surface of the insulating layer 14 constitute a wiring layer 15 including the conductor pads 19.

<Third step>
Subsequently, a solder resist layer 20 is formed on the insulating layer 14. As a method of forming the solder resist layer 20, for example, a photolithography method or a laser processing method can be used. In the case of the photolithography method, first, a solder resist layer 20 made of a photocurable resin is applied on the insulating layer 14 so as to cover the entire wiring layer 15 (see FIG. 5B). Subsequently, a plurality of openings 20a that expose a part of the surface 21 of the conductor pad 19 are formed by performing an exposure development process (see FIG. 5C). The opening 20a is formed so that a part of the surface 21 of the conductor pad 19 other than the peripheral portion (here, the central portion of the surface 21) is exposed to the outside.

  At this time, the developer used in the development processing tries to enter the inside along the interface portion between the conductor pad 19 and the solder resist layer 20 (that is, the interface portion 21b of the surface 21), but the approach path is long. In addition, since the intrusion of the developer is prevented by the convex portion 19a, the developer is difficult to enter inside. For this reason, generation | occurrence | production of haloing can be prevented reliably.

  On the other hand, in the case of the laser processing method, first, a solder resist layer 20 made of a thermosetting resin film is laminated on the insulating layer 14 so as to cover the entire wiring layer 15 (see FIG. 5B). Subsequently, a plurality of openings 20a that expose a part of the surface 21 of the conductor pad 19 are formed by laser processing (see FIG. 5C).

  After the laser processing, a desmear process is performed using an etching solution in order to remove the resin residue. At this time, the etching solution tries to enter the inside along the interface portion between the conductor pad 19 and the solder resist layer 20 (that is, the interface portion 21b of the surface 21), but the entry path is long and the etching solution enters. Since it is blocked by the convex portion 19a, the etching solution is difficult to enter inside. For this reason, generation | occurrence | production of haloing can be prevented reliably. Then, when the formation of the opening 20a is finished, the production of the printed wiring board 1 is completed.

  According to the manufacturing method described above, the convex portion 19a is formed on the peripheral edge portion of the surface of the conductor pad 19 before the solder resist layer 20 is formed on the conductor pad 19, so that it is used when the opening portion 20a is formed. The developer or etching solution is prevented from entering the inside along the interface portion between the conductor pad 19 and the solder resist layer 20. As a result, the occurrence of haloing at the interface portion 21b between the conductor pad 19 and the solder resist layer 20 can be reliably prevented. And since the convex part 19a has an anchor effect, the adhesiveness of the conductor pad 19 and the soldering resist layer 20 can be improved.

Second Embodiment
6 is a schematic cross-sectional view showing a printed wiring board according to the second embodiment. The difference between the printed wiring board 2 of the present embodiment and the first embodiment is that a recess 19 b is provided at the interface portion between the conductor pad 19 and the solder resist layer 20. Specifically, a recess 19 b is formed in an interface portion 21 b with the solder resist layer 20 on the surface 21 of the conductor pad 19. The recess 19b is recessed below the surface 21 (that is, on the core substrate 10 side) and has a rectangular cross section. The recess 19 b extends along the circumferential direction of the conductor pad 19.

  The printed wiring board 2 configured as described above can obtain the same effects as those of the first embodiment. That is, since the concave portion 19b is formed in the interface portion 21b, the path for the liquid such as the developer and the etching solution to enter the inside along the interface portion 21b becomes long, and the developer and the etching solution and the like The entry by the liquid is prevented by the recess 19b. As a result, the occurrence of haloing at the interface portion 21b between the conductor pad 19 and the solder resist layer 20 can be reliably prevented. In addition, since the recess 19b also has an anchor effect, the adhesion between the conductor pad 19 and the solder resist layer 20 can be enhanced.

<Third Embodiment>
7 is a schematic cross-sectional view showing a printed wiring board according to the third embodiment. The difference between the printed wiring board 3 of this embodiment and the second embodiment is that a plurality of recesses 19c are formed. Specifically, a plurality (two in this case) of recesses 19 c are formed in the interface portion 21 b with the solder resist layer 20 on the surface 21 of the conductor pad 19. The recess 19c is recessed below the surface 21 and has a U-shaped cross section. These recesses 19 c extend along the circumferential direction of the conductor pad 19.

  The printed wiring board 3 configured as described above can obtain the same effects as those of the second embodiment, and has a plurality of recesses 19c, so that the path for entering a liquid such as a developing solution or an etching solution is further increased. Therefore, the occurrence of haloing at the interface portion 21b can be more reliably prevented, and the adhesion between the conductor pad 19 and the solder resist layer 20 can be further enhanced.

<Fourth embodiment>
8 is a schematic cross-sectional view showing a printed wiring board according to the fourth embodiment. The difference between the printed wiring board 4 of the present embodiment and the first embodiment is that a plurality of convex portions 19d are formed. Specifically, a plurality (two in this case) of convex portions 19d are formed on the interface portion 21b of the surface 21 of the conductor pad 19 with the solder resist layer 20. The convex portion 19 d protrudes upward from the surface 21 and extends along the circumferential direction of the conductor pad 19.

  The printed wiring board 4 configured as described above can obtain the same operational effects as those of the first embodiment, and since there are a plurality of convex portions 19d, the entry path of a liquid such as a developing solution or an etching solution becomes longer. . Therefore, the occurrence of haloing at the interface portion 21b can be more reliably prevented, and the adhesion between the conductor pad 19 and the solder resist layer 20 can be further enhanced.

  Although the embodiments of the present invention have been described in detail above, the present invention is not limited to the above-described embodiments, and various designs can be made without departing from the spirit of the present invention described in the claims. It can be changed. For example, in the above-described embodiment, the printed wiring board having the core substrate 10 has been described. However, the present invention is also applicable to a printed wiring board having no core substrate 10 (so-called coreless substrate). Moreover, about the shape of a convex part and a recessed part, not only the content mentioned above but you may add various changes. Furthermore, you may change the number of a convex part and a recessed part, and the combination of a convex part and a recessed part.

1, 2, 3, 4 Printed wiring board 10 Core substrate 12, 14 Insulating layer 13, 15 Wiring layer 16, 17 Via conductor 18, 19 Conductor pad 20 Solder resist layer 20a Opening 21 Surface 21a Exposed portion 21b Interface portion 19a, 19d Convex part 19b, 19c Concave part

Claims (5)

An insulating layer;
A wiring layer formed on the insulating layer and including a plurality of conductor pads;
A solder resist layer formed on the insulating layer and the wiring layer so that a part of the surface of the conductor pad is exposed to the outside;
A printed wiring board comprising:
Of the surface of the conductor pad, at the interface portion with the solder resist layer, at least one of a convex portion or a concave portion is formed,
The convex portion or the concave portion extends along the circumferential direction of the conductor pad. In the printed wiring board of Claim 1,
Of the surface of the conductor pad, the interface portion with the solder resist layer is formed in an uneven shape. In the printed wiring board of Claim 1,
The convex part or the concave part is plural. A first step of forming a wiring layer including a plurality of conductor pads on the insulating layer;
A second step of forming at least one of a convex portion or a concave portion along the circumferential direction of the conductive pad on the peripheral portion of the surface of the conductive pad;
A solder resist layer is formed on the insulating layer and the wiring layer so as to cover the insulating layer and the wiring layer, and an opening that exposes part of the surface of the conductor pad other than the peripheral portion to the outside is formed in the solder resist layer. A third step of forming a plurality;
A method of manufacturing a printed wiring board including: In the manufacturing method of the printed wiring board of Claim 4,
In the second step, at least one of the convex portion and the concave portion is formed on the peripheral edge portion of the surface of the conductor pad by using etching or laser processing.

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