JP2017143113A5 - - Google Patents

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Publication number
JP2017143113A5
JP2017143113A5 JP2016022186A JP2016022186A JP2017143113A5 JP 2017143113 A5 JP2017143113 A5 JP 2017143113A5 JP 2016022186 A JP2016022186 A JP 2016022186A JP 2016022186 A JP2016022186 A JP 2016022186A JP 2017143113 A5 JP2017143113 A5 JP 2017143113A5
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JP
Japan
Prior art keywords
signal
electronic device
wiring
wiring pattern
signal wiring
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Application number
JP2016022186A
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Japanese (ja)
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JP2017143113A (en
JP6779630B2 (en
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Publication date
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Priority to JP2016022186A priority Critical patent/JP6779630B2/en
Priority claimed from JP2016022186A external-priority patent/JP6779630B2/en
Priority to US15/422,342 priority patent/US10433417B2/en
Publication of JP2017143113A publication Critical patent/JP2017143113A/en
Publication of JP2017143113A5 publication Critical patent/JP2017143113A5/ja
Priority to US16/552,404 priority patent/US10863615B2/en
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Publication of JP6779630B2 publication Critical patent/JP6779630B2/en
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Description

本発明の電子機器は、導電性部材と、前記導電性部材に固定されたプリント回路板と、を備え、前記プリント回路板は、第1半導体装置と第2半導体装置とを接続する信号配線が形成されたプリント配線板を有し、前記プリント配線板は、前記導電性部材と対向する表層を有し、前記信号配線は、前記表層に形成された信号配線パターンを有し、前記導電性部材は、前記信号配線パターンに対向する孔を有することを特徴とする。 An electronic apparatus according to the present invention includes a conductive member and a printed circuit board fixed to the conductive member, and the printed circuit board has signal wiring for connecting the first semiconductor device and the second semiconductor device. has formed printed wiring board, the printed wiring board has a surface which faces the conductive member, wherein the signal line has a signal wiring pattern formed prior Symbol table layer, the conductive sexual member is characterized by having an open hole which is opposed to the signal wiring pattern.

Claims (13)

導電性部材と、
前記導電性部材に固定されたプリント回路板と、を備え、
前記プリント回路板は、
第1半導体装置と第2半導体装置とを接続する信号配線が形成されたプリント配線板を有し、
前記プリント配線板は、前記導電性部材と対向する表層を有し、
前記信号配線は、前記表層に形成された信号配線パターンを有し、
前記導電性部材は、前記信号配線パターンに対向する孔を有することを特徴とする電子機器。
A conductive member;
A printed circuit board fixed to the conductive member,
The printed circuit board is:
A printed wiring board on which a signal wiring for connecting the first semiconductor device and the second semiconductor device is formed;
The printed wiring board has a surface layer facing the conductive member,
The signal lines has a signal wiring pattern formed prior Symbol Table layer,
The conductive member is an electronic device characterized by having an aperture that faces the signal line pattern.
前記開孔は、1つであることを特徴とする請求項1に記載の電子機器。 The aperture is, the electronic device according to claim 1, wherein one der Rukoto. 前記信号配線パターンが直線状に延びて形成されており、
前記開孔は、前記信号配線パターンの延びる配線方向に対して直交する方向の長さが、前記プリント配線板と前記導電性部材との距離の2倍以上8倍以下の長さに、前記信号配線パターンの配線幅を加えた長さを有することを特徴とする請求項2に記載の電子機器。
The signal wiring pattern is formed to extend linearly,
The opening has a length in a direction orthogonal to a wiring direction in which the signal wiring pattern extends such that the length of the signal is not less than 2 times and not more than 8 times the distance between the printed wiring board and the conductive member. 3. The electronic device according to claim 2, wherein the electronic device has a length obtained by adding a wiring width of the wiring pattern.
前記信号配線パターンが直線状に延びて形成されており、
前記開孔は、前記信号配線パターンの延びる配線方向と平行な方向の長さが、前記信号配線パターンの前記配線方向の長さの0.5倍以上1.5倍以下であることを特徴とする請求項2または3に記載の電子機器。
The signal wiring pattern is formed to extend linearly,
The opening has a length in a direction parallel to a wiring direction in which the signal wiring pattern extends, which is 0.5 to 1.5 times a length of the signal wiring pattern in the wiring direction. The electronic device according to claim 2 or 3.
前記開孔は、互いに間隔をあけ複数の開であることを特徴とする請求項1に記載の電子機器。 The aperture is, the electronic device according to claim 1, characterized in that a plurality of open holes spaced from each other. 前記信号配線パターンが直線状に延びて形成されており、
前記複数の開孔は、前記信号配線パターンの延びる配線方向に対して直交する方向の長さが、前記プリント配線板と前記導電性部材との距離の6倍以上20倍以下の長さに、前記信号配線パターンの配線幅を加えた長さを有することを特徴とする請求項5に記載の電子機器。
The signal wiring pattern is formed to extend linearly,
The plurality of openings have a length in a direction orthogonal to a wiring direction in which the signal wiring pattern extends such that the distance between the printed wiring board and the conductive member is not less than 6 times and not more than 20 times. 6. The electronic apparatus according to claim 5, wherein the electronic apparatus has a length obtained by adding a wiring width of the signal wiring pattern.
前記信号配線パターンが直線状に延びて形成されており、
前記複数の開孔は、前記信号配線パターンの延びる配線方向と平行な方向の長さが、前記信号配線パターンの前記配線方向の長さの0.75倍以上2倍以下であることを特徴とする請求項5または6に記載の電子機器。
The signal wiring pattern is formed to extend linearly,
Wherein the plurality of apertures, and wherein the signal wiring direction parallel to the direction of the length of extension of the wiring pattern is not more than 2 times 0.75 times or more of the wiring direction of the length of the signal wiring pattern The electronic device according to claim 5 or 6.
前記開孔は、前記プリント配線板の面の法線方向から見て、前記信号配線パターンの全てを包含することを特徴とする請求項1乃至7のいずれか1項に記載の電子機器。 The electronic device according to claim 1, wherein the opening includes all of the signal wiring pattern as viewed from a normal direction of a surface of the printed wiring board. 前記第1半導体装置は、前記プリント配線板に実装されており、
前記開孔は、前記プリント配線板の面の法線方向から見て、前記第1半導体装置を包含しないことを特徴とする請求項1乃至8のいずれか1項に記載の電子機器。
The first semiconductor device is mounted on the printed wiring board;
The electronic device according to claim 1, wherein the opening does not include the first semiconductor device when viewed from a normal direction of a surface of the printed wiring board.
前記信号配線は、前記第1半導体装置と前記第2半導体装置とを接続する、前記プリント配線板に形成された複数の信号配線のうちの少なくとも1つの信号配線であることを特徴とする請求項1乃至9のいずれか1項に記載の電子機器。 The signal wiring is at least one signal wiring among a plurality of signal wirings formed on the printed wiring board for connecting the first semiconductor device and the second semiconductor device. The electronic device according to any one of 1 to 9. 前記信号配線は、クロック信号の伝送路であることを特徴とする請求項1乃至9のいずれか1項に記載の電子機器。 The electronic apparatus according to claim 1 , wherein the signal wiring is a transmission path for a clock signal. 前記少なくとも1つの信号配線は、クロック信号の伝送路であることを特徴とする請求項10に記載の電子機器。 The electronic device according to claim 10, wherein the at least one signal wiring is a transmission path of a clock signal. 前記クロック信号の周波数が10[MHz]以上1[GHz]以下であることを特徴とする請求項11または12に記載の電子機器。   13. The electronic device according to claim 11, wherein the frequency of the clock signal is 10 [MHz] or more and 1 [GHz] or less.
JP2016022186A 2016-02-08 2016-02-08 Electronics Active JP6779630B2 (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP2016022186A JP6779630B2 (en) 2016-02-08 2016-02-08 Electronics
US15/422,342 US10433417B2 (en) 2016-02-08 2017-02-01 Electronic apparatus
US16/552,404 US10863615B2 (en) 2016-02-08 2019-08-27 Electronic apparatus

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2016022186A JP6779630B2 (en) 2016-02-08 2016-02-08 Electronics

Publications (3)

Publication Number Publication Date
JP2017143113A JP2017143113A (en) 2017-08-17
JP2017143113A5 true JP2017143113A5 (en) 2019-03-14
JP6779630B2 JP6779630B2 (en) 2020-11-04

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JP2016022186A Active JP6779630B2 (en) 2016-02-08 2016-02-08 Electronics

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JP (1) JP6779630B2 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6812402B2 (en) * 2018-12-26 2021-01-13 キヤノン株式会社 Electronic equipment and storage unit

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5838551A (en) * 1996-08-01 1998-11-17 Northern Telecom Limited Electronic package carrying an electronic component and assembly of mother board and electronic package
JP3722279B2 (en) * 2001-01-26 2005-11-30 日本電気株式会社 Optical transceiver module
JP2005085847A (en) * 2003-09-05 2005-03-31 Canon Inc Cabinet structure enclosing printed wiring board, and circuit packaging unit of electronic apparatus
CN1849052A (en) * 2005-04-05 2006-10-18 鸿富锦精密工业(深圳)有限公司 Electromagnetic interference screen packaging body and producing process thereof
JP2007299808A (en) * 2006-04-27 2007-11-15 Canon Inc Electronic equipment
JP5142573B2 (en) * 2007-04-04 2013-02-13 キヤノン株式会社 Electronics
US8013258B2 (en) * 2008-06-11 2011-09-06 Mediatek Inc. Shielding device
JP6238525B2 (en) * 2013-01-31 2017-11-29 キヤノン株式会社 Semiconductor package and electronic equipment

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