JP2017107941A - Semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor device capable of having a stable structure while maintaining good high-frequency amplification characteristics.SOLUTION: A source field plate electrode 16 extending toward a direction of a drain electrode 12 from the top of a gate electrode 14 is formed on an insulator thin film 15 between a gate electrode 14 and a drain electrode 12, and the source field plate electrode 16 and a source electrode 13 are connected through a wiring layer of a slender track. In a region on the source electrode 13 side of the gate electrode 14, a float electrode 17 not connected with any electrode is formed in a symmetric manner with respect to the source field plate electrode 16.SELECTED DRAWING: Figure 2

Description

  Embodiments described herein relate generally to a semiconductor device such as a field effect transistor.

  A source field plate electrode in which a field plate electrode is provided between a drain electrode and a gate electrode of a field effect transistor (FET: Field Effect Transistor) and connected to the source electrode is known. This source field plate electrode can alleviate the concentration of the electric field in the vicinity of the gate and improve the breakdown voltage of the FET. Therefore, for example, a microscopic material using a semiconductor material such as gallium nitride (GaN) or gallium arsenide (GaAs) It is applied to an amplifying FET or the like that operates in a wave band or a millimeter wave band, and enables high output in these frequency bands.

  An example of the structure of a conventional FET having a source field plate electrode as this type of semiconductor device is illustrated in FIGS. FIG. 3 is a top view showing an example of the configuration of the FET 2 as viewed from above, and FIG. 4 is a cross-sectional view showing a section taken along the line CD in FIG.

  As illustrated in these two figures, the FET 2 has a drain electrode 42 and a source electrode 43 formed on a semiconductor substrate 41, and a drain electrode and a drain electrode 42 are formed on the upper surface of these electrodes, respectively. A pad electrode 42a and a source pad electrode 43a are formed. A gate electrode 44 is formed between these two electrodes, and the surface of each semiconductor substrate between the electrodes is covered with an insulating film 45. Further, on the insulating film 45 between the gate electrode 44 and the drain electrode 42, a source field plate electrode 46 extends from the upper surface of the gate electrode 44 toward the drain electrode 42 so as to cover the surface on the drain electrode 42 side. And is connected to the source electrode 43 by a wiring 46a. In the top view of FIG. 3, the drain pad electrode 42a, the source pad electrode 43a, and the insulating film 45 are not shown for simplification of the drawing.

  In order to obtain a high-frequency amplifying element having a stable gain in the microwave band and the millimeter wave band, it is particularly desirable to have a structure in which the parasitic capacitance Cgs between the gate electrode and the source electrode is reduced. For this reason, in the conventional FET 2 described above, the source field plate electrode is also formed so that the field plate electrode extends to the source electrode 43 side, for example, so as to cover the entire gate electrode 44. Instead, a field plate electrode is formed by extending from a part and a side surface of the gate electrode 44 on the drain electrode 42 side onto the insulating film 45 toward the drain electrode 42.

  In addition, in the case of FIG. 3, the wiring 46a for connection to the source electrode 43 is a narrow wiring from the gate electrode 44 to the insulating film 45, thereby suppressing an increase in parasitic capacitance Cgs. ing. In addition to this, for example, there are cases where the wiring route is detoured to the peripheral region on the semiconductor substrate so as not to straddle the gate electrode 44, for example.

Special table 2007-537593 JP 2011-249728 A

  As described above, the conventional FET 2 has a source field plate electrode 46 and a structure in which an increase in the parasitic capacitance Cgs is suppressed to ensure desired high frequency amplification characteristics. However, in the conventional FET 2 having such a structure, the junction portion (around the point E in FIG. 4) of the gate electrode 44 on the source electrode 43 side is mechanically lifted from the semiconductor substrate 41 including the insulating film 45. It is easy to be destroyed.

  That is, when a thermal cycle is applied to the FET 2 due to energization or the like, the source field plate electrode 46 that is biased from the gate electrode 44 toward the drain electrode 42 expands and contracts toward the drain electrode 42, and accordingly, The insulating film 45 bonded to the source field plate electrode 46 also receives stress in the length direction of the gate electrode 44 including the gate electrode 44. Under the influence of this stress, cracks and the like occur in the lower part of the gate electrode 44 near the source electrode 43 side and the peripheral part including the insulating film 45 covering this part (around the point E in FIG. 4). Could be destroyed. For this reason, there has been a demand for a semiconductor device such as an FET having a source field plate electrode and suppressing an increase in parasitic capacitance Cgs and having a mechanically stable structure.

  The present embodiment has been made in consideration of the above-described circumstances, and an object thereof is to provide a semiconductor device having a stable structure while maintaining good high-frequency amplification characteristics.

  In order to achieve the above object, a semiconductor device according to the present embodiment is formed between a semiconductor substrate, a drain electrode formed on the semiconductor substrate, a source electrode, and the drain electrode and the source electrode. A gate electrode, a drain electrode, a source electrode, a gate electrode, an insulator thin film covering at least a part of the surface of the semiconductor substrate between the electrodes, and a centerline of the length of the gate electrode. Covering the drain electrode side from the region above the gate electrode on the drain electrode side, extending in the direction of the drain electrode, and formed on the insulator thin film between the drain electrode and the wiring layer A source field plate electrode electrically connected to the source electrode, and the gate electrode closer to the source electrode than the center line of the length of the gate electrode. Covering the said source electrode side from the electrode top region, said by stretching the source electrode direction, characterized in that a float electrode formed on an insulating film between the source electrode.

1 is a top view showing an example of a configuration of an upper surface of a semiconductor device according to an embodiment of the present invention. FIG. 2 is a cross-sectional view showing a model of a cross-sectional structure of the semiconductor device illustrated in FIG. 1. The top view which models and shows an example of the structure of the upper surface of the conventional semiconductor device. FIG. 4 is a cross-sectional view showing a model of a cross-sectional structure of the semiconductor device illustrated in FIG. 3.

  The best mode for carrying out a semiconductor device according to an embodiment of the present invention will be described below with reference to FIGS.

  FIG. 1 is a top view showing a model of an example of the configuration of the top surface of a semiconductor device according to an embodiment of the present invention. 2 is a cross-sectional view showing a model of the cross-sectional structure taken along the line AB in FIG. 1 of this semiconductor device. As illustrated in FIGS. 1 and 2, the semiconductor device 1 includes a drain electrode 12, a source electrode 13, a gate electrode 14, an insulator thin film 15, a source field plate electrode 16, and a semiconductor substrate 11 serving as a base. And the float electrode 17 is provided. In FIG. 1, the drain pad electrode 12a, the source pad electrode 13a, and the insulator thin film 15 are not shown in order to avoid complication of the drawing.

  The drain electrode 12 and the source electrode 13 are ohmic electrodes formed on the same plane of the semiconductor substrate 11 so as to be spaced apart from each other. On each of the electrodes, a drain pad electrode 12a that is a wiring pad electrode, and a source A pad electrode 13a is formed. The gate electrode 14 is an electrode formed at a position between these two electrodes on the semiconductor substrate 11, and is in Schottky junction with the semiconductor substrate 11. An insulating thin film 15 is formed so as to cover these three electrodes and the surface of the semiconductor substrate 11 between the electrodes. The insulator thin film 15 is made of, for example, SiN (silicon nitride).

  On the insulator thin film 15, a source field plate electrode 16 is formed between the drain electrode 12 and the gate electrode 14. The source field plate electrode 16 covers the side surface on the drain electrode 12 side from the position above the drain electrode 12 side with respect to the center of the length of the gate electrode 14, and extends on the insulator thin film 15 in the direction of the drain electrode 12. The gate electrode 14 is formed with a predetermined electrode width in the width direction, and is electrically connected to the source electrode 13 by the wiring layer 16a. In this embodiment, the wiring layer 16a is formed as a thin line on the insulating thin film 15 formed so as to cover the gate electrode 14 and the upper surface of the semiconductor substrate 11 from the vicinity of the center of the electrode width. As a material of the source field plate electrode 16, for example, gold (Au) or an alloy containing gold (Au) is used, and the source field plate electrode 16 is fixed to the insulator thin film 15 by a titanium (Ti) material or the like (not shown). ing.

  Further, on the insulator thin film 15, the side surface on the source electrode 13 side is covered between the source electrode 13 and the gate electrode 14 from the position above the electrode on the source electrode 13 side than the center of the length of the gate electrode 14. Thus, a float electrode 17 is formed by extending the insulator thin film 15 in the direction of the source electrode 13. The float electrode 17 is not connected to any other electrode formed on the semiconductor substrate 11.

  In the present embodiment, the formation position of the float electrode 17 in the length direction of the gate electrode 14 is the above-described source field plate with respect to the center line of the length of the gate electrode 14 as illustrated in FIG. The position is symmetrical to the electrode 16, and the cross-sectional shape thereof is also symmetrical to the source field plate electrode 16. Further, with respect to the width direction of the gate electrode 14, as illustrated in FIG. 1, the gate electrode 14 is formed in the same range as the source field plate electrode 16 except for the part where the wiring layer 16 a is formed. It is supposed to be. As the material of the float electrode 17, for example, gold (Au) or an alloy containing gold (Au) is used, like the material of the source field plate electrode 16, and titanium (Ti) material or the like (not shown) is used. The insulator thin film 15 is fixed.

  In the semiconductor device 1 of the present embodiment configured as described above, the source field plate electrode 16 is formed on the insulator thin film 15 on the drain electrode 12 side of the gate electrode 14. By providing the source field plate electrode 16, the electric field concentration in the vicinity of the gate electrode 14 can be relaxed, so that the breakdown voltage of the semiconductor device 1 can be improved. In addition, the shape is extended to the region of the gate electrode 14 on the drain electrode 12 side, and is connected to the source electrode 13 by a thin wiring layer 16a. The increase in Cgs is suppressed. Therefore, a stable amplification characteristic with high output can be obtained in a wide band in a high frequency region.

  A float electrode 17 is provided on the insulator thin film 15 on the source electrode 13 side of the gate electrode 14. The position and the shape including the cross section are symmetrical to the source field plate electrode 16 with respect to the center line of the length of the gate electrode 14, and the same material as the source field plate electrode 16 is used. And fixed on the insulator thin film 15. Since the source field plate electrode 16 is arranged to be deviated toward the drain electrode 12 with respect to the length direction of the gate electrode 14, the gate electrode from the source field plate electrode 16 side is caused by a thermal cycle such as energization. Although the stress is generated in the 14 direction, the stress applied in the length direction of the gate electrode 14 can be balanced by providing such a float electrode 17, so that the insulator covering the gate electrode 14 and its peripheral portion is provided. Mechanical damage to the thin film 15 can be suppressed. Moreover, since the float electrode 17 is not connected to any other electrode on the semiconductor substrate 11, it does not affect the parasitic capacitance Cgs between the gate and the source, and the high frequency amplification characteristics of the semiconductor device 1. Etc. are maintained as they are.

  As described above, in this embodiment, the source field plate electrode 16 is provided in the region on the drain electrode 12 side of the gate electrode 14 to improve the breakdown voltage, and the increase in the parasitic capacitance Cgs between the gate and the source is suppressed. The desired arrangement and structure ensure the desired high output and stable high frequency amplification characteristics. In addition, a float electrode 17 that is not connected to any of the electrodes is provided in a region symmetrical to the source field plate electrode 16 in a region on the source electrode 13 side of the gate electrode 14, so that the gate electrode 14 and its peripheral portion are provided. The mechanical destruction of is suppressed.

  As a result, it is possible to obtain a semiconductor device having a mechanically stable structure while maintaining good high frequency amplification characteristics.

  The above-described embodiments are all presented as examples, and are not intended to limit the scope of the invention. These novel embodiments can be implemented in various other forms, and various omissions, replacements, and changes can be made without departing from the scope of the invention. These embodiments and modifications thereof are included in the scope and gist of the invention, and are included in the invention described in the claims and the equivalents thereof.

1 Semiconductor device 2 FET
11, 41 Semiconductor substrate 12, 42 Drain electrode 13, 43 Source electrode 14, 44 Gate electrode 15 Insulator thin film 16, 46 Source field plate electrode 17 Float electrode 45 Insulating film

Claims (4)

A semiconductor substrate;
A drain electrode formed on the semiconductor substrate and a source electrode;
A gate electrode formed between the drain electrode and the source electrode;
An insulator thin film covering at least a part of the surface of the semiconductor substrate between the drain electrode, the source electrode, and the gate electrode, and the electrodes;
Covering the drain electrode side from the region above the gate electrode closer to the drain electrode than the center line of the length of the gate electrode, extending in the direction of the drain electrode, and the insulator between the drain electrode A source field plate electrode formed on the thin film and electrically connected to the source electrode by a wiring layer;
Covering the source electrode side from the region above the gate electrode on the source electrode side of the center line of the length of the gate electrode, extending in the source electrode direction, and the insulator between the source electrode A semiconductor device comprising: a float electrode formed on a thin film.   The semiconductor device according to claim 1, wherein the wiring layer is formed on the insulator thin film between the gate electrode and the source electrode.   The said float electrode is formed in the position symmetrical with the said source field plate with respect to the centerline of the length of the said gate electrode, and was formed with the cross-sectional shape symmetrical with the said source field plate. 2. The semiconductor device according to 2.   4. The float electrode according to claim 2, wherein the float electrode is formed in the same range as the source field plate excluding the wiring layer in the width direction of the gate electrode. The semiconductor device described.