JP2017084916A - Device manufacturing method and plasma processing method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a device manufacturing method capable of controlling an etching shape to be vertical, ensuring alignment precision in a self-aligning manner, and suppressing degradation of electrical characteristics of MRAM, PRAM and the like.SOLUTION: The manufacturing method of a device includes: forming a second insulating film having dimples (S602); forming a multilayer element film so as to cover the dimples (S603); embedding an etching mask in a dimple of the multilayer element film formed in a self-aligning manner corresponding to the position of the dimple (S604); and etching the multilayer element film by using this as a mask (S605).SELECTED DRAWING: Figure 6

Description

  The present invention relates to a device manufacturing method and a plasma processing method.

  In recent years, new types of devices have been developed from the viewpoint of non-volatility that does not require electrical energy for refresh as a next-generation device, for example, memory, high-speed operability of rewriting, and securing a writing life. In addition, when applied to logic devices, low leakage current and avoidance of wiring delay are required for new elements.

  In view of these needs, development of magnetoresistive memory (Magnetoresistive Random Access Memory: hereinafter referred to as MRAM) and phase change memory (hereinafter referred to as PRAM) is in progress. In these device manufacturing processes, various techniques have been developed as element pattern formation methods, such as handling before and after film formation, etching, and cleaning after etching.

  In Patent Document 1, a mixed gas composed of a reactive gas and a gas having a boiling point lower than that of the reactive gas is ejected while adiabatically expanding in a predetermined direction from the ejection portion at a pressure that does not liquefy. A method is disclosed in which a sample surface is generated and sprayed onto a sample in a vacuum processing chamber. Non-Patent Document 1 describes etching yields of various materials using a cluster ion beam, and Non-Patent Document 2 discloses the dependence on planarization on the incident angle of a beam. In general, it is known that the yield (yield) is best when the incident angle is around 60 degrees with respect to the incident angle and the incident angle near 30 degrees with respect to the surface.

  Further, it is generally known that the yield change increases when a cluster ion beam is used. Non-Patent Document 3 also shows that the yield of metal films such as Ta greatly depends on the incident angle of ions.

  Further, it is widely known that high melting point materials and metal oxides described in Patent Document 2 cannot be etched cleanly without residue unless the temperature is high.

Japanese Patent No. 5575648 Japanese Patent Laid-Open No. 10-163179

Avionics Technology No.27 (2004.3) Technology Introduction 1 “High-precision nanofabrication technology using gas cluster ion beam” Avionics Technology No.28 (2005.3) Technical Introduction 1 “Super flattening method of solid surface using gas cluster ion beam” Proceedings of the 60th JSAP Spring Meeting (Spring 2013) 27p-A3-12 “Sputtering analysis with obliquely incident ions for Ta mask shape control”

  In device manufacturing, for example, MRAM manufacturing, it is difficult to perform fine patterning of a ferromagnetic metal film with high accuracy by plasma etching. The metal film as the material to be etched generally has a low vapor pressure of a reaction product generated by reacting with an etching gas, and has a high adhesion probability when reincident. For this reason, the scattered product that has been etched reattaches to the processed surface, and gradually adheres when it cannot be completely removed. For this reason, the deeper the pattern is processed with respect to the mask pattern, the thicker the pattern is, and the generally referred to taper-shaped processed cross section is exhibited. A similar phenomenon often occurs when etching a dielectric material which is a metal compound. As described above, it is difficult to perform vertical processing with a shape faithful to the mask with high accuracy. For this reason, when the temperature of the workpiece (wafer) is increased to a material acceptable or to a temperature that does not impair device characteristics, and the wafer is etched at a high processing surface, the probability of attachment of reaction products decreases. Thus, the device element can be formed by improving the taper shape to the vertical shape.

  However, even if these ferromagnetic metal films and metal dielectrics are processed as described above, there is a significant problem in obtaining good device operation over the entire wafer surface. In the etching chamber, various reaction products exist and adhere to the walls of the etching chamber, and are re-detached and reenter the wafer before processing. For this reason, the wall surface is also devised to be managed at a high temperature so as to be called a hot wall, or to be a wall in contact with ions or plasma so as not to accumulate on the wall surface.

  Thus, the measures for vertical processing extend to plasma control, reaction wafer temperature, and wall surface control. However, no attempt has been made to improve the structure of the device that is the workpiece. In addition, a structure such as a contact hole or a lower electrode of an ordinary element is formed on the lower surface, and an element material is deposited to expose a pattern. At this time, if there is a ferromagnetic metal film or a metal dielectric film, it becomes difficult to ensure alignment accuracy. Or processing for extra alignment processing is required.

  Furthermore, depending on the material used for the device, the electrical characteristics of the device may be deteriorated by high energy irradiation for forming a recent fine pattern or oxidation by opening to the atmosphere during vacuum processing.

  The present invention has been made in view of these problems, and an object of the present invention is to provide a device capable of controlling the etching shape vertically, ensuring alignment accuracy in a self-aligned manner, and preventing deterioration of the electrical characteristics of the element. And a plasma processing method.

As one embodiment for achieving the above object, a first step of forming a first electrode embedded in a first insulating film,
A second step of forming a second insulating film disposed on the first electrode and having an opening that exposes the first electrode;
A third step of forming a multilayer element film so as to cover the second insulating film having the opening and the first electrode;
A fourth step of embedding an etching mask in a recess of the multilayer element film formed in a self-aligned manner corresponding to the position of the opening;
A fifth step of etching the multilayer element film using the etching mask as a mask;
Then, a sixth step of forming a protective film so as to wrap the multilayer element film,
It is set as the manufacturing method of the device characterized by having.

A step of preparing a substrate having an etching mask embedded in a recess formed in a self-aligned manner at a position corresponding to the dimple of a processing layer formed to cover the dimple;
In a vacuum processing apparatus, processing the processed layer in the region exposed to the etching mask using a cluster ion beam;
A plasma processing method characterized by comprising:

  According to the present invention, it is possible to provide a device manufacturing method and a plasma processing method in which the etching shape can be controlled vertically, the alignment accuracy can be secured in a self-aligning manner, and the deterioration of the electrical characteristics of the element can be prevented.

It is sectional drawing which shows the dimple manufacturing process of the magnetoresistive element based on 1st Example of this invention, and shows the state in which the 1st electrode was formed. It is sectional drawing which shows the dimple manufacturing process of the magnetoresistive element based on 1st Example of this invention, and shows the state in which the insulating film was formed covering the 1st electrode. It is sectional drawing which shows the dimple manufacturing process of the magnetoresistive element based on 1st Example of this invention, and shows the state by which the type | mold material was formed in the upper part of the 1st electrode through the insulating film. It is sectional drawing which shows the dimple manufacturing process of the magnetoresistive element based on 1st Example of this invention, and shows the state in which the etching mask was formed so that a mold material might be exposed. It is sectional drawing which shows the dimple manufacturing process of the magnetoresistive element based on the 1st Example of this invention, and shows the state planarized so that the surface of a type | mold material may align with the surface of an etching mask. It is sectional drawing which shows the dimple manufacturing process of the magnetoresistive element based on 1st Example of this invention, and shows the state by which the mold material was removed and the etching mask which has an opening part was formed. It is sectional drawing which shows the dimple manufacturing process of the magnetoresistive element based on 1st Example of this invention, and shows the state by which the insulating film was etched using the etching mask, the dimple was formed, and the etching mask was removed. It is a top view which shows the dimple manufacturing process of the magnetoresistive element based on 1st Example of this invention, and shows the state by which the insulating film was etched using the etching mask, the dimple was formed, and the etching mask was removed. It is sectional drawing which shows the dimple manufacturing process of the magnetoresistive element based on the 2nd Example of this invention, and shows the state in which the etching mask which has an opening part in the upper part of the 1st electrode was formed through the insulating film. It is sectional drawing which shows the dimple manufacturing process of the magnetoresistive element based on the 2nd Example of this invention, and shows the state by which the insulating film was etched using the etching mask and the dimple was formed. It is sectional drawing which shows the dimple manufacturing process of the magnetoresistive element based on 2nd Example of this invention, and shows the state from which the etching mask was removed after the dimple was formed in the insulating film. It is sectional drawing which shows the manufacturing process until magnetic material layer formation of the magnetoresistive element based on the 1st or 2nd Example of this invention, and shows the state by which the electrically conductive film was formed on the insulating film in which the dimple was formed . It is sectional drawing which shows the manufacturing process until magnetic material layer formation of the magnetoresistive element based on the 1st or 2nd Example of this invention, and shows the state by which the 1st magnetic body film was formed on the electrically conductive film. It is sectional drawing which shows the manufacturing process until magnetic material layer formation of the magnetoresistive element based on the 1st or 2nd Example of this invention, and shows the state by which the barrier layer MgO film | membrane was formed on the 1st magnetic body film | membrane. Show. It is sectional drawing which shows the manufacturing process until magnetic material layer formation of the magnetoresistive element based on the 1st or 2nd Example of this invention, and shows the state by which the 2nd magnetic body film was formed on the barrier layer MgO film | membrane. Show. It is sectional drawing which shows the manufacturing process until pattern formation of the magnetoresistive element based on the 1st or 2nd Example of this invention, and protective film formation, The state in which the stopper electrically conductive film was formed on the 2nd magnetic body film | membrane Indicates. It is sectional drawing which shows the manufacturing process until pattern formation of the magnetoresistive element based on the 1st or 2nd Example of this invention, and protective film formation, and shows the state in which the 2nd electrode was formed on the stopper electrically conductive film . It is sectional drawing which shows the manufacturing process until pattern formation of the magnetoresistive element based on the 1st or 2nd Example of this invention, and protective film formation, so that the surface of a 2nd electrode may align with the surface of a stopper electrically conductive film It shows a state in which the second electrode is buried in the depression above the dimple. It is sectional drawing which shows the manufacturing process to pattern formation of the magnetoresistive element based on the 1st or 2nd Example of this invention, and protective film formation, and etches a stopper electrically conductive film by using the embedded 2nd electrode as an etching mask. Indicates the state that has been performed. It is sectional drawing which shows the manufacturing process to the pattern formation of the magnetoresistive element based on the 1st or 2nd Example of this invention, and protective film formation, and uses a 2nd electrode as an etching mask, a 2nd magnetic film, and a barrier The state in which the layer MgO film and the first magnetic film are etched is shown. It is sectional drawing which shows the manufacturing process until pattern formation of the magnetoresistive element based on the 1st or 2nd Example of this invention, and protective film formation, The state which the electrically conductive film was etched by using a 2nd electrode as an etching mask is shown. Show. It is sectional drawing which shows the manufacturing process until pattern formation of the magnetoresistive element based on the 1st or 2nd Example of this invention, and protective film formation, and the insulating film which has the 2nd electrode and dimple used as an etching mask A state in which a protective film is formed to cover is shown. It is sectional drawing which shows the manufacturing process of the magnetoresistive element based on the 3rd Example of this invention, and shows the state in which the insulating film which has the opening part vertically processed so that a 1st electrode might be exposed was formed. It is sectional drawing which shows the manufacturing process of the magnetoresistive element based on the 3rd Example of this invention, and shows the state by which the multilayer lower layer film was etched using the 2nd electrode as an etching mask in the opening part of an insulating film. It is sectional drawing which shows the manufacturing process of the magnetoresistive element based on the 3rd Example of this invention, and the state in which the protective film was formed covering the insulating film which has the 2nd electrode used as an etching mask, and an opening part Indicates. It is a flowchart for demonstrating the manufacturing method of the device in each Example of this invention.

  In the device manufacturing method, the inventor provided a recess having a smooth bottom surface in the vertical or dimple shape in the electrode portion in which the contact hole is formed, and sequentially formed the element material thereon, and finally the etching mask material To form a flat surface. Thereby, an etching mask corresponding to the depression can be formed in a self-aligning manner. Further, when the element material is processed using this etching mask, the element becomes inclined due to the depression and becomes thicker in the vertical direction. However, although ions are incident on the surface of the substrate (wafer) perpendicularly, there is no problem because the sputtering yield increases due to the oblique angle of the element surface. Further, when a cluster ion beam is used, the effect of oblique incidence of ions is further increased, and it becomes possible to process more vertically.

  By using the above-mentioned manufacturing method, there is an advantage that an exposure process for patterning for irradiating high energy after film formation of the element material is omitted, and electrical damage to the element can be suppressed for production. In addition, since processing using obliquely incident ions can be used, vertical processability of the side walls of the element can be obtained, which is advantageous for miniaturization. Furthermore, in the device manufacturing method, it is possible to form in-device (in vacuum) in-line without contact with air atmosphere from film formation of elements to etching and SiN protective film formation. Oxidation due to the reaction with water or the like can be prevented, and deterioration of device characteristics can be suppressed.

  Hereinafter, the present invention will be described with reference to examples. In addition, although an Example demonstrates mainly MRAM, this invention is not limited to this. Moreover, the same code | symbol shows the same component.

  A method of manufacturing the MRAM according to the first embodiment of the present invention will be described with reference to the drawings. In this embodiment, a method of forming a magnetic tunnel junction (hereinafter referred to as MTJ) corresponding to a DRAM (Dynamic Random Access Memory) capacitor will be described.

  First, a dimple manufacturing process will be described with reference to FIGS. 1A to 1H and FIG. The dimple manufacturing process corresponds to steps S601 to S602 in the flowchart for explaining the device manufacturing method shown in FIG. As shown in FIG. 1A, a first electrode 102 is formed in a through hole 103 that is previously formed apart from the insulating film 101.

  Next, as shown in FIG. 1B, a dimple insulating film 104 is formed. Next, the alignment mold material 105 is formed on the first electrode 102. The mold member 105 is made of amorphous carbon, and for the formation thereof, the mold member 105 is formed by a method equivalent to a lens processing of a known CCD element or the like. Briefly, a rectangular resist pattern was formed, reflowed to round the corners, and then etched to form a substantially hemispherical pattern on the underlying amorphous carbon.

  An etching mask 106 was applied to this substrate by spin coating (FIG. 1D). The surface of the mold material 105 was lightly flattened (FIG. 1E), and the amorphous carbon of the mold material 105 was removed as shown in FIG. 1F.

  FIG. 1G is a cross-sectional view in which the dimple insulating film 104 is etched using the formed etching mask 106 having the opening 206 and the etching mask 106 is removed, and FIG. 1H is a plan view. A dimple 107 is formed in alignment with the first electrode 102.

  Next, a manufacturing flow from the dimple formation to the magnetic material layer formation will be described with reference to FIGS. 3A to 3D. The manufacturing process from the dimple formation to the magnetic material layer formation corresponds to step S603 shown in FIG. The substrate (wafer) on which dimples are formed as shown in FIG. 1G is put into a vacuum processing apparatus in which a plurality of processing chambers are connected by conveyance in a vacuum. Needless to say, first, a process (not shown) of removing the altered layer or oxide film layer formed on the first electrode 102 is performed. Next, as shown in FIG. 3A, the conductive film 110 is formed by a conformable method in which atomic layers are stacked isotropically. Subsequently, as shown in FIG. 3B, a first magnetic film 120 was formed by sputtering. Similarly, a barrier layer MgO film 130 (FIG. 3C) and a second magnetic film 140 (FIG. 3D) were formed. These film formations were successively carried out under reduced pressure in different processing chambers for each film formation material.

  Subsequently, a manufacturing flow from pattern formation of the magnetoresistive element to formation of the protective film will be described with reference to FIGS. 4A to 4G. These manufacturing processes correspond to steps S604 to S606 in FIG. In this example, these manufacturing steps were continued without taking out the vacuum in the previous vacuum processing apparatus. First, as shown in FIG. 4A, a stopper conductive film 150 is formed under vacuum and reduced pressure, and then a second electrode 160 such as Ta is formed (FIG. 4B). Next, a flattening process is performed to form a pattern of the second electrode 160 such as Ta, that is, a multilayer element film formed in a self-aligned manner corresponding to the position of the dimple 107 of the dimple insulating film 104 A second electrode was embedded in the recess (FIG. 4C). The multilayer element film is a main film constituting the element, and in this embodiment, refers to a multilayer film including the first and second magnetic films and the barrier layer MgO film. The stopper conductive film 150 has a function of a processing stopper when embedding the second electrode. Since the stopper conductive film 150 has conductivity, it functions as a part of the second electrode after processing. The embedded second electrode is used as a mask material for subsequent etching. Note that when the second electrode is planarized, films that are easily damaged such as the first and second magnetic films and the barrier layer MgO film are covered with the stopper conductive film 150, so And can be planarized by chemical mechanical processing such as damascene (CMP). In this example, the flattening process was continuously performed by Ta etch back or the like under a vacuum.

  Next, the stopper conductive film 150, which is the lower layer film, is etched using the pattern of the second electrode 160 such as Ta formed as shown in FIG. 4D as an etching mask. At this time, the gas and method used for etching must be appropriately selected. Ordinary ionic vertical etching may be used, or etching using a cluster ion beam may be selected. Etching using a cluster ion beam is often easier to perform vertical processing. Processing is sequentially performed while changing the etching gas and conditions (FIGS. 4D to 4E), and the etching is performed until the conductive film 110 is etched and the dimple insulating film is exposed as shown in FIG. 4F. Subsequently, the SiN protective film 170 is formed so as to wrap the entire device, and the processing of the device is completed. In this embodiment, the multilayer element film or the like can be processed by a plasma etching method, and the protective film or the like can be formed by a plasma CVD method using a vacuum processing apparatus having a multi-chamber. After this, it goes without saying that an interlayer insulating film is applied or contact hole processing for establishing conduction with the second electrode 160 is performed to complete an electrical element (not shown).

  As described above, an etching mask pattern is formed by further forming a metal electrode such as Ta above the MRAM element material formed in the recess and performing a planarization process, and an appropriate etching gas or etching is performed. Using the technique, vertical processing is performed, and then an SiN passivation film as a protective film is continuously formed in vacuum, so that an etching mask can be formed in the formed recess. The element damage can be reduced without being exposed to high energy irradiation. In addition, since the processed surface to be protected is not exposed to the atmosphere and can be continuously formed, processed, and formed with a protective film under vacuum and reduced pressure, deterioration due to oxidation of the element or the like can be prevented. Further, the yield is increased by increasing the incident angle of ions, and vertical processing can be performed, which is advantageous for forming a fine dense pattern.

  According to this embodiment, it is possible to provide a device manufacturing method and a plasma processing method in which the etching shape can be controlled vertically, the alignment accuracy can be secured in a self-aligning manner, and the deterioration of the electrical characteristics of the element can be prevented.

  A device manufacturing method according to the second embodiment of the present invention will be described with reference to FIGS. 2A to 2C. Note that the matters described in the first embodiment and not described in the present embodiment can be applied to the present embodiment as long as there is no special circumstances. In this embodiment, a method for forming dimples different from that in Embodiment 1 will be described.

  A dimple formation method in this embodiment will be described with reference to FIGS. 2A to 2C. A substrate on which the dimple insulating film 104 shown in FIG. 1B is formed is prepared, and an etching mask (resist film) having an opening 208 over the first electrode 102 through the dimple insulating film 104 using photolithography. 108 is formed. Next, as shown in FIG. 2B, the dimple insulating film 104 is isotropically etched using the etching mask 108 as a mask to expose the first electrode 102. Next, when the etching mask 108 is removed, a dimple 109 is obtained (FIG. 2C). The etching mask can be easily formed by the flow shown in FIGS. 2A to 2C. However, with respect to the shape of the opening, the method of FIGS. 1A to 1G shown in Example 1 is superior in shape controllability.

  The device manufacturing process after FIG. 2C is the same as the process after FIG. 3A shown in the first embodiment.

  Also in the present embodiment, an etching mask pattern is formed by further forming a metal electrode such as Ta above the MRAM element material formed in the depression and performing a planarization process, and an appropriate etching gas or etching is performed. Using the technique, vertical processing is performed, and then an SiN passivation film as a protective film is continuously formed in vacuum, so that an etching mask can be formed in the formed recess. The element damage can be reduced without being exposed to high energy irradiation. In addition, since the processed surface to be protected is not exposed to the atmosphere and can be continuously formed, processed, and formed with a protective film under vacuum and reduced pressure, deterioration due to oxidation of the element or the like can be prevented. Further, the yield is increased by increasing the incident angle of ions, and vertical processing can be performed, which is advantageous for forming a fine dense pattern.

  According to this embodiment, it is possible to provide a device manufacturing method and a plasma processing method in which the etching shape can be controlled vertically, the alignment accuracy can be secured in a self-aligning manner, and the deterioration of the electrical characteristics of the element can be prevented. Further, the dimples can be easily formed as compared with the first embodiment.

  A device manufacturing method according to the third embodiment of the present invention will be described with reference to FIGS. 5A to 5C. Note that matters described in the first or second embodiment but not described in the present embodiment can also be applied to the present embodiment unless there are special circumstances. In the first embodiment and the second embodiment, the pattern is formed based on the dimple shape that is gently depressed. In this embodiment, examples of other shapes will be described.

  A method for forming a recess in this embodiment will be described with reference to FIGS. 5A to 5C. As shown in FIG. 5A, the insulating film 180 for forming depressions is vertically processed by etching to form insulating film openings (depressions) 280. This can be realized, for example, by making the opening 208 of the etching mask 108 a desired size in FIG. 2A and performing anisotropic etching. Thereafter, an element is formed by the same method as described above. The shape at the end of the etching process is shown in FIG. 5B, and the cross-sectional shape when the SiN protective film 214 is formed is shown in FIG. 5C. If there is no problem in the distortion and crystallinity of the film even if the initial depression 280 has a vertical shape, it can be formed into a substantially vertical depression shape shown in this embodiment.

  Also in the present embodiment, an etching mask pattern is formed by further forming a metal electrode such as Ta above the MRAM element material formed in the depression and performing a planarization process, and an appropriate etching gas or etching is performed. Using the technique, vertical processing is performed, and then an SiN passivation film as a protective film is continuously formed in vacuum, so that an etching mask can be formed in the formed recess. The element damage can be reduced without being exposed to high energy irradiation. In addition, since the processed surface to be protected is not exposed to the atmosphere and can be continuously formed, processed, and formed with a protective film under vacuum and reduced pressure, deterioration due to oxidation of the element or the like can be prevented. Further, the yield is increased by increasing the incident angle of ions, and vertical processing can be performed, which is advantageous for forming a fine dense pattern.

  According to this embodiment, it is possible to provide a device manufacturing method and a plasma processing method in which the etching shape can be controlled vertically, the alignment accuracy can be secured in a self-aligning manner, and the deterioration of the electrical characteristics of the element can be prevented.

  In addition, this invention is not limited to an above-described Example, Various modifications are included. For example, the above-described embodiments have been described in detail for easy understanding of the present invention, and are not necessarily limited to those having all the configurations described. Further, a part of the configuration of a certain embodiment can be replaced with the configuration of another embodiment, and the configuration of another embodiment can be added to the configuration of a certain embodiment. Further, it is possible to add, delete, and replace other configurations for a part of the configuration of each embodiment.

DESCRIPTION OF SYMBOLS 101 ... Insulating film, 102 ... 1st electrode, 103 ... Through-hole, 104 ... Dimple insulating film, 105 ... Mold material, 106 ... Etching mask, 107 ... Dimple, 108 ... Etching mask, 109 ... Dimple, 110 ... Conductive film , 120 ... first magnetic film, 130 ... barrier layer MgO film, 140 ... second magnetic film, 150 ... stopper conductive film, 160 ... second electrode, 170 ... SiN protective film, 180 ... for forming depressions Insulating film, 206 ... mask opening, 208 ... mask opening, 214 ... SiN protective film, 280 ... insulating film opening.

Claims (11)

A first step of forming a first electrode embedded in the first insulating film;
A second step of forming a second insulating film disposed on the first electrode and having an opening that exposes the first electrode;
A third step of forming a multilayer element film so as to cover the second insulating film having the opening and the first electrode;
A fourth step of embedding an etching mask in a recess of the multilayer element film formed in a self-aligned manner corresponding to the position of the opening;
A fifth step of etching the multilayer element film using the etching mask as a mask;
Then, a sixth step of forming a protective film so as to wrap the multilayer element film,
A device manufacturing method characterized by comprising: In the manufacturing method of the device of Claim 1,
The device manufacturing method, wherein the etching mask embedded in the fourth step is a second electrode. In the manufacturing method of the device of Claim 1 or 2,
The method of manufacturing a device, wherein the fourth step includes a step of planarizing a surface of the etching mask. In the manufacturing method of the device according to any one of claims 1 to 3,
The device according to claim 1, wherein the opening formed in the second insulating film in the second step has a thickness of the second insulating film gradually increasing toward the peripheral portion in the peripheral portion. Method. In the manufacturing method of the device according to any one of claims 1 to 4,
The fifth step includes a method of etching the multilayer element film using a cluster ion beam. In the manufacturing method of the device according to any one of claims 1 to 5,
All the steps from the third step to the sixth step are carried out continuously under vacuum and reduced pressure. In the manufacturing method of the device of Claim 3,
The method for manufacturing a device, wherein the flattening step of the fourth step is an etch back step. In the manufacturing method of the device of Claim 3,
The device manufacturing method, wherein the flattening step of the fourth step is a CMP step. Preparing a substrate having an etching mask embedded in a recess formed in a self-aligned manner at a position corresponding to the dimple of a processing layer formed to cover the dimple;
In a vacuum processing apparatus, processing the processed layer in the region exposed to the etching mask using a cluster ion beam;
A plasma processing method comprising: The plasma processing method according to claim 9, wherein
The plasma is characterized in that the etching mask is embedded in a recess of the processing layer by etching back a material layer of the etching mask in the vacuum processing apparatus used in the processing step. Processing method. The plasma processing method according to claim 9, wherein
The plasma processing method, wherein the etching mask is embedded in a recess of the processed layer by using CMP.

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