KR102353069B1 - Self-aligned encapsulation hard mask to separate physically under-etched mtj cells to reduce conductive re-deposition - Google Patents

Abstract

A method of etching a magnetic tunneling junction (MTJ) structure is disclosed. The MTJ stack is deposited on the bottom electrode, the MTJ stack comprising at least a pinning layer, a barrier layer on the pinning layer, and a free layer on the barrier layer. A top electrode layer is deposited on the MTJ stack. A hard mask is deposited on the top electrode layer. The top electrode layer and hard mask are etched. Thereafter, the MTJ stack not covered by the hard mask is etched and stopped at or within the pinning layer. An encapsulation layer is then deposited over the partially etched MTJ stack and etched on a horizontal surface to leave a self-aligned hard mask on the sidewalls of the partially etched MTJ stack. Finally, the remaining MTJ stack not covered by the hard mask and the self-aligned hard mask are etched to complete the MTJ structure.

Description

SEPARATE PHYSICALLY UNDER-ETCHED MTJ CELLS TO REDUCE CONDUCTIVE RE-DEPOSITION to physically isolate underetched MTJ cells to reduce conductive re-deposition

BACKGROUND This disclosure relates to the general field of magnetic tunneling junctions (MTJs), and more particularly to etching methods for forming MTJ structures.

Fabrication of magnetoresistive random-access memory (MRAM) devices typically involves a series of processing steps in which many layers of metal and dielectric are deposited and patterned to form magnetoresistive stacks as well as electrodes for electrical connections. . To define the magnetic tunnel junction (MTJ) within each MRAM device, photolithography and precise patterning steps including reactive ion etching (RIE), ion beam etching (IBE), or combinations thereof are generally involved. During RIE, high-energy ions remove material vertically in areas not masked by the photoresist, separating one MTJ cell from another.

However, high energy ions can also react laterally with unremoved materials, oxygen, moisture, and other chemicals, causing sidewall damage and degraded device performance. To solve this problem, pure physical etching techniques such as Ar RIE or ion beam etching (IBE) were applied to etch the MTJ stack. However, due to their non-volatile nature, the physically etched conductive material in the MTJ and bottom electrode can form a continuous path across the tunnel barrier, resulting in a shorted device. A novel approach to overcoming this dilemma is needed to unlock the full potential of this physical etch for patterning future sub-60nm MRAM products.

Several references teach multi-step etching methods for forming MTJs, including US Pat. Nos. 9,793,126 (Dhindsa et al.), 9,722,174 (Nagel et al.), and 8,883,520 (Satoh et al.). All of these references are different from the present disclosure.

It is an object of the present disclosure to provide an improved method of forming an MTJ structure.

Another object of the present disclosure is to provide a method of forming an MTJ device using physical under etch to avoid chemical damage and physical shorting.

Another object of the present disclosure is that a separate, non-interacting MTJ cell is made using an encapsulating material as a self-aligning process, using physical under etch to avoid chemical damage and physical shorting. It is to provide a method of forming an MTJ device.

According to an object of the present disclosure, a method for etching a magnetic tunneling junction (MTJ) structure is achieved. An MTJ stack is deposited on the lower electrode, the MTJ stack comprising at least a pinned layer, a barrier layer on the pinned layer, and a free layer on the barrier layer. A top electrode layer is deposited on the MTJ stack. A hard mask is deposited on the top electrode layer. The top electrode layer and hard mask are etched. Thereafter, the MTJ stack not covered by the hard mask is etched and stopped at or within the pinned layer or seed layer. An encapsulation layer is then deposited over the partially etched MTJ stack and etched onto a horizontal surface to leave a self-aligned hard mask on the sidewalls of the partially etched MTJ stack. Finally, the hard mask and the remaining MTJ stack not covered by the self-aligned hard mask are etched to complete the MTJ structure.

In the accompanying drawings that form part of the material of the present disclosure, FIGS. 1 to 6 show a cross-sectional display step in a preferred embodiment of the present disclosure.

In a typical process, the entire MTJ stack is patterned by a single step of etching or by chemical RIE or physical Ar RIE or IBE. Thus, chemical damage or physical shorting occurs on the MTJ sidewall. In the process of the present disclosure, we first partially etch the MTJ to minimize physical re-deposition. The remaining MTJs are then etched using the encapsulating material as a self-aligned hard mask. This new process avoids chemical damage and physical short circuit simultaneously. In addition, the second step of etching is a self-aligning process, which means that it does not require complex photolithography steps that are difficult to control the overlay, especially for MRAM devices below 60 nm.

In the process of the present disclosure, the MTJ stack is first partially etched by physical etching such as RIE or IBE using different gas plasmas such as Ar and Xe so that there is no chemical damage but only a conductive re-deposition on the sidewalls. The amount of re-deposition depends on the amount of etching. By intentionally under-etching, eg, etching away only a portion of the free layer, tunnel barrier, and/or pinned or seed layer, re-deposition on the tunnel barrier sidewall can be significantly reduced or eliminated entirely. First, an encapsulating material is deposited to protect the etched MTJ. The RIE or IBE etch partially removes portions of the encapsulating material on top and bottom of the MTJ pattern. The remaining MTJs are then etched away using the encapsulating material on the MTJ sidewalls as a self-aligned hard mask, creating a separate non-interacting MTJ cell. Whatever type of etching is used, the free layer and tunnel barrier layer are not affected by this step due to the protection of the encapsulating material, thus maintaining high device performance.

Referring now to FIGS. 1 to 6 , the novel method of the present disclosure will be described in detail. With further particular reference now to FIG. 1 , there is shown a lower electrode formed on a substrate, not shown. Now, layers are deposited on the bottom electrode to form a magnetic tunnel junction. For example, a seed layer 12 , a pinned layer 14 , a tunnel barrier layer 16 , and a free layer 18 are deposited.

There may be one or more pinned layers, barrier layers, and/or free layers. A metal hard mask 20 such as Ta, TaN, Ti, TiN, W, Cu, Mg, Ru, Cr, Co, Fe, Ni, or alloys thereof with a thickness of 10-100 nm, and preferably ≥ 50 nm It is deposited on top of the MTJ stack. This hard mask will be used as the top electrode. Finally, a dielectric hard mask material 22 such as SiO2, SiN, SiON, SiC, or SiCN is deposited on the upper electrode 20 to a thickness of ≧20 nm. For example, the photoresist is patterned by 248 nm photolithography to form a photoresist pillar pattern 24 with a size d1 of ˜70-80 nm and a height ≧200 nm.

As now shown in Figure 2, dielectric and metal hard masks 22 and 20 are etched by a fluorocarbon based plasma, such as CF4 or CHF3 alone or mixed with Ar and N2. O2 can be added to reduce the pillar size d2 from 50-60 nm to 30-40 nm. Also, after etching by physical RIE or IBE (pure Ar), a large angle (70-90 degrees to the normal of the pillar) IBE trimming can be performed to form the pillar size d2 to 30-40 nm.

Referring now to FIG. 3 , to minimize metal re-deposition on the tunnel barrier, MTJ using physical RIE (pure Ar or Xe) or IBE stopping on a pinned or seed layer with similar pattern size. The stack is partially etched. Due to the nature of physical etching, there is no chemical damage. The height h of the partially etched MTJ stack is about 5-30 nm.

4, an encapsulating material 26 made of a metal oxide such as Al2O3 or MgO or a dielectric material such as SiN, SiC, SiCN, carbon, or TaC with a thickness d4 of 5-30 nm is partially An in-situ or ex-situ deposition is performed on the MTJ pattern etched by CVD, PVD, or ALD. Portions of the encapsulating material on the top and bottom of the pattern are etched away by RIE or IBE, leaving encapsulating spacers 28 on the sidewalls having a thickness d6 of 10-30 nm, as shown in FIG. 5 . Depending on the material used for the spacer, a different plasma may be used for this etching step. For example, a fluorine carbon based plasma such as CF4 or CHF3 can be used for SiN, SiC, and SiCN, and O2 can be applied to carbon, CF4, or fluorine carbon such as CHF3 or halogen such as Cl2, or combinations thereof. and can be used for TaC, Cl2 alone or halogen mixed with Ar can be used for Al2O3 and MgO.

Finally, using the encapsulation 28 left on the sidewalls of the MTJ pattern as a self-aligned hard mask as shown in FIG. 6 , the rest of the MTJ stack, such as the pinned layer 14 and/or the seed layer 12, is It can be etched by RIE or IBE. When RIE etching is used, chemical damage on the pinned layer and seed layer will not affect the central portion aligned with the free layer because the pinned and seed layer produced by this method is larger than the free layer. When physical RIE or IBE is used, the metal re-deposition from the pinned layer and the seed layer will not contact the tunnel barrier due to the protection of the encapsulation. This pinned layer etch and seed layer etch are self-aligned steps, meaning that there are no overlay control issues typically associated with sub-60nm MRAM device fabrication.

More importantly, the size of the pinned layer and seed layer is highly dependent on the thickness of the encapsulation sidewall, which acts as a hard mask, which is determined by the initial deposition thickness and subsequent etching conditions. By adjusting these parameters, it is possible to precisely control the size of the pinned layer and the seed layer according to the device design. For example, by creating a thick spacer with a thickness d8 of 10-20 nm on the sidewall of the free layer, the size of the later defined tunnel barrier and pinned layer is larger than the free layer of d3 of 40-50 nm. It can be set to a size (d7) of 60 nm. This is particularly important for small cell size devices as it enables strong pinning strength, increased energy barrier, and reduced switching current.

In summary, the process of this disclosure uses physical under etch to avoid chemical damage and physical shorting. In addition, discrete and non-interacting MTJ cells are made using the encapsulating material in a self-aligned process, which means there are no overlay control issues typically associated with sub-60nm MRAM device fabrication. Therefore, it is widely used and can replace chemical RIE etching, which can inevitably cause chemical damage to MTJ sidewalls. This process will be used for MRAM chips with sizes smaller than 60 nm, as the problems associated with chemically damaged sidewalls and re-deposition from MTJ stacks and bottom electrodes become more serious for smaller sized MRAM chips.

While preferred embodiments of the present disclosure have been illustrated and the forms have been described in detail, those skilled in the art will readily appreciate that various modifications may be made without departing from the spirit of the disclosure or the scope of the claims.

Claims (20)

A method of manufacturing a magnetic tunneling junction (MTJ) structure, comprising:
depositing an MTJ stack on a lower electrode, the MTJ stack comprising at least a seed layer, a pinned layer on the seed layer, a barrier layer on the pinned layer, and a free layer on the barrier layer ;
depositing a top electrode layer on the MTJ stack;
forming a hard mask on the upper electrode layer;
first etching the top electrode layer and the hard mask with a first etching process;
thereafter, in a second etch process different from the first etch process, a second etch of the MTJ stack using the hard mask as a mask, stopping at or within the pinned layer;
thereafter, depositing an encapsulation layer over the partially etched MTJ stack and etching away the encapsulation layer on a horizontal surface, leaving a self-aligned hard mask on sidewalls of the partially etched MTJ stack; and
thereafter, a third etching of the hard mask and the remaining MTJ stack not covered by the self-aligned hard mask to complete the MTJ structure - forming the seed layer such that the lower electrode is wider than the seed layer said third etched -
A method of manufacturing an MTJ structure comprising a. According to claim 1,
The upper electrode layer includes Ta, TaN, Ti, TiN, W, Cu, Mg, Ru, Cr, Co, Fe, Ni, or an alloy thereof, and the hard mask is SiO ₂ , SiN, SiON, SiC, Or comprising SiCN, a method of manufacturing an MTJ structure. According to claim 1,
The hard mask and the upper electrode layer are _{etched by a fluorine carbon-based plasma containing only CF 4} or CHF ₃ or mixed with Ar and N _{2 , and O 2} is added to reduce the pattern size of the hard mask. optionally added or etched by physical reactive ion etching (RIE) or ion beam etching (IBE) and subsequent large angle IBE trimming to reduce the pattern size of the hard mask The method of manufacturing the MTJ structure. According to claim 1,
wherein the second and third etching include physically reactive ion etching or ion beam etching using Ar or Xe gas plasma. According to claim 1,
wherein there is no chemical damage to the sidewalls of the MTJ stack, and any first conductive metal re-deposition after the second etch and the second conductive metal re-deposition after the third etch are separated from each other by the self-aligning hard mask , a method of fabricating the MTJ construct. According to claim 1,
The step of forming the encapsulation layer comprises: a dielectric layer comprising SiN, SiC, SiCN, carbon, or TaC, or _{a metal oxide comprising Al 2} O ₃ or MgO to a thickness of 5-30 nm, chemical vapor (CVD) deposition), physical vapor deposition (PVD), or atomic layer deposition (ALD), comprising the step of forming a film in situ or ex situ, a method of manufacturing an MTJ structure. According to claim 1,
and the pattern size of the pinned layer is controlled by adjusting the thickness of the self-aligned hard mask. According to claim 1,
wherein the pattern size of the pinned layer is greater than the pattern size of the free layer. A method of making a magnetic tunneling junction (MTJ) structure, comprising:
depositing an MTJ stack on a lower electrode, the MTJ stack comprising at least a seed layer, a pinned layer on the seed layer, a barrier layer on the pinned layer, and a free layer on the barrier layer;
depositing a top electrode layer on the MTJ stack;
forming a hard mask on the upper electrode layer;
first etching the top electrode layer and the hard mask with a first etching process;
Thereafter, with a second etching process different from the first etching process, the MTJ stack is second etched using the hard mask as a mask, and at or in the pinned layer or the seed layer stopping within a layer;
thereafter, depositing an encapsulation layer over the partially etched MTJ stack, and etching away the encapsulation layer on a horizontal surface to leave a self-aligned hard mask on sidewalls of the partially etched MTJ stack; and
thereafter, a third etching of the hard mask and the remaining MTJ stack not covered by the self-aligned hard mask to complete the MTJ structure - applying the seed layer to the third to expose the upper surface of the lower electrode Etched -
A method of manufacturing an MTJ structure comprising a. A magnetic tunneling junction (MTJ) structure comprising:
individual and non-interacting MTJ cells on the lower electrode;
Each of the MTJ cells,
a seed layer on the lower electrode, a pinned layer on the seed layer, a barrier layer on the pinned layer, and a free layer on the barrier layer, wherein the lower electrode is wider than the seed layer;
sidewall spacers on at least a top portion of the pinned layer and in contact with a top surface of the seed layer; and
top electrode layer on the free layer
A MTJ structure comprising a. delete delete delete delete delete delete delete delete delete delete

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