JP2017073438A - Device manufacturing method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To prevent wafer fracture during transportation thereof and to enable the division of a wafer while suppressing the damage to the wafer with an electrode formed on its backside, which includes a ring-like reinforcement part formed.SOLUTION: A device manufacturing method arranged so that a wafer W in which devices are formed in surface regions partitioned by streets is divided on an individual device basis comprises the steps of: forming a ring-like reinforcement part W4 in an outer peripheral portion by grinding the backside of the regions where the devices are formed, thereby forming a concave portion W3; implanting ions into the concave portion W3; forming a backside electrode 13 corresponding to the devices on the backside of the wafer W; sticking a support substrate 14 to the surface or backside of the wafer W; forming an etching mask 15 on the surface or backside of the wafer W while holding the wafer W with the support substrate 14 stuck thereto, provided that the etching mask has openings corresponding to the streets; and etching, by plasma, the wafer W along the streets over the etching mask 15 to divide the wafer on an individual device basis.SELECTED DRAWING: Figure 1

Description

  The present invention relates to a device manufacturing method for manufacturing individual devices by dividing a wafer by plasma etching.

  In a power device such as a power MOSFET, a metal electrode may be formed on the back surface of a substrate having a predetermined thickness on which the device is formed. The metal electrode is usually formed by depositing titanium (Ti), nickel (Ni), gold (Au) or the like by sputtering or the like under a reduced pressure environment.

  The wafer is formed to a predetermined thickness by back surface grinding and then transferred to the film forming chamber to form a metal electrode on the back surface. However, since the predetermined thickness is about 100 μm or less, the wafer is easily damaged during transfer. Therefore, the strength of the wafer during transportation is maintained by grinding the back side of the wafer corresponding to the region where the device is formed, and forming a ring-shaped reinforcing portion on the outer periphery of the wafer.

  A wafer having a ring-shaped reinforcing portion is cut into pieces by cutting with a cutting blade or irradiating a laser beam after cutting the inside of the ring-shaped reinforcing portion into a circle and removing the ring-shaped reinforcing portion on the outer peripheral side. The

JP 2013-141033 A

  However, when the wafer is divided by the cutting blade, the device is mechanically damaged, and when the wafer is divided by the laser beam irradiation, the device is damaged by heat or the like.

  The present invention has been considered in view of such a problem. For a wafer in which a ring-shaped reinforcing portion is formed, it is possible to prevent breakage during conveyance and facilitate conveyance, and to divide while suppressing damage. This is the issue.

  The present invention is a device manufacturing method in which a plurality of regions are defined by streets formed in a lattice pattern on the surface of a substrate, and a wafer in which a plurality of devices are formed in the partitioned regions is divided into individual devices. A ring-shaped reinforcing portion forming step for forming a ring-shaped reinforcing portion on the outer peripheral portion by grinding a region on the back surface side corresponding to a region where a plurality of devices are formed on the front surface to form a concave portion; An ion implantation step for injecting a wafer, a back electrode forming step for forming a back electrode corresponding to each device on the back side of the wafer, a support substrate adhering step for attaching a support substrate to the front or back surface of the wafer, An etching mask having an opening corresponding to a street is formed on the front surface or the back surface of the wafer while holding the wafer to which the support substrate is attached. And the etching mask forming process that, through the etch mask comprises a plasma etching step of dividing into individual devices the wafer by plasma etching along the street.

  In the device manufacturing method, in the supporting substrate attaching step, when the supporting substrate is attached to the back surface of the wafer, it is preferable that the supporting substrate is attached to the recess. Moreover, in the said support substrate sticking process, after removing the said ring-shaped reinforcement part, you may stick the said support substrate.

In the device manufacturing method according to the present invention, the ring-shaped reinforcing portion is formed and transported on the wafer, so that damage during transportation can be suppressed. For example, in order to form a back electrode, the strength of the wafer is kept high when the wafer is transferred to or from the step of forming the back electrode, and the wafer is damaged during the transfer. Can be suppressed.
The same applies to the case of carrying for ion implantation.
Furthermore, since it is separated into pieces by plasma etching, it is possible to perform division while suppressing damage to the device.

It is process drawing which shows 1st Embodiment of this invention. It is a schematic diagram which shows the example of a device. It is a schematic diagram which shows another example of a device. It is a perspective view which shows the example of a wafer. It is an expanded sectional view showing an example of a wafer. It is a perspective view which shows the example of a ring-shaped reinforcement part formation process. It is sectional drawing which shows the example of a pressure-reduction film-forming apparatus. It is sectional drawing which shows the example of a plasma etching apparatus. It is an expanded sectional view which shows the wafer after completion | finish of an etching process. It is an expanded sectional view which shows the example of the wafer in which TEG was formed in the street. It is an expanded sectional view which shows the wafer which formed the etching side groove | channel on both sides of TEG. It is an expanded sectional view which shows the state which removes TEG of the wafer which formed the etching side groove | channel on both sides of TEG. It is an expanded sectional view which shows the state which plasma-etches the street from which TEG was removed, and forms an etching groove | channel. It is process drawing which shows 2nd Embodiment of this invention. It is process drawing which shows 3rd Embodiment of this invention.

1 First Embodiment (a) Device Formation Step A substrate 10 made of silicon or the like shown in FIG. 1A is prepared, and devices are formed on the surface 10a. Although not shown in FIG. 1A, the device (including a part of the device) is subjected to a pattern forming process such as photolithography, a film forming process, an ion implantation process, an annealing process, etc. on the surface 10a of the substrate 10. Formed through. Each device includes, for example, the power MOSFET 101 shown in FIG. 2, the IGBT 102 shown in FIG. 3, and the like, and includes devices having electrodes on the front and back surfaces. In this process, ion implantation / annealing into the P-type region and N-type region of the device, plating to form a surface-side electrode on the device surface side, etching, etc. are performed, and the portion that becomes the gate terminal Then, the oxide film 104 and the metal film 103 are formed. A source electrode 105 is formed between the oxide films 104 of the power MOSFET 101 shown in FIG. 2, and a back electrode 106 is formed on the back side. On the other hand, an emitter electrode 107 is formed on a portion to be an emitter terminal of the IGBT 102 shown in FIG. 3, and a back electrode 108 is formed on the back surface side. In addition, an oxide film 109 and a gate electrode 109a are stacked on a portion to be a gate terminal of the IGBT 102.

  For example, as shown in FIG. 4, in a wafer W on which a large number of such devices D are formed, streets S are formed in a lattice pattern on the surface 10 a of the substrate 10, and a plurality of regions are partitioned by the streets S. A plurality of devices D are formed in the region. An area where the device D is formed is referred to as a device area W1, and a ring-shaped area around the area is referred to as an outer peripheral surplus area W2.

(B) Insulating Film Formation / Electrode Formation Step As shown in FIG. 1B, an insulating film 11 is formed on the surface 10a of the substrate 10, and a surface electrode 12 corresponding to each device is formed above each device. Form. As shown in FIG. 5, the insulating film 11 includes, for example, low-k films 11a and 11b and a passivation film 11c, and the low-k films 11a and 11b and the passivation film 11c are partially etched in the thickness direction. The surface electrode 12 shown in FIG. 1B is embedded in the portion removed by etching. The Low-k films 11a and 11b are formed of, for example, SiOF or fluorocarbon (C _x F _y ). The passivation 11c is formed of, for example, a silicon nitride (SiN) film or a SiO2 film. In FIG. 5, the surface electrode 12 formed above the device D and the metal wiring that connects the surface electrode 12 and the device D are not shown.

Low-k films 11 a and 11 b in the wafer W shown in FIG. 5 are not formed above the street S. Therefore, only the passivation film 11c is covered above the street S. Since the Low-k films 11a and 11b do not exist above the street S, a recess 110c is formed in a portion of the passivation film 11c located above the street S. Further, the side surface 110b of the Low-k film 11b is formed at a position farther from the device D than the side surface 110a of the Low-k film 11a. That is, a wall by the low-k film 11b is formed on the side of the low-k film 11a.
However, it is not limited to the laminated structure shown in FIG. The low-k film may be continuously laminated on the street.

(C) Ring-shaped Reinforcement Forming Step Next, as shown in FIG. 6, the protective member 1 is attached to the surface side of the wafer W, and the protective tape 1 side is held on the chuck table 20 of the grinding device 2. The back surface Wb of W is exposed. A grinding means 21 is provided above the chuck table 20. The grinding means 21 includes a rotating shaft 22, a wheel 23 attached to the lower end of the rotating shaft 22, and a grindstone 24 fixed to the lower surface of the wheel 23.

  In the grinding apparatus 2, the chuck table 20 rotates and the grinding means 21 descends while the rotating shaft 22 rotates, whereby the rotating grindstone 24 comes into contact with the back surface Wb of the wafer W to perform grinding. At this time, the grindstone 24 is brought into contact with the back side of the device region W1 (see FIG. 4) formed on the surface Wa of the wafer W, and the outer peripheral side thereof is not ground. Then, when the desired amount of the back side of the device region W1 is ground, the grinding is finished. Thus, by grinding only the region corresponding to the device region W1 in the back surface Wb, the recess W3 is formed in the back surface Wb, and the outer periphery around the recess W3 has a ring shape having the same thickness as before grinding. The reinforcing portion W4 remains. For example, the width of the ring-shaped reinforcing portion W4 may be about 2 to 3 mm. Further, the thickness of the ring-shaped reinforcing portion W4 is preferably several hundred μm. On the other hand, the thickness of the device region W1 can be reduced to about 30-100 μm. Since the ring-shaped reinforcing portion W4 is formed thicker than the device region W1, it is possible to prevent the strength of the entire wafer W from being lowered. As specific grinding conditions, for example, those described in Japanese Patent No. 5617792 can be adopted.

(D) Ion Implantation / Back Electrode Formation Step Next, when forming the device 101 shown in FIG. 2 in the recess W3, ions of arsenic (As) and antimony (Sb) are implanted, and the device 102 shown in FIG. In the case of forming, ions of boron (B) are implanted and annealing is performed to increase the conductivity of the substrate 10, and thereafter, as shown in FIG. 1D, the bottom surface W5 of the recess W3 into which ions are implanted is formed. A back electrode 13 made of a metal such as copper is formed on one surface. The back electrode 13 can be formed, for example, using the reduced pressure film forming apparatus 3 shown in FIG. The vacuum film forming apparatus 3 includes a holding unit 32 that holds the wafer W in an electrostatic manner inside a chamber 31. A sputtering source 34 made of metal is an exciting member at an opposed position above the holding unit 32. It is arranged in a state supported by 33. A high frequency power source 35 is connected to the sputtering source 34. An inlet 36 for introducing a sputtering gas is provided on one side of the chamber 31, and a decompression port 37 communicating with a decompression source is provided on the other side.

The protective member 1 side is attracted and held by the electrostatic chuck (ESC) in the holding portion 32, whereby the back surface of the wafer W is held facing the sputtering source 34. A high frequency power of about 13.56 MHz is applied from the high frequency power source 35 to the sputtering source 34 magnetized by the excitation member 33, and the inside of the chamber 31 is decompressed to about 10 ⁻² Pa to 10 ⁻⁴ Pa from the decompression port 37. When the plasma is generated by introducing argon gas from the inlet 36 while the pressure is reduced, the argon ions in the plasma collide with the sputtering source 34 and the metal particles are ejected to form the bottom surface W5 of the recess W3 of the wafer W. As shown in FIG. 1D, the back electrode 13 is formed. The back electrode 13 may be a laminated film laminated in the order of Ti (50 nm) / NiW (500 nm) / Au (50 nm). In this case, each target is installed in the sputtering chamber, and the target of the material not to be formed is shielded by plasma with a shutter. For example, when sputtering a Ti target, NiW and Au are shielded from plasma by a shutter or the like. When masking is applied to the ring-shaped reinforcing portion W4, the back electrode 13 is formed only on the bottom surface W5 of the recess W3. This process is performed in a state where the back side of the device region W1 is thinned by grinding. However, since the ring-shaped reinforcing portion W4 is formed on the wafer W, the wafer W can be easily handled.

(E) Support substrate sticking process Next, as shown in FIG.1 (e), the support substrate 14 is stuck to the recessed part W3 of the wafer W in which the back surface electrode 13 was formed using an adhesive agent. The support substrate 14 has an outer diameter that is slightly smaller than the inner diameter of the recess W3, and fits into the recess W3. The support substrate 14 has a thickness corresponding to at least a step between the back electrode 13 and the ring-shaped reinforcing portion W4. In this way, by sticking the support substrate 14 to the recess W3, the wafer W can be stably supported in the subsequent process.

(F) Etching mask forming step After the supporting substrate attaching step, a resist material is applied over the entire surface so as to cover the insulating film 11 and the surface electrode 12, and corresponds to, for example, a portion that shields plasma in the subsequent plasma etching step. By exposing through the mask of the shape and removing the exposed portion, an etching mask 15 having an opening 15a corresponding to the street S is formed as shown in FIG.

  As the etching mask 15, for example, a phenol novolac resist can be used. A carbon-based resist may be used. A multilayer resist may be used in order to improve the etching selectivity of the etching target film with respect to the resist. When forming the mask, exposure may be performed with i-line (λ = 365 nm), h-line (λ = 405 nm), and g-line (λ = 436 nm) of a mercury lamp, or with an LED light source. Also good.

(G) Plasma Etching Step Next, the plasma etching apparatus 9 shown in FIG. 8 is used, for example, as shown in FIG. And the wafer W is divided into individual devices D.

  The plasma etching apparatus 9 includes an electrostatic chuck (ESC) 90 that holds the wafer W, a gas ejection head 91 that ejects gas, and a chamber 92 that houses the electrostatic chuck (ESC) 90 and the gas ejection head 91 therein. It has.

  The electrostatic chuck (ESC) 90 is supported from below by a support member 900. An electrode 901 is disposed inside the electrostatic chuck (ESC) 90, and this electrode 901 is connected to a matching unit 94a and a bias high-frequency power source 95a.

  A gas diffusion space 910 is provided inside the gas ejection head 91. A gas introduction port 911 communicates with an upper portion of the gas diffusion space 910, and a gas discharge port 912 communicates with a lower portion of the gas diffusion space 910. ing. The lower end of the gas discharge port 912 opens toward the holding table 90 side.

  A gas supply unit 93 is connected to the gas inlet 911 via a gas pipe 913. The gas supply unit 93 stores an etching gas and a rare gas.

  A high-frequency power source 95 is connected to the gas ejection head 91 via a matching device 94. By supplying high-frequency power from the high-frequency power source 95 to the gas ejection head 91 via the matching unit 94, the gas discharged from the gas discharge port 912 can be made into plasma.

  An exhaust pipe 96 is connected to the lower portion of the chamber 92, and an exhaust device 97 is connected to the exhaust pipe 96. By operating the exhaust device 97, the inside of the chamber 92 can be depressurized to a predetermined degree of vacuum.

  On the side of the chamber 92, a loading / unloading port 920 for loading / unloading the wafer W and a gate valve 921 for opening / closing the loading / unloading port 920 are provided.

  The plasma etching apparatus 9 includes a control unit 98. Under the control of the control unit 98, conditions such as the discharge amount of each gas, time, and high-frequency power are controlled.

  In this step, the gate valve 921 is opened, the wafer W is loaded from the loading / unloading port 920, and the protective member 1 attached to the wafer W is electrostatically held on the holding table 90. Then, the inside of the chamber 92 is exhausted by the exhaust device 97, the pressure in the chamber 92 is set to, for example, 0.10 to 0.15 Pa, and the etching gas stored in the gas supply unit 93 is introduced into the gas pipe 913 and the gas. The gas is ejected from the gas discharge part 912 through the port 911.

  An etching gas is introduced into the chamber 92, and the temperature of the holding table 90 is set to 70 ° C. or less, which is a temperature at which no gas is generated from the tape T, for example, and high frequency power (for example, RF high frequency) is supplied from the high frequency power source 95 to the gas ejection head 91. By applying 13.56 MHz (parallel plate type, RF output: 1 kW), a high-frequency electric field is generated between the gas ejection head 91 and the holding table 90, and the etching gas is turned into plasma. When the wafer to be etched is a wafer having a diameter of 300 mm, bias power (for example, 2 MHz, 500 W) is applied to the electrostatic chuck (ESC) from the bias high frequency power source 95a.

When etching the low-k films 11a and 11b made of SiOF, fluorocarbon or the like, or the insulating film 11 made of the passivation film 11c made of SiO ₂ , SiN or the like, a gas containing a halogen element or a basic gas, or the like is used as an etching gas. A mixed gas of CxFy or CxHyFz may be used. Moreover, you may use noble gases, such as Ar and He, as plasma production assistance gas. When the etching target is a wafer having a diameter of 300 mm, for example, the output of high-frequency power is 3 kW, the frequency of high-frequency power is 13.56 MHz, the output of bias power is 300 W, and the frequency of bias power is 2 MHz. The rare gas such as He assists the plasma formation of the etching gas, so that the plasma formation of the etching gas is accelerated. Note that the introduction of the rare gas into the chamber 92 may be performed before the introduction of the etching gas.

On the other hand, when the substrate 10 made of silicon is etched after the insulating film 11 is etched, a fluorine-based gas such as SF ₆ , CF ₄ , C ₂ F ₆ , or C ₂ F ₄ may be used as the etching gas. The substrate 10 is etched by alternately repeating etching and deposition under the following conditions A and B, whereby the etching proceeds under the condition A, and under the condition B, a protective film is formed on the side wall of the etching groove 16, and the high speed and high aspect ratio is achieved. Etching at a ratio is possible. Conditions A and B when the substrate 10 is a silicon substrate having a diameter of 300 mm are as follows.
(Condition A)
Etching gas: SF ₆ gas Plasma support gas: Ar gas Etching gas supply rate: 1500 cc / min Plasma support gas supply rate: 1000 cc / min High frequency power output: 3 kW
Bias power output: 500W
(Condition B)
Etching gas: C ₄ F ₈ gas Plasma support gas: Ar gas Etching gas supply rate: 1000 cc / min Plasma support gas supply rate: 500 cc / min High frequency power output: 3 kW
Bias power output: 0W
Here, the processing pressure is 10 Pa, and the substrate 10 is etched by alternately repeating the condition A for 0.6 seconds and the condition B for 0.4 seconds.

  After the wafer W is thus divided, the etching mask 15 is removed by ashing or the like. As shown in FIG. 9, the etching groove 16 formed in this step is formed to have a width that penetrates only the passivation film 11 c, and the passivation film 11 c remains on the side of the etching groove 16. Accordingly, a passivation wall 110d in which the passivation film 11c remains in a wall shape is formed on the sidewall of the etching groove 16, and the passivation wall 110d serves to protect the device D from intrusion of moisture and the like. Further, the structure is not limited to the laminated structure as shown in FIG. 9, and a structure in which the end face of each insulating film is exposed to the etching groove 16 may be used.

  In this step, the boundary portion between the device region W1 and the ring-shaped reinforcing portion W4 may also be etched into a circle, and the device region W1 and the ring-shaped reinforcing portion W4 may be separated leaving the back electrode 13. Moreover, you may implement the above-mentioned support substrate sticking process after this process. Note that the back electrode 13 made of metal such as copper is not etched in this step.

  Note that, even if a metal such as a test element group (TEG) 50 is formed on the street S shown in FIG. 4 as shown in FIG. 10, the TEG 50 is formed over the entire width direction of the street. If not, the opening 16 can be formed by plasma etching. In order to form the opening 16 at this time, as an example, the insulating film 11 including the Low-k film is removed by plasma etching, and the surface 10a is partially exposed as shown in FIG. The cutting blade to be cut may be cut into the TEG 50 formed on the street S, and the TEG 50 may be cut and removed. Further, as shown in FIG. 11, a depth D (for example, 5 to 10 μm from the surface 10 a of the substrate 10) in a region where the TEG 50 is not formed in the street S of the substrate 10 from the surface 10 a to the cutting depth of the cutting blade 41. Etching) is performed to form the processing (etching) side grooves 51 on both sides of the TEG 50 of the street S, and then the cutting blade 41 is cut into the TEG 50 as shown in FIG. Also good. In this way, even when the cutting blade 41 cuts into the substrate 10, it is possible to prevent the generated crack from reaching the device D region beyond the street S. After removing the TEG 50 with the cutting blade 41, plasma etching is performed to form the etching groove 52 as shown in FIG. Instead of the cutting blade 41, the TEG 50 may be removed by laser light irradiation. You may apply similarly to 2nd Embodiment mentioned later.

(H) Reattachment Step Next, as shown in FIG. 1 (h), the protective member 17 is attached to the surface of the wafer W where the insulating film 11 and the surface electrode 12 are formed, and supported from the recess W3. The substrate 14 is peeled off, and the back electrode 13 is exposed. A ring-shaped frame 18 is attached to the outer peripheral portion of the protection member 17.

(I) Metal film removal step Next, as shown in FIG. 1 (i), by blasting the fine particles along the street S against the back electrode 13 of the wafer W to which the protective member 17 is adhered, Of the back electrode 13, the part corresponding to the street S, that is, the back side of the street S is partially removed. As the fine particles, resinous fine particles may be used so as not to damage the device. Moreover, you may use what vaporizes after spraying (for example, dry ice). Further, the back electrode 13 may be broken along the street S by expanding the wafer W in a direction parallel to the surface direction instead of spraying the fine particles. In this way, by removing the portion corresponding to the street S in the back surface electrode 13, the chip is divided into individual chips C. Further, the ring-shaped reinforcing portion W4 is separated from the device region W1.

  In order to pick up the chip C thereafter, a tape is attached to the back electrode 13 side. A frame 18 is attached to the outer periphery of the tape. On the other hand, the support substrate 17 is peeled from each chip C.

  As described above, since the individual chips C are formed by plasma etching, the individual chips C are not subjected to mechanical damage during cutting by the cutting blade or thermal damage during processing by the laser beam. Therefore, the quality of the devices constituting the chip C can be improved.

  Further, when the wafer W is transported to the reduced pressure film forming apparatus 3 shown in FIG. 7 for forming the back electrode, since the ring-shaped reinforcing portion W4 is formed on the wafer W, the strength of the wafer W is high and breakage is caused. Hard to do.

2 Second Embodiment In the second embodiment, the following four steps (a)-(d) are performed in the same manner as in the first embodiment, as shown in FIGS. 14 (a)-(d).
(A) Device forming step (b) Insulating film forming / electrode forming step (c) Ring-shaped reinforcing portion forming step (d) Ion implantation / back electrode forming step

(E) Ring-shaped reinforcement part removal process Next, as shown in FIG.14 (e), the tape 17a is stuck to the back surface electrode 13 side, and the ring-shaped flame | frame 19 is stuck to the outer peripheral part of the tape 17a. Then, for example, by holding the tape 17a side on the chuck table 40 of the cutting device and cutting the cutting blade (not shown) inside the ring-shaped reinforcing portion W4 while rotating the chuck table 40, the device region W1 (see FIG. 4) and the ring-shaped reinforcing portion W4 are separated, and the ring-shaped reinforcing portion W4 is removed.

(F) Support substrate sticking process Next, as shown in FIG.14 (f), the tape 17a is peeled from the back surface electrode 13, and the support substrate 14a is stuck to the back surface electrode 13. FIG. In this way, the wafer W from which the back electrode 13 is formed and the ring-shaped reinforcing portion W4 is removed is supported by the support substrate 14a.

(G) Etching Mask Formation Step Next, as shown in FIG. 14G, an etching mask 15b is formed on the insulating film 11 and the surface electrode 12 of the wafer W supported by the support substrate 14a. The method of forming the etching mask 15b is the same as that in the first embodiment, and the opening 15c is formed along the street S.

  Further, after forming the opening 15c, the insulating film 11 is etched through the etching mask 15b. Etching conditions are the same as those for etching the insulating film 11 in the plasma etching step of the first embodiment. By etching the insulating film 11 through the etching mask 15b, the street S portion of the substrate 10 is exposed.

(H) Plasma Etching Step Next, the substrate 10 is plasma etched along the streets S through the etching mask 15b. Etching conditions are the same as those for etching the substrate 10 in the plasma etching process of the first embodiment. By etching the substrate 10 along the streets S, an etching groove 16 is formed and the back electrode 13 is exposed as shown in FIG.

(I) Replacement Step After the plasma etching step is finished, as shown in FIG. 14 (i), a protective member 17 is attached to the insulating film 11 and the surface electrode 12, and a ring-shaped frame 18 is attached to the outer peripheral portion of the protective member 17. Affix. Further, the support substrate 14 a is peeled from the back electrode 13. In this way, the back electrode 13 is exposed.

(J) Metal Film Removal Step Next, the portion corresponding to the street S in the back electrode 13 is removed. A specific removal method is the same as that in the first embodiment. In this way, by removing the portion corresponding to the street S in the back surface electrode 13, the chip is divided into individual chips C.

3 Third Embodiment In the third embodiment, the following four steps are performed in the same manner as in the first and second embodiments, as shown in FIGS.
(A) Device forming step (b) Insulating film forming / electrode forming step (c) Ring-shaped reinforcing portion forming step (d) Ion implantation / back electrode forming step

(E) Support substrate sticking / ring-shaped reinforcing portion removing step As shown in FIG. 15 (e), the support substrate 14 a is stuck to the insulating film 11 and the front electrode 12, and the back electrode 13 is exposed. And the inner side of the ring-shaped reinforcement part W4 is cut with a cutting blade, and the ring-shaped reinforcement part W4 is removed.

(F) Etching Mask Formation Step Next, as shown in FIG. 15 (f), a resist is formed on the back electrode 13, and a portion corresponding to the street S is removed, thereby forming an etching mask 15 d. The method of forming the etching mask 15d is the same as that in the first and second embodiments, and the opening 15e is formed along the street S. For example, the metal film to be the back electrode may be reverse sputtered using argon plasma to remove the metal film.
The conditions when using a 300 mm wafer at this time are as follows. RF power of 13.56 MHz and 2 kW are applied to the upper electrode (gas ejection head 81) in FIG. 8, and 2 MHz is applied to the lower electrode (electrostatic chuck 90). A bias power of 500 W is applied, the pressure in the chamber 92 is 1 Pa, Ar gas is supplied at 100 sccm, and reverse sputtering is performed.

  Further, after forming the opening 15e, the insulating film 11 is etched through the etching mask 15d. Etching conditions are the same as those for etching the insulating film 11 in the plasma etching process of the first and second embodiments. By etching the insulating film 11 through the etching mask 15b, the street S portion of the substrate 10 is exposed.

  The opening 15e can also be formed by laser processing. In other words, by performing ablation processing by irradiating the etching mask 15d with a laser beam having an absorptive wavelength along the street S, the resist at that portion can be removed to form the opening 15e. In addition, the back electrode 13 can be removed along the streets S by using a laser beam having a wavelength that absorbs the metal constituting the back electrode 13.

  A thin film or a water-soluble protective film can also be used as the etching mask 15b. Also in this case, the opening 15e is formed by etching or laser processing. As a water-soluble protective film, for example, there is a “HogoMax” series provided by DISCO Corporation. When a water-soluble protective film is used as the etching mask 15b, the etching mask can be removed by supplying a cleaning liquid after plasma etching, which is efficient.

(G) Plasma Etching Step Next, the substrate 10 is plasma etched along the streets S from the back side of the wafer W through the etching mask 15d. Etching conditions are the same as those for etching the substrate 10 in the plasma etching process of the first and second embodiments. By etching the substrate 10 along the street S, an etching groove 16a is formed and divided into individual chips C as shown in FIG.

(H) Reattachment Step Next, as shown in FIG. 11 (h), the back electrode 13 is attached to the protective member 17, and the ring-shaped frame 18 is attached to the outer periphery of the protective member 17. Further, the support substrate 14 a is peeled off from the insulating film 11 and the surface electrode 12. Thus, when the insulating film 11 and the surface electrode 12 are exposed, each chip C is picked up thereafter.

W: Wafer W1: Device region D: Device S: Street W2: Peripheral surplus region W3: Recessed portion W4: Ring-shaped reinforcing portion W5: Bottom surface C: Chip 1: Protection member 10: Substrate 10a: Surface 101: Power MOSFET 102: IGBT 103: Metal film 104: Oxide film 105: Source electrode 106: Back electrode 107: Emitter electrode 108: Back electrode 109: Oxide film 109a: Gate electrode 11: Insulating film 11a, 11b: Low-k film 11c: Passivation film 110a, 110b: Side surface 110c: Recess 110d: Passivation wall 12: Front electrode 13: Back electrode 14, 14a: Support substrate 15, 15b, 15d: Etching mask 15a, 15c, 15e: Opening 16: Etching groove 17: Protection member 17a: Tape 18, 19: Frame 2: Cutting device 20: Chuck table 21: Grinding means 22: Rotating shaft 23: Wheel 24: Grinding wheel 3: Depressurized film forming device 31: Chamber 32: Holding part 33: Excitation member 34: Sputter source 35: High frequency power source 36: Inlet 37 : Decompression port 40: Chuck table 50: TEG 51: Etching side groove 52: Etching groove 9: Plasma etching apparatus 90: Electrostatic chuck (ESC) 900: Holding table 901: Electrode 91: Gas ejection head 910: Gas diffusion space 911: Gas inlet 912: Gas outlet 913: Gas piping
92: Chamber 920: Loading / unloading port 921: Gate valve 93: Gas supply unit 94: Matching unit 95: High-frequency power source 96: Exhaust pipe 97: Exhaust device 98: Control unit

Claims (3)

A device manufacturing method in which a plurality of regions are defined by streets formed in a lattice pattern on the surface of a substrate, and a wafer in which a plurality of devices are formed in the partitioned regions is divided into individual devices,
A ring-shaped reinforcing portion forming step for forming a ring-shaped reinforcing portion on the outer peripheral portion by grinding a region on the back surface side corresponding to a region where a plurality of devices are formed on the surface to form a recess;
An ion implantation step of implanting ions into the recess,
A back electrode forming step of forming a back electrode corresponding to each device on the back side of the wafer;
A support substrate attaching step of attaching a support substrate to the front or back surface of the wafer;
An etching mask forming step of holding the wafer to which the support substrate is attached and forming an etching mask having an opening corresponding to a street on the front surface or the back surface of the wafer;
A plasma etching step of dividing the wafer into individual devices by plasma etching along the streets through the etching mask;
A device manufacturing method including:   The device manufacturing method according to claim 1, wherein, in the supporting substrate attaching step, when the supporting substrate is attached to the back surface of the wafer, the supporting substrate is attached to the recess.   The device manufacturing method according to claim 1, wherein, in the supporting substrate attaching step, the supporting substrate is attached after the ring-shaped reinforcing portion is removed.

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