JP2017054845A - Lead frame for mounting optical semiconductor element and optical semiconductor device, and method for manufacturing them - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an optical semiconductor device which can prevent a terminal from coming off, have a high light condensing property, and can be downsized, and provide a lead frame for mounting the optical semiconductor device.SOLUTION: There is provided a lead frame for mounting an optical semiconductor device which includes: a metal plate 10; a die pad surface plating layer 21 provided on the surface of the metal plate 10; a lead surface plating layer 22 provided so as to face the die pad surface plating layer 21 on the surface of the metal plate 10; a die pad rear face plating layer 31 provided at a position on the opposite side to a die pad portion on the rear face of the metal plate 10; and a lead rear face plating layer 32 arranged at a position on an opposite side to the lead portion on the rear face of the metal plate 10, where the die pad surface plating layer 21 and the lead surface plating layer 22 have a resin coming-off prevention structure for preventing coming off from a sealing resin when the surface of the metal plate 10 is covered with the sealing resin, and the die pad rear face plating layer 31 and the lead rear face plating layer 32 do not have the resin coming-off prevention structure.SELECTED DRAWING: Figure 1

Description

  The present invention relates to a lead frame for mounting an optical semiconductor element, an optical semiconductor device, and a manufacturing method thereof.

  In recent years, semiconductor devices (semiconductor packages) have been downsized mainly for portable devices. For this reason, various CSPs (Chip Scale Packages) have been put on the market, but the semiconductor device described in Patent Document 1 is simple in structure and can be reduced in cost, and has a higher number of pins. Therefore, it is expected as an alternative product of FPBGA (Fine Pitch Ball Grid Array).

  In the method of manufacturing a semiconductor device according to the first embodiment described in Patent Document 1, a copper material for a lead frame is mainly used as a metal material, a wire bonding portion on one surface (front side), and the other surface A portion of the external connection terminal surface corresponding to the opposite surface of the semiconductor element mounting portion (on the back side) and the opposite surface of the wire bonding portion is plated to complete a semiconductor element mounting lead frame.

  Next, using the lead frame, a semiconductor element is mounted in a predetermined region, and after connecting the electrode of the semiconductor element and the wire bonding portion of the lead frame with a bonding wire, the semiconductor element and the bonding wire are sealed with an epoxy resin or the like. Stop.

  Thereafter, the copper material is etched using the plating layer formed as the external connection terminal surface as an etching mask, the semiconductor element mounting portion and the external connection terminal portion are electrically independent from each other, and finally cut into the size of the package. Complete the package. Here, the etching of the metal material exposed on the back surface after sealing with the epoxy resin will be specifically described as an etch back hereinafter, and is distinguished from the etching for forming the lead frame pattern.

  The manufacturing method of the semiconductor device according to the second embodiment described in Patent Document 1 mainly uses a copper material for a lead frame as a metal material, a wire bonding portion on one surface (front side), A plating layer is formed on the portion of the external connection terminal surface corresponding to the opposite surface of the semiconductor element mounting portion on the other surface (back surface side) and the opposite surface of the wire bonding portion. After that, a resist mask is formed on the entire back surface side, and on the front surface side, the formed plating layer is used as an etching mask, and the copper material is half-etched to a predetermined depth from the front surface side for mounting a semiconductor element. Complete the lead frame. Then, after mounting the semiconductor element and connecting the electrode of the semiconductor element and the wire bonding portion of the lead frame with a bonding wire, the semiconductor element and the bonding wire are sealed with an epoxy resin or the like.

  After that, the copper material is etched back using the plating layer formed as the external connection terminal surface as an etching mask, the semiconductor element mounting part and the external connection terminal part are electrically independent from each other, and finally cut into the size of the package. Complete the package.

  According to the method of manufacturing a semiconductor device described in Patent Document 1, each terminal portion (wire bonding portion and external connection terminal portion) is connected by a metal material or the remaining half-etched portion until resin sealing. Since the metal material or the remaining half-etched portion thereof is removed by etching back after stopping, there is no need to connect each external connection terminal to the outer frame. This eliminates the need for a support portion like a conventional lead frame, and increases the degree of freedom in design. For example, the external connection terminals can be arranged in two or more rows, and the number of pins can be increased with a small package size.

  The above description relates to a general semiconductor device. Needless to say, there is a similar requirement for an optical semiconductor device. For example, an optical semiconductor device as disclosed in Patent Document 2 is disclosed. In Patent Document 2, a die pad portion and a lead portion are formed on the surface of a conductive substrate by plating, an element is mounted on the die pad portion, wire bonding is performed, and the conductive substrate is removed after sealing with a transparent resin. Yes. By using a conductive substrate and removing the conductive substrate after sealing, the optical semiconductor device can be reduced in size and thickness.

JP 11-195742 A JP 2011-096970 A

  However, since the semiconductor device according to the first embodiment described in Patent Document 1 is connected only by contact between the upper surface of the internal terminal and the sealing resin, the adhesion strength is weak. For this reason, there is a problem in that the internal terminal comes out of the sealing resin during the etching of the metal material by the etch back after the resin sealing, the process yield is deteriorated and the cost is increased. Further, even after the completion of the semiconductor device, it is weak against an external impact for the above-described reason, and in some cases, the terminal portion may fall off due to the impact.

  In addition, the semiconductor device of the second embodiment described in Patent Document 1 tries to increase the connection strength by half-etching the internal terminal shape from the surface to form a hollow shape to increase the contact surface with the sealing resin. A method for manufacturing a semiconductor device has been proposed. Adhesion between the terminal and the sealing resin is improved because the internal terminal has a hollow shape, but the cost increases because it is necessary to add a half etching process from the surface using an expensive etching solution was there.

  Further, in Patent Document 2 that discloses an optical semiconductor device, it is possible to reduce the size and thickness by using a conductive substrate and removing it after sealing. However, in an optical semiconductor device using a general lead frame, a reflective resin or the like is used to form a reflector that reflects light from the LED element toward the side surface or the lower surface upward to collect light upward. Yes. However, in Patent Document 2, the die pad portion and the lead portion are thin plating layers, and the reflector cannot be formed, so that light from the optical semiconductor element is easily diffused and the light collecting property is not good. was there.

  Accordingly, the present invention provides an optical semiconductor device that is completed by etching a metal material with an etch back after sealing with a resin. An object of the present invention is to provide an optical semiconductor device that is high in size and can be reduced in size and thickness. It is another object of the present invention to provide an optical semiconductor element mounting lead frame that can be manufactured at low cost without requiring an expensive etching process in the optical semiconductor element mounting lead frame used in the optical semiconductor device.

In order to achieve the above object, an optical semiconductor element mounting lead frame according to an aspect of the present invention includes a metal plate,
A die pad surface plating layer for mounting an optical semiconductor element provided on the surface of the metal plate;
A lead surface plating layer provided opposite to the die pad surface plating layer on the surface of the metal plate; and
A die pad back surface plating layer provided at a position opposite to the die pad part on the back surface of the metal plate so that at least a part thereof overlaps the die pad part in a top view;
A lead back plating layer disposed at a position opposite to the lead portion on the back surface of the metal plate so that at least a part thereof overlaps the lead portion in a top view;
The die pad surface plating layer and the lead surface plating layer have a resin escape prevention structure for preventing escape from the sealing resin when the surface of the metal plate is covered with the sealing resin,
The die pad back surface plating layer and the lead back surface plating layer have a structure that does not have the resin escape prevention structure.

An optical semiconductor device according to another aspect of the present invention includes a die pad portion that includes the first metal pillar and can be mounted with a semiconductor element;
A lead portion comprising a second metal pillar and disposed opposite to the die pad portion;
A die pad surface plating layer provided on the surface of the die pad part;
An optical semiconductor element mounted on the surface of the die pad surface plating layer;
A die pad back surface plating layer provided on the back surface of the die pad part;
A lead surface plating layer provided on the surface of the lead portion;
A lead back plating layer provided on the back of the lead part;
A bonding wire for electrically connecting the electrode of the optical semiconductor element and the lead surface plating layer;
A first sealing resin portion provided so as to surround a central region including at least a connection portion of the optical semiconductor element, the bonding wire, and the lead surface plating layer with the bonding wire;
A transparent resin portion provided so as to cover the central region; a second sealing resin portion provided so as to cover side surfaces of the die pad portion, the lead portion, the die pad back surface plating layer, and the lead back surface plating layer; Have
The die pad surface plating layer and the lead surface plating layer have a resin omission prevention structure for preventing the omission from the first sealing resin portion and the transparent resin portion,
The die pad back surface plating layer and the lead back surface plating layer have a structure that does not have the resin escape prevention structure.

A method of manufacturing a lead frame for mounting an optical semiconductor element according to another aspect of the present invention includes a step of covering a front surface and a back surface of a metal plate with a first resist layer,
Forming an opening having an inverted trapezoidal cross-sectional shape in the first resist layer on the surface of the metal plate to form a first plating mask;
Forming a first plating layer on the surface of the metal plate using the first plating mask;
Removing the first resist layer;
Covering the front surface and the back surface of the metal plate with a second resist layer;
Forming an opening in the second resist layer on the back surface of the metal plate to form a second plating mask;
Forming a second plating layer on the back surface of the metal plate using the second plating mask;
Removing the second resist layer.

An optical semiconductor device manufacturing method according to another aspect of the present invention includes at least the die pad portion on the surface of the optical semiconductor element mounting lead frame manufactured by the optical semiconductor element mounting lead frame. A first resin sealing step of resin-sealing with a first sealing resin so as to surround a central region including a region where an optical semiconductor element can be mounted and a connection portion where wire bonding is performed on the lead portion;
Mounting the optical semiconductor element on the die pad portion;
Connecting the electrode of the optical semiconductor element and the lead by wire bonding;
A second resin sealing step of sealing the central region with a transparent resin;
Using the second plating layer as an etching mask, etching the metal plate from the back side to form metal columns;
And a third resin sealing step for resin sealing the back surface of the metal plate.

  According to the present invention, in the lead frame for mounting an optical semiconductor element, pattern formation etching is unnecessary, and it can be manufactured at a low cost by a simplified manufacturing process.

It is the figure which showed an example of the lead frame for optical semiconductor element mounting which concerns on embodiment of this invention. It is the figure which showed an example of the optical semiconductor device which concerns on embodiment of this invention. It is the figure which showed an example of the optical semiconductor device which concerns on embodiment of this invention. FIG. 3A is a plan view showing an example of an optical semiconductor device according to the embodiment of the present invention. FIG. 3B is a cross-sectional view showing an example of an optical semiconductor device according to the embodiment of the present invention. It is sectional drawing which showed an example of the lead frame for optical semiconductor element mounting which concerns on embodiment of this invention. It is the figure which showed a series of processes of the first half of an example of the manufacturing method of the optical semiconductor element mounting lead frame which concerns on embodiment of this invention. FIG. 5A is a diagram illustrating an example of a metal plate preparation process. FIG. 5B is a diagram showing an example of the first resist layer coating step. FIG. 5C shows an example of the first exposure / development process. FIG. 5D is a diagram showing an example of the first plating / first resist removing step. It is the figure which showed the series of processes of the latter half of an example of the manufacturing method of the optical semiconductor element mounting lead frame which concerns on embodiment of this invention. FIG. 6A is a diagram showing an example of the second resist layer coating step. FIG. 6B is a diagram showing an example of the second exposure / development process. FIG. 6C is a diagram showing an example of the second plating step. FIG. 6D is a diagram showing an example of the second resist layer peeling step. It is the figure which showed a series of processes of the first half of an example of the manufacturing method of the optical semiconductor device which concerns on embodiment of this invention. FIG. 7A is a diagram showing an example of the first resin sealing step. FIG. 7B is a diagram showing an example of the optical semiconductor element mounting process. FIG. 7C is a diagram illustrating an example of a wire bonding process. FIG. 7D is a diagram showing an example of the transparent resin sealing step. It is the figure which showed the series of processes of the latter half of an example of the manufacturing method of the optical semiconductor device which concerns on embodiment of this invention. FIG. 8A is a diagram showing an example of the etch back process. FIG. 8B is a diagram showing an example of the second resin sealing step. FIG. 8C is a diagram showing an example of the cutting process.

  DESCRIPTION OF EMBODIMENTS Hereinafter, embodiments for carrying out the present invention will be described with reference to the drawings.

  FIG. 1 is a view showing an example of a lead frame for mounting an optical semiconductor element according to an embodiment of the present invention. An optical semiconductor element mounting lead frame 50 according to the present embodiment is configured using a metal plate 10. The metal plate 10 has a die pad part region 11 on which an optical semiconductor element is mounted, and a lead part region 12 serving as an internal terminal electrically connected to the electrode part of the optical semiconductor element. The metal plate 10 is provided with a surface plating layer 20 on the surface and a back plating layer 30 on the back surface. The surface plating layer 20 includes a die pad surface plating layer 21 and a lead surface plating layer 22, and the back surface plating layer 30 includes a die pad back surface plating layer 31 and a lead back surface plating layer 32. More specifically, the die pad surface plating layer 21 and the lead surface plating layer 22 are provided in the die pad area 11 and the lead area 12 on the surface side of the metal plate 10 respectively, and the die pad surface plating layer 21 and the lead surface plating on the back surface side. A die pad back surface plating layer 31 and a lead back surface plating layer 32 are respectively provided at positions opposite to the layer 22. The die pad surface plating layer 21 is a plating layer for mounting an optical semiconductor element on the surface, and constitutes a die pad portion. The lead surface plating layer 22 is a plating layer serving as an internal terminal electrically connected to the electrode portion of the optical semiconductor element mounted on the die pad surface plating layer 21 and constitutes a lead portion. The back surface plating layer 30 is provided on the back surface of the metal plate 10 and at a position opposite to the surface plating layer 20, and external devices can be connected to both the die pad back surface plating layer 31 and the lead back surface plating layer 32. Functions as an external terminal.

  Although various metal materials may be used for the metal plate 10, for example, a copper material or a copper alloy material may be used, and it is desirable to use a high-strength metal material used in a normal lead frame. The thickness of the metal plate 10 is preferably selected in the range of 50 to 200 μm in consideration of ease of handling and the like. Considering the productivity of etch back, it is more preferable to use a metal plate having a thickness of 50 to 150 μm. Strictly speaking, the metal plate 10 has neither the front surface nor the back surface, and either one may be used as the front surface. For convenience of explanation, the patterning of the surface plating layer 20 on which a semiconductor element is mounted and electrically connected is provided. The surface is hereinafter referred to as a front surface, and the patterning surface of the back plating layer 30 electrically connected to an external device is hereinafter referred to as a back surface.

  As described above, the die pad surface plating layer 21 is a plating layer for mounting an optical semiconductor element, and the lead surface plating layer 22 is an optical semiconductor element (not shown in FIG. 1) mounted on the die pad surface plating layer 21. ) Is a plating layer for connecting the electrodes by wire bonding. Therefore, the lead surface plating layer 21 is formed so that when the optical semiconductor element is mounted on the surface of the die pad surface plating layer 21, it can be connected to the electrode of the optical semiconductor element via the bonding wire. 21 on the surface of the metal plate 10 that is flush with the die 21 and at a position close to the die pad surface plating layer 21. Hereinafter, when the die pad surface plating layer 21 and the lead surface plating layer 22 are collectively referred to without distinction, they are collectively referred to as a surface plating layer 20. Similarly, when the die pad back surface plating layer 31 and the lead back surface plating layer 32 are collectively referred to without being distinguished, they are collectively referred to as a back surface plating layer 30.

  The surface plating layer 20 is configured to have a resin escape prevention structure that prevents the transparent resin part and the first sealing resin from coming off. Specifically, as shown in FIG. 1, the surface plating layer 20 is configured to have a reverse trapezoidal cross-sectional shape and a reverse tapered side surface. By having such a shape, when the surface of the metal plate 10 is covered with the sealing resin, it is possible to prevent a defect from coming off from the sealing resin. That is, by having an inverted trapezoidal shape, a portion where the tip is widened is caught by the sealing resin, and the surface plating layer 20 is difficult to come off. The surface plating layer 20 of the lead frame 50 for mounting an optical semiconductor element according to the present embodiment has such a shape that the tip is wider than the base, thereby effectively preventing the resin from coming off.

  The taper angle of the inverted trapezoidal or inversely tapered shape of the surface plating layer 20 may be set to various angles depending on the application, but may be set to, for example, 30 ° or more and 70 ° or less. The inverted trapezoidal cross-sectional shape or the inverse tapered side surface shape is formed by, for example, producing a plating mask having such a shape by exposure, and details of this point will be described later.

  The back plating layer 30 is a plating layer that functions as an external terminal to which an external device is connected. Since the back plating layer 30 does not need to prevent the resin from being removed, it may be formed as a plating layer having a normal rectangular cross-sectional shape. The external terminal plating layer 30 is formed on the back surface of the metal plate 10 at a position opposite to the surface plating layer 20.

  FIG. 2 is a diagram illustrating an example of an optical semiconductor device according to an embodiment of the present invention. The optical semiconductor device 100 according to this embodiment includes a die pad part 13, a lead part 14, a surface plating layer 20, a back plating layer 30, an optical semiconductor element 60, a bonding wire 70, and a first sealing resin. 80, a second sealing resin portion 81, and a transparent resin portion 90. The surface plating layer 20 includes a die pad surface plating layer 21 and a lead surface plating layer 22, and the back surface plating layer 30 includes a die pad back surface plating layer 31 and a lead back surface plating layer 32.

  The die pad surface plating layer 21 and the lead surface plating layer 22 are separated from each other by etching back the metal plate 10 of the optical semiconductor element mounting lead frame 50 shown in FIG. 1 from the back surface side using the back surface plating layer 30 as an etching mask. The die pad portion 13 and the lead portion 14 are configured. Since the die pad portion 13 and the lead portion 14 have the same etching direction, the die pad portion 13 and the lead portion 14 are configured as metal pillars having side surfaces that are gently curved or tapered from the back surface to the front surface direction. A lead surface plating layer 22 is formed on the surface of the lead portion 14, and a lead back plating layer 32 is formed on the back surface. A die pad surface plating layer 21 is formed on the surface of the die pad portion 13, and the semiconductor element 60 is mounted on the surface. On the back surface opposite to the die pad surface plating layer 21, a die pad back surface plating layer 31 is formed.

  The electrode 61 of the optical semiconductor element 60 is connected to the surface of the lead surface plating layer 22 via a bonding wire 70. In addition, a first portion having a frustoconical opening extending so as to surround the central region including at least the optical semiconductor element 60, the bonding wire 70, and the wire bonding portion (connection portion) of the lead surface plating layer 22. A sealing resin portion 80 is formed. The central region including the optical semiconductor element 60, the bonding wire 70, and the wire bonding portion (connection portion) of the lead surface plating layer 22 is filled with the transparent resin portion 90 so as to fill the opening of the first sealing resin portion 80. It has been stopped. The side surfaces of the die pad part 13, the lead part 14, and the back plating layer 30 are sealed with a second sealing resin part 81, and the surface of the back plating layer 30 serves as an external connection terminal. Is exposed from.

  Here, when the optical semiconductor device mounting lead frame 50 in FIG. 1 is processed into the optical semiconductor device 100 in FIG. 2, the first sealing resin 80 and the surface of the die pad portion 13 and the lead portion 14 are formed on the surface of the die pad portion 13 and the lead portion 14. After sealing with the transparent resin portion 90, the procedure is to etch back the metal plate 10 from the back side. At that time, as the etching of the metal plate 10 proceeds, the die pad portion 13 and the lead portion 14 are separated, and the final support location is supported by the first sealing resin portion 80 and the transparent resin portion 90. Only the surface plating layer 20, the bonding surface of the die pad portion 13 and the lead portion 14 are formed. Etch back is performed by spraying an etching solution onto the metal plate 10, so that a certain amount of pressure is applied to the metal plate 10. Therefore, it is necessary to have a bonding strength that can withstand this etching pressure. In the optical semiconductor device 100 according to the present embodiment, each surface plating layer 20 has an inverted trapezoidal cross-sectional shape and has an inversely tapered side surface shape, so that the side surface portion having a circumferential length wider than the root is the first. The sealing resin portion 80 and the transparent resin portion 90 are brought into a state of engagement, and the die pad portion 13 and the lead portion 14 can be effectively prevented from being disconnected.

  The second sealing resin 81 on the back side is preferably composed of the same resin as the first sealing resin 80 on the front side.

  Next, the positions of the front plating layer 20 and the back plating layer 30 will be described with reference to FIGS. 3 and 4. FIG. 3 is a diagram showing an example of an optical semiconductor device according to the embodiment of the present invention. FIG. 3A is a plan view showing an example of an optical semiconductor device according to the embodiment of the present invention. FIG. 3B is a cross-sectional view showing an example of an optical semiconductor device according to the embodiment of the present invention.

  The optical semiconductor device 100 according to the present embodiment has a tapered side surface that extends upward in the lateral direction of the optical semiconductor element 60 in order to efficiently collect the light emitted from the optical semiconductor element 60 upward. The first sealing resin portion 80 is formed, and in the lower direction of the optical semiconductor element 60, the surfaces of the die pad portion 13 and the lead portion 14 are covered with the surface plating layer 20, and the surface plating layer is a noble metal plating layer having a high reflectance. By configuring 20, the light directed in the lateral direction and the downward direction is reflected upward. Further, in the gap where the die pad portion 13 and the lead portion 14 face each other, the second resin sealing portion 81 becomes a reflection surface.

  However, the die pad portion 13 and the edge portion of the lead portion 14 on the opposite surface side of the die pad portion 13 and the lead portion 14 are generally not subjected to surface plating, and the metal portion is exposed on the surface. This is because the surface plating layer 20 and the back surface plating layer 30 are generally formed at the same position in the top view, that is, at an overlapping position, but after the first sealing resin portion 80 is sealed, it is etched back from the back side. Sometimes, it has a gentle curve or taper shape extending from the back to the front. For this reason, the shape of the upper surface of the die pad part 13 and the lead part 14 becomes larger than the surface plating layer 20, and the metal part is exposed at the edge part. Since it is not necessary to reflect light in the general semiconductor device instead of the optical semiconductor device 100, there is no problem even if the metal portion of the die pad portion 13 and the lead portion 14 is exposed from the edge portion of the surface plating layer 20. In the optical semiconductor device, since the exposed metal portion is not subjected to noble metal plating, there is a problem that the reflectance is reduced in the area of the exposed portion.

  Therefore, in the optical semiconductor element mounting lead frame 50 and the optical semiconductor device 100 according to the embodiment of the present invention, as shown in FIG. 3, at least the bottom surface of the transparent resin portion 90 is in contact, and the die pad portion 13 and the lead are connected. The upper surface of the metal part of the die pad part 13 and the lead part 14 is smaller than the surface plating layer 20 so that the metal part of the edge part of the die pad part 13 and the lead part 14 on the side facing the part 14 is not exposed to the surface. Etching is performed so that That is, at the edge of the surface plating layer 20 on the side where the die pad portion 13 and the lead portion 14 face each other and the edge of the upper surface of the metal portion of the die pad portion 13 or the lead portion 14, the surface plating layer 20 is The upper surface of the lead part 14 is completely covered, and is further protruded inward to form a bowl shape. In FIG. 3B, the dimension X is set to 0 or more. Preferably, the dimension X of the bowl-shaped portion where the die pad surface plating layer 21 and the lead surface plating layer 22 protrude inward is preferably in the range of 5 μm or more and 25 μm or less. In addition, the value of this saddle dimension X may be the same in the die pad part 13 and the lead part 14, or may be different.

  In order to configure the optical semiconductor element mounting lead frame 50 and the optical semiconductor device 100 as described above, the position of the back plating layer 30 is set outside the position of the surface plating layer 20 when the optical semiconductor element mounting lead frame is manufactured. Deploy.

  FIG. 4 is a cross-sectional view showing an example of an optical semiconductor element mounting lead frame according to an embodiment of the present invention. As shown in FIG. 4, in the optical semiconductor element mounting lead frame 50, the position of the back surface plating layer 30 on the side where the die pad portion 13 and the lead portion 14 are opposed to each other from the edge portion of the surface plating layer 20. A distance Y equal to or greater than the amount by which the lead portion 14 becomes a tapered shape or the like is set at a position separated from the surface plating layer 20. Preferably, the semiconductor device 100 is set to have the above-described saddle dimension X. Note that the amount of the tapered shape or the like is appropriately set depending on the etching solution, etching conditions, and the like.

  In addition, the structure which makes the edge part of the surface plating layer 20 as mentioned above a bowl shape covers the surface plating layer 20 previously with the transparent resin part 90 grade | etc., Like this embodiment, and etches from the lower side after that. It became possible by performing the procedure to do. For example, in the manufacturing method according to the second embodiment of Patent Document 1, which is a conventional method, when the surface plating layer 20 is used as a mask and etching is performed from the upper side, the surface plating layer 20 is difficult to be etched, and the lower conductive lead Since the frame (metal plate 10) is etched, the outer peripheral portion has a bowl shape, but the surface plating layer 20 is thin and becomes a plating burr, and peeling or dropping occurs. In the embodiment of the present invention, although the plating layer is thin, the surface plating layer 20 is made of a transparent resin since it is sealed with the transparent resin 90 or the like first with the metal plate 10 on the lower surface and then etched from below. It is in close contact with the portion 90 and the like, and there is no occurrence of peeling or dropping off of the heel portion.

  As described above, by appropriately setting the positions of the front plating layer 20 and the back plating layer 30, there is no exposure of the metal part, and the optical semiconductor device 100 does not reduce the amount of reflected light from the optical semiconductor element 60 downward. Can be obtained.

  Next, a method for manufacturing an optical semiconductor element mounting lead frame according to an embodiment of the present invention will be described.

  FIG. 5 is a diagram showing a series of steps in the first half of an example of a method for manufacturing an optical semiconductor element mounting lead frame according to an embodiment of the present invention.

  FIG. 5A is a diagram illustrating an example of a metal plate preparation process. In the metal plate preparation step, the metal plate 10 is prepared. As described above, for example, a copper plate having a thickness of 50 to 200 μm may be used for the metal plate 10.

  FIG. 5B is a diagram showing an example of the first resist layer coating step. In the first resist layer coating step, first, a resist layer 40 is formed on both surfaces of the metal plate 10, and the entire front and back surfaces of the metal plate 10 are covered with the resist layer 40. The resist layer 40 may be formed using various resists, for example, a dry film resist may be laminated on both surfaces of the metal plate 10. Further, the type and thickness of the dry film resist are not particularly limited, but a negative type resist that usually cures the photosensitive portion is used. In addition, a positive type dry film resist may be used. A liquid photoresist may be applied. The thickness of the resist layer 40 is determined by the line width and the line-to-line distance of the pattern to be formed, but a range of 15 to 40 μm is often used.

  FIG. 5C shows an example of the first exposure / development process. In the first exposure step, the resist layer 40 is exposed to a pattern for forming the surface plating layer 20 having a predetermined shape at a predetermined position. This is the same as a general method, and a photomask (not shown) having a pattern formed thereon is brought into close contact with the resist layer 40, and the photomask pattern is exposed to a dry film resist by irradiating with ultraviolet rays. At this time, the exposure shape on the back surface side, which is the external connection terminal on the opposite side to the front surface side on which the semiconductor element 60 is mounted, is distinguished. The plating pattern of each surface plating layer 20 is exposed on the front surface side, and the back surface side is not patterned by full exposure.

  At the time of exposure, exposure is performed using ultraviolet scattered light, and patterning is performed so that the scattered light is incident obliquely and has an inverted trapezoidal cross-sectional shape. As shown in FIG. 5C, ultraviolet scattered light is irradiated so that the uncured resist layer 40 has an inverted trapezoidal cross-sectional shape, and a portion irradiated with the scattered light becomes a cured portion 41.

  In the first development step, the resist layer 40 after the exposure step is developed, the uncured portion is dissolved and removed, and the opening 42 is formed. Thereby, the plating mask 43 is completed. Note that when an alkali development type photoresist is used as the resist layer 40, a designated developer is used. In this manner, a resist mask for the surface plating layer 20 in which the opening 42 having a predetermined shape is formed on the surface side of the metal plate 10 is formed.

  5B to 5C are the first plating mask forming process. By the first plating mask forming step, a plating mask 43 having an inverted trapezoidal cross-sectional shape, that is, an opening 42 having a reverse tapered side surface shape is formed.

  FIG. 5D is a diagram showing an example of the first plating / first resist removing step. In the first plating step, plating is performed on the opening 42 of the plating mask 43 to form the surface plating layer 20. The type of plating metal is not particularly limited, but is selected in consideration of the following. The uppermost surface of the surface plating layer 20 in the die pad region 11 and the lead region 12 reflects light downward from the optical semiconductor element 60 at the outermost surface of the die pad portion 13 and the lead portion 14, and emits light on the upper surface. There is a function to aggregate. For this reason, the kind of plating with a high reflectance is selected. Further, since the lead portion surface plating layer 22 is connected by wire bonding, a plating metal suitable for connection of the bonding wire 70 is selected. The die pad surface plating layer 21 and the lead surface plating layer 22 only need to satisfy both the above conditions, and various plating metal materials can be selected. For example, glossy Ag plating may be used. As described above, since the opening 42 of the plating mask 43 has a reverse taper shape, taper plating is performed on the surface of the metal plate 10.

  As described above, in the taper plating, the die pad portion 13 and the lead portion after the optical semiconductor element 60 is mounted and the transparent resin portion 90 and the first sealing resin 80 are sealed on the wire-bonded optical semiconductor element mounting side. There is an object to improve the adhesion strength of 14. For example, by setting the taper angle of the taper plating to 30 ° or more and 70 ° or less, a taper plating layer that sufficiently improves the adhesion strength can be obtained. When the taper angle of the plating shape is less than 30 °, it becomes difficult to fill the resin with the surface plating layer 20, which may cause unfilling. Further, when the taper angle exceeds 70 °, the adhesion strength between the resin and the surface plating layer 20 is insufficient, and there is a possibility that terminal peeling occurs at the time of etch back.

  After the first plating step, in the first resist layer peeling step, the plating mask 43 and the resist layer 41 on the back surface are peeled off. In addition, when an alkali development type photoresist is used as the resist layer 40, a specified stripping solution is used.

  FIG. 6 is a diagram showing a series of steps in the latter half of an example of a method for manufacturing a lead frame for mounting an optical semiconductor element according to an embodiment of the present invention.

  FIG. 6A is a diagram showing an example of the second resist layer coating step. In the second resist layer coating step, a resist layer 44 is formed on the entire surface of both surfaces of the metal plate 10 on which the surface plating layer 20 is plated. The formation of the resist layer 44 may be performed using various resists. For example, the resist layer 44 may be formed by laminating a dry film resist. The type and thickness of the dry film resist are not particularly limited, but a negative type resist that usually cures the photosensitive part is used. In addition, a positive type dry film resist may be used. Alternatively, a liquid photoresist may be applied. The thickness of the resist layer 44 is determined by the line width and the line-to-line distance of the pattern to be formed, but the range of 15 to 40 μm is often used.

  FIG. 6B is a diagram showing an example of the second exposure / development process. In the second exposure step, the resist layer 44 is exposed to a pattern for forming the back plating layer 30 having a predetermined shape at a predetermined position. This is the same as a general method, and a photomask having a pattern formed thereon is brought into close contact with the resist layer 40, and the pattern of the photomask is exposed to the resist layer 44 by irradiating ultraviolet rays. The resist layer 44 laminated on the plating pattern of the surface plating layer 20 on the front side is exposed on the entire surface, and the plating pattern of the back plating layer 30 is exposed on the back side. In addition, since a normal plating layer may be formed on the back surface side, general ultraviolet rays that are not scattered light may be irradiated. Note that the resist layer 44 irradiated with ultraviolet rays becomes a cured portion 45.

  In the second development step, the uncured portion of the resist layer 44 is dissolved and removed by development, and the opening 46 is formed. Thereby, the plating mask 47 is formed on the back surface side. When an alkali development type photoresist is used for the resist layer 44, a designated developer is used.

  Thus, the plating mask 47 for the back plating layer 30 in which the opening 46 having a predetermined shape is formed on the back side of the metal plate 10 is formed. 6A and 6B are the second plating mask forming process.

  FIG. 6C is a diagram showing an example of the second plating step. In the second plating step, the opening 46 of the plating mask 47 is plated. In consideration of heat resistance, solder jointability with an external device, etc., the plating metal may be normal electroplating, and single layer plating such as Ni, Pd, Au, or two or more kinds of multilayer plating. For example, Ni plating 0.5 μm, Pd plating 0.01 μm, and Au plating 0.003 μm may be used. In particular, it is preferable to use Ni plating thick plating for the purpose of preventing sagging and burrs of the back plating layer 30 after etch back. Thick plating of Ni plating has the purpose of preventing sagging and burrs of the back plating layer 30 after etch back. For example, the Ni plating layer is formed with a thickness of 2 μm or more and 20 μm or less by nickel sulfamate plating. . Thereafter, when the Pd plating layer is formed to 0.01 μm and the Au plating layer is formed to 0.003 μm, it is possible to prevent sagging of the back surface plating layer 30 and generation of burrs after the etch back. When the thickness of the Ni plating layer is less than 2 μm, the external terminal plating layer 30 may be sagging or burred after the etch back. On the other hand, when the Ni plating layer exceeds 20 μm, the plating thickness is increased and the productivity is lowered. Therefore, the Ni plating layer may be formed in a range of 2 μm or more and 20 μm or less as a part of the back plating layer 30. As described above, the back plating layer 30 may be formed of multiple plating layers.

  FIG. 6D is a diagram showing an example of the second resist layer peeling step. In the second resist layer peeling step, the resist layer 45 on the front surface side and the plating mask 47 on the back surface side are peeled off. In the case where an alkali development type photoresist is used as the resist layer 44, a designated stripping solution is used in the second resist layer stripping step.

  Next, the metal plate 10 is cut into a sheet shape, and if necessary, is cleaned to obtain the optical semiconductor element mounting lead frame 50 according to the embodiment of the present invention.

  As described above, in the method of manufacturing the lead frame for mounting an optical semiconductor element according to the embodiment of the present invention, the lead frame 50 for mounting an optical semiconductor element, which does not require an expensive etching process and can be manufactured at low cost only by plating. Can be provided.

  Next, a method for manufacturing an optical semiconductor device using the semiconductor element mounting lead frame according to the embodiment of the present invention will be described.

  FIG. 7 is a diagram showing a series of steps in the first half of an example of a method for manufacturing an optical semiconductor device according to an embodiment of the present invention.

  FIG. 7A is a diagram showing an example of the first resin sealing step. In the first resin sealing step, the region of the die pad surface plating layer 21 of the optical semiconductor element mounting lead frame 50 where the optical semiconductor element 60 is mounted, the optical semiconductor element 60, and the bonding wire of the lead surface plating layer 22. The first sealing resin portion 80 is formed by sealing with a sealing resin so as to surround the central region 15 including at least a portion to which the 70 is connected. As the type of resin used for the first sealing resin portion 80, a resin having high light reflectance is selected.

  FIG. 7B is a diagram showing an example of the optical semiconductor element mounting process. In the optical semiconductor element mounting step, the optical semiconductor element 60 is mounted on the die pad surface plating layer 21 of the lead frame 50 for mounting an optical semiconductor element. The optical semiconductor element 60 may be mounted using a silver paste or the like.

  FIG. 7C is a diagram illustrating an example of a wire bonding process. In the wire bonding step, the electrode 61 of the optical semiconductor element 60 is electrically connected to the lead surface plating layer 22 via the bonding wire 70 by wire bonding. The bonding wire 70 may be a wire having a size of 20 to 40 μmφ such as a gold wire or a copper wire.

  FIG. 7D is a diagram showing an example of the transparent resin sealing step. In the transparent resin sealing step, the opening of the first sealing resin portion 80 formed in FIG. 7A, that is, the central region 15 is resin-sealed with a transparent resin to form the transparent resin portion 90. Thereby, the optical semiconductor element 60, the bonding wire 70, the die pad surface plating layer 21, and the lead surface plating layer 22 are sealed.

  FIG. 8 is a diagram illustrating a series of steps in the latter half of the example of the method for manufacturing the optical semiconductor device according to the embodiment of the present invention.

  FIG. 8A is a diagram showing an example of the etch back process. In the etch back process, the metal plate 10 is etched back from the back surface side using each back surface plating layer 30 as an etching mask. Thus, the die pad part 13 and the lead part 14 become independent by etching back the metal plate 10. Here, the etch-back process is performed by etching back from one direction on the back plating layer 30 side, so that the cross-sectional shapes of the die pad part 13 and the lead part 14 after the etch back spread gently from the back side to the surface side or Tapered shape. Thereby, the terminal omission defect from the 2nd sealing resin part 81 can be eliminated. For example, in the etch back process, a copper material selective etchant used for etch back is nozzle-sprayed and sprayed on the back side of the optical semiconductor mounting lead frame 50. At this time, the spray pressure, spray time, and nozzle swing angle are changed. Adjustment may be made so that the cross-sectional shapes of the die pad portion 13 and the lead portion 14 after the etch-back become the above-described tapered shape.

  FIG. 8B is a diagram showing an example of the second resin sealing step. In the second resin sealing step, the back side of the metal plate 10 after the etch back processing is resin sealed. In Patent Document 1, the second resin sealing is not performed after the etch back. For this reason, the external terminal part side surface is exposed with the metal surface. For this reason, this exposed part is liable to cause defects such as oxidation and discoloration. In the optical semiconductor device and the manufacturing method thereof according to the embodiment of the present invention, it is possible to prevent problems such as oxidation and discoloration by sealing the side surfaces of the terminal portion in the second resin sealing step. Moreover, in 1st Embodiment of patent document 1, although the die pad part 13 and the lead part 14 are formed by etch back, the connection with a resin part is only the terminal upper surface containing the surface plating layer 20. FIG. For this reason, adhesion strength is weak and it is weak to the impact from the outside. In some cases, a problem that the terminal is disconnected may occur. In the optical semiconductor device and the manufacturing method thereof according to the embodiment of the present invention, the side surface of the terminal portion is sealed in the second resin sealing step, and the shape of the terminal is a gentle curve or taper extending from the back surface to the surface direction. Shape. Thereby, the adhesiveness of a terminal part and a resin part can be improved, and the impact from the outside can be prevented.

  FIG. 8C is a diagram showing an example of the cutting process. Finally, the assembly of the optical semiconductor devices 100 is cut into individual package sizes by a method such as sawing.

  According to the optical semiconductor element mounting lead frame and the optical semiconductor device and the manufacturing method thereof according to the embodiment of the present invention, in the optical semiconductor element mounting lead frame, pattern formation etching is not required, and the manufacturing process is simplified. Can be manufactured at low cost. Further, it is possible to prevent terminal loss during etching of the metal material in the etch back process after resin sealing. In the optical semiconductor device, by sealing the space between the die pad portion and the lead portion with the second sealing resin, it is possible to obtain a highly reliable optical semiconductor device in which the terminal portion does not fall off due to external impact or the like. . In addition, by forming the first sealing resin portion or the like, it is possible to provide an optical semiconductor device that has high light collecting properties and can be reduced in size and thickness.

〔Example〕
[Example 1]
Next, embodiments of the lead frame for mounting an optical semiconductor element, the optical semiconductor device, and the manufacturing method thereof according to the present invention will be described.

  As the metal plate 10, a dry film resist (2558 manufactured by Asahi Kasei) was laminated on both sides using a 0.125 mm thick copper-based alloy material (EFTEC64-T manufactured by Furukawa Electric).

Next, exposure was performed on both sides with a predetermined pattern. The front side was a pattern in which a die pad surface plating layer and a lead surface plating layer were arranged, and the back side was a pattern that was fully exposed. At the time of exposure, exposure was performed using ultraviolet scattered light so that the scattered light was incident from an oblique direction, and a pattern was formed so that the opening had an inverted trapezoidal cross-sectional shape.
Next, it developed and the plating mask in which the part which requires a surface plating layer was opened was formed.

  Next, Ag plating was formed to a thickness of 5 μm on the metal plate exposed from the opening of the formed plating mask to form a surface plating layer serving as a die pad surface plating layer and a lead portion surface plating layer.

  Next, the plating mask and the resist layer were peeled off.

  Next, a dry film resist (Asahi Kasei 2558) was laminated on both sides.

  Next, exposure was performed on both sides with a predetermined pattern. The front side was a pattern that was fully exposed, and the back side was a pattern in which a die pad back plating layer and a lead back plating layer were arranged. In addition, since the back plating layer may be a normal plating layer, general ultraviolet rays that are not scattered light were irradiated. Next, it developed and the plating mask with which the part which needs a back surface plating layer was opened was formed. Further, on the surface where the die pad portion and the lead portion face each other, the positions of the back surface plating layers of the die pad portion and the lead portion are set to 100 μm at the time of etching and 10 μm in the ridge size, and from the edge of the surface plating layer. The position was 110 μm outside.

  Next, Ni is plated by 2 μm in a nickel sulfamate bath on the metal plate exposed from the opening of the formed plating mask, Pd is plated in a thickness of 0.01 μm, Au is sequentially plated in a thickness of 0.003 μm, A back plating layer was formed.

  Next, the plating mask and the resist layer were peeled off.

  Next, the sheet was cut. In this manner, an optical semiconductor element mounting lead frame according to an example of the present invention was obtained.

  Next, the first sealing resin is sealed using the lead frame for mounting an optical semiconductor element obtained in the above-described process, and then the optical semiconductor element is mounted and connected by a bonding wire. From the side, the opening of the first sealing resin portion was sealed with a transparent resin.

  Next, the metal plate was etched back using the back plating layer formed on the back side as an etching mask.

  Next, 2nd resin sealing was performed from the back surface side. Note that the same resin was used for the first resin sealing and the second resin sealing.

  Thereafter, the optical semiconductor device was fabricated by cutting into pieces.

  Next, as confirmation of the effect, there is an exposure of the metal part at the edge part of the die pad part and the lead part on the opposite surface side of the die pad part and the lead part on the confirmation of the sealing resin adhesion of the surface plating layer of the example. Whether or not the appearance was confirmed with a microscope.

  Regarding confirmation of the sealing resin adhesion of the surface plating layer, it was confirmed whether the die pad part and the lead part were removed from the resin part during the etch back process after the resin sealing, and a defect occurred. In the embodiment of the present invention, there was no occurrence of a defect and it was good.

  Furthermore, it was confirmed that the metal part was not exposed with respect to whether or not the metal part was exposed at the edge of the die pad part and the lead part.

  Although the embodiments and examples of the present invention have been described in detail above, the present invention is not limited to the above-described embodiments and examples, and the above-described embodiments and implementations are performed without departing from the scope of the present invention. Various modifications and substitutions can be made to the examples.

DESCRIPTION OF SYMBOLS 10 Metal plate 11 Die pad part area | region 12 Lead part area | region 13 Die pad part 14 Lead part 15 Center area | region 20 Surface plating layer 21 Die pad surface plating layer 22 Lead surface plating layer 30 Back surface plating layer 31 Die pad back surface plating layer 32 Lead back surface plating layer 43, 47 Plating Mask 50 Semiconductor Device Mounting Lead Frame 60 Semiconductor Device 61 Electrode 70 Bonding Wire 80 First Sealing Resin Portion 81 Second Sealing Resin Portion 90 Transparent Resin Portion 100 Optical Semiconductor Device

Claims (16)

A metal plate,
A die pad surface plating layer for mounting an optical semiconductor element provided on the surface of the metal plate;
A lead surface plating layer provided opposite to the die pad surface plating layer on the surface of the metal plate; and
A die pad back plating layer provided at a position opposite to the die pad surface plating layer on the back surface of the metal plate so that at least a part thereof overlaps the die pad surface plating layer in a top view;
A lead back plating layer disposed at a position opposite to the lead surface plating layer on the back surface of the metal plate so that at least a part thereof overlaps the lead surface plating layer in a top view;
The die pad surface plating layer and the lead surface plating layer have a resin escape prevention structure for preventing the metal plate from coming off from the sealing resin when the surface of the metal plate is covered with the sealing resin. ,
The die pad backside plating layer and the lead backside plating layer are optical semiconductor element mounting lead frames that do not have the resin escape prevention structure.   2. The lead frame for mounting an optical semiconductor element according to claim 1, wherein the resin omission prevention structure is a structure in which the die pad surface plating layer and the lead surface plating layer are formed in a reverse taper shape having an inverted trapezoidal cross-sectional shape.   The lead frame for mounting an optical semiconductor element according to claim 2, wherein the taper angle of the inversely tapered shape is 30 ° or more and 70 ° or less.   The position of the opposing side surface of the die pad back surface plating layer and the lead back surface plating layer is outside the position of the opposing side surface of the die pad surface plating layer and the lead surface plating layer. A lead frame for mounting an optical semiconductor element according to the item. The die pad surface plating layer and the lead surface plating layer are Ag plating layers,
The die pad back surface plating layer and the lead back surface plating layer are multilayer plating layers formed by sequentially laminating a Ni plating layer, a Pd plating layer, and an Au plating layer from the back surface of the metal plate. 5. The lead frame for mounting an optical semiconductor element according to any one of 4 above. A die pad portion made of a first metal pillar and capable of mounting a semiconductor element;
A lead portion comprising a second metal pillar and disposed opposite to the die pad portion;
A die pad surface plating layer provided on the surface of the die pad part;
An optical semiconductor element mounted on the surface of the die pad surface plating layer;
A die pad back surface plating layer provided on the back surface of the die pad part;
A lead surface plating layer provided on the surface of the lead portion;
A lead back plating layer provided on the back of the lead part;
A bonding wire for electrically connecting the electrode of the optical semiconductor element and the lead surface plating layer;
A first sealing resin portion provided so as to surround a central region including at least a connection portion of the optical semiconductor element, the bonding wire, and the lead surface plating layer with the bonding wire;
A transparent resin portion provided so as to cover the central region; a second sealing resin portion provided so as to cover side surfaces of the die pad portion, the lead portion, the die pad back surface plating layer, and the lead back surface plating layer; Have
The die pad surface plating layer and the lead surface plating layer have a resin omission prevention structure for preventing the omission from the first sealing resin portion and the transparent resin portion,
The die pad back surface plating layer and the lead back surface plating layer do not have the resin escape prevention structure.   The optical semiconductor device according to claim 6, wherein the resin omission prevention structure is a structure in which the die pad surface plating layer and the lead surface plating layer are formed in an inverted taper shape having an inverted trapezoidal cross-sectional shape.   The optical semiconductor device according to claim 7, wherein the taper angle of the inversely tapered shape is 30 ° or more and 70 ° or less.   At least the opposing edges of the die pad surface plating layer and the lead surface plating layer from the opposing edge portions of the die pad surface plating layer and the lead surface plating layer, as viewed from above, on the opposite surface side of the die pad portion and the lead portion. The optical semiconductor device according to claim 6, wherein the portion does not protrude. The opposed edge portion of the die pad surface plating layer protrudes inward from the opposed edge portion of the die pad portion,
The optical semiconductor device according to claim 9, wherein the opposing edge portion of the lead surface plating layer protrudes inward from the opposing edge portion of the lead portion. The die pad surface plating layer and the lead surface plating layer are Ag plating layers,
The die pad back surface plating layer and the lead back surface plating layer are formed by sequentially laminating a Ni plating layer, a Pd plating layer, and an Au plating layer on the back surfaces of the first and second metal columns. The optical semiconductor device according to any one of claims 6 to 10.   12. The cross-sectional shape of the die pad portion made of the first metal column and the lead portion made of the second metal column is a gentle curve or taper shape extending from the back surface to the surface direction. The optical semiconductor device according to one item. Covering the front and back surfaces of the metal plate with a first resist layer;
Forming an opening having an inverted trapezoidal cross-sectional shape in the first resist layer on the surface of the metal plate to form a first plating mask;
Forming a first plating layer on the surface of the metal plate using the first plating mask;
Removing the first resist layer;
Covering the front surface and the back surface of the metal plate with a second resist layer;
Forming an opening in the second resist layer on the back surface of the metal plate to form a second plating mask;
Forming a second plating layer on the back surface of the metal plate using the second plating mask;
And a step of removing the second resist layer. A method of manufacturing a lead frame for mounting an optical semiconductor element.   14. The method of manufacturing a lead frame for mounting an optical semiconductor element according to claim 13, wherein the opening having the inverted trapezoidal cross-sectional shape of the first plating mask is formed by exposure and development using scattered light.   15. The optical semiconductor element mounting device according to claim 13, wherein the first plating layer includes a die pad portion having a region in which an optical semiconductor element can be mounted, and a lead portion disposed to face the die pad portion. Lead frame manufacturing method. On the surface of the lead frame for mounting an optical semiconductor element manufactured by the method for manufacturing a lead frame for mounting an optical semiconductor element according to claim 15, at least a region of the die pad portion where the optical semiconductor element can be mounted; A first resin sealing step of resin sealing with a first sealing resin so as to surround a central region including a connection portion where wire bonding is performed on the lead portion;
Mounting the optical semiconductor element on the die pad portion;
Connecting the electrode of the optical semiconductor element and the lead portion by wire bonding;
A second resin sealing step of sealing the central region with a transparent resin;
Using the second plating layer as an etching mask, etching the metal plate from the back side to form metal columns;
And a third resin sealing step of resin-sealing the back surface of the metal plate.

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