JP2017045875A - Semiconductor module and method of manufacturing the same - Google Patents

Semiconductor module and method of manufacturing the same Download PDF

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JP2017045875A
JP2017045875A JP2015167644A JP2015167644A JP2017045875A JP 2017045875 A JP2017045875 A JP 2017045875A JP 2015167644 A JP2015167644 A JP 2015167644A JP 2015167644 A JP2015167644 A JP 2015167644A JP 2017045875 A JP2017045875 A JP 2017045875A
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semiconductor module
bus bar
shunt resistor
lead frame
wiring
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JP2017045875A5 (en
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康寛 川井
Yasuhiro Kawai
康寛 川井
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NSK Ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L2224/39—Structure, shape, material or disposition of the strap connectors after the connecting process
    • H01L2224/40—Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838—Bonding techniques
    • H01L2224/83801—Soldering or alloying
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/84—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a strap connector
    • H01L2224/848—Bonding techniques
    • H01L2224/84801—Soldering or alloying
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/84—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a strap connector
    • H01L2224/848—Bonding techniques
    • H01L2224/8485—Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

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Abstract

PROBLEM TO BE SOLVED: To realize a structure capable of suppressing a size of a lead frame, and thereby, miniaturizing a module.SOLUTION: In a semiconductor module 1 having a three-phase inverter circuit for driving a motor, a part of a bus bar 8 that functions as wiring in the semiconductor module 1 is configured by a shunt resistance 9 for detecting a motor current, and respective shunt resistances 9 for three phases are integrated with one bus bar 8.SELECTED DRAWING: Figure 1

Description

本発明は、半導体モジュールおよびその製造方法に関する。   The present invention relates to a semiconductor module and a manufacturing method thereof.

モータ駆動用のインバータ回路において、回路基板やリードフレーム上に実装されたパワー半導体素子（トランジスタチップ）をエポキシ系材料の硬化性樹脂を用いてトランスファー成形し封止した半導体モジュールが利用されている。   In an inverter circuit for driving a motor, a semiconductor module is used in which a power semiconductor element (transistor chip) mounted on a circuit board or a lead frame is transfer-molded using an epoxy-based curable resin and sealed.

従来の半導体モジュールにおいては、電流値を検出するための電流検出手段として機能するシャント抵抗が、リードフレーム上に設けられたパワー半導体素子（トランジスタチップ）とは別個に、当該リードフレームの同一平面上に搭載される構造が多い（例えば特許文献１の図１等参照）。   In a conventional semiconductor module, a shunt resistor that functions as a current detection means for detecting a current value is provided on the same plane of the lead frame separately from a power semiconductor element (transistor chip) provided on the lead frame. There are many structures mounted on (see, for example, FIG. 1 of Patent Document 1).

特許第５２０００３７号公報Japanese Patent No. 5200037

しかしながら、このような構造の場合、部品サイズと搭載部品数によってトータルの実装面積が決定してしまうことから、リードフレームのサイズを抑制するには不利である。このため、このような観点からモジュールの小型化を図ることは難しい。   However, in such a structure, the total mounting area is determined by the component size and the number of mounted components, which is disadvantageous for suppressing the lead frame size. For this reason, it is difficult to reduce the size of the module from such a viewpoint.

本発明は、リードフレームのサイズを抑制し、ひいてはモジュールの小型化を図ることが可能な構造の半導体モジュールおよびその製造方法を提供することを目的とする。   It is an object of the present invention to provide a semiconductor module having a structure capable of suppressing the size of a lead frame and thus reducing the size of the module, and a manufacturing method thereof.

本発明者は、かかる課題を解決するべく、半導体モジュール内の配線の役割を担うバスバにおいて、バスバの一部をシャント抵抗で構成した構造を採用することを知見するに至った。すなわち、本発明は、モータを駆動するための３相インバータ回路を有する半導体モジュールにおいて、
該半導体モジュール内の配線として機能するバスバの一部がモータ電流検出用のシャント抵抗で構成され、
３相それぞれの前記シャント抵抗を１つの前記バスバに一体化した、というものである。 In order to solve this problem, the present inventor has come to find out that a bus bar having a role of wiring in the semiconductor module adopts a structure in which a part of the bus bar is configured by a shunt resistor. That is, the present invention provides a semiconductor module having a three-phase inverter circuit for driving a motor.
A part of the bus bar functioning as the wiring in the semiconductor module is composed of a shunt resistor for motor current detection,
The shunt resistors for each of the three phases are integrated into one bus bar.

これまでの半導体モジュールにおいては、パワー半導体素子（トランジスタチップ）とは別個にシャント抵抗をリードフレーム上に搭載するための面積を確保し、また、パワー半導体素子からリードフレームまでの配線スペースを確保することが必要であったところ、本発明に係る半導体モジュールによると、シャント抵抗一体のバスバの配線スペースを確保すれば足りる。このため、リードフレームのサイズ抑制、ひいてはパワーモジュールの小型化が図れる。   In the conventional semiconductor module, an area for mounting the shunt resistor on the lead frame is secured separately from the power semiconductor element (transistor chip), and a wiring space from the power semiconductor element to the lead frame is secured. However, according to the semiconductor module of the present invention, it is sufficient to secure the wiring space of the bus bar integrated with the shunt resistor. For this reason, the size of the lead frame can be reduced, and the power module can be downsized.

前記シャント抵抗が矩形の板状であることが好ましい。   The shunt resistor is preferably a rectangular plate.

また、前記バスバのうち前記シャント抵抗の両端の部分が平坦であることが好ましい。   Moreover, it is preferable that the both ends of the shunt resistor in the bus bar are flat.

また、本発明は、モータを駆動させるための３相インバータ回路を有する半導体モジュールの製造方法において、
該半導体モジュール内の配線として機能するバスバの一部をモータ電流検出用のシャント抵抗で構成し、
３相それぞれの前記シャント抵抗を１つの前記バスバに一体化する、というものである。 Further, the present invention provides a method for manufacturing a semiconductor module having a three-phase inverter circuit for driving a motor.
A part of the bus bar functioning as wiring in the semiconductor module is configured with a shunt resistor for detecting motor current,
The shunt resistors for each of the three phases are integrated into one bus bar.

本発明によれば、リードフレームのサイズを抑制し、ひいてはモジュールの小型化を図ることが可能となる。   According to the present invention, it is possible to reduce the size of the lead frame and thus to reduce the size of the module.

本発明に係る半導体モジュールの構成の一例を示す断面図である。It is sectional drawing which shows an example of a structure of the semiconductor module which concerns on this invention. バスバの一例を示す斜視図である。It is a perspective view which shows an example of a bus bar. 電動パワーステアリング装置の構成の概略を示す図である。It is a figure which shows the outline of a structure of an electric power steering apparatus.

以下、図面を参照しつつ本発明に係る半導体モジュールの好適な実施形態について詳細に説明する（図１〜図３参照）。なお、本明細書および図面において、実質的に同一の機能構成を有する構成要素については、同一の符号を付することにより重複説明を省略する。   DESCRIPTION OF EMBODIMENTS Hereinafter, preferred embodiments of a semiconductor module according to the present invention will be described in detail with reference to the drawings (see FIGS. 1 to 3). In the present specification and drawings, components having substantially the same functional configuration are denoted by the same reference numerals, and redundant description is omitted.

半導体モジュール１は、モータ５０を駆動させるためのインバータ回路（図示省略）を有するパワーモジュールとして構成されている。本実施形態の半導体モジュール１は、パワー半導体素子２、リードフレーム３、はんだ５、モールド６、ワイヤ７、バスバ８、シャント抵抗９を含む（図１参照）。   The semiconductor module 1 is configured as a power module having an inverter circuit (not shown) for driving the motor 50. The semiconductor module 1 of this embodiment includes a power semiconductor element 2, a lead frame 3, solder 5, a mold 6, wires 7, a bus bar 8, and a shunt resistor 9 (see FIG. 1).

パワー半導体素子２は例えばＭＯＳＦＥＴであって、ＳｉまたはＳｉＣ、ＧａＮのベアチップ（ベアダイ）の状態のものからなる。このパワー半導体素子２は厚み方向に電流を流す構造のため、ベアチップ上面および下面に電極を有した構造であり、はんだ５や硬化性導電性ペースト、アルミや金ワイヤを使ったワイヤボンディングにより配線する。なお、本明細書でいう「上面」「下面」とは、リードフレーム３を基準にしたものであり、仮に半導体モジュール１が上下逆さまに配置されていても上下の位置関係に変更はない。   The power semiconductor element 2 is, for example, a MOSFET, and is composed of a Si, SiC, or GaN bare chip (bare die). Since this power semiconductor element 2 has a structure in which current flows in the thickness direction, it has a structure having electrodes on the upper and lower surfaces of the bare chip, and is wired by wire bonding using solder 5, curable conductive paste, aluminum or gold wire. . The “upper surface” and “lower surface” in this specification are based on the lead frame 3, and even if the semiconductor module 1 is arranged upside down, there is no change in the vertical positional relationship.

リードフレーム３は、その上に固定されたパワー半導体素子２を支持し、外部配線との接続をする部品であり、所望の回路動作をさせるためにプレス成形によって任意のパターン形状に形成される。   The lead frame 3 is a component that supports the power semiconductor element 2 fixed thereon and is connected to an external wiring, and is formed into an arbitrary pattern shape by press molding in order to perform a desired circuit operation.

バスバ８は、３相インバータに対応して三叉状に形成されており（図２参照）、インバータ回路における電流検出経路上に配置されている。本実施形態のバスバ８は、その一部がシャント抵抗９で構成されている。また、３相インバータにおける各相のシャント抵抗９が１つのバスバ８に一体化された構造となっている（図２参照）。さらに、バスバ８のうちシャント抵抗９の両端の部分８Ａは、平坦な部分を有する構造となっている（図２参照）。これによれば、シャント抵抗９の両端にワイヤボンディングによる配線がしやすい。   The bus bar 8 is formed in a three-pronged shape corresponding to the three-phase inverter (see FIG. 2), and is disposed on the current detection path in the inverter circuit. A part of the bus bar 8 of the present embodiment is constituted by a shunt resistor 9. Further, the shunt resistor 9 of each phase in the three-phase inverter is integrated into one bus bar 8 (see FIG. 2). Further, the portion 8A at both ends of the shunt resistor 9 in the bus bar 8 has a structure having flat portions (see FIG. 2). This facilitates wiring by wire bonding at both ends of the shunt resistor 9.

このようなバスバ８は、導電率の高い銅や銅合金などからなる。また、シャント抵抗９は、Cu-Ni系やCu-Mn系などの材料からなる。シャント抵抗９は任意の抵抗値となるようにその断面積、長さを調整し、形状を決定する。この点で、シャント抵抗９は平面視矩形の板状であることが好適である（図１、図２参照）。このシャント抵抗９の一部とバスバ８の一部を溶接、またはロウ接して一体化する。一体化したバスバ８は、パワー半導体素子の上面電極とＧＮＤ電位のリードフレーム３間にはんだ付けで実装する（図１参照）。   Such a bus bar 8 is made of copper, copper alloy, or the like having high conductivity. The shunt resistor 9 is made of a material such as Cu—Ni or Cu—Mn. The shunt resistor 9 is adjusted in cross-sectional area and length so as to have an arbitrary resistance value, and the shape is determined. In this regard, it is preferable that the shunt resistor 9 has a rectangular plate shape in plan view (see FIGS. 1 and 2). A part of the shunt resistor 9 and a part of the bus bar 8 are integrated by welding or brazing. The integrated bus bar 8 is mounted by soldering between the upper electrode of the power semiconductor element and the lead frame 3 having the GND potential (see FIG. 1).

なお、電流は、シャント抵抗９の両端電圧に基づいて検出される。ワイヤ７によるボンディング手段として例えばAlワイヤボンディングを用いることで、バスバ８のシャント抵抗９に近い両端部分から外部制御基板（図示省略）へと接続するリードフレーム端子に配線することができる（図１参照）。また、最終的には、リードフレーム３上に実装されたパワー半導体素子２をエポキシ系材料の硬化性樹脂を用いてトランスファー成形によりモールド６で封止して半導体モジュール１が完成する。   The current is detected based on the voltage across the shunt resistor 9. By using, for example, Al wire bonding as a bonding means using the wires 7, wiring can be made to lead frame terminals connected to the external control board (not shown) from both ends of the bus bar 8 near the shunt resistor 9 (see FIG. 1). ). Finally, the power semiconductor element 2 mounted on the lead frame 3 is sealed with a mold 6 by transfer molding using a curable resin of an epoxy material, and the semiconductor module 1 is completed.

上述した本実施形態の半導体モジュール１によれば、シャント抵抗９が一体化されたバスバ８の配線スペースを確保すればよく、従来のモジュールにおけるようにパワー半導体素子とは別個にシャント抵抗をリードフレーム上に搭載するための面積を確保する必要性がなく、また、パワー半導体素子からリードフレームまでの配線スペースを確保する必要性もない。このため、リードフレーム３のサイズ抑制（小型化）が可能であり、これによって半導体モジュール１の小型化を図ることができる。   According to the semiconductor module 1 of the present embodiment described above, the wiring space of the bus bar 8 in which the shunt resistor 9 is integrated may be ensured, and the shunt resistor is provided separately from the power semiconductor element as in the conventional module. There is no need to secure an area for mounting on top, and there is no need to secure a wiring space from the power semiconductor element to the lead frame. For this reason, the size of the lead frame 3 can be suppressed (miniaturized), and thus the semiconductor module 1 can be miniaturized.

このような半導体モジュール１は、電動パワーステアリング装置１００（図３参照）等の各種産業機械や各種駆動装置、さらには、これらが搭載された車両などにおいて利用することができる。なお、図３に例示する電動パワーステアリング装置１００は、例えばコラムタイプのものである。該図３において、符号Ｈはステアリングホイール、符号１０ａはステアリング入力軸、符号１０ｂはステアリング出力軸、符号１１はラック・ピニオン運動変換機構、符号１３はウォーム減速機構、符号２０はハウジング、符号２１はトルクセンサ、符号３０はステアリングシャフト、符号４０，４１は自在継手、符号４２は連結部材をそれぞれ示す。   Such a semiconductor module 1 can be used in various industrial machines such as the electric power steering apparatus 100 (see FIG. 3), various driving apparatuses, and a vehicle in which these are mounted. Note that the electric power steering apparatus 100 illustrated in FIG. 3 is of a column type, for example. In FIG. 3, symbol H is a steering wheel, symbol 10a is a steering input shaft, symbol 10b is a steering output shaft, symbol 11 is a rack and pinion motion conversion mechanism, symbol 13 is a worm reduction mechanism, symbol 20 is a housing, symbol 21 is Reference numeral 30 denotes a steering shaft, reference numerals 40 and 41 denote universal joints, and reference numeral 42 denotes a connecting member.

なお、上述の実施形態は本発明の好適な実施の一例ではあるがこれに限定されるものではなく本発明の要旨を逸脱しない範囲において種々変形実施可能である。   The above-described embodiment is an example of a preferred embodiment of the present invention, but is not limited thereto, and various modifications can be made without departing from the scope of the present invention.

本発明は、電動パワーステアリング等の各種産業機械や各種駆動装置、さらには、これらが搭載された車両などにおける半導体モジュールに適用して好適である。   The present invention is suitable for application to various industrial machines such as electric power steering, various drive devices, and semiconductor modules in vehicles on which these are mounted.

１…半導体モジュール
２…パワー半導体素子
３…リードフレーム
５…はんだ
６…モールド
７…ワイヤ（ゲート配線）
８…バスバ
８Ａ…バスバ８のうちシャント抵抗の両端に位置する部分
９…シャント抵抗
５０…モータ
１００…電動パワーステアリング装置 DESCRIPTION OF SYMBOLS 1 ... Semiconductor module 2 ... Power semiconductor element 3 ... Lead frame 5 ... Solder 6 ... Mold 7 ... Wire (gate wiring)
DESCRIPTION OF SYMBOLS 8 ... Bus bar 8A ... The part located in the both ends of shunt resistance among bus bars 8 ... Shunt resistance 50 ... Motor 100 ... Electric power steering apparatus

Claims (7)

モータを駆動するための３相インバータ回路を有する半導体モジュールにおいて、
該半導体モジュール内の配線として機能するバスバの一部がモータ電流検出用のシャント抵抗で構成され、
３相それぞれの前記シャント抵抗を１つの前記バスバに一体化した、半導体モジュール。 In a semiconductor module having a three-phase inverter circuit for driving a motor,
A part of the bus bar functioning as the wiring in the semiconductor module is composed of a shunt resistor for motor current detection,
A semiconductor module in which the shunt resistors for each of the three phases are integrated into one bus bar. 前記シャント抵抗が矩形の板状である、請求項１に記載の半導体モジュール。   The semiconductor module according to claim 1, wherein the shunt resistor has a rectangular plate shape. 前記バスバのうち前記シャント抵抗の両端の部分が平坦である、請求項１または２に記載の半導体モジュール。   The semiconductor module according to claim 1, wherein both ends of the shunt resistor in the bus bar are flat. 請求項１から３のいずれか一項に記載の半導体モジュールを備えた駆動装置。   The drive device provided with the semiconductor module as described in any one of Claim 1 to 3. 請求項１から３のいずれか一項に記載の半導体モジュールを備えた電動パワーステアリング装置。   An electric power steering apparatus comprising the semiconductor module according to any one of claims 1 to 3. 請求項１から３のいずれか一項に記載の半導体モジュールを備えた車両。   A vehicle comprising the semiconductor module according to any one of claims 1 to 3. モータを駆動させるための３相インバータ回路を有する半導体モジュールの製造方法において、
該半導体モジュール内の配線として機能するバスバの一部をモータ電流検出用のシャント抵抗で構成し、
３相それぞれの前記シャント抵抗を１つの前記バスバに一体化する、半導体モジュールの製造方法。 In a method for manufacturing a semiconductor module having a three-phase inverter circuit for driving a motor,
A part of the bus bar functioning as wiring in the semiconductor module is configured with a shunt resistor for detecting motor current,
A method for manufacturing a semiconductor module, wherein the shunt resistors of three phases are integrated into one bus bar.
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JP2018157023A (en) * 2017-03-16 2018-10-04 株式会社デンソー Semiconductor device and method of manufacturing the same

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Publication number Priority date Publication date Assignee Title
JP2015083944A (en) * 2013-10-25 2015-04-30 コーア株式会社 Current detection device
WO2015068196A1 (en) * 2013-11-05 2015-05-14 三菱電機株式会社 Semiconductor module

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JP2015083944A (en) * 2013-10-25 2015-04-30 コーア株式会社 Current detection device
WO2015068196A1 (en) * 2013-11-05 2015-05-14 三菱電機株式会社 Semiconductor module

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