JP2017036938A - Voltage detection circuit - Google Patents

Voltage detection circuit Download PDF

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JP2017036938A
JP2017036938A JP2015156757A JP2015156757A JP2017036938A JP 2017036938 A JP2017036938 A JP 2017036938A JP 2015156757 A JP2015156757 A JP 2015156757A JP 2015156757 A JP2015156757 A JP 2015156757A JP 2017036938 A JP2017036938 A JP 2017036938A
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conductive path
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JP6657649B2 (en
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滋之 藤井
Shigeyuki Fujii
滋之 藤井
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Sumitomo Wiring Systems Ltd
AutoNetworks Technologies Ltd
Sumitomo Electric Industries Ltd
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Sumitomo Electric Industries Ltd
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Abstract

PROBLEM TO BE SOLVED: To provide a voltage detection circuit with which it is possible to suppress current consumption when not detecting voltages and easily send electricity for voltage detection with greater reliability when detecting voltages.SOLUTION: First conduction path 11 and second conduction path 12 of a voltage detection circuit 1 are branched off from a prescribed conduction path 3, with a P-channel MOSFET 21 and an N-channel FET 22 provided, respectively. A control unit 7 exercises off control for turning both of the P-channel MOSFET 21 and the N-channel FET 22 off, first on control for setting the potential of a first input path 61 so that the P-channel MOSFET 21 goes on when the potential of the conduction path 3 exceeds a threshold potential, and second on control for setting the potential of a second input path 62 so that the N-channel FET 22 goes on when the potential of the conduction path 3 is at least below a threshold potential.SELECTED DRAWING: Figure 1

Description

本発明は、電圧検出回路に関するものである。   The present invention relates to a voltage detection circuit.

従来から提供されている電圧検出回路は、電圧検出の対象となる導電路から分岐する経路に微小電流を流し、その微小電流に基づいて検出対象位置の電圧状態を把握する構成のものが多い。この種の電圧検出回路としては、例えば特許文献1のような技術が提案されており、この技術では、電池の正極に接続された導電路から、電圧分割抵抗が直列に接続されてなる分圧回路が分岐しており、この分岐回路に継続的に電流を流している。そして、2つの電圧分割抵抗の中間位置となる接続点の電圧と基準電圧とをコンパレータによって比較することで、電池電圧が所定電圧を超えるか否かを判定している。   Many voltage detection circuits conventionally provided have a configuration in which a minute current is caused to flow through a path branched from a conductive path that is a voltage detection target, and a voltage state at a detection target position is grasped based on the minute current. As this type of voltage detection circuit, for example, a technique such as Patent Document 1 has been proposed. In this technique, a voltage dividing resistor is formed by connecting a voltage dividing resistor in series from a conductive path connected to a positive electrode of a battery. The circuit is branched, and a current is continuously supplied to the branch circuit. Then, by comparing the voltage at the connection point, which is an intermediate position between the two voltage dividing resistors, with a reference voltage, it is determined whether or not the battery voltage exceeds a predetermined voltage.

特開2002−296306号公報Japanese Patent Laid-Open No. 2002-296306

しかし、特許文献1の技術のように、分岐した経路に微小電流を常に流し続ける構成では、消費電流の増大が避けられず、消費電流の増大に起因する不具合を招き易いという問題がある。   However, as in the technique of Patent Document 1, in the configuration in which a very small current is always allowed to flow through the branched path, there is a problem that an increase in current consumption is unavoidable and a problem due to an increase in current consumption is likely to occur.

例えば、図2では、特許文献1の技術に類似する一般的な電圧検出回路101を簡略的に示している。この電圧検出回路101では、蓄電部C1の一方の電極に接続された導電路101Bから、抵抗R11,R12が直列に接続されてなる分圧回路が分岐しており、この分圧回路に対して微小電流を継続的に流している。そして、このような通電状態において、抵抗R11,R12の中間位置となる接続点から出力される電圧値を電圧検出部101Aによって検出することで、蓄電部C1の充電電圧を把握している。けれども、この構成では、蓄電部C1から分圧回路へと微小電流が常に流れ続けるため、蓄電部C1において継続的に放電がなされてしまい、蓄電部C1の電圧低下を招きやすくなる。   For example, in FIG. 2, a general voltage detection circuit 101 similar to the technique of Patent Document 1 is simply shown. In this voltage detection circuit 101, a voltage dividing circuit in which resistors R11 and R12 are connected in series branches from a conductive path 101B connected to one electrode of the power storage unit C1, and this voltage dividing circuit is A minute current is continuously flowing. And in such an energized state, the voltage value output from the connection point which is an intermediate position between the resistors R11 and R12 is detected by the voltage detection unit 101A, thereby grasping the charging voltage of the power storage unit C1. However, in this configuration, since a minute current always flows from the power storage unit C1 to the voltage dividing circuit, the power storage unit C1 is continuously discharged, and the voltage of the power storage unit C1 is likely to decrease.

この問題を解消する構成としては、例えば図3のような構成が挙げられる。図3の構成は、蓄電部C1の電極に接続された導電路102Bから、抵抗R21,R22が直列に接続されてなる分圧回路が分岐している。そして、この分圧回路への通電をオンオフする素子としてPチャネルMOSFET102Dが設けられている。   As a configuration for solving this problem, for example, a configuration as shown in FIG. In the configuration of FIG. 3, a voltage dividing circuit in which resistors R21 and R22 are connected in series is branched from a conductive path 102B connected to the electrode of the power storage unit C1. A P-channel MOSFET 102D is provided as an element for turning on and off the current supply to the voltage dividing circuit.

図3で示す電圧検出回路102では、電圧の検出時に、制御回路102Cによってスイッチ素子Tr1がオン状態に制御される。このとき、抵抗R23に電流が流れることでMOSFET102Dのゲート電位がソース電位(導電路102Bの電位)よりも低くなり、ゲートソース間電圧Vgsの絶対値がある程度確保されていればMOSFET102Dはオン状態となる。このようにMOSFET102Dがオン状態になると、導電路102Bから分岐した分圧回路に電流が流れ、導電路102Bの電位に応じた電圧値が電圧検出部102Aに入力される。一方、電圧を検出しない非検出時には、制御回路102Cによってスイッチ素子Tr1がオフ状態に制御される。このとき、MOSFET102Dのゲート電位はソース電位(導電路102Bの電位)とほぼ同電位に保たれるため、MOSFET102Dはオフ状態となる。従って、導電路102Bから分岐した分圧回路に電流が流れず、消費電流が抑えられる。   In the voltage detection circuit 102 shown in FIG. 3, the switch element Tr1 is controlled to be in the ON state by the control circuit 102C when the voltage is detected. At this time, when the current flows through the resistor R23, the gate potential of the MOSFET 102D becomes lower than the source potential (the potential of the conductive path 102B), and if the absolute value of the gate-source voltage Vgs is secured to some extent, the MOSFET 102D is turned on. Become. When the MOSFET 102D is thus turned on, a current flows through the voltage dividing circuit branched from the conductive path 102B, and a voltage value corresponding to the potential of the conductive path 102B is input to the voltage detection unit 102A. On the other hand, when no voltage is detected, the switch element Tr1 is controlled to be turned off by the control circuit 102C. At this time, the gate potential of the MOSFET 102D is kept substantially the same as the source potential (the potential of the conductive path 102B), so that the MOSFET 102D is turned off. Therefore, no current flows through the voltage dividing circuit branched from the conductive path 102B, and current consumption is suppressed.

しかし、図3の構成では、蓄電部C1の充電量が低下し、導電路102Bの電位が非常に小さくなると、MOSFET102Dのゲートソース間電圧Vgsが十分に確保できなくなり、MOSFET102Dをオン動作させることができない。例えば、図3の構成において蓄電部C1の正極の電位が0V近くになるとMOSFET102Dのゲートソース間電圧Vgsの絶対値がMOSFET102Dをオン動作させるレベルに達しないため、分岐した分圧回路に電流が流れず、電圧を検出できなくなる。   However, in the configuration of FIG. 3, when the charge amount of the power storage unit C1 decreases and the potential of the conductive path 102B becomes very small, the gate-source voltage Vgs of the MOSFET 102D cannot be sufficiently secured, and the MOSFET 102D is turned on. Can not. For example, in the configuration of FIG. 3, when the potential of the positive electrode of the power storage unit C1 is close to 0 V, the absolute value of the gate-source voltage Vgs of the MOSFET 102D does not reach a level at which the MOSFET 102D is turned on. Therefore, the voltage cannot be detected.

一方、図4の電圧検出回路103では、蓄電部C1の電極に接続された導電路103Bから、抵抗R31,R32が直列に接続されてなる分圧回路が分岐している。そして、この分圧回路への通電をオンオフする素子としてNチャネルMOSFET103Dが設けられている。   On the other hand, in the voltage detection circuit 103 in FIG. 4, a voltage dividing circuit in which resistors R31 and R32 are connected in series branches from a conductive path 103B connected to the electrode of the power storage unit C1. An N-channel MOSFET 103D is provided as an element for turning on and off the current supply to the voltage dividing circuit.

図4で示す電圧検出回路103では、電圧の検出時に、制御回路103Cによってスイッチ素子Tr2がオン状態に制御され、MOSFET103Dのゲートに対してグランド電位よりも高い所定電位の信号が入力されることになる。この構成では、仮に蓄電部C1の充電量が非常に低くなり、導電路103Bの電位がグランド電位に近くなった場合でも、ゲートソース間電圧Vgsが十分に確保されればMOSFET103Dをオンさせることができる。ゆえに、蓄電部C1の電位低下に対応しやすい構成といえる。   In the voltage detection circuit 103 shown in FIG. 4, when the voltage is detected, the switch element Tr2 is controlled to be turned on by the control circuit 103C, and a signal having a predetermined potential higher than the ground potential is input to the gate of the MOSFET 103D. Become. In this configuration, even if the charge amount of the power storage unit C1 becomes very low and the potential of the conductive path 103B becomes close to the ground potential, the MOSFET 103D can be turned on if the gate-source voltage Vgs is sufficiently secured. it can. Therefore, it can be said that it is easy to cope with the potential drop of the power storage unit C1.

しかし、図4の構成で用いられるMOSFET103Dは、ソース側に負荷(分圧回路)が接続されたハイサイドスイッチであり、MOSFET103Dのオン動作時にソース電位が導電路103Bの電位とほぼ等しくなる構成となっている。このため、オン制御時には、MOSFET103Dのゲート電位を導電路103Bの電位よりも高くする必要があり、そのためには、ゲートドライバにおいて外部電源VBが必要となる。特に、蓄電部C1の正極電位が最大電位のときでもMOSFET103Dを確実にオン動作させるためには、ゲートソース間電圧Vgsを十分に確保するために外部電源VBの電源電位を蓄電部C1の最大電位よりも十分高く設定しなければならない。このため、電位の高い信号を生成するための昇圧回路等が必要になり、回路構成の大型化、複雑化を招き易くなる。   However, the MOSFET 103D used in the configuration of FIG. 4 is a high-side switch in which a load (voltage dividing circuit) is connected to the source side, and the source potential is substantially equal to the potential of the conductive path 103B when the MOSFET 103D is turned on. It has become. For this reason, at the time of ON control, the gate potential of the MOSFET 103D needs to be higher than the potential of the conductive path 103B. For this purpose, an external power supply VB is required in the gate driver. In particular, in order to surely turn on the MOSFET 103D even when the positive electrode potential of the power storage unit C1 is the maximum potential, the power source potential of the external power source VB is set to the maximum potential of the power storage unit C1 in order to sufficiently secure the gate-source voltage Vgs. Must be set high enough. For this reason, a booster circuit or the like for generating a signal with a high potential is required, which tends to increase the size and complexity of the circuit configuration.

本発明は上述した事情に基づいてなされており、電圧の非検出時には消費電流を抑えることができ、電圧の検出時には、電圧検出のための通電をより確実に行い易い電圧検出回路を提供することを目的とするものである。   The present invention has been made based on the above-described circumstances, and provides a voltage detection circuit that can suppress current consumption when voltage is not detected and that can easily perform energization for voltage detection when voltage is detected. It is intended.

本発明の電圧検出回路は、
蓄電部に導通する所定導電路から分岐する第1の分岐導電路と、
前記所定導電路から分岐するとともに前記第1の分岐導電路と並列に設けられる第2の分岐導電路と、
前記第1の分岐導電路に介在するとともに第1の入力路に接続され、前記第1の入力路の電位が前記所定導電路の電位よりも低い所定の低電位状態である場合にオン動作して前記第1の分岐導電路を通電状態とし、前記所定の低電位状態が解除された場合にオフ動作して前記第1の分岐導電路を非通電状態とする第1スイッチ素子と、
前記第2の分岐導電路に介在するとともに第2の入力路に接続され、前記第2の入力路の電位が前記所定導電路の電位よりも高い所定の高電位状態である場合にオン動作して前記第2の分岐導電路を通電状態とし、前記所定の高電位状態が解除された場合にオフ動作して前記第2の分岐導電路を非通電状態とする第2スイッチ素子と、
前記第1の入力路及び前記第2の入力路の電位を、前記第1スイッチ素子及び前記第2スイッチ素子が共にオフ状態となる設定とするオフ制御と、前記第1の入力路の電位を、前記所定導電路の電位が閾値電位を超える場合に前記所定の低電位状態を生じさせる設定とする第1オン制御と、前記第2の入力路の電位を、前記所定導電路の電位が少なくとも前記閾値電位以下である場合に前記所定の高電位状態を生じさせる設定とする第2オン制御とを行う制御部と、
前記第1の分岐導電路及び前記第2の分岐導電路の少なくともいずれかが通電状態となった場合に、前記第1の分岐導電路及び前記第2の分岐導電路の少なくともいずれかを流れる電流に基づいて前記所定導電路に印加された電圧の状態を検出する検出部と、
を有する。
The voltage detection circuit of the present invention is
A first branch conductive path that branches from a predetermined conductive path that conducts to the power storage unit;
A second branch conductive path branched from the predetermined conductive path and provided in parallel with the first branch conductive path;
When the potential of the first input path is in a predetermined low potential state lower than the potential of the predetermined conductive path, the switch is turned on. A first switch element that energizes the first branch conductive path and turns off the first branch conductive path when the predetermined low potential state is released; and
When the potential of the second input path is in a predetermined high potential state higher than the potential of the predetermined conductive path, it is turned on when it is interposed in the second branch conductive path and connected to the second input path. A second switch element that turns on the second branch conductive path and turns off the second branch conductive path when the predetermined high potential state is released;
OFF control for setting the potential of the first input path and the second input path to be set to turn off both the first switch element and the second switch element, and the potential of the first input path. The first on-control that is set to generate the predetermined low potential state when the potential of the predetermined conductive path exceeds a threshold potential, and the potential of the second input path is at least equal to the potential of the predetermined conductive path A control unit that performs second on control that is set to cause the predetermined high potential state when the threshold potential is equal to or lower than the threshold potential;
A current flowing through at least one of the first branch conductive path and the second branch conductive path when at least one of the first branch conductive path and the second branch conductive path is energized. A detection unit for detecting a state of a voltage applied to the predetermined conductive path based on
Have

本発明は、第1の分岐導電路及び第2の分岐導電路のそれぞれを通電状態と非通電状態とに切り替えるために、異なる2種類のスイッチ素子(第1スイッチ素子及び第2スイッチ素子)を用いている。そして、制御部は、第1スイッチ素子及び第2スイッチ素子を共にオフ動作させるオフ制御を行い得る構成となっている。このオフ制御が行われた場合、第1の分岐導電路及び第2の分岐導電路がいずれも非通電状態となるため、常に分岐導電路に電流を流し続ける構成と比較して消費電流を抑制しやすくなる。   In the present invention, two different types of switch elements (first switch element and second switch element) are used to switch each of the first branch conductive path and the second branch conductive path between an energized state and a non-energized state. Used. The control unit is configured to perform off control for turning off both the first switch element and the second switch element. When this off control is performed, the first branch conductive path and the second branch conductive path are both in a non-energized state, so that current consumption is suppressed compared to a configuration in which current always flows through the branch conductive path. It becomes easy to do.

また、制御部は、所定導電路の電位が閾値電位を超える場合に所定の低電位状態を生じさせるように第1の入力路の電位を設定する第1オン制御と、所定導電路の電位が少なくとも閾値電位以下である場合に所定の高電位状態を生じさせるように第2の入力路の電位を設定する第2オン制御とを行う構成となっている。このような構成であるため、所定導電路の電位が閾値電位を超える場合、少なくとも第1オン制御が実行されれば「所定の低電位状態」が生じることになり、第1スイッチ素子がオン動作するため、第1の分岐導電路に電流を流すことができる。また、所定導電路の電位が閾値電位以下である場合、第2オン制御が実行されれば「所定の高電位状態」が生じることになり、第2スイッチ素子がオン動作するため、第2の分岐導電路に電流を流すことができる。つまり、所定導電路において電圧変動があったとしても、2種類のオン制御を行えば、いずれかの分岐導電路に確実に電流を流すことができる。ゆえに、検出用の電流を流せないことに起因する検出不能状態を回避することができ、ひいては、所定導電路の電圧状態をより確実に検出し易くなる。   Further, the control unit sets the first input path potential so as to generate a predetermined low potential state when the potential of the predetermined conductive path exceeds the threshold potential, and the potential of the predetermined conductive path is The second ON control is performed to set the potential of the second input path so as to generate a predetermined high potential state at least when the potential is equal to or lower than the threshold potential. With such a configuration, when the potential of the predetermined conductive path exceeds the threshold potential, at least the first ON control is executed, a “predetermined low potential state” occurs, and the first switch element is turned on. Therefore, a current can be passed through the first branch conductive path. Further, when the potential of the predetermined conductive path is equal to or lower than the threshold potential, if the second on control is executed, a “predetermined high potential state” is generated, and the second switch element is turned on. A current can flow through the branch conductive path. That is, even if there is a voltage fluctuation in the predetermined conductive path, if two types of on-control are performed, a current can be reliably passed through one of the branch conductive paths. Therefore, it is possible to avoid the undetectable state due to the fact that the detection current cannot flow, and it becomes easier to detect the voltage state of the predetermined conductive path more reliably.

実施例1の電圧検出回路を概略的に例示する回路図である。FIG. 3 is a circuit diagram schematically illustrating a voltage detection circuit according to the first embodiment. 比較例1の電圧検出回路を概略的に例示する回路図である。5 is a circuit diagram schematically illustrating a voltage detection circuit of Comparative Example 1. FIG. 比較例2の電圧検出回路を概略的に例示する回路図である。10 is a circuit diagram schematically illustrating a voltage detection circuit of a comparative example 2. FIG. 比較例3の電圧検出回路を概略的に例示する回路図である。10 is a circuit diagram schematically illustrating a voltage detection circuit of Comparative Example 3. FIG.

以下、本発明の望ましい形態を例示する。
本発明において、前記制御部は、所定の電源電位となる電源導電路と、前記電源電位よりも低い基準電位となる基準導電路とに接続されていてもよい。そして、前記閾値電位は、前記電源電位よりも低く前記基準電位よりも高い電位であってもよい。更に、前記蓄電部が満充電状態のときの前記所定導電路の電位よりも前記電源電位のほうが低くなっていてもよい。
Hereinafter, desirable modes of the present invention will be exemplified.
In the present invention, the control unit may be connected to a power supply conductive path having a predetermined power supply potential and a reference conductive path having a reference potential lower than the power supply potential. The threshold potential may be lower than the power supply potential and higher than the reference potential. Furthermore, the power supply potential may be lower than the potential of the predetermined conductive path when the power storage unit is fully charged.

このように外部電源(電源導電路の電源電位を定める電源)の出力を抑えた場合、外部電源の出力抑制によるメリットは享受できるものの、蓄電部が満充電状態に近くなったときには、特別な昇圧手段等を用いないと、「蓄電部に接続された所定導電路の電位よりも第2の入力路の電位のほうが高い所定の高電位状態」を生じさせることができなくなる。つまり、蓄電部が満充電状態に近くなったときには第2スイッチ素子をオン動作させることができなくなる。しかし、このような場合には第1オン制御によって第1スイッチ素子を確実にオン動作させることができるため、第1の分岐導電路を介して検出用の電流を確実に流すことができる。このように、安定的に電圧検出を行い得る構成を外部電源の出力を抑えた形で実現できるため、特に、外部電源を設計・構成する上で有利になる。そして、この効果は、満充電時に蓄電部から出力される電圧が高い構成ほど顕著になる。他方、蓄電部の出力低下により、所定導電路の電位が基準電位に近くなると、「蓄電部に接続された所定導電路の電位よりも第1の入力路の電位のほうが低い所定の低電位状態」が生じない可能性が高まる。つまり、第1スイッチ素子がオン動作しない虞がある。しかし、このような場合には第2オン制御によって第2スイッチ素子を確実にオン動作させることができるため、蓄電部に接続された所定導電路の電位が基準電位に近づいても検出用の電流を確実に流すことができ、安定的に電圧検出を行うことができる。   In this way, if the output of the external power supply (the power supply that determines the power supply potential of the power supply path) is suppressed, you can enjoy the benefits of suppressing the output of the external power supply, but when the power storage unit is nearly fully charged, a special boost If no means or the like is used, the “predetermined high potential state in which the potential of the second input path is higher than the potential of the predetermined conductive path connected to the power storage unit” cannot be generated. That is, the second switch element cannot be turned on when the power storage unit is nearly fully charged. However, in such a case, since the first switch element can be reliably turned on by the first on control, a detection current can be reliably passed through the first branch conductive path. As described above, the configuration capable of stably detecting the voltage can be realized in a form in which the output of the external power source is suppressed, which is particularly advantageous in designing and configuring the external power source. And this effect becomes so remarkable that the voltage output from an electrical storage part at the time of a full charge is high. On the other hand, when the potential of the predetermined conductive path becomes close to the reference potential due to the output decrease of the power storage unit, “a predetermined low potential state in which the potential of the first input path is lower than the potential of the predetermined conductive path connected to the power storage unit "Is not likely to occur. That is, the first switch element may not be turned on. However, in such a case, since the second switch element can be reliably turned on by the second on control, even if the potential of the predetermined conductive path connected to the power storage unit approaches the reference potential, the detection current Can be reliably flowed, and voltage can be detected stably.

本発明において、前記制御部は、前記第1オン制御及び前記第2オン制御を、少なくとも所定時間において共に行う構成であってもよい。この場合、前記検出部は、前記所定時間において前記第1の分岐導電路及び前記第2の分岐導電路の少なくともいずれかを流れる電流に基づき、前記所定導電路に印加された電圧の状態を検出する構成であることが望ましい。   In the present invention, the control unit may perform the first on control and the second on control together at least for a predetermined time. In this case, the detection unit detects a state of a voltage applied to the predetermined conductive path based on a current flowing through at least one of the first branch conductive path and the second branch conductive path in the predetermined time. It is desirable that the configuration be

このように第1オン制御及び第2オン制御を所定時間において共に行い、その所定時間に流れる電流から電圧状態を把握すれば、第1オン制御と第2オン制御とを時間差で行う制御方法と比較して、検出時間を短縮化しやすくなる。   A control method in which the first on-control and the second on-control are performed at a time difference if both the first on-control and the second on-control are performed in a predetermined time and the voltage state is grasped from the current flowing during the predetermined time. In comparison, the detection time can be easily shortened.

本発明は、共通の導電路を有していてもよい。そして、前記第1の分岐導電路において前記所定導電路と前記共通の導電路との間に前記第1スイッチ素子が介在し、前記第2の分岐導電路において前記所定導電路と前記共通の導電路との間に前記第2スイッチ素子が介在した構成であってもよい。このように前記第1の分岐導電路及び前記第2の分岐導電路が前記共通の導電路に接続されている場合、前記検出部は、前記共通の導電路を流れる電流に基づいて前記所定導電路に印加された電圧の状態を検出する構成であることが望ましい。   The present invention may have a common conductive path. The first switch element is interposed between the predetermined conductive path and the common conductive path in the first branch conductive path, and the predetermined conductive path and the common conductive path are disposed in the second branch conductive path. The structure which the said 2nd switch element intervened between the paths may be sufficient. In this way, when the first branch conductive path and the second branch conductive path are connected to the common conductive path, the detection unit performs the predetermined conductive based on the current flowing through the common conductive path. It is desirable to have a configuration that detects the state of the voltage applied to the path.

上述した2種類のオン制御を行えば、少なくともいずれかの分岐導電路に電流が流れる確実性が高まり、共通の導電路には、所定導電路の電圧状態を反映した電流が流れることになる。つまり、2種類のオン制御の際に、共通の導電路を監視すれば、所定導電路の電圧状態を検出できる確実性が高まる。特に、この構成では、分岐導電路毎に電圧検出部を設ける必要が無いため、分岐導電路を流れる電流から検出値を生成・取得するための回路を簡易化、小型化しやすくなる。   If the two types of on-control described above are performed, the certainty of current flowing through at least one of the branch conductive paths is increased, and a current reflecting the voltage state of the predetermined conductive path flows through the common conductive path. That is, if the common conductive path is monitored during the two types of ON control, the certainty that the voltage state of the predetermined conductive path can be detected increases. In particular, in this configuration, since it is not necessary to provide a voltage detection unit for each branch conductive path, it is easy to simplify and miniaturize a circuit for generating and acquiring a detection value from a current flowing through the branch conductive path.

<実施例1>
以下、本発明を具体化した一例である実施例1について説明する。
図1で示す電圧検出回路1は、例えば、車載用の電圧検出回路として構成されており、車載用機器の所定部位の電圧を検出する回路として機能する。図1の例では、車載用のキャパシタやその他の二次電池などからなる蓄電部90の正極に電圧検出対象の導電路3(以下、導電路3ともいう)が接続されており、電圧検出回路1は、この導電路3の電圧を検出する回路となっている。導電路3の電圧は、蓄電部90の充電電圧が反映されているため、電圧検出回路1は、蓄電部90の充電電圧を検出する回路であるともいえる。なお、図1の構成では、蓄電部90の負極は、グランドに接続されている。
<Example 1>
Hereinafter, Example 1 which is an example in which the present invention is embodied will be described.
The voltage detection circuit 1 shown in FIG. 1 is configured as, for example, a vehicle-mounted voltage detection circuit, and functions as a circuit that detects a voltage at a predetermined part of the vehicle-mounted device. In the example of FIG. 1, the voltage detection target conductive path 3 (hereinafter also referred to as the conductive path 3) is connected to the positive electrode of a power storage unit 90 formed of a vehicle-mounted capacitor or other secondary battery. Reference numeral 1 denotes a circuit for detecting the voltage of the conductive path 3. Since the voltage of the conductive path 3 reflects the charging voltage of the power storage unit 90, it can be said that the voltage detection circuit 1 is a circuit that detects the charging voltage of the power storage unit 90. In the configuration of FIG. 1, the negative electrode of the power storage unit 90 is connected to the ground.

図1で示すように、電圧検出回路1は、電圧検出対象の導電路3から分岐する第1の分岐導電路11と、導電路3から分岐するとともに第1の分岐導電路11と並列に設けられる第2の分岐導電路12とを備える。これら第1の分岐導電路11及び第2の分岐導電路12は、後述する分圧回路33に電流を流すための通電経路として機能し得る部分である。   As shown in FIG. 1, the voltage detection circuit 1 includes a first branch conductive path 11 that branches from the voltage detection target conductive path 3, a branch from the conductive path 3, and a parallel connection with the first branch conductive path 11. Second branched conductive path 12. The first branch conductive path 11 and the second branch conductive path 12 are portions that can function as energization paths for flowing a current to a voltage dividing circuit 33 described later.

PチャネルMOSFET21(以下、MOSFET21ともいう)は、第1スイッチ素子の一例に相当するものであり、公知のPチャネル型のMOSFET(metal-oxide-semiconductor field-effect transistor)として構成されている。このMOSFET21のゲートは、後述する抵抗34の一端及びNPNトランジスタ42(以下、トランジスタ42ともいう)のコレクタに導通した形で接続され、ソースが導電路3に導通した形で接続されている。更に、MOSFET21のドレインは、後述する共通の導電路30に導通した形で接続されている。なお、MOSFET21のゲートは、信号が入力される第1の制御端子の一例に相当する。また、MOSFET21のソースは、電圧検出対象の導電路3に導通する第1の導通端子の一例に相当する。   P-channel MOSFET 21 (hereinafter also referred to as MOSFET 21) corresponds to an example of a first switch element, and is configured as a known P-channel MOSFET (metal-oxide-semiconductor field-effect transistor). The gate of the MOSFET 21 is connected to one end of a resistor 34, which will be described later, and the collector of an NPN transistor 42 (hereinafter also referred to as transistor 42) in a conductive manner, and the source is connected to the conductive path 3 in a conductive manner. Further, the drain of the MOSFET 21 is connected in a conductive manner to a common conductive path 30 described later. Note that the gate of the MOSFET 21 corresponds to an example of a first control terminal to which a signal is input. The source of the MOSFET 21 corresponds to an example of a first conduction terminal that conducts to the conductive path 3 that is a voltage detection target.

このMOSFET21は、ゲート(第1の制御端子)の電位がソース(第1の導通端子)の電位よりも低い「所定の低電位状態」である場合にオン動作して第1の分岐導電路11を通電状態とする。具体的には、MOSFET21のゲートソース間電圧Vgs1の絶対値が所定閾値Vth1を超える場合にMOSFET21がオン動作し、第1の分岐導電路11を通電状態とする。また、MOSFET21は、この「所定の低電位状態」が解除された場合、即ち、MOSFET21のゲートソース間電圧Vgs1の絶対値が所定閾値Vth1以下になる場合にオフ動作して第1の分岐導電路11を非通電状態とする。   The MOSFET 21 is turned on when the potential of the gate (first control terminal) is “predetermined low potential state” lower than the potential of the source (first conduction terminal), and the first branch conductive path 11 is turned on. Is energized. Specifically, when the absolute value of the gate-source voltage Vgs1 of the MOSFET 21 exceeds a predetermined threshold value Vth1, the MOSFET 21 is turned on, and the first branch conductive path 11 is turned on. Further, the MOSFET 21 is turned off when the “predetermined low potential state” is released, that is, when the absolute value of the gate-source voltage Vgs1 of the MOSFET 21 is equal to or lower than the predetermined threshold Vth1, and the first branch conductive path 11 is in a non-energized state.

NチャネルMOSFET22(以下、MOSFET22ともいう)は、第2スイッチ素子の一例に相当するものであり、公知のNチャネル型のMOSFET(metal-oxide-semiconductor field-effect transistor)として構成されている。このMOSFET22は、ゲートが後述する抵抗36の一端及びPNPトランジスタ44のコレクタに導通した形で接続され、ドレインが導電路3に導通した形で接続されている。更に、MOSFET22のソースは、後述する共通の導電路30に導通した形で接続されている。なお、MOSFET22のゲートは、信号が入力される第2の制御端子の一例に相当する。また、MOSFET22のドレインは、電圧検出対象の導電路3に導通する第2の導通端子の一例に相当する。   The N-channel MOSFET 22 (hereinafter also referred to as MOSFET 22) corresponds to an example of a second switch element, and is configured as a known N-channel MOSFET (metal-oxide-semiconductor field-effect transistor). The MOSFET 22 has a gate connected to one end of a resistor 36, which will be described later, and a collector of a PNP transistor 44, and a drain connected to the conductive path 3. Further, the source of the MOSFET 22 is connected in a conductive manner to a common conductive path 30 described later. Note that the gate of the MOSFET 22 corresponds to an example of a second control terminal to which a signal is input. The drain of the MOSFET 22 corresponds to an example of a second conduction terminal that conducts to the conductive path 3 to be detected.

このMOSFET22は、ゲート(第2の制御端子)の電位がドレイン(第2の導通端子)の電位よりも高い「所定の高電位状態」である場合にオン動作して第2の分岐導電路12を通電状態とする。具体的には、MOSFET22は、後述する分圧回路33よりも高電位側に接続されたハイサイドスイッチとなっており、オン動作時にソース電位がドレイン電位にほぼ等しくなる構成となっている。そして、MOSFET22は、ゲートソース間電圧Vgs2が所定閾値Vth2を超える場合にオン動作するため、ゲートとドレインの電位差が上記所定閾値Vth2を超える程度に大きい「所定の高電位状態」である場合にMOSFET22がオン動作する。また、MOSFET22は、この「所定の高電位状態」が解除された場合、即ち、ゲートとドレインの電位差が上記所定閾値Vth2以下程度に低くなる場合にオフ動作して第2の分岐導電路12を非通電状態とする。   The MOSFET 22 is turned on when the potential of the gate (second control terminal) is “predetermined high potential state” higher than the potential of the drain (second conduction terminal), and the second branch conductive path 12 is operated. Is energized. Specifically, the MOSFET 22 is a high-side switch connected to a higher potential side than a voltage dividing circuit 33 described later, and the source potential is substantially equal to the drain potential during the on-operation. Since the MOSFET 22 is turned on when the gate-source voltage Vgs2 exceeds the predetermined threshold Vth2, the MOSFET 22 is in a “predetermined high potential state” when the potential difference between the gate and the drain exceeds the predetermined threshold Vth2. Turns on. Further, the MOSFET 22 is turned off when the “predetermined high potential state” is released, that is, when the potential difference between the gate and the drain becomes lower than the predetermined threshold value Vth2, and the second branch conductive path 12 is turned off. Turn off the power.

共通の導電路30(以下、導電路30ともいう)は、一端側が第1の分岐導電路11及び第2の分岐導電路12に接続されている。また、導電路30の他端側はグランドに接続されている。この導電路30は、2つの分圧抵抗31,32が直列に接続された形で分圧回路33が構成されており、分圧抵抗31,32を連結する中間部分は後述する電圧検出部5の入力端子に接続されている。   One end of a common conductive path 30 (hereinafter also referred to as a conductive path 30) is connected to the first branch conductive path 11 and the second branch conductive path 12. The other end side of the conductive path 30 is connected to the ground. In this conductive path 30, a voltage dividing circuit 33 is configured in such a manner that two voltage dividing resistors 31, 32 are connected in series, and an intermediate portion connecting the voltage dividing resistors 31, 32 is a voltage detecting unit 5 described later. Connected to the input terminal.

図1の構成では、第1の分岐導電路11において電圧検出対象の導電路3と共通の導電路30との間にMOSFET21が介在し、MOSFET21のドレインが導電路30に導通している。また、第2の分岐導電路12において導電路3と導電路30との間にMOSFET22が介在し、MOSFET22のソースが導電路30に導通している。このような構成で第1の分岐導電路11及び第2の分岐導電路12が共通の導電路30に接続され、第1の分岐導電路11を流れる電流及び第2の分岐導電路12を流れる電流が導電路30に流れる構成となっている。   In the configuration of FIG. 1, the MOSFET 21 is interposed between the conductive path 3 for voltage detection and the common conductive path 30 in the first branch conductive path 11, and the drain of the MOSFET 21 is electrically connected to the conductive path 30. In the second branch conductive path 12, the MOSFET 22 is interposed between the conductive path 3 and the conductive path 30, and the source of the MOSFET 22 is conducted to the conductive path 30. With such a configuration, the first branch conductive path 11 and the second branch conductive path 12 are connected to the common conductive path 30, and the current flowing through the first branch conductive path 11 and the second branch conductive path 12 flow. The current flows through the conductive path 30.

例えば、第1の分岐導電路11及び第2の分岐導電路12が共に通電状態であれば両導電路を流れる電流を合わせた電流が導電路30に流れる。また、第1の分岐導電路11が通電状態であり、第2の分岐導電路12が非通電状態であれば、第1の分岐導電路11を流れる電流が導電路30に流れる。逆に、第2の分岐導電路12が通電状態であり、第1の分岐導電路11が非通電状態であれば、第2の分岐導電路12を流れる電流が導電路30に流れる。つまり、第1の分岐導電路11及び第2の分岐導電路12の少なくともいずれかが通電状態であれば、共通の導電路30には、導電路3の電位に応じた電流が流れることになる。   For example, if the first branch conductive path 11 and the second branch conductive path 12 are both energized, a current that is the sum of the currents flowing through both the conductive paths flows through the conductive path 30. Further, if the first branch conductive path 11 is in an energized state and the second branch conductive path 12 is in a non-energized state, a current flowing through the first branch conductive path 11 flows in the conductive path 30. Conversely, if the second branch conductive path 12 is in the energized state and the first branch conductive path 11 is in the non-energized state, the current flowing through the second branch conductive path 12 flows through the conductive path 30. In other words, if at least one of the first branch conductive path 11 and the second branch conductive path 12 is energized, a current corresponding to the potential of the conductive path 3 flows through the common conductive path 30. .

制御部7は、信号の出力が可能な制御回路8と、制御回路8からの信号に応じてMOSFET21のゲート電位を切り替える切替回路9Aと、制御回路8からの信号に応じてMOSFET22のゲート電位を切り替える切替回路9Bとを備える。   The control unit 7 includes a control circuit 8 that can output a signal, a switching circuit 9A that switches a gate potential of the MOSFET 21 in accordance with a signal from the control circuit 8, and a gate potential of the MOSFET 22 in accordance with a signal from the control circuit 8. And a switching circuit 9B for switching.

この制御部7は、所定の電源電位となる電源導電路46と、この電源電位よりも低い基準電位となる基準導電路48とに接続されてなるものであり、具体的には、少なくとも切替回路9Bが電源導電路46に接続されている。更に、少なくとも切替回路9A,9Bが基準導電路48に接続されている。電源導電路46は、電圧生成回路(公知の昇圧回路等)によって構成された外部電源V1から電源電圧が印加された電源用の導電路として構成され、一定の電源電位に保たれている。また、基準導電路48は、グランド用の導電路として構成され、一定のグランド電位(0V)に保たれている。   The control unit 7 is connected to a power supply conductive path 46 having a predetermined power supply potential and a reference conductive path 48 having a reference potential lower than the power supply potential, and specifically, at least a switching circuit. 9B is connected to the power supply conductive path 46. Further, at least the switching circuits 9A and 9B are connected to the reference conductive path 48. The power supply conductive path 46 is configured as a power supply conductive path to which a power supply voltage is applied from an external power supply V1 configured by a voltage generation circuit (a known booster circuit or the like), and is maintained at a constant power supply potential. The reference conductive path 48 is configured as a ground conductive path, and is maintained at a constant ground potential (0 V).

制御回路8は、マイクロコンピュータやその他の駆動回路などによって構成されており、信号線51,52のそれぞれに対して、一定電位のハイレベル信号(例えば5Vの信号)と、一定電位のローレベル信号(例えば0Vの信号)とを出力し得る構成となっている。   The control circuit 8 is constituted by a microcomputer, other drive circuits, and the like. For each of the signal lines 51 and 52, a high level signal (for example, a signal of 5V) having a constant potential and a low level signal having a constant potential are provided. (For example, a 0 V signal) can be output.

切替回路9Aは、抵抗34とNPNトランジスタ42(以下、トランジスタ42ともいう)とを備える。抵抗34は、導電路3とMOSFET21のゲートとの間に接続されている。トランジスタ42は、コレクタがMOSFET21のゲート及び抵抗34の一端に接続され、エミッタが基準導電路48(グランド用の導電路)に接続され、接地されている。また、トランジスタ42のベースは、信号線51を介して制御回路8の第1出力ポートに導通している。この切替回路9Aは、トランジスタ42のベースに対して制御回路8からハイレベル信号又はローレベル信号が入力されるようになっており、ベースに入力される信号に応じてトランジスタ42のオンオフが切り替わる。そして、トランジスタ42のオンオフを切り替えることで、MOSFET21のベース電位を切り替えている。   The switching circuit 9A includes a resistor 34 and an NPN transistor 42 (hereinafter also referred to as transistor 42). The resistor 34 is connected between the conductive path 3 and the gate of the MOSFET 21. The transistor 42 has a collector connected to the gate of the MOSFET 21 and one end of the resistor 34, and an emitter connected to a reference conductive path 48 (conductive path for ground) and is grounded. The base of the transistor 42 is electrically connected to the first output port of the control circuit 8 via the signal line 51. In the switching circuit 9A, a high level signal or a low level signal is input from the control circuit 8 to the base of the transistor 42, and the transistor 42 is turned on and off in accordance with the signal input to the base. The base potential of the MOSFET 21 is switched by switching the transistor 42 on and off.

切替回路9Bは、抵抗36とPNPトランジスタ44(以下、トランジスタ44ともいう)とを備える。抵抗36は、一端がMOSFET22のゲート及びトランジスタ44のコレクタに接続され、他端が基準導電路48(グランド用の導電路)に接続され、接地されている。トランジスタ44は、エミッタが電源導電路46に接続され、コレクタがMOSFET22のゲート及び抵抗36の一端に接続されている。トランジスタ44のベースは信号線52を介して制御回路8の第2出力ポートに導通している。この切替回路9Bは、トランジスタ44のベースに対して制御回路8からハイレベル信号又はローレベル信号が入力されるようになっており、ベースに入力される信号に応じてトランジスタ44のオンオフが切り替わる。そして、トランジスタ44のオンオフを切り替えることで、MOSFET22のベース電位を切り替えている。また、本構成では、トランジスタ44のエミッタに接続される電源導電路46の電源電位は、蓄電部90が満充電状態のときの正極の電位よりも小さくなっており、蓄電部90が満充電状態のときの導電路3の電位よりも小さくなっている。   The switching circuit 9B includes a resistor 36 and a PNP transistor 44 (hereinafter also referred to as transistor 44). One end of the resistor 36 is connected to the gate of the MOSFET 22 and the collector of the transistor 44, and the other end is connected to the reference conductive path 48 (ground conductive path) and grounded. The transistor 44 has an emitter connected to the power supply conductive path 46 and a collector connected to the gate of the MOSFET 22 and one end of the resistor 36. The base of the transistor 44 is electrically connected to the second output port of the control circuit 8 through the signal line 52. In the switching circuit 9B, a high level signal or a low level signal is input from the control circuit 8 to the base of the transistor 44, and the on / off state of the transistor 44 is switched according to the signal input to the base. Then, the base potential of the MOSFET 22 is switched by switching the transistor 44 on and off. In this configuration, the power supply potential of the power supply conductive path 46 connected to the emitter of the transistor 44 is smaller than the potential of the positive electrode when the power storage unit 90 is fully charged, and the power storage unit 90 is fully charged. It is smaller than the potential of the conductive path 3 at this time.

電圧検出部5は、検出部の一例に相当するものであり、例えばアナログ電圧値をデジタルデータに変換するAD変換器、演算処理を行うCPU、メモリなどを備えた集積回路として構成されている。この電圧検出部5は、第1の分岐導電路11及び第2の分岐導電路12の少なくともいずれかが通電状態となった場合に、少なくともいずれかの分岐導電路を流れる電流に基づいて電圧検出対象の導電路3に印加された電圧の状態を検出する。具体的には、MOSFET21,22のいずれかがオン状態であれば、共通の導電路30には導電路3に印加された電圧に応じた電流が流れるため、電圧検出部5はこの導電路30流れる電流に基づいて導電路3に印加された電圧の状態を検出する。図1の例では、共通の導電路30において分圧回路33が構成され、MOSFET21,22の少なくともいずれかがオン状態であれば、2つの分圧抵抗31,32の間の導電部(接続点)の電位が導電路3の電位に比例した値となる。そして、電圧検出部5は、この導電部(接続点)の電位を入力値として検出する構成となっている。   The voltage detection unit 5 corresponds to an example of a detection unit, and is configured as an integrated circuit including, for example, an AD converter that converts an analog voltage value into digital data, a CPU that performs arithmetic processing, a memory, and the like. The voltage detection unit 5 detects the voltage based on the current flowing through at least one of the branch conductive paths when at least one of the first branch conductive path 11 and the second branch conductive path 12 is energized. The state of the voltage applied to the target conductive path 3 is detected. Specifically, if either of the MOSFETs 21 and 22 is in an on state, a current corresponding to the voltage applied to the conductive path 3 flows through the common conductive path 30. The state of the voltage applied to the conductive path 3 is detected based on the flowing current. In the example of FIG. 1, the voltage dividing circuit 33 is configured in the common conductive path 30, and when at least one of the MOSFETs 21 and 22 is in the ON state, the conductive portion (connection point) between the two voltage dividing resistors 31 and 32. ) Is proportional to the potential of the conductive path 3. And the voltage detection part 5 becomes a structure which detects the electric potential of this electroconductive part (connection point) as an input value.

次に、電圧検出回路1の動作について説明する。
図1の電圧検出回路1では、電圧検出を行わない時期に、制御部7によってオフ制御がなされる。具体的には、制御回路8から信号線51に対してローレベル信号を出力するとともに信号線52に対してハイレベル信号を出力する。制御回路8から信号線51に対してローレベル信号を出力し続けることでNPNトランジスタ42を継続的にオフ状態にする。これにより、Pチャネル型のMOSFET21においてゲートとソースが同電位になり、MOSFET21のオフ状態が継続する。また、制御回路8から信号線52に対してハイレベル信号を出力し続けることでPNPトランジスタ44をオフ状態にする。これにより、Nチャネル型のMOSFET22においてゲート電位がローレベル(グランド電位)になりMOSFET22のオフ状態が継続する。このようなオフ制御が行われた場合、第1の分岐導電路11及び第2の分岐導電路12がいずれも非通電状態となるため、常に分岐導電路に電流を流し続ける構成と比較して消費電流を抑制しやすくなる。
Next, the operation of the voltage detection circuit 1 will be described.
In the voltage detection circuit 1 of FIG. 1, the off control is performed by the control unit 7 when voltage detection is not performed. Specifically, the control circuit 8 outputs a low level signal to the signal line 51 and outputs a high level signal to the signal line 52. The NPN transistor 42 is continuously turned off by continuously outputting a low level signal from the control circuit 8 to the signal line 51. As a result, the gate and the source of the P-channel type MOSFET 21 are at the same potential, and the MOSFET 21 is kept off. Further, the PNP transistor 44 is turned off by continuing to output a high level signal from the control circuit 8 to the signal line 52. As a result, the gate potential of the N-channel MOSFET 22 becomes low level (ground potential), and the MOSFET 22 continues to be turned off. When such an off-control is performed, since both the first branch conductive path 11 and the second branch conductive path 12 are in a non-energized state, as compared with a configuration in which current always flows through the branch conductive path. It becomes easy to suppress current consumption.

一方、電圧検出を行う時期には、制御部7が、MOSFET21に対する第1オン制御の指令と、MOSFET22に対する第2オン制御の指令とを行う。なお、第1オン制御の指令と第2オン制御の指令は、タイミングがずれていてもよく、同タイミングで行われてもよい。以下では、制御部7が、少なくとも所定時間において第1オン制御の指令と第2オン制御の指令とを共に行う例を代表例として説明する。   On the other hand, at the timing of voltage detection, the control unit 7 issues a first on-control command to the MOSFET 21 and a second on-control command to the MOSFET 22. The first on-control command and the second on-control command may be out of timing or may be performed at the same timing. Hereinafter, an example in which the control unit 7 performs both the first on-control command and the second on-control command at least for a predetermined time will be described as a representative example.

本構成では、MOSFET21のゲートに第1の入力路61が接続され、第1の入力路61はMOSFET21のゲートと同電位に保たれる導電路となっている。制御部7は、このような構成を前提とし、導電路3の電位が第1電位を超える場合に「所定の低電位状態」を生じさせるように第1の入力路61の電位を設定する制御(第1オン制御)を行う。具体的には、制御部7は、制御回路8が信号線51に対してハイレベル信号を所定時間にわたって出力することでトランジスタ42のベースにベース電流を流し、トランジスタ42をオン状態にする。この動作によって抵抗34に電流を流し、第1の入力路61の電位、即ち、MOSFET21のゲート電位を導電路3の電位よりも抵抗34での電圧降下分だけ低い電位に切り替える。このように制御部7によってなされるゲート電位の切り替え制御が「第1オン制御」である。このような制御がなされた場合、導電路3の電位が第1電位を超える場合にMOSFET21がオン動作することになる。第1電位は、基準導電路48の電位(グランド電位)よりも高く電源導電路46の電位(電源電位)よりも低い電位であり、閾値電位に相当する。   In this configuration, the first input path 61 is connected to the gate of the MOSFET 21, and the first input path 61 is a conductive path maintained at the same potential as the gate of the MOSFET 21. Based on such a configuration, the control unit 7 sets the potential of the first input path 61 so as to generate a “predetermined low potential state” when the potential of the conductive path 3 exceeds the first potential. (First ON control) is performed. Specifically, the control unit 7 causes the base current to flow through the base of the transistor 42 by causing the control circuit 8 to output a high level signal to the signal line 51 for a predetermined time, thereby turning on the transistor 42. By this operation, a current is passed through the resistor 34, and the potential of the first input path 61, that is, the gate potential of the MOSFET 21 is switched to a potential lower than the potential of the conductive path 3 by the voltage drop across the resistor 34. The gate potential switching control performed by the control unit 7 in this way is “first on control”. When such control is performed, the MOSFET 21 is turned on when the potential of the conductive path 3 exceeds the first potential. The first potential is higher than the potential of the reference conductive path 48 (ground potential) and lower than the potential of the power supply conductive path 46 (power supply potential), and corresponds to the threshold potential.

具体的には、MOSFET21は、ゲートソース間電圧Vgs1の絶対値が閾値Vth1よりも大きい場合にオン動作し、Vgs1の絶対値が閾値Vth1以下の場合にオフ動作するものである。つまり、上記「第1電位」(閾値電位)とは、トランジスタ42がオン動作したときにMOSFET21のゲートソース間電圧Vgs1の絶対値が閾値Vth1となるときの導電路3の電位である。そして、導電路3の電位がこの「第1電位」(閾値電位)を超える程度に高ければMOSFET21がオン動作することになる。   Specifically, the MOSFET 21 is turned on when the absolute value of the gate-source voltage Vgs1 is larger than the threshold value Vth1, and is turned off when the absolute value of Vgs1 is less than or equal to the threshold value Vth1. That is, the “first potential” (threshold potential) is the potential of the conductive path 3 when the absolute value of the gate-source voltage Vgs1 of the MOSFET 21 becomes the threshold Vth1 when the transistor 42 is turned on. If the potential of the conductive path 3 is high enough to exceed the “first potential” (threshold potential), the MOSFET 21 is turned on.

更に、MOSFET22のゲートに第2の入力路62が接続され、第2の入力路62はMOSFET22のゲートと同電位に保たれる導電路となっている。制御部7は、このような構成を前提とし、少なくとも導電路3の電位が第1電位(閾値電位)以下である場合に「所定の高電位状態」を生じさせるように第2の入力路62の電位を設定する制御(第2オン制御)を行う。具体的には、制御部7は、制御回路8から信号線51に対してハイレベル信号を出力する「所定時間」において、信号線52に対しローレベル信号を出力する。このように制御回路8から信号線52に対してローレベル信号を出力することでトランジスタ44のベースにベース電流を流し、トランジスタ44をオン状態にする。この動作によって抵抗36に電流を流し、第2の入力路62の電位、即ち、MOSFET22のゲート電位を、グランド電位よりも高い一定電位に切り替える。このように制御部7によってなされるゲート電位の切り替え制御が「第2オン制御」である。このような制御がなされた場合、導電路3の電位が所定の第2電位を下回る場合にMOSFET22がオン動作することになる。第2電位は、電源導電路46の電位(電源電位)よりも低く基準導電路48の電位(グランド電位)よりも高い電位であり、「第1電位」(閾値電位)よりも高く設定されている。つまり、導電路3の電位が第1電位(閾値電位)以下である場合には、必ず、導電路3の電位が上記第2電位を下回っていることになり、MOSFET22がオン動作することになる。   Further, the second input path 62 is connected to the gate of the MOSFET 22, and the second input path 62 is a conductive path that is kept at the same potential as the gate of the MOSFET 22. Based on such a configuration, the control unit 7 is based on the second input path 62 so as to generate a “predetermined high potential state” when at least the potential of the conductive path 3 is equal to or lower than the first potential (threshold potential). (Second ON control) is set. Specifically, the control unit 7 outputs a low level signal to the signal line 52 at “predetermined time” when the control circuit 8 outputs a high level signal to the signal line 51. Thus, by outputting a low level signal from the control circuit 8 to the signal line 52, a base current is caused to flow through the base of the transistor 44, and the transistor 44 is turned on. By this operation, a current is passed through the resistor 36, and the potential of the second input path 62, that is, the gate potential of the MOSFET 22 is switched to a constant potential higher than the ground potential. The gate potential switching control performed by the control unit 7 in this way is the “second ON control”. When such control is performed, the MOSFET 22 is turned on when the potential of the conductive path 3 is lower than the predetermined second potential. The second potential is lower than the potential of the power supply conductive path 46 (power supply potential) and higher than the potential of the reference conductive path 48 (ground potential), and is set higher than the “first potential” (threshold potential). Yes. That is, when the potential of the conductive path 3 is equal to or lower than the first potential (threshold potential), the potential of the conductive path 3 is always lower than the second potential, and the MOSFET 22 is turned on. .

具体的には、MOSFET22は、ゲートソース間電圧Vgs2が閾値Vth2よりも大きい場合にオン動作し、Vgs2が閾値Vth2以下の場合にオフ動作するものである。つまり、上記「第2電位」とは、トランジスタ44がオン動作したときにMOSFET22のゲートソース間電圧Vgs2が閾値Vth2となるときの導電路3の電位である。本構成では、分圧回路33を構成する抵抗の抵抗値がMOSFET22のオン抵抗と比較して十分に大きく、MOSFET22のオン動作時にはMOSFET22のドレインとソースがほぼ同電位になる構成である。従って、MOSFET22のドレインとゲートの電位差が上記閾値Vth2とほぼ一致するときの導電路3の電位が「第2電位」であり、導電路3の電位がこの「第2電位」を下回る程度に低ければMOSFET21がオン動作することになる。   Specifically, the MOSFET 22 is turned on when the gate-source voltage Vgs2 is larger than the threshold value Vth2, and is turned off when Vgs2 is less than or equal to the threshold value Vth2. That is, the “second potential” is a potential of the conductive path 3 when the gate-source voltage Vgs2 of the MOSFET 22 becomes the threshold value Vth2 when the transistor 44 is turned on. In this configuration, the resistance value of the resistor constituting the voltage dividing circuit 33 is sufficiently larger than the on-resistance of the MOSFET 22, and the drain and the source of the MOSFET 22 have substantially the same potential when the MOSFET 22 is on. Therefore, the potential of the conductive path 3 when the potential difference between the drain and gate of the MOSFET 22 substantially matches the threshold value Vth2 is the “second potential”, and the potential of the conductive path 3 is low enough to be lower than the “second potential”. In this case, the MOSFET 21 is turned on.

電圧検出部5は、このように制御部7によって第1オン制御の指令及び第2オン制御の指令が共に行われる「所定時間」において共通の導電路30を流れる電流に基づき、電圧検出対象の導電路3に印加された電圧の状態を検出する。具体的には、上記「所定時間」において第1オン制御の指令及び第2オン制御の指令が共になされると、MOSFET21及びMOSFET22の少なくともいずれかがオン状態になり、この場合、共通の導電路30には導電路3の電位に応じた電流が流れる。   Based on the current flowing through the common conductive path 30 during the “predetermined time” when both the first on-control command and the second on-control command are performed by the control unit 7 as described above, the voltage detection unit 5 The state of the voltage applied to the conductive path 3 is detected. Specifically, when both the first on-control command and the second on-control command are issued at the “predetermined time”, at least one of the MOSFET 21 and the MOSFET 22 is turned on, and in this case, the common conductive path A current corresponding to the potential of the conductive path 3 flows through 30.

共通の導電路30に構成され分圧回路33では、分圧抵抗31,32の抵抗値が、MOSFET21,22のオン抵抗と比較して十分に大きくなっている。このため、MOSFET21,22のいずれかがオン状態であれば、2つの分圧抵抗31,32の間の導電部(接続点)の電位は導電路3の電位にほぼ比例した値となり、電圧検出部5はこの値を入力値として検出する。これにより、電圧検出部5は、導電路3の電圧を把握することができる。   In the voltage dividing circuit 33 configured by the common conductive path 30, the resistance values of the voltage dividing resistors 31 and 32 are sufficiently larger than the ON resistances of the MOSFETs 21 and 22. For this reason, if either of the MOSFETs 21 and 22 is in the on state, the potential of the conductive portion (connection point) between the two voltage dividing resistors 31 and 32 becomes a value substantially proportional to the potential of the conductive path 3, and voltage detection The unit 5 detects this value as an input value. Thereby, the voltage detector 5 can grasp the voltage of the conductive path 3.

以上のように、図1の電圧検出回路1では、並列に設けられたMOSFET21,22に対する2種類のオン制御が可能となっている。このため、電圧検出対象の導電路3の電位が第1電位を超える程度に高い場合には、少なくとも第1オン制御によってPチャネルMOSFET21をオン動作させて第1の分岐導電路11に電流を流すことができる。逆に、電圧検出対象の導電路3の電位が第2電位を下回る程度に低い場合には、少なくとも第2オン制御によってNチャネルMOSFET22をオン動作させて第2の分岐導電路12に電流を流すことができる。つまり、電圧検出対象の導電路3において電圧変動があったとしても、2種類のオン制御を行えば、いずれかの分岐導電路に電流が流れる可能性が高くなる。ゆえに、検出用の電流を流せないことに起因する検出不能状態を回避し易くなり、ひいては、電圧検出対象の導電路3の電圧状態をより確実に検出し易くなる。   As described above, the voltage detection circuit 1 shown in FIG. 1 can perform two types of ON control for the MOSFETs 21 and 22 provided in parallel. For this reason, when the potential of the conductive path 3 to be voltage-detected is high enough to exceed the first potential, the P-channel MOSFET 21 is turned on by at least the first on control to flow a current through the first branch conductive path 11. be able to. On the other hand, when the potential of the conductive path 3 to be voltage detected is low enough to be lower than the second potential, the N-channel MOSFET 22 is turned on by at least the second on control to pass a current through the second branch conductive path 12. be able to. In other words, even if there is a voltage fluctuation in the conductive path 3 to be detected, if two types of on-control are performed, the possibility that a current flows through one of the branched conductive paths is increased. Therefore, it becomes easy to avoid the undetectable state due to the fact that the detection current cannot be passed, and as a result, it becomes easier to detect the voltage state of the conductive path 3 to be detected with more certainty.

具体的には、第1オン制御を行う条件となる第1電位が第2オン制御を行う条件となる第2電位よりも低くなっている。この構成では、導電路3の電位が第1電位以下の場合には、MOSFET22をオンさせることができる。また、導電路3の電位が第1電位を超え且つ第2電位未満の場合には、MOSFET21,22をいずれもオンさせることができる。そして、導電路3の電位が第2電位以上の場合には、MOSFET21をオンさせることができる。つまり、蓄電部90の正極電位が0Vに近い状態から最大電位(満充電のときの電位)までの範囲で、確実に分圧回路33に電流を流すことができ、より広いレンジで電圧検出を行うことができる。   Specifically, the first potential that is a condition for performing the first on control is lower than the second potential that is a condition for performing the second on control. In this configuration, the MOSFET 22 can be turned on when the potential of the conductive path 3 is equal to or lower than the first potential. Further, when the potential of the conductive path 3 exceeds the first potential and is lower than the second potential, both the MOSFETs 21 and 22 can be turned on. When the potential of the conductive path 3 is equal to or higher than the second potential, the MOSFET 21 can be turned on. In other words, the current can be reliably passed through the voltage dividing circuit 33 in a range from the state where the positive electrode potential of the power storage unit 90 is close to 0 V to the maximum potential (potential at full charge), and voltage detection can be performed in a wider range. It can be carried out.

また、本構成では、蓄電部90が満充電状態のときの正極電位よりも電源導電路46の電源電位のほうが低くなっている。このため、電圧検出対象の導電路3が高電位になるときでも安定的に電圧検出を行い得る構成を、外部電源V1(電源導電路46の電源電位を定める電源)の出力を抑えた形で実現でき、特に、外部電源V1を設計・構成する上で有利になる。そして、この効果は、満充電時の正極電位が高いものであるほど顕著になる。   Further, in this configuration, the power supply potential of the power supply conductive path 46 is lower than the positive electrode potential when the power storage unit 90 is fully charged. For this reason, the configuration capable of stably detecting the voltage even when the conductive path 3 to be voltage-detected becomes a high potential in a form that suppresses the output of the external power source V1 (the power source that determines the power source potential of the power source conductive path 46). In particular, this is advantageous in designing and configuring the external power supply V1. And this effect becomes so remarkable that the positive electrode electric potential at the time of a full charge is high.

また、上述したように第1オン制御の指令と第2オン制御の指令とを所定時間において共に行い、その所定時間に分岐導電路を流れる電流(即ち、その所定時間に共通の導電路30に流れる電流)から電圧状態を把握すれば、検出時間を短縮化しやすくなる。例えば、第1オン制御と第2オン制御とを時間差で行う制御方法では、2倍の時間がかかってしまうが、図1の構成は、これらを同時期に行うことを可能とする構成であり、電圧検出時間の短縮化を図り易いものである。   In addition, as described above, the first on-control command and the second on-control command are issued together at a predetermined time, and the current flowing through the branch conductive path at the predetermined time (that is, the common conductive path 30 at the predetermined time). If the voltage state is grasped from the flowing current), the detection time can be easily shortened. For example, in the control method in which the first on-control and the second on-control are performed with a time difference, it takes twice as long, but the configuration in FIG. 1 is a configuration that enables these to be performed at the same time. It is easy to shorten the voltage detection time.

また、本構成では、第1オン制御及び第2オン制御のいずれが行われる場合でも、共通の導電路30を流れる電流から導電路3の電圧状態を把握することができ、分岐導電路毎に電圧検出部を設ける必要が無い。このため、分岐導電路を流れる電流から検出値を生成・取得するための回路を簡易化、小型化しやすくなる。   Further, in this configuration, the voltage state of the conductive path 3 can be grasped from the current flowing through the common conductive path 30 regardless of whether the first on-control or the second on-control is performed. There is no need to provide a voltage detector. For this reason, it becomes easy to simplify and miniaturize a circuit for generating and acquiring a detection value from the current flowing through the branch conductive path.

<他の実施例>
本発明は上記記述及び図面によって説明した実施例に限定されるものではなく、例えば次のような実施例も本発明の技術的範囲に含まれる。
(1)上述した実施例では、第1オン制御と第2オン制御とを同時期に行う例を示したが、タイミングをずらして行い、それぞれの時期に電圧検出部5による検出を行うようにしてもよい。
(2)上述した実施例では、制御回路8から2つの経路(信号線51,52)に対して信号を出力する構成を示したが、この例に限定されない。例えば、信号線52を省略するとともに信号線51の出力を反転する回路を設け、信号線51からの出力を反転してトランジスタ44のベースに与えるようにしてもよい。このようにすれば、制御回路8の信号出力ポートを削減することができる。
(3)上述した実施例では、蓄電部90の正極に接続された導電路3の電圧を検出する構成を例示したが、電圧検出対象となる部位はこれに限定されず、様々な回路や部品の様々な部位を電圧検出対象とすることができる。
(4)上述した実施例では、共通の導電路30に分圧回路33を設けて電圧検出を行っているが、第1の分岐導電路11及び第2の分岐導電路12にそれぞれ別個に分圧回路を設け、それぞれの分圧回路で別個に電圧検出を行ってもよい。
<Other embodiments>
The present invention is not limited to the embodiments described with reference to the above description and drawings. For example, the following embodiments are also included in the technical scope of the present invention.
(1) In the above-described embodiment, the example in which the first on-control and the second on-control are performed at the same time has been shown. However, the timing is shifted and detection by the voltage detection unit 5 is performed at each timing. May be.
(2) In the above-described embodiment, the configuration in which the signal is output from the control circuit 8 to the two paths (signal lines 51 and 52) is shown, but the present invention is not limited to this example. For example, the signal line 52 may be omitted and a circuit for inverting the output of the signal line 51 may be provided so that the output from the signal line 51 is inverted and applied to the base of the transistor 44. In this way, the signal output port of the control circuit 8 can be reduced.
(3) In the above-described embodiment, the configuration for detecting the voltage of the conductive path 3 connected to the positive electrode of the power storage unit 90 has been exemplified. However, the part to be the voltage detection target is not limited to this, and various circuits and components The various parts can be voltage detection targets.
(4) In the above-described embodiment, the voltage detection is performed by providing the voltage dividing circuit 33 in the common conductive path 30, but the first branch conductive path 11 and the second branch conductive path 12 are separately divided. A voltage circuit may be provided, and voltage detection may be performed separately in each voltage dividing circuit.

1…電圧検出回路
3…電圧検出対象の導電路(所定導電路)
5…電圧検出部(検出部)
7…制御部
11…第1の分岐導電路
12…第2の分岐導電路
21…PチャネルMOSFET(第1スイッチ素子)
22…NチャネルMOSFET(第2スイッチ素子)
30…共通の導電路
46…電源導電路
48…基準導電路
61…第1の入力路
62…第2の入力路
90…蓄電部
DESCRIPTION OF SYMBOLS 1 ... Voltage detection circuit 3 ... Conduction path (predetermined conduction path) of voltage detection object
5 ... Voltage detector (detector)
DESCRIPTION OF SYMBOLS 7 ... Control part 11 ... 1st branch conductive path 12 ... 2nd branch conductive path 21 ... P channel MOSFET (1st switch element)
22 ... N-channel MOSFET (second switch element)
DESCRIPTION OF SYMBOLS 30 ... Common conductive path 46 ... Power supply conductive path 48 ... Reference | standard conductive path 61 ... 1st input path 62 ... 2nd input path 90 ... Power storage part

Claims (4)

蓄電部に導通する所定導電路から分岐する第1の分岐導電路と、
前記所定導電路から分岐するとともに前記第1の分岐導電路と並列に設けられる第2の分岐導電路と、
前記第1の分岐導電路に介在するとともに第1の入力路に接続され、前記第1の入力路の電位が前記所定導電路の電位よりも低い所定の低電位状態である場合にオン動作して前記第1の分岐導電路を通電状態とし、前記所定の低電位状態が解除された場合にオフ動作して前記第1の分岐導電路を非通電状態とする第1スイッチ素子と、
前記第2の分岐導電路に介在するとともに第2の入力路に接続され、前記第2の入力路の電位が前記所定導電路の電位よりも高い所定の高電位状態である場合にオン動作して前記第2の分岐導電路を通電状態とし、前記所定の高電位状態が解除された場合にオフ動作して前記第2の分岐導電路を非通電状態とする第2スイッチ素子と、
前記第1の入力路及び前記第2の入力路の電位を、前記第1スイッチ素子及び前記第2スイッチ素子が共にオフ状態となる設定とするオフ制御と、前記第1の入力路の電位を、前記所定導電路の電位が閾値電位を超える場合に前記所定の低電位状態を生じさせる設定とする第1オン制御と、前記第2の入力路の電位を、前記所定導電路の電位が少なくとも前記閾値電位以下である場合に前記所定の高電位状態を生じさせる設定とする第2オン制御とを行う制御部と、
前記第1の分岐導電路及び前記第2の分岐導電路の少なくともいずれかが通電状態となった場合に、前記第1の分岐導電路及び前記第2の分岐導電路の少なくともいずれかを流れる電流に基づいて前記所定導電路に印加された電圧の状態を検出する検出部と、
を有する電圧検出回路。
A first branch conductive path that branches from a predetermined conductive path that conducts to the power storage unit;
A second branch conductive path branched from the predetermined conductive path and provided in parallel with the first branch conductive path;
When the potential of the first input path is in a predetermined low potential state lower than the potential of the predetermined conductive path, the switch is turned on. A first switch element that energizes the first branch conductive path and turns off the first branch conductive path when the predetermined low potential state is released; and
When the potential of the second input path is in a predetermined high potential state higher than the potential of the predetermined conductive path, it is turned on when it is interposed in the second branch conductive path and connected to the second input path. A second switch element that turns on the second branch conductive path and turns off the second branch conductive path when the predetermined high potential state is released;
OFF control for setting the potential of the first input path and the second input path to be set to turn off both the first switch element and the second switch element, and the potential of the first input path. The first on-control that is set to generate the predetermined low potential state when the potential of the predetermined conductive path exceeds a threshold potential, and the potential of the second input path is at least equal to the potential of the predetermined conductive path A control unit that performs second on control that is set to cause the predetermined high potential state when the threshold potential is equal to or lower than the threshold potential;
A current flowing through at least one of the first branch conductive path and the second branch conductive path when at least one of the first branch conductive path and the second branch conductive path is energized. A detection unit for detecting a state of a voltage applied to the predetermined conductive path based on
A voltage detection circuit.
前記制御部は、所定の電源電位となる電源導電路と、前記電源電位よりも低い基準電位となる基準導電路とに接続され、
前記閾値電位は、前記電源電位よりも低く前記基準電位よりも高い電位であり、
前記蓄電部が満充電状態のときの前記所定導電路の電位よりも前記電源電位のほうが低くなっている請求項1に記載の電圧検出回路。
The control unit is connected to a power supply conductive path having a predetermined power supply potential and a reference conductive path having a reference potential lower than the power supply potential,
The threshold potential is a potential lower than the power supply potential and higher than the reference potential,
The voltage detection circuit according to claim 1, wherein the power supply potential is lower than the potential of the predetermined conductive path when the power storage unit is in a fully charged state.
前記制御部は、前記第1オン制御及び前記第2オン制御を、少なくとも所定時間において共に行い、
前記検出部は、前記所定時間において前記第1の分岐導電路及び前記第2の分岐導電路の少なくともいずれかを流れる電流に基づき、前記所定導電路に印加された電圧の状態を検出する構成である請求項1又は請求項2に記載の電圧検出回路。
The control unit performs the first on control and the second on control together at least for a predetermined time,
The detection unit is configured to detect a state of a voltage applied to the predetermined conductive path based on a current flowing through at least one of the first branch conductive path and the second branch conductive path in the predetermined time. The voltage detection circuit according to claim 1 or claim 2.
共通の導電路を有し、
前記第1の分岐導電路において前記所定導電路と前記共通の導電路との間に前記第1スイッチ素子が介在し、前記第2の分岐導電路において前記所定導電路と前記共通の導電路との間に前記第2スイッチ素子が介在した構成で前記第1の分岐導電路及び前記第2の分岐導電路が前記共通の導電路に接続されており、
前記検出部は、前記共通の導電路を流れる電流に基づいて前記所定導電路に印加された電圧の状態を検出する構成である請求項1から請求項3のいずれか一項に記載の電圧検出回路。
Have a common conductive path,
The first switch element is interposed between the predetermined conductive path and the common conductive path in the first branch conductive path, and the predetermined conductive path and the common conductive path in the second branch conductive path The first branch conductive path and the second branch conductive path are connected to the common conductive path in a configuration in which the second switch element is interposed between
4. The voltage detection according to claim 1, wherein the detection unit is configured to detect a state of a voltage applied to the predetermined conductive path based on a current flowing through the common conductive path. 5. circuit.
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