JP2017028478A - Volume controller - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a volume controller achieving suppression of zipper noise generation when changing the volume value, while shortening the changing time.SOLUTION: A volume controller for controlling the volume value of an inputted audio signal by an electronic volume includes a zero-cross detection circuit 30 for detecting the zero-cross point of the audio signal and outputting a zero-cross detection signal, a clock signal generation circuit 40 generating a clock signal, and a volume setting circuit 20 for causing gradual transition of the volume value of an electronic volume from the current value toward a target value, for each one or more than one pulses of the clock signal existing during the effective period of the zero-cross detection signal.SELECTED DRAWING: Figure 1

Description

  The present invention relates to a volume control device for controlling an electronic volume of an audio device, and more particularly to a volume control device designed to reduce switching noise (zipper noise) and switching time of an electronic volume.

  The audio equipment includes an electronic volume for adjusting the volume value (volume) of the audio signal. The electronic volume is adjusted based on a command from a volume control device such as an equipped microcomputer, but zipper noise is generated at the time of switching for the adjustment.

  That is, as shown in FIG. 5A, when the volume value of the input audio signal Vin is switched by the control data DOUT at an arbitrary time point, a large inflection point B is formed in the output audio signal Vout, and zipper noise is generated. To do.

  Therefore, as a method for improving the zipper noise, (1) a method of switching the volume value at a time when the zero crossing of the input audio signal Vin is detected, and (2) a method of switching the volume value in multiple steps at an arbitrary timing. (3) A method (Patent Document 1) for switching the volume value by dividing it into a plurality of times by one step at each zero crossing point has been proposed.

JP 2008-103877 A

  As shown in FIG. 5B, the method of switching the volume value at a time when the zero cross is detected in (1) has little potential fluctuation at the time of switching the volume value and suppresses the generation of an inflection point. The volume value may be switched at a potential deviated from the zero crossing point due to variations in the accuracy of the circuit and the response speed of the entire apparatus. In such a case, an inflection point is generated and zipper noise is generated.

  In the method (2) in which the volume value is switched step by step at an arbitrary time point, the potential change is small and generation of an inflection point is suppressed because the step is switched step by step. However, the volume is near the peak value of the input audio signal Vin. When the value is switched, the potential fluctuation increases as shown in FIG. As a result, the generation of inflection points is not suppressed and zipper noise occurs.

  In addition to the problem described in the method (1), the method of switching the volume value by one step at each zero crossing time point in (3) is the volume when the number of steps until the volume value reaches the target value is large. It takes time to complete the switching of the value, and the delay may become noticeable in hearing. In the case of audio signals in a general voice band, the detection frequency at the zero crossing point is high, but in the case of professional equipment, the above problem is serious because the detection frequency at the zero crossing point is low when handling a single frequency signal. It becomes.

  An object of the present invention is to provide a volume control device that solves the above-described problems and realizes the suppression of the generation of zipper noise when switching the volume value and the shortening of the switching time.

  To achieve the above object, a volume control device according to a first aspect of the present invention is a volume control device for controlling a volume value of an input audio signal with an electronic volume, and detects a zero-crossing time point of the audio signal to detect zero-crossing. A zero cross detection circuit for outputting a signal, a clock signal generation circuit for generating a clock signal, and the volume of the electronic volume for each one or more pulses of the clock signal existing during the effective period of the zero cross detection signal. And a volume setting circuit that causes a value to transition stepwise from a current value toward a target value.

  According to a second aspect of the present invention, in the volume control device according to the first aspect, the volume setting circuit includes a first register in which the target value is stored, a second register in which the current value is stored, An analysis circuit for comparing the target value of the first register with the current value of the second register, and the analysis for each one or more pulses of the clock signal existing during the valid period of the zero-cross detection signal; And a control circuit that updates the current value of the second register in a stepwise manner in accordance with an analysis result of the circuit.

  According to a third aspect of the present invention, in the volume control device according to the first or second aspect, the zero cross detection circuit includes a first time point that is a predetermined level away from the zero cross time point of the audio signal in a positive voltage direction, and the The zero-cross detection signal having the effective period as a period between the zero-cross point and a second point separated by a predetermined level in the negative voltage direction is generated.

  According to a fourth aspect of the present invention, in the volume control device according to the first or second aspect, the zero-cross detection circuit is effective during a period from the zero-cross point of the audio signal to a time point after a predetermined time has elapsed. A signal is generated.

  According to a fifth aspect of the present invention, in the volume control device according to the first, second, third, or fourth aspect, the analysis circuit is configured such that the target value of the first register matches the current value of the second register. The clock signal generation circuit stops outputting the clock signal when the analysis circuit issues the “match” command.

  According to the present invention, the volume value is updated every one or more pulses of the clock signal during the valid period of the zero cross detection signal, so that the zipper noise at the time of switching the volume value in the electronic volume is effectively suppressed. In addition, since the volume value can be updated a plurality of times during the valid period of the zero cross detection signal, the switching time can be shortened.

  In addition, the zero cross detection circuit is effective during a period between a first time point that is a predetermined level away from the zero cross point of the input audio signal in the positive voltage direction and a second time point that is a predetermined level away from the zero cross point in the negative voltage direction. By configuring to generate a zero-cross detection signal for the period, even if the input audio signal is a low-frequency signal and the frequency of zero-cross detection decreases, it is possible to prevent the volume value switching time from becoming long, and Switching without a sense of incongruity becomes possible.

  In addition, when the frequency of the input audio signal is low, the occurrence frequency of the zero cross point is low as described above, but the effective period of the zero cross detection signal is long, and when the frequency of the audio signal is high, the occurrence frequency of the zero cross point is high. However, since the effective period of the zero cross detection signal is shortened, the time required for switching the volume value can be made substantially constant without depending on the frequency of the input audio signal.

It is a circuit diagram which shows the structure of the volume control apparatus of this invention. It is an operation | movement waveform diagram of the volume control apparatus of this invention. FIG. 3 is an enlarged waveform diagram of a portion A in FIG. 2. It is a circuit diagram of the zero cross detection circuit of another example. It is a waveform at the time of conventional volume switching.

  FIG. 1 shows a circuit of a volume control apparatus according to one embodiment of the present invention. Reference numeral 10 denotes an electronic volume, 20 denotes a volume setting circuit for setting a volume value (current value) of the electronic volume 10, 30 denotes a zero cross detection circuit, and 40 denotes a clock signal generation circuit.

  The volume setting circuit 20 stores a first register 21 that stores data DIN that is a volume value (target value) input from the outside and a data DOUT that is a volume value (current value) set to the electronic volume 10. 2 register 22, an analysis circuit 23 that compares data DIN of the first register 21 and data DOUT of the second register 22, and a control circuit 24 that updates the data DOUT of the second register 22 in stages.

  The analysis circuit 23 compares the data DIN of the first register 21 and the data DOUT of the second register 22 and issues an “attenuation” command to the control circuit 24 when DIN <DOUT. When> DOUT, an “amplification” command is issued, and when DIN = DOUT, a “maintenance” command is issued.

  The analysis circuit 23 outputs a “mismatch” command to the clock signal generation circuit 40 when DIN ≠ DOUT, and outputs a “match” command when DIN = DOUT.

  The control circuit 24 takes in a clock signal obtained by the logical product of the zero cross detection signal Vsz indicating the zero cross point output from the zero cross detection circuit 30 and the clock signal Vclk output from the clock signal generation circuit 40. When the command input from the analysis circuit 23 is “amplification” within the valid period T1 (see FIGS. 2 and 3) of the zero cross detection signal Vsz, the data DOUT is supplied to the second register 22 as the clock signal Vclk. A control signal that increases step by step is issued for each pulse of the above, thereby increasing the volume value of the electronic volume 10 stepwise. When the signal is “attenuated”, a control signal for decreasing the data DOUT of the second register 22 step by step for each pulse of the clock signal Vclk is output, thereby decreasing the volume value of the electronic volume 10 stepwise. To do. Further, in the case of “maintain”, a control signal for making the update content of the data DOUT zero is output.

  The zero-cross detection circuit 30 includes a window comparator 31 having a positive / negative threshold voltage (+ Vz / −Vz) around the zero-cross point of the input audio signal Vin. For this reason, the pulse width indicating the valid period T1 of the zero-cross detection signal Vsz is a time width indicating periods before and after the zero-cross point of the audio signal (see FIG. 2). Therefore, the effective period T1 is narrowed when the frequency of the input audio signal Vin is high, and widened when the frequency is low.

  As shown in FIG. 4, the zero-cross detection circuit 30 has a comparator 32 that detects the zero-cross point of the input audio signal Vin by setting the reference voltage Vref to 0 V, and the output signal of the comparator 32 is in the positive direction. Alternatively, it can be replaced with a zero-cross detection circuit 30A configured by a pulse generation circuit 33 that generates a pulse having a predetermined pulse width every time it changes in the negative direction. The zero-cross detection signal Vsz obtained at this time is a signal having a pulse width of a predetermined time starting from the zero-cross point.

  The clock signal generation circuit 40 outputs the clock signal Vclk when a “mismatch” command is issued from the analysis circuit 23, and stops outputting the clock signal Vclk when a “match” command is issued.

  When the data DIN stored in the first register 21 is larger than the data DOUT stored in the second register 22 (DIN> DOUT), an “amplification” command is sent from the analysis circuit 23 to the control circuit 24. Then, a “mismatch” command is output to the clock signal generation circuit 40.

  As shown in FIG. 3, the control circuit 24 takes in the clock signal Vclk only during the valid period T1 when the zero cross detection signal Vsz is at the “H” level. Then, the control circuit 24 updates the second register 22 step by step in the direction in which the data DOUT stored in the second register 22 becomes larger for each pulse of the clock signal Vclk, whereby the volume value of the electronic volume 10 is changed. Updated to a larger value.

  If the data DOUT in the second register 22 coincides with the data DIN in the first register 21 (DOUT = DIN) by this stepwise update process, a “maintain” command is output from the analysis circuit 23 to the control circuit 24. The control circuit 24 ends the update of the second register 22. In addition, a “match” command is output from the analysis circuit 23 to the clock signal generation circuit 40, and the output of the clock signal Vclk of the clock signal generation circuit 40 is stopped.

  The update process described above may end within one zero-cross detection sign Vsz when the difference between the data DIN and the data DOUT is small, but when the difference is large, the update process covers a plurality of zero-cross signals Vsz. Repeated.

  On the other hand, when the data DIN stored in the first register 21 is smaller than the data DOUT stored in the second register 22 (DIN <DOUT), an “attenuation” command is sent from the analysis circuit 23 to the control circuit 24. And a “mismatch” command is output to the clock signal generation circuit 40.

  During the valid period T1 of the zero-crossing detection signal Vsz, the control circuit 24 gradually updates the second register 22 for each pulse of the clock signal Vclk so that the data DOUT stored therein decreases. Thus, the volume value of the electronic volume 10 is updated to a small value.

  Even when the data DIN in the register 21 is replaced with new data during the above update process, the same update process is performed on the data DOUT in the second register 22.

  As described above, in this embodiment, the volume value of the audio signal Vin is increased or decreased stepwise for each pulse of the clock signal Vclk within the effective period T1 in which the zero cross detection signal Vsz is at the “H” level. So zipper noise is reduced. In addition, since the volume value can be updated a plurality of times during the valid period of the zero cross detection signal, the switching time can be shortened.

  Further, when the input audio signal Vin is a low frequency signal, the frequency of zero cross detection decreases, but the effective period T1 of the zero cross detection signal Vsz becomes longer, and the number of times the data DOUT of the register 22 is updated per zero cross detection. Therefore, it is possible to suppress an increase in the time required for switching the volume value, and it is possible to perform switching without causing a sense of incongruity in hearing.

  In addition, the volume value of the electronic volume is updated stepwise within the valid period T1 of the zero-cross detection signal Vsz and for each pulse of the clock signal Vclk, so that the volume value of the audio signal Vout to be output fluctuates rapidly. This can be suppressed. This is because the fluctuation of the output signal Vout due to a detection voltage error or the like which is regarded as a problem in the zero cross detection method shown in FIG. 5B can be absorbed, and zipper noise can be effectively suppressed.

  Further, since the valid period T1 of the zero cross detection signal Vsz changes according to the frequency of the input audio signal Vin, when the frequency of the audio signal Vin is low, the zero cross detection signal per one time is used instead of few opportunities for zero cross detection. The effective period T1 becomes longer. On the other hand, when the frequency of the audio signal Vin is high, the valid period T1 of the zero-cross detection signal per time becomes short instead of many opportunities for zero-cross detection.

As a result, the time T2 required to update the volume value of the electronic volume 10 does not depend on the frequency of the input audio signal Vin, and is expressed by the following equation (1). In equation (1), P is the step amount required for switching (the number of pulses of the clock signal Vclk required for switching), V is the amplitude of the input audio signal Vin, and f is the frequency of the clock signal Vclk. Thus, there is no term of the frequency of the input audio signal Vin in the expression (1), and the time T2 required to update the volume value of the electronic volume 10 is not affected by the frequency of the input audio signal Vin.
T2 = (P × π × V) / (4 × Vz × f) (1)

10: Electronic volume 20: Volume setting circuit, 21: First register, 22: Second register, 23: Analysis circuit, 24: Control circuit 30, 30A: Zero cross detection circuit, 31: Window comparator, 32: Comparator, 33: Pulse generation circuit 40: Clock signal generation circuit

Claims (5)

In the volume control device that controls the volume value of the input audio signal with the electronic volume,
A zero-cross detection circuit that detects a zero-cross point in the audio signal and outputs a zero-cross detection signal; a clock signal generation circuit that generates a clock signal; and one or two of the clock signals that exist during the valid period of the zero-cross detection signal A volume control device, comprising: a volume setting circuit that changes the volume value of the electronic volume in a stepwise manner from a current value to a target value for each of the pulses described above. The volume control device according to claim 1,
The volume setting circuit compares the first register in which the target value is stored, the second register in which the current value is stored, and the target value in the first register and the current value in the second register. An analysis circuit and the current value of the second register in stages according to the analysis result of the analysis circuit for each one or more pulses of the clock signal existing during the valid period of the zero-cross detection signal And a control circuit for updating. The volume control device according to claim 1 or 2,
The zero-cross detection circuit is a period between a first time point of the audio signal separated from the zero-cross point by a predetermined level in the positive voltage direction and a second time point separated from the zero-cross point by a predetermined level in the negative voltage direction. The volume control device is characterized in that the zero cross detection signal having the effective period as the effective period is generated. The volume control device according to claim 1 or 2,
The volume control device, wherein the zero-cross detection circuit generates a zero-cross detection signal that is effective during a period from the zero-cross point of the audio signal to a point when a predetermined time has elapsed. In the volume control device according to claim 1, 2, 3, or 4,
The analysis circuit issues a “match” command when the target value of the first register matches the current value of the second register,
The clock signal generation circuit stops the output of the clock signal when the analysis circuit issues the “match” command.

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