JP2017022151A - Multilayer wiring board and manufacturing method thereof - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a multilayer wiring board capable of improving reliability by reducing damage to a conductor layer due to a laser and making ruggedness unlikely to be generated on a surface of the conductor layer.SOLUTION: A multilayer wiring board 10 is structured by alternately laminating resin insulation layers 21 and 22 and a conductor layer 30. The resin insulation layers 21 and 22 include the first resin insulation layer 21 and the second resin insulation layer 22, and the conductor layer 30 consists of a first conductor part 31 and a second conductor part 32. A via conductor 26 is present right under the first conductor part 31 but the via conductor 26 is not present right under the second conductor part 32. A recess 33 is formed in the first resin insulation layer 21, and the recess 33 is filled with a conductor 34 that forms a part of the second conductor part 32. The second conductor part 32 becomes thicker than the first conductor part 31. A via conductor 27 formed in the second resin insulation layer 22 is present right above the second conductor part 32.SELECTED DRAWING: Figure 1

Description

  The present invention has a structure in which a plurality of resin insulation layers and a plurality of conductor layers are alternately laminated, and a multilayer wiring board in which a plurality of conductor layers are connected by via conductors formed in the resin insulation layer, and It relates to the manufacturing method.

In recent years, with the miniaturization of electrical equipment and electronic equipment, miniaturization of multilayer wiring boards mounted on these equipment is also required. When the multilayer wiring board is miniaturized, the wiring is miniaturized and the density is increased. Accordingly, the diameter of the via conductor (and the inner diameter of the via hole for the via conductor) tends to be reduced. . However, if the inner diameter of the via hole is reduced, it becomes difficult to form a via hole using a conventional CO ₂ laser. Therefore, it is proposed to form a via hole using an ultraviolet laser having a shorter wavelength than the CO ₂ laser. Has been. Since the ultraviolet laser has a higher energy density than the CO ₂ laser, it has a feature that the absorption rate into the conductor portion is high.

  However, when using an ultraviolet laser, the following problems may occur. For example, when a conductor layer is formed between a resin insulation layer that forms a via hole and a resin insulation layer adjacent to the lower side, and a via conductor exists immediately below the conductor layer, a via conductor is located directly below the conductor layer. The volume of the conductor portion is larger and the heat capacity is larger than when no is present. For this reason, the energy of the ultraviolet laser can be reliably absorbed by the conductor portion. On the other hand, when there is no via conductor directly under the conductor layer, the heat capacity is small, so that there is a possibility that the energy of the ultraviolet laser cannot be absorbed reliably. In this case, the damage to the conductor layer is increased and the conductor layer may be penetrated.

  In order to solve this problem, a technique for forming a laser blocking layer (conductive layer 15) for preventing laser absorption in the conductor layer on the surface (upper surface) of the conductor layer (wiring layer 12) has been proposed. (For example, refer to Patent Document 1). In this way, damage to the conductor layer can be reduced, so that the yield is increased and the reliability is improved.

Japanese Patent Laying-Open No. 2005-5499 (FIG. 7 etc.)

  However, in the conventional technique described in Patent Document 1, since the laser blocking layer is formed on the surface of the conductor layer, the surface of the conductor portion composed of the conductor layer and the laser blocking layer is likely to be uneven. As a result, the dimensional stability of the manufactured multilayer wiring board is lowered, and the reliability may be lowered.

  The present invention has been made in view of the above problems, and its purpose is to reduce the damage of the conductor layer due to the laser and to improve the reliability by making the surface of the conductor layer less likely to be uneven. An object of the present invention is to provide a multilayer wiring board and a method for manufacturing the same.

  Means for solving the above problems (Means 1) has a structure in which a plurality of resin insulation layers and a plurality of conductor layers are alternately laminated, and the gap between the plurality of conductor layers is the resin insulation layer. A multilayer wiring board connected by the formed via conductor, wherein the plurality of resin insulation layers are laminated on the first resin insulation layer and the first resin insulation layer. An adjacent second resin insulation layer, and the conductor layer formed between the first resin insulation layer and the second resin insulation layer comprises a first conductor portion and a second conductor portion, The via conductor formed in the first resin insulating layer is present immediately below the first conductor portion, while the via conductor formed in the first resin insulating layer is directly below the second conductor portion. Does not exist, and the second conductor portion is disposed on the surface of the first resin insulation layer. A recessed portion is formed in a region, and the recessed portion is filled with a conductor constituting a part of the second conductor portion, and the thickness of the second conductor portion is larger than the thickness of the first conductor portion. There is a multilayer wiring board characterized in that the via conductor formed in the second resin insulating layer exists immediately above the second conductor portion.

  Therefore, according to the invention described in means 1, in the conductor layer formed between the first resin insulation layer and the second resin insulation layer, the via conductor formed in the first resin insulation layer does not exist immediately below. The two conductor portions are thicker than the first conductor portion in which the via conductor formed in the first resin insulating layer exists immediately below. That is, even in the second conductor portion where the volume of the conductor portion is reduced because there is no via conductor immediately below, the volume of the conductor portion is increased by increasing the thickness of the second conductor portion, so the necessary heat capacity is secured. can do. As a result, the energy of the laser can be reliably absorbed by the second conductor portion, so that damage to the second conductor portion due to the laser can be reduced. Moreover, even if damaged, since the second conductor portion is formed thick, penetration of the second conductor portion by the laser can be prevented. In addition, since the second conductor portion is thickened by forming a recess portion on the surface of the first resin insulating layer and filling the recess portion with a conductor constituting a part of the second conductor portion, the second conductor portion is Even if the thickness is increased, the surface of the second conductor portion is less likely to be uneven. From the above, the yield is increased and the reliability of the multilayer wiring board is improved. The “thickness of the first conductor portion” means a thickness measured from a virtual plane that is parallel to the surface of the first resin insulating layer and defined at the same height.

  The multilayer wiring board has a structure in which a plurality of resin insulation layers and a plurality of conductor layers are alternately stacked. For example, the plurality of resin insulation layers include a first resin insulation layer and a second resin insulation layer laminated on the first resin insulation layer and adjacent to the first resin insulation layer. The resin insulation layer can be appropriately selected in consideration of insulation, heat resistance, moisture resistance, and the like. Preferred examples of the polymer material forming the resin insulation layer include thermosetting resins such as epoxy resin, phenol resin, urethane resin, silicone resin, and polyimide resin, and heat such as polycarbonate resin, acrylic resin, polyacetal resin, and polypropylene resin. Examples thereof include a plastic resin.

  The conductor layer can be formed of a conductive metal material or the like. For example, the conductor layer formed between the first resin insulation layer and the second resin insulation layer includes a first conductor portion and a second conductor portion. Examples of the metal material constituting the conductor layer include copper, silver, iron, cobalt, nickel, and the like. In particular, the conductor layer is preferably made of copper having high conductivity and low cost. The conductor layer is preferably formed by plating. In this way, a plurality of conductor layers can be formed with high accuracy and uniform dimensions. If the conductor layer is formed, for example, by printing a metal paste, it becomes difficult to form the conductor layer with high accuracy and uniform dimensions, and thus there is a possibility that the height of each conductor layer may vary.

  Further, the plurality of conductor layers are connected by via conductors formed in the resin insulating layer. The via conductor can be formed of a conductive metal material or the like. Examples of the metal material constituting the via conductor include copper, silver, iron, cobalt, nickel, and the like. In particular, the via conductor is preferably made of copper having high conductivity and low cost. Further, the via conductor is preferably formed by plating. In this way, the via conductor can be formed easily and at low cost. However, the via conductor may be formed by printing a metal paste.

  Moreover, a recessed part is formed in the area | region where the 2nd conductor part is arrange | positioned in the surface of the 1st resin insulation layer. The depth of the dent is not particularly limited, but is preferably, for example, 0.1 μm or more and ½ or less of the thickness of the first resin insulating layer. If the depth of the dent portion is less than 0.1 μm, the second conductor portion partially filled in the dent portion becomes too thin, so that it is impossible to prevent laser penetration into the second conductor portion. On the other hand, when the depth of the dent becomes larger than ½ of the thickness of the first resin insulation layer, the dent penetrates the first resin insulation layer, and a second part is formed in the dent. There is a possibility that the conductor portion contacts a conductor layer formed between the first resin insulating layer and the resin insulating layer adjacent to the lower layer side.

  Note that the via conductor forming material and the conductor forming material constituting a part of the second conductor portion may be made of the same type of material. In this way, it is not necessary to prepare a material different from the via conductor when forming a part of the second conductor portion. Therefore, since the material necessary for manufacturing the multilayer wiring board is reduced, the cost of the multilayer wiring board can be reduced.

  Another means (means 2) for solving the above-described problem is a method of manufacturing the multilayer wiring board according to the means 1, wherein the first resin insulating layer is subjected to laser processing, and the first A via hole forming step of forming a via hole penetrating through one resin insulating layer, a via conductor forming step of forming the via conductor in the via hole after the via hole forming step, and the first resin insulating layer Laser processing to form a recess in a region where the second conductor is disposed on the surface of the first resin insulation layer, and the first resin insulation layer on the surface of the first resin insulation layer. A conductor layer forming step for forming a conductor portion and the second conductor portion, and when the conductor layer forming step is completed, a conductor constituting a part of the second conductor portion is formed in the recessed portion. Thus, the second conductor portion is more than the first conductor portion. There are a method of manufacturing the multilayer wiring board characterized by comprising thick.

  Therefore, according to the invention described in the means 2, when the conductor layer forming step is completed, the conductor constituting a part of the second conductor portion is formed in the recessed portion, thereby forming the first resin insulating layer. The second conductor portion in which the via conductor does not exist immediately below is thicker than the first conductor portion in which the via conductor formed in the first resin insulation layer exists immediately below. In other words, even in the second conductor portion where the volume of the conductor portion is reduced because there is no via conductor directly below, the volume of the conductor portion is increased by increasing the thickness of the second conductor portion, so that the necessary heat capacity is ensured. Can do. As a result, the energy of the laser can be reliably absorbed by the second conductor portion, so that damage to the second conductor portion due to the laser can be reduced. Moreover, even if damaged, since the second conductor portion is formed thick, penetration of the second conductor portion by the laser can be prevented. Moreover, in the step of forming the recess, the recess is formed on the surface of the first resin insulating layer, and when the conductor layer forming step is completed, the recess is filled with the conductor constituting a part of the second conductor portion. The second conductor portion becomes thick. For this reason, even if the thickness of the second conductor portion is increased, unevenness is less likely to occur on the surface of the second conductor portion. From the above, the yield is increased and the reliability of the multilayer wiring board is improved.

  Hereinafter, the manufacturing method of the multilayer wiring board of the means 2 will be described.

First, a via hole forming step is performed, laser processing is performed on the first resin insulating layer, and a via hole penetrating the first resin insulating layer is formed. Here, examples of the laser used for forming the via hole include a UV-YAG laser, an excimer laser, and a CO ₂ laser. In the via hole forming step, laser processing using an ultraviolet laser is performed to perform via processing. It is preferable to form a hole. In this way, even if the via hole has a small diameter, the via hole can be reliably formed by using a short wavelength ultraviolet laser.

In the via conductor forming step after the via hole forming step, a via conductor is formed in the via hole. In the recess forming step, laser processing is performed on the first resin insulating layer to form a recess in a region where the second conductor portion is formed on the surface of the first resin insulating layer. Here, examples of the laser used for forming the recess include a CO ₂ laser, a UV-YAG laser, and an excimer laser. However, in consideration of a processing area and productivity, it is preferable to select a CO ₂ laser. is there.

  In addition, you may perform a via hole formation process and a recessed part formation process simultaneously. In this way, since the number of manufacturing steps can be reduced, the manufacturing cost can be kept low. In the via conductor forming step, it is preferable to form a conductor that constitutes a part of the second conductor portion in the recessed portion simultaneously with the formation of the via conductor. Even if it does in this way, since the number of manufacturing processes can be reduced, manufacturing cost can be held down low.

  In the subsequent conductor layer forming step, the first conductor portion and the second conductor portion are formed on the surface of the first resin insulation layer. A multilayer wiring board is manufactured through the above processes.

1 is a schematic cross-sectional view showing a multilayer wiring board in the present embodiment. The schematic perspective view which shows the principal part of a multilayer wiring board. Explanatory drawing which shows a via hole formation process and a recessed part formation process. Explanatory drawing which shows a via conductor formation process and a conductor layer formation process. Explanatory drawing which shows the process of forming a via hole in the 2nd resin insulation layer. The principal part sectional view showing the multilayer wiring board in other embodiments. The schematic sectional drawing which shows the multilayer wiring board in other embodiment.

  Hereinafter, an embodiment embodying the multilayer wiring board 10 of the present invention will be described in detail with reference to the drawings.

  As shown in FIG. 1, the multilayer wiring board 10 of this embodiment is a wiring board for mounting an IC chip. The multilayer wiring substrate 10 includes a core substrate 11 and a buildup layer 20 formed on the main surface 12 of the core substrate 11.

  The core substrate 11 of the present embodiment has a main surface 12 and a back surface 13 and has a substantially rectangular plate shape of 400 mm long × 400 mm wide × 400 μm thick. The core substrate 11 is made of a thermosetting resin (epoxy resin), and has a thermal expansion coefficient of about 0 to 20 ppm / ° C. (specifically, 10 ppm / ° C.) in the plane direction (XY direction). In addition, the thermal expansion coefficient of the core board | substrate 11 says the average value of the measured value between 0 degreeC-glass transition temperature (Tg).

  The core substrate 11 has a plurality of through holes 14 penetrating the main surface 12 and the back surface 13 in a lattice shape. A conductor column 15 made of copper is provided in the through hole 14. Further, a main surface side conductor layer 16 made of copper having a thickness of 15 μm is formed on the main surface 12 of the core substrate 11, and a back surface side conductor layer made of copper having a thickness of 15 μm is formed on the back surface 13 of the core substrate 11. 17 is formed. Each of the conductor layers 16 and 17 is electrically connected to the conductor column 15.

  As shown in FIG. 1, the build-up layer 20 has a structure in which two resin insulating layers 21 and 22 made of an epoxy resin having a thickness of 10 μm and one conductor layer 30 made of copper are alternately laminated. Have. The thermal expansion coefficients of the resin insulating layers 21 and 22 are about 10 to 40 ppm / ° C. (specifically, about 17 ppm / ° C.), and the thermal expansion coefficient of the conductor layer 30 is 17 ppm / ° C. In addition, a thermal expansion coefficient says the average value of the measured value between 25 degreeC-150 degreeC. In the present embodiment, of the resin insulation layers 21 and 22, the first resin insulation layer 21 is the first resin insulation layer (first resin insulation layer 21), and the second resin insulation layer 22 is the second resin insulation layer 21. This is a resin insulating layer (second resin insulating layer 22). The second resin insulation layer 22 is laminated on the first resin insulation layer 21 and is adjacent to the first resin insulation layer 21.

  As shown in FIGS. 1 and 2, the resin insulating layers 21 and 22 are provided with via holes 24 and 25 and filled via conductors 26 and 27, respectively. The via holes 24 and 25 are formed by applying laser processing to the resin insulating layers 21 and 22. Each filled via conductor 26, 27 is made of copper and is provided in the via holes 24, 25. The filled via conductor 26 formed in the first resin insulating layer 21 electrically connects the conductor layer 30 and the main surface side conductor layer 16 to each other, and is formed in the second resin insulating layer 22. The filled via conductor 27 electrically connects the conductor layer 30 and a terminal pad 41 described later. The via holes 24 and 25 and the filled via conductors 26 and 27 have a truncated cone shape, both of which have a diameter expanded in the same direction (upward in FIGS. 1 and 2). The via holes 24 and 25 and the filled via conductors 26 and 27 have a maximum diameter (diameter at the upper end in FIGS. 1 and 2) of 30 μm and a minimum diameter (diameter at the lower end in FIGS. 1 and 2) of 25 μm. Yes.

  As shown in FIGS. 1 and 2, the conductor layer 30 is formed between the first resin insulating layer 21 and the second resin insulating layer 22, and is formed from the first conductor portion 31 and the second conductor portion 32. It has become. The first conductor portion 31 is a conductor layer 30 in which the filled via conductor 26 formed in the first resin insulating layer 21 exists immediately below and the filled via conductor 27 formed in the second resin insulating layer 22 exists immediately above. . The first conductor portion 31 has a disk shape with an outer diameter of 60 μm and a thickness of 10 μm or less (8 μm in this embodiment). That is, the outer diameter of the first conductor portion 31 is larger than the maximum diameter (30 μm) of the filled via conductor 26. On the other hand, the second conductor portion 32 is the conductor layer 30 in which the filled via conductor 27 exists immediately above, although the filled via conductor 26 does not exist immediately below. A portion of the second conductor portion 32 located on the surface of the first resin insulating layer 21 has a disk shape with an outer diameter of 60 μm and a thickness of 10 μm or less (8 μm in this embodiment).

  Further, a recess 33 is formed in a region where the second conductor portion 32 is disposed on the surface of the first resin insulating layer 21. The recessed portion 33 has a circular shape in plan view, and has a shape that is enlarged in diameter toward the opening end side (upper side in FIG. 1). The depth of the recessed portion 33 is 0.1 μm or more and is ½ or less of the thickness (10 μm) of the first resin insulating layer 21 and is set to 3 μm in this embodiment. The maximum diameter of the recess 33 (inner diameter at the upper end in FIG. 1) is equal to or larger than the maximum diameter (30 μm) of the filled via conductors 26 and 27 (or via holes 24 and 25), and is set to 40 μm in this embodiment. Yes. There is no particular problem as long as the maximum diameter of the recessed portion 33 is equal to or larger than the maximum diameter of the filled via conductors 26 and 27. However, if the maximum diameter is too large, the processing time of the recessed portion 33 may become longer. Therefore, the maximum diameter of the recessed portion 33 is, for example, (maximum diameter of the filled via conductors 26 and 27) + (recessed portion 33). It is preferable to set it to a dimension tolerance).

  As shown in FIGS. 1 and 2, the recessed portion 33 is filled with a conductor 34 constituting a part of the second conductor portion 32. The conductor 34 is a copper plating layer made of the same type of material as the material for forming the filled via conductors 26 and 27 (copper). The thickness of the conductor 34 is equal to the depth of the recessed portion 33 and is smaller than the thickness (8 μm) of the second conductor portion 32 located on the surface of the first resin insulating layer 21. In this embodiment, it is set to 3 μm. The thickness of the second conductor portion 32 is the sum of the thickness (8 μm) of the portion of the second conductor portion 32 located on the surface of the first resin insulation layer 21 and the thickness (3 μm) of the conductor 34 ( 11 μm), which is thicker than the thickness (8 μm) of the first conductor portion 31. Further, the maximum diameter of the conductor 34 is equal to the maximum diameter of the recessed portion 33 and smaller than the maximum diameter (60 μm) of the second conductor portion 32, and is set to 40 μm in this embodiment.

  As shown in FIG. 1, a terminal pad 41 (conductor layer) having a thickness of 15 μm and electrically connected to the conductor layer 30 through the filled via conductor 27 is provided on the surface of the second resin insulating layer 22. Arranged in an array. The surface of the second resin insulation layer 22 is almost entirely covered with a solder resist layer 51 made of an epoxy resin and having a thickness of about 30 μm. In a predetermined portion of the solder resist layer 51, an opening 52 is formed through the solder resist layer 51 in the thickness direction to expose the terminal pad 41. A plurality of solder bumps 42 are disposed on the surface of the terminal pad 41. Each solder bump 42 is electrically connected to the surface connection terminal of the IC chip. The IC chip of this embodiment has a rectangular flat plate shape of 12.0 mm long × 12.0 mm wide × 0.9 mm thick, and has a thermal expansion coefficient of about 3 to 4 ppm / ° C. (specifically, 3.5 ppm / ° C. Grade) of silicon.

  On the other hand, as shown in FIG. 1, no buildup layer or solder resist layer is formed on the back surface 13 of the core substrate 11, and only the back-side conductor layer 17 is formed. A plurality of solder bumps (not shown) are provided on the surface of the back-side conductor layer 17 for electrical connection with a mother board (not shown).

  Next, the manufacturing method of the multilayer wiring board 10 of this embodiment is demonstrated.

  First, in the core substrate preparation step, an intermediate product of the core substrate 11 is prepared by a conventionally known method and prepared in advance. Specifically, a copper-clad laminate (not shown) in which copper foil is pasted on both sides of a 400 μm thick base material is prepared, and an intermediate product of the core substrate 11 is obtained. The intermediate product of the core substrate 11 is a multi-piece core substrate having a structure in which a plurality of regions to be the core substrate 11 are arranged vertically and horizontally along the plane direction.

  Next, the core substrate 11 (copper-clad laminate) is drilled using a drill machine, and through holes 14 for forming the conductor columns 15 are formed in advance at predetermined positions. Further, the conductor pillar 15 is formed by a known method such as copper plating. Next, the main surface side conductor layer 16 is formed on the main surface 12 and the back surface side conductor layer 17 is formed on the back surface 13. Specifically, the main surface side conductor layer 16 and the back surface side conductor layer 17 are formed by a known method such as a subtractive method or a semi-additive method.

  Next, the buildup layer 20 is formed on the main surface 12 based on a conventionally known method. Specifically, first, a first resin insulating layer 21 is formed by applying (sticking) a thermosetting epoxy resin on the main surface 12 (see FIG. 3). Instead of depositing a thermosetting epoxy resin, a photosensitive epoxy resin, an insulating resin, or a liquid crystal polymer (LCP) may be deposited.

  In the subsequent via hole forming step, the first resin insulating layer 21 is subjected to laser processing using an ultraviolet laser (in this embodiment, a UV-YAG laser having a wavelength of 355 nm), so that the filled via conductor 26 is to be formed. A via hole 24 is formed (see FIG. 3). Specifically, a via hole 24 penetrating the first resin insulating layer 21 is formed, and the surface of the main surface side conductor layer 16 is exposed.

Further, the recess forming step is performed simultaneously with the via hole forming step. In the step of forming the recess, simultaneously with the laser processing using the ultraviolet laser, the first resin insulating layer 21 is subjected to laser processing using a CO ₂ laser having a wavelength of 10.6 μm or 9.4 μm. The recessed part 33 is formed in the area | region where the 2nd conductor part 32 is arrange | positioned in the surface of 21 (refer FIG. 3).

  Then, after the via hole forming step and the recessed portion forming step, a via conductor forming step and a conductor layer forming step are performed. In the via conductor forming step, the filled via conductor 26 is formed in the via hole 24, and the conductor 34 constituting a part of the second conductor portion 32 is formed in the recessed portion 33. In the conductor layer forming step, the first conductor portion 31 and the second conductor portion 32 are formed on the surface of the first resin insulating layer 21. Specifically, after performing electroless copper plating on the inner surface of the via hole 24 and the inner surface of the recess 33 on the surface of the first resin insulating layer 21, an etching resist is formed, and then electrolytic copper plating is performed. Further, the etching resist is removed and soft etching is performed. As a result, the filled via conductor 26 is formed in the via hole 24 and, at the same time, the conductor 34 is formed in the recess 33 (see FIG. 4). Further, the first conductor portion 31 and the second conductor portion 32 are formed on the surface of the first resin insulating layer 21 (see FIG. 4). When the conductor layer forming step is completed, the second conductor portion 32 becomes thicker than the first conductor portion 31 by forming the conductor 34 in the recessed portion 33.

  Next, the filled via conductor 27 is formed by depositing a thermosetting epoxy resin on the first resin insulating layer 21 and performing laser processing using an ultraviolet laser (in this embodiment, a UV-YAG laser). A second resin insulation layer 22 having via holes 25 at the power positions is formed (see FIG. 5). Instead of depositing the thermosetting epoxy resin, a photosensitive epoxy resin, an insulating resin, or a liquid crystal polymer may be deposited. Next, electrolytic copper plating is performed according to a conventionally known method to form a filled via conductor 27 inside the via hole 25. At the same time, the terminal pads 41 are formed on the second resin insulation layer 22.

  Next, the solder resist layer 51 is formed by applying a photosensitive epoxy resin on the second resin insulating layer 22. Next, exposure and development are performed in a state where a predetermined mask is arranged, and an opening 52 is formed in the solder resist layer 51. Further, solder bumps 42 are formed on the terminal pads 41, and solder bumps are formed on the back side conductor layer 17. In this state, it can be grasped that the product area to be the multilayer wiring board 10 is a multi-cavity wiring board in which a plurality of product regions are arranged vertically and horizontally along the plane direction. Further, when the multi-piece wiring board is divided, a large number of multilayer wiring boards 10 as individual products can be obtained simultaneously.

  Thereafter, an IC chip is placed on the surface of the buildup layer 20 constituting the multilayer wiring board 10. At this time, the surface connection terminals on the IC chip side and the solder bumps 42 are aligned. Then, each solder bump 42 is reflowed by heating to a temperature of about 220 ° C. to 240 ° C., thereby joining each solder bump 42 and the surface connection terminal to electrically connect the multilayer wiring board 10 side and the IC chip side. Connect to. As a result, an IC chip is mounted on the multilayer wiring board 10.

  Therefore, according to the present embodiment, the following effects can be obtained.

  (1) In the multilayer wiring board 10 of the present embodiment, in the conductor layer 30 formed between the first resin insulation layer 21 and the second resin insulation layer 22, the second conductor portion in which the filled via conductor 26 does not exist immediately below. 32 is thicker than the first conductor portion 31 in which the filled via conductor 26 exists immediately below. That is, the volume of the conductor portion is increased by increasing the thickness of the second conductor portion 32 even in the second conductor portion 32 in which the volume of the conductor portion is reduced because the filled via conductor 26 does not exist immediately below. A heat capacity can be secured. As a result, the energy of the laser used for forming the via hole 25 in the second resin insulating layer 22 can be reliably absorbed by the second conductor portion 32, and therefore damage to the second conductor portion 32 due to the laser can be reduced. . Even if damaged, since the second conductor portion 32 is formed thick, penetration of the second conductor portion 32 by the laser can be prevented. Moreover, the second conductor portion 32 is thickened by forming the recess portion 33 on the surface of the first resin insulating layer 21 and filling the recess portion 33 with the conductor 34 constituting a part of the second conductor portion 32. Even if the thickness of the second conductor portion 32 is increased, the surface of the second conductor portion 32 is less likely to be uneven. From the above, the yield is increased and the reliability of the multilayer wiring board 10 is improved.

  (2) By the way, as another method for reducing the damage of the second conductor portion 32 due to the laser, for example, when reducing the energy of the laser used for forming the via hole 25 or forming one via hole 25, A method of excavating the second resin insulating layer 22 little by little, for example, by increasing the number of times of laser irradiation (number of laser shots) can be considered. However, a decrease in energy and an increase in the number of laser shots greatly increase the processing time. In order to reduce the influence of heat, a method of irradiating a laser a plurality of times (cycle processing) at a predetermined time instead of continuously irradiating the laser (burst processing) is conceivable. However, since the movement of the irradiation position increases, in this case as well, there is a possibility that the processing time is significantly increased.

  On the other hand, in this embodiment, the thickness of the second conductor portion 32 is increased to reduce damage to the second conductor portion 32 due to the laser. Therefore, since it is not necessary to change the laser irradiation condition that leads to an increase in processing time, it is possible to prevent the manufacturing efficiency of the multilayer wiring board 10 from being lowered.

  (3) In the present embodiment, if only the second conductor portion 32 that is a portion through which the laser easily penetrates is formed thick in the conductor layer 30, the other portion (first conductor portion 31) is made thin. Can do. Therefore, it is possible to reduce the thickness of the conductor layer 30 and to reduce the size of the multilayer wiring board 10.

  (4) In this embodiment, the forming material of the conductor 34 constituting a part of the second conductor portion 32 is the forming material of the portion located on the surface of the first resin insulating layer 21 in the second conductor portion 32, the first It is made of the same material (specifically, copper) as the material for forming the one conductor portion 31 and the material for forming the filled via conductors 26 and 27. That is, since the electric resistances of the conductor portions 31 and 32, the filled via conductors 26 and 27, and the like become equal, it is possible to prevent a change in electric characteristics in the conductor portion of the multilayer wiring board 10.

(5) In this embodiment, since the recessed part 33 is formed in addition to the via holes 24 and 25, the number of man-hours is increased. However, since the recess 33 is formed by performing laser processing using a CO ₂ laser capable of relatively high speed processing, a significant increase in processing time can be prevented.

  In addition, you may change this embodiment as follows.

  In the above embodiment, the filled via conductor 26 formed in the first resin insulation layer 21 does not exist immediately below the second conductor portion 32 and is adjacent to the lower layer side of the first resin insulation layer 21. In addition, the conductor pillar 15, the main surface side conductor layer 16, and the back surface side conductor layer 17 were present. The depth of the recessed portion 33 filled with the conductor 34 constituting a part of the second conductor portion 32 is ½ or less of the thickness of the first resin insulating layer 21.

  However, as shown in FIG. 6, the conductor pillar 15, the main surface side conductor layer 16, and the back surface side conductor layer 17 are omitted from the core substrate 61 and are filled with a conductor 63 that constitutes a part of the second conductor portion 62. The depth of the recess 64 may be larger than ½ of the thickness of the first resin insulation layer 65. In addition, as shown in FIG. 7, a resin insulating layer 73 may be disposed between the first resin insulating layer 71 and the core substrate 72. Then, the depth of the recess 74 (that is, the thickness of the conductor 75 filling the recess 74) is made larger than the thickness of the first resin insulation layer 71, and the bottom of the recess 74 reaches the resin insulation layer 73. You may do it.

  In the above embodiment, the maximum diameter of the conductor 34 that fills the recessed portion 33, that is, the conductor 34 that constitutes a part of the second conductor portion 32, is smaller than the maximum diameter of the second conductor portion 32. However, the maximum diameter of the conductor 34 may be equal to the maximum diameter of the second conductor portion 32 or may be larger than the maximum diameter of the second conductor portion 32.

In the above embodiment, the laser used for forming the via holes 24 and 25 is a UV-YAG laser (ultraviolet laser), and the laser used for forming the recess 33 is a CO ₂ laser. That is, in the above embodiment, the laser used for forming the via holes 24 and 25 and the laser used for forming the recess 33 are different types of lasers. However, the laser used for forming the via holes 24 and 25 and the laser used for forming the recess 33 may be the same type of laser (for example, a UV-YAG laser).

  In the above embodiment, the via hole forming step and the recessed portion forming step are performed simultaneously. However, the recessed portion forming step may be performed after the via hole forming step, or the via hole forming step is performed after the recessed portion forming step. May be.

  In the via conductor forming process of the above embodiment, the conductor 34 constituting a part of the second conductor portion 32 is formed in the recessed portion 33 simultaneously with the formation of the filled via conductor 26. However, the conductor 34 may be formed after the filled via conductor 26 is formed, or the filled via conductor 26 may be formed after the conductor 34 is formed. Further, only the filled via conductor 26 is formed in the via conductor forming step, and in the conductor layer forming step after the via conductor forming step, the conductor 34 is formed in the recess 33 simultaneously with the formation of the first conductor portion 31 and the second conductor portion 32. May be formed.

  -Although the multilayer wiring board 10 of the said embodiment was comprised by laminating | stacking the resin insulation layers 21 and 22 of two layers, you may be comprised by laminating | stacking three or more resin insulation layers.

  The multilayer wiring board 10 of the above embodiment is a buildup multilayer wiring board having the buildup layer 20 only on the main surface 12 of the core substrate 11. However, a build-up multilayer wiring board having build-up layers on both the main surface and the back surface of the core board, a coreless wiring board formed without including the core board, etc. are applied as the multilayer wiring board of the present invention. Also good.

  Next, the technical ideas grasped by the embodiment described above are listed below.

  (1) In the above means 1, the multilayer wiring board is characterized in that the maximum diameter of the recess is equal to or larger than the maximum diameter of the via conductor.

  (2) The multilayer wiring board according to the above means 1, wherein the maximum diameter of the conductor constituting a part of the second conductor portion is smaller than the maximum diameter of the second conductor portion.

  (3) In the above means 1, the multilayer wiring board characterized in that the thickness of the conductor constituting a part of the second conductor portion is smaller than the thickness of the second conductor portion.

  (4) The multilayer wiring board according to the above means 1, wherein the conductor constituting a part of the second conductor portion is a plating layer.

  (5) In the above means 1, the via conductor is a filled via conductor.

  (6) In the above means 2, in the via conductor forming step, the via conductor is formed by plating the inner surface of the via hole.

DESCRIPTION OF SYMBOLS 10 ... Multilayer wiring board 16 ... Main surface side conductor layers 21, 65, 71 as conductor layers ... First resin insulation layer 22 as resin insulation layer ... Second resin insulation layer 24 as resin insulation layer ... Via hole 26, 27 ... Filled via conductor 30 as via conductor ... Conductor layer 31 ... First conductor portion 32, 62 ... Second conductor portion 33, 64, 74 ... Depression portion 34, 63, 75 ... Part of the second conductor portion. Conductor 41 ... Terminal pad 73 as a conductor layer ... Resin insulation layer

Claims (7)

A multilayer wiring board having a structure in which a plurality of resin insulation layers and a plurality of conductor layers are alternately laminated, wherein the plurality of conductor layers are connected by via conductors formed in the resin insulation layer; ,
The plurality of resin insulation layers include a first resin insulation layer, and a second resin insulation layer laminated on the first resin insulation layer and adjacent to the first resin insulation layer,
The conductor layer formed between the first resin insulation layer and the second resin insulation layer comprises a first conductor portion and a second conductor portion,
The via conductor formed in the first resin insulating layer is present directly below the first conductor portion, while the via conductor formed in the first resin insulating layer is directly below the second conductor portion. Does not exist,
A recess is formed in a region where the second conductor portion is disposed on the surface of the first resin insulating layer,
The recessed portion is filled with a conductor constituting a part of the second conductor portion;
The thickness of the second conductor portion is thicker than the thickness of the first conductor portion,
The multilayer wiring board, wherein the via conductor formed in the second resin insulating layer exists immediately above the second conductor portion.   2. The multilayer wiring board according to claim 1, wherein a depth of the recessed portion is 0.1 μm or more and is ½ or less of a thickness of the first resin insulating layer.   3. The multilayer wiring board according to claim 1, wherein the via conductor forming material and the conductor forming material constituting a part of the second conductor portion are made of the same type of material. A method for producing the multilayer wiring board according to any one of claims 1 to 3,
A via hole forming step of performing laser processing on the first resin insulating layer and forming a via hole penetrating the first resin insulating layer;
A via conductor forming step of forming the via conductor in the via hole after the via hole forming step;
A recess forming step of performing laser processing on the first resin insulating layer and forming a recess in a region where the second conductor portion is disposed on a surface of the first resin insulating layer;
A conductor layer forming step of forming the first conductor portion and the second conductor portion on the surface of the first resin insulation layer,
When the conductor layer forming step is completed, the second conductor portion becomes thicker than the first conductor portion by forming a conductor constituting a part of the second conductor portion in the recessed portion. A manufacturing method of a multilayer wiring board characterized by the above.   5. The method of manufacturing a multilayer wiring board according to claim 4, wherein the via hole forming step and the recessed portion forming step are performed simultaneously.   6. The multilayer wiring board according to claim 4, wherein, in the via conductor forming step, a conductor constituting a part of the second conductor portion is formed in the recessed portion simultaneously with the formation of the via conductor. Manufacturing method.   7. The method for manufacturing a multilayer wiring board according to claim 4, wherein in the via hole forming step, the via hole is formed by performing laser processing using an ultraviolet laser.

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