JP2016535913A5 - - Google Patents
Download PDFInfo
- Publication number
- JP2016535913A5 JP2016535913A5 JP2016551066A JP2016551066A JP2016535913A5 JP 2016535913 A5 JP2016535913 A5 JP 2016535913A5 JP 2016551066 A JP2016551066 A JP 2016551066A JP 2016551066 A JP2016551066 A JP 2016551066A JP 2016535913 A5 JP2016535913 A5 JP 2016535913A5
- Authority
- JP
- Japan
- Prior art keywords
- configurable
- processing circuit
- thread
- configuration
- switch
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 230000015654 memory Effects 0.000 claims 6
- 238000000034 method Methods 0.000 claims 2
- 230000000903 blocking effect Effects 0.000 claims 1
- 230000001902 propagating effect Effects 0.000 claims 1
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| GB1319279.4A GB2519813B (en) | 2013-10-31 | 2013-10-31 | Pipelined configurable processor |
| GB1319279.4 | 2013-10-31 | ||
| PCT/GB2014/053200 WO2015063466A1 (en) | 2013-10-31 | 2014-10-28 | Pipelined configurable processor |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2016535913A JP2016535913A (ja) | 2016-11-17 |
| JP2016535913A5 true JP2016535913A5 (cg-RX-API-DMAC7.html) | 2017-12-14 |
| JP6708552B2 JP6708552B2 (ja) | 2020-06-10 |
Family
ID=49767493
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2016551066A Active JP6708552B2 (ja) | 2013-10-31 | 2014-10-28 | パイプライン化構成可能プロセッサ |
Country Status (7)
| Country | Link |
|---|---|
| US (3) | US9658985B2 (cg-RX-API-DMAC7.html) |
| EP (1) | EP3063651A1 (cg-RX-API-DMAC7.html) |
| JP (1) | JP6708552B2 (cg-RX-API-DMAC7.html) |
| KR (1) | KR20160105774A (cg-RX-API-DMAC7.html) |
| CN (1) | CN105830054B (cg-RX-API-DMAC7.html) |
| GB (2) | GB2519813B (cg-RX-API-DMAC7.html) |
| WO (1) | WO2015063466A1 (cg-RX-API-DMAC7.html) |
Families Citing this family (25)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| GB2519813B (en) * | 2013-10-31 | 2016-03-30 | Silicon Tailor Ltd | Pipelined configurable processor |
| JP6816380B2 (ja) * | 2016-04-15 | 2021-01-20 | オムロン株式会社 | 画像処理装置、画像処理方法、情報処理プログラム、および記録媒体 |
| CN107962560B (zh) * | 2016-10-18 | 2020-08-07 | 珠海格力智能装备有限公司 | 机器人及其控制方法和装置 |
| CN107953330A (zh) * | 2016-10-18 | 2018-04-24 | 珠海格力智能装备有限公司 | 机器人及其控制方法和装置 |
| US11055807B2 (en) * | 2017-06-12 | 2021-07-06 | Apple Inc. | Method and system for a transactional based display pipeline to interface with graphics processing units |
| US11093251B2 (en) | 2017-10-31 | 2021-08-17 | Micron Technology, Inc. | System having a hybrid threading processor, a hybrid threading fabric having configurable computing elements, and a hybrid interconnection network |
| CN111602126B (zh) * | 2017-10-31 | 2024-10-22 | 美光科技公司 | 具有混合线程处理器的系统、具有可配置计算元件的混合线程组构以及混合互连网络 |
| US11275710B2 (en) | 2018-03-31 | 2022-03-15 | Micron Technology, Inc. | Loop thread order execution control of a multi-threaded, self-scheduling reconfigurable computing fabric |
| KR102454405B1 (ko) | 2018-03-31 | 2022-10-17 | 마이크론 테크놀로지, 인크. | 멀티 스레드, 자체 스케줄링 재구성 가능한 컴퓨팅 패브릭에 대한 효율적인 루프 실행 |
| US11288074B2 (en) | 2018-03-31 | 2022-03-29 | Micron Technology, Inc. | Loop execution control for a multi-threaded, self-scheduling reconfigurable computing fabric using a reenter queue |
| EP3776237A1 (en) * | 2018-03-31 | 2021-02-17 | Micron Technology, Inc. | Multiple types of thread identifiers for a multi-threaded, self-scheduling reconfigurable computing fabric |
| WO2019191737A1 (en) * | 2018-03-31 | 2019-10-03 | Micron Technology, Inc. | Multi-threaded self-scheduling reconfigurable computing fabric |
| CN111919202B (zh) * | 2018-03-31 | 2024-10-25 | 美光科技公司 | 多线程自调度可重新配置计算架构的执行控制 |
| EP3776188B1 (en) | 2018-03-31 | 2025-04-30 | Micron Technology, Inc. | Conditional branching control for a multi-threaded, self- scheduling reconfigurable computing fabric |
| EP3776243B1 (en) * | 2018-03-31 | 2025-01-01 | Micron Technology, Inc. | Backpressure control using a stop signal for a multi-threaded, self-scheduling reconfigurable computing fabric |
| US11119972B2 (en) * | 2018-05-07 | 2021-09-14 | Micron Technology, Inc. | Multi-threaded, self-scheduling processor |
| US11074213B2 (en) * | 2019-06-29 | 2021-07-27 | Intel Corporation | Apparatuses, methods, and systems for vector processor architecture having an array of identical circuit blocks |
| US11573834B2 (en) | 2019-08-22 | 2023-02-07 | Micron Technology, Inc. | Computational partition for a multi-threaded, self-scheduling reconfigurable computing fabric |
| US11150900B2 (en) | 2019-08-28 | 2021-10-19 | Micron Technology, Inc. | Execution or write mask generation for data selection in a multi-threaded, self-scheduling reconfigurable computing fabric |
| US11494331B2 (en) | 2019-09-10 | 2022-11-08 | Cornami, Inc. | Reconfigurable processor circuit architecture |
| DE102020131666A1 (de) * | 2020-05-05 | 2021-11-11 | Intel Corporation | Skalierbare Multiplikationsbeschleunigung dünnbesetzter Matrizen unter Verwendung systolischer Arrays mit Rückkopplungseingaben |
| US12293093B2 (en) | 2021-06-28 | 2025-05-06 | Google Llc | Control of deterministic machine learning systems using trigger tables and configuration state registries |
| US11709796B2 (en) * | 2021-08-16 | 2023-07-25 | Micron Technology, Inc. | Data input/output operations during loop execution in a reconfigurable compute fabric |
| KR102571234B1 (ko) | 2023-02-21 | 2023-08-25 | 메티스엑스 주식회사 | 매니코어 시스템의 스레드 관리 방법 및 장치 |
| CN116450570B (zh) * | 2023-06-19 | 2023-10-17 | 先进能源科学与技术广东省实验室 | 基于fpga的32位risc-v处理器及电子设备 |
Family Cites Families (31)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6282627B1 (en) | 1998-06-29 | 2001-08-28 | Chameleon Systems, Inc. | Integrated processor and programmable data path chip for reconfigurable computing |
| US6349346B1 (en) | 1999-09-23 | 2002-02-19 | Chameleon Systems, Inc. | Control fabric unit including associated configuration memory and PSOP state machine adapted to provide configuration address to reconfigurable functional unit |
| US6693456B2 (en) * | 2000-08-04 | 2004-02-17 | Leopard Logic Inc. | Interconnection network for a field programmable gate array |
| US6759869B1 (en) * | 2002-06-05 | 2004-07-06 | Xilinx, Inc. | Large crossbar switch implemented in FPGA |
| US6925643B2 (en) * | 2002-10-11 | 2005-08-02 | Sandbridge Technologies, Inc. | Method and apparatus for thread-based memory access in a multithreaded processor |
| US7149996B1 (en) * | 2003-07-11 | 2006-12-12 | Xilinx, Inc. | Reconfigurable multi-stage crossbar |
| EP1660998A1 (en) * | 2003-08-28 | 2006-05-31 | MIPS Technologies, Inc. | Mechanisms for dynamic configuration of virtual processor resources |
| US7263599B2 (en) * | 2004-02-06 | 2007-08-28 | Infineon Technologies | Thread ID in a multithreaded processor |
| JP4484756B2 (ja) * | 2004-06-21 | 2010-06-16 | 三洋電機株式会社 | リコンフィギュラブル回路および処理装置 |
| US7873776B2 (en) * | 2004-06-30 | 2011-01-18 | Oracle America, Inc. | Multiple-core processor with support for multiple virtual processors |
| US7224184B1 (en) * | 2004-11-05 | 2007-05-29 | Xilinx, Inc. | High bandwidth reconfigurable on-chip network for reconfigurable systems |
| US7276933B1 (en) | 2004-11-08 | 2007-10-02 | Tabula, Inc. | Reconfigurable IC that has sections running at different looperness |
| CN100492296C (zh) * | 2005-04-12 | 2009-05-27 | 松下电器产业株式会社 | 处理器 |
| KR20070114690A (ko) | 2005-04-12 | 2007-12-04 | 마츠시타 덴끼 산교 가부시키가이샤 | 프로세서 |
| ATE504043T1 (de) * | 2005-04-28 | 2011-04-15 | Univ Edinburgh | Umkonfigurierbares anweisungs-zellen-array |
| US7768301B2 (en) * | 2006-01-17 | 2010-08-03 | Abound Logic, S.A.S. | Reconfigurable integrated circuits with scalable architecture including a plurality of special function elements |
| US8868888B2 (en) * | 2007-09-06 | 2014-10-21 | Qualcomm Incorporated | System and method of executing instructions in a multi-stage data processing pipeline |
| US8248101B2 (en) * | 2007-09-06 | 2012-08-21 | Tabula, Inc. | Reading configuration data from internal storage node of configuration storage circuit |
| US7902862B2 (en) * | 2007-09-14 | 2011-03-08 | Agate Logic, Inc. | High-bandwidth interconnect network for an integrated circuit |
| US8006073B1 (en) * | 2007-09-28 | 2011-08-23 | Oracle America, Inc. | Simultaneous speculative threading light mode |
| US8078833B2 (en) * | 2008-05-29 | 2011-12-13 | Axis Semiconductor, Inc. | Microprocessor with highly configurable pipeline and executional unit internal hierarchal structures, optimizable for different types of computational functions |
| JP2010146102A (ja) * | 2008-12-16 | 2010-07-01 | Sanyo Electric Co Ltd | 演算処理装置および記憶領域割当方法 |
| US8126002B2 (en) * | 2009-03-31 | 2012-02-28 | Juniper Networks, Inc. | Methods and apparatus related to a shared memory buffer for variable-sized cells |
| US8352669B2 (en) * | 2009-04-27 | 2013-01-08 | Lsi Corporation | Buffered crossbar switch system |
| US8006075B2 (en) * | 2009-05-21 | 2011-08-23 | Oracle America, Inc. | Dynamically allocated store queue for a multithreaded processor |
| JPWO2011125174A1 (ja) * | 2010-04-06 | 2013-07-08 | トヨタ自動車株式会社 | 動的再構成プロセッサ及びその動作方法 |
| US20110276760A1 (en) * | 2010-05-06 | 2011-11-10 | Chou Yuan C | Non-committing store instructions |
| US7982497B1 (en) | 2010-06-21 | 2011-07-19 | Xilinx, Inc. | Multiplexer-based interconnection network |
| WO2012154616A2 (en) * | 2011-05-06 | 2012-11-15 | Xcelemor, Inc. | Computing system with hardware reconfiguration mechanism and method of operation thereof |
| US9166928B2 (en) * | 2011-09-30 | 2015-10-20 | The Hong Kong University Of Science And Technology | Scalable 3-stage crossbar switch |
| GB2519813B (en) * | 2013-10-31 | 2016-03-30 | Silicon Tailor Ltd | Pipelined configurable processor |
-
2013
- 2013-10-31 GB GB1319279.4A patent/GB2519813B/en active Active
- 2013-10-31 GB GB1513909.0A patent/GB2526018B/en active Active
-
2014
- 2014-10-28 EP EP14796852.3A patent/EP3063651A1/en not_active Ceased
- 2014-10-28 KR KR1020167014326A patent/KR20160105774A/ko not_active Ceased
- 2014-10-28 US US15/033,459 patent/US9658985B2/en active Active
- 2014-10-28 WO PCT/GB2014/053200 patent/WO2015063466A1/en not_active Ceased
- 2014-10-28 JP JP2016551066A patent/JP6708552B2/ja active Active
- 2014-10-28 CN CN201480070217.8A patent/CN105830054B/zh active Active
-
2017
- 2017-05-19 US US15/600,508 patent/US10275390B2/en active Active
-
2019
- 2019-03-26 US US16/364,366 patent/US20200026685A1/en not_active Abandoned
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP2016535913A5 (cg-RX-API-DMAC7.html) | ||
| WO2015063466A4 (en) | Pipelined configurable processor | |
| WO2018009240A3 (en) | Superconducting system architecture for high-performance energy-efficient cryogenic computing | |
| US20180181173A1 (en) | Automatic generation of power management sequence in a soc or noc | |
| US9753667B2 (en) | High bandwidth memory and glitch-less differential XOR | |
| JP2014504767A5 (cg-RX-API-DMAC7.html) | ||
| US9705505B2 (en) | Reconfigurable semiconductor device | |
| JP2016518750A5 (cg-RX-API-DMAC7.html) | ||
| JP2013016157A5 (ja) | キャッシュメモリ | |
| US9779785B2 (en) | Computer architecture using compute/storage tiles | |
| CN104408014A (zh) | 一种计算系统之间处理单元互连的系统及方法 | |
| CN105549899A (zh) | 用于维持嵌入式存储器块中的存储器访问相干性的系统和方法 | |
| CN102789190B (zh) | 适用于不同类型fpga电路编程的列地址分配器电路 | |
| JP2013235620A5 (cg-RX-API-DMAC7.html) | ||
| CN106796505A (zh) | 指令执行的方法及处理器 | |
| CN105634468B (zh) | 一种fpga的布线方法和宏单元 | |
| US20160358654A1 (en) | Low-power ternary content addressable memory | |
| US20170279451A1 (en) | Reconfigurable device | |
| JP2016520239A5 (cg-RX-API-DMAC7.html) | ||
| EP3180860A1 (en) | Reconfigurable integrated circuit with on-chip configuration generation | |
| CN105432018A (zh) | 逻辑运算装置 | |
| WO2015011907A1 (ja) | k近傍法連想メモリ | |
| JP2013145592A5 (ja) | ストレージ装置 | |
| JP2007243976A5 (cg-RX-API-DMAC7.html) | ||
| CN104810053A (zh) | 用于可编程集成电路器件的配置位架构 |