JP2016505222A5 - - Google Patents
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- JP2016505222A5 JP2016505222A5 JP2015556174A JP2015556174A JP2016505222A5 JP 2016505222 A5 JP2016505222 A5 JP 2016505222A5 JP 2015556174 A JP2015556174 A JP 2015556174A JP 2015556174 A JP2015556174 A JP 2015556174A JP 2016505222 A5 JP2016505222 A5 JP 2016505222A5
- Authority
- JP
- Japan
- Prior art keywords
- wire
- bonding
- bonding tool
- forming
- wire portion
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
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- 210000001736 Capillaries Anatomy 0.000 claims 5
- 239000000758 substrate Substances 0.000 claims 4
- 238000004377 microelectronic Methods 0.000 claims 2
- 238000000034 method Methods 0.000 claims 1
Claims (32)
(a)ボンディングツールと前記ボンディングツールの面を超えて下方に延びるワイヤの一部との少なくとも1つ、または、形成面を、前記ボンディングツールの面を超えて下方に延びる前記ワイヤ部分の端部が前記ボンディングツール面から前記形成面よりも大きな深さに配置されるように、互いに対して位置決めする工程と、
(b)次に、前記ボンディングツールに向かって前記ワイヤ部分を屈曲させるように、前記ボンディングツールの面に平行な第1方向に前記第1形成面に沿って前記ボンディングツールを移動させる工程と、
(c)次に、前記ボンディングツール面から離れて延びる前記ボンディングツールの露出壁が、前記第1形成面から離れて延びる第2形成面に対向するように、前記ボンディングツール面を横切る第2方向に前記ボンディングツールを移動させる工程であって、それにより前記ワイヤ部分が前記ボンディングツールの前記露出壁に向かって曲げられる工程と、
(d)前記ボンディングツール面と圧印加工面との間の前記ワイヤ部分の一部を圧印加工する工程と、
(e)前記圧印加工部分から離れた前記ワイヤ部分の端部を非ボンドされたままにしながら、ワイヤボンドを形成するように前記基板の導電性ボンディング面に前記ワイヤ部分の前記圧印加工部分をボンドするために前記ボンディングツールを使用する工程と、
(f)前記ボンディング面の少なくとも1つに複数の前記ワイヤボンドを形成するように、工程(a)から工程(e)を繰り返す工程と、を備える方法。 A method of forming a plurality of wire bonds connected to a substrate, comprising:
(A) at least one of a bonding tool and a part of a wire extending downwardly beyond the surface of the bonding tool, or an end of the wire portion extending downwardly beyond the surface of the bonding tool with a forming surface Positioning with respect to each other such that they are arranged at a greater depth than the forming surface from the bonding tool surface;
(B) Next, moving the bonding tool along the first forming surface in a first direction parallel to the surface of the bonding tool so as to bend the wire portion toward the bonding tool;
(C) Next, a second direction across the bonding tool surface such that an exposed wall of the bonding tool extending away from the bonding tool surface faces a second forming surface extending away from the first forming surface. Moving the bonding tool to bend the wire portion toward the exposed wall of the bonding tool;
(D) coining a portion of the wire portion between the bonding tool surface and the coining surface;
(E) Bonding the coined portion of the wire portion to the conductive bonding surface of the substrate to form a wire bond while leaving the end of the wire portion away from the coined portion unbonded. Using the bonding tool to:
And (f) repeating steps (a) to (e) so as to form a plurality of the wire bonds on at least one of the bonding surfaces.
Applications Claiming Priority (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US13/757,673 | 2013-02-01 | ||
US13/757,677 US9136254B2 (en) | 2013-02-01 | 2013-02-01 | Microelectronic package having wire bond vias and stiffening layer |
US13/757,677 | 2013-02-01 | ||
US13/757,673 US8940630B2 (en) | 2013-02-01 | 2013-02-01 | Method of making wire bond vias and microelectronic package having wire bond vias |
PCT/US2014/014181 WO2014121090A1 (en) | 2013-02-01 | 2014-01-31 | Microelectronic package having wire bond vias, method of making and stiffening layer for same |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2016505222A JP2016505222A (en) | 2016-02-18 |
JP2016505222A5 true JP2016505222A5 (en) | 2017-03-09 |
Family
ID=50151376
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2015556174A Pending JP2016505222A (en) | 2013-02-01 | 2014-01-31 | MICROELECTRONIC PACKAGE HAVING WIRE BOND VIA, MANUFACTURING METHOD THEREOF AND REINFORCING LAYER |
Country Status (5)
Country | Link |
---|---|
JP (1) | JP2016505222A (en) |
KR (1) | KR101994954B1 (en) |
CN (1) | CN105074914B (en) |
TW (1) | TWI570864B (en) |
WO (1) | WO2014121090A1 (en) |
Families Citing this family (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9446943B2 (en) | 2013-05-31 | 2016-09-20 | Stmicroelectronics S.R.L. | Wafer-level packaging of integrated devices, and manufacturing method thereof |
US9802813B2 (en) | 2014-12-24 | 2017-10-31 | Stmicroelectronics (Malta) Ltd | Wafer level package for a MEMS sensor device and corresponding manufacturing process |
JP6271463B2 (en) * | 2015-03-11 | 2018-01-31 | 東芝メモリ株式会社 | Semiconductor device |
US10249515B2 (en) * | 2016-04-01 | 2019-04-02 | Intel Corporation | Electronic device package |
US10002844B1 (en) * | 2016-12-21 | 2018-06-19 | Invensas Bonding Technologies, Inc. | Bonded structures |
EP3462494B1 (en) * | 2017-09-29 | 2021-03-24 | Detection Technology OY | Integrated radiation detector device |
CN110504172A (en) * | 2018-05-16 | 2019-11-26 | 中芯长电半导体(江阴)有限公司 | Vertical wire bond structure, stacked chip package structure and method |
WO2019228908A2 (en) | 2018-05-28 | 2019-12-05 | Borealis Ag | Devices for a photovoltaic (pv) module |
Family Cites Families (24)
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JPS5032196B1 (en) * | 1970-11-13 | 1975-10-18 | ||
JPS61102745A (en) * | 1984-10-26 | 1986-05-21 | Toshiba Corp | Semiconductor device |
JP2000058603A (en) * | 1998-08-10 | 2000-02-25 | Fuji Electric Co Ltd | Ultrasonic wire bonder |
US6211574B1 (en) * | 1999-04-16 | 2001-04-03 | Advanced Semiconductor Engineering Inc. | Semiconductor package with wire protection and method therefor |
JP4526651B2 (en) * | 1999-08-12 | 2010-08-18 | 富士通セミコンダクター株式会社 | Semiconductor device |
US6765287B1 (en) | 2001-07-27 | 2004-07-20 | Charles W. C. Lin | Three-dimensional stacked semiconductor package |
US7176506B2 (en) | 2001-08-28 | 2007-02-13 | Tessera, Inc. | High frequency chip packages with connecting elements |
JP3767512B2 (en) * | 2002-04-25 | 2006-04-19 | 株式会社デンソー | Wire bonding method |
JP3765778B2 (en) | 2002-08-29 | 2006-04-12 | ローム株式会社 | Capillary for wire bonding and wire bonding method using the same |
TWI255022B (en) * | 2004-05-31 | 2006-05-11 | Via Tech Inc | Circuit carrier and manufacturing process thereof |
US7371676B2 (en) * | 2005-04-08 | 2008-05-13 | Micron Technology, Inc. | Method for fabricating semiconductor components with through wire interconnects |
US7307348B2 (en) * | 2005-12-07 | 2007-12-11 | Micron Technology, Inc. | Semiconductor components having through wire interconnects (TWI) |
US8058101B2 (en) | 2005-12-23 | 2011-11-15 | Tessera, Inc. | Microelectronic packages and methods therefor |
US20070181645A1 (en) * | 2006-01-13 | 2007-08-09 | Ho Wing Cheung J | Wire bonding method and apparatus |
US7659612B2 (en) * | 2006-04-24 | 2010-02-09 | Micron Technology, Inc. | Semiconductor components having encapsulated through wire interconnects (TWI) |
US8598717B2 (en) * | 2006-12-27 | 2013-12-03 | Spansion Llc | Semiconductor device and method for manufacturing the same |
KR101057368B1 (en) * | 2007-01-31 | 2011-08-18 | 후지쯔 세미컨덕터 가부시키가이샤 | Semiconductor device and manufacturing method thereof |
JP4926787B2 (en) * | 2007-03-30 | 2012-05-09 | アオイ電子株式会社 | Manufacturing method of semiconductor device |
JP2009088254A (en) * | 2007-09-28 | 2009-04-23 | Toshiba Corp | Electronic component package, and manufacturing method for electronic component package |
WO2009096950A1 (en) * | 2008-01-30 | 2009-08-06 | Kulicke And Soffa Industries, Inc. | Wire loop and method of forming the wire loop |
JP5339800B2 (en) | 2008-07-10 | 2013-11-13 | 三菱電機株式会社 | Manufacturing method of semiconductor device |
KR101128063B1 (en) * | 2011-05-03 | 2012-04-23 | 테세라, 인코포레이티드 | Package-on-package assembly with wire bonds to encapsulation surface |
JP5734236B2 (en) * | 2011-05-17 | 2015-06-17 | 株式会社新川 | Wire bonding apparatus and bonding method |
US8404520B1 (en) * | 2011-10-17 | 2013-03-26 | Invensas Corporation | Package-on-package assembly with wire bond vias |
-
2014
- 2014-01-29 TW TW103103350A patent/TWI570864B/en not_active IP Right Cessation
- 2014-01-31 WO PCT/US2014/014181 patent/WO2014121090A1/en active Application Filing
- 2014-01-31 KR KR1020157023814A patent/KR101994954B1/en active IP Right Grant
- 2014-01-31 JP JP2015556174A patent/JP2016505222A/en active Pending
- 2014-01-31 CN CN201480019865.0A patent/CN105074914B/en active Active
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