JP2016213372A - Semiconductor device and method of manufacturing the same - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a method of manufacturing a high density semiconductor device excellent in transmission between chips with a good yield at low cost.SOLUTION: A method of manufacturing a semiconductor device 101 includes the following steps of: (I) mounting a plurality of first semiconductor elements 2 on a carrier; (II) encapsulating the first semiconductor elements 2 with a first photosensitive resin material 3 as a block; (III) exposing and developing the first photosensitive resin material 3 to form a first cured film 3; (IV) forming first metal wiring 4 on the first cured film 3; and (V) peeling the carrier.SELECTED DRAWING: Figure 9

Description

  The present invention relates to a method for manufacturing a semiconductor device and a semiconductor device obtained by the method. More specifically, the present invention relates to a method for manufacturing a semiconductor device for efficiently and inexpensively manufacturing a semiconductor device that is highly demanded for miniaturization and high density, and a semiconductor device obtained by the method.

  For the purpose of increasing the density and performance of semiconductor packages, a mounting form in which chips with different performances are mixed in one package has been proposed, and high-density interconnect technology between chips that can be manufactured at low cost is important. (For example, refer to Patent Document 1).

  As a three-dimensional mounting form, a package-on-package that connects by stacking different packages on the package by flip chip mounting is widely used in smartphones and tablet terminals (see, for example, Non-Patent Document 1 and Non-Patent Document 2). ). As a form for mounting at higher density, packaging technology using an organic substrate having high-density wiring, packaging technology using silicon or glass interposer, packaging technology using a through silicon via (TSV), embedded in a substrate A packaging technique for using the obtained chip for inter-chip transmission has been proposed.

  In addition, there is a demand for designing the pitch of the electrical connection portions between the chips to be narrower in order to conduct the semiconductor chips with high density.

Special table 2012-529770 gazette

Application of Through Mold Via (TMV) as PoP Base Package, Electronic Components and Technology Conference (ECTC), 2008 Advanced Low Profile PoP Solution with Embedded Wafer Level PoP (eWLB-PoP) Technology, ECTC, 2012

  A package using an organic substrate having a high-density wiring is difficult to obtain a sufficient yield because fine wiring needs to be stacked. Further, since a package using a silicon or glass interposer requires a large area interposer, there are problems in terms of warpage and cost. Further, a package using a silicon or glass through electrode for increasing the density has problems in terms of yield and cost.

  An object of this invention is to provide the manufacturing method which can manufacture the high-density semiconductor device excellent in transmission between chips | tips with a favorable yield and low cost.

The present invention provides the following specific embodiments.
<1> (I) fixing a plurality of first semiconductor elements on a carrier so that an active surface is disposed on the carrier side;
(II) forming a first photosensitive resin film by collectively sealing the first semiconductor element with a first photosensitive resin material;
(III) exposing and developing the first photosensitive resin film to form a first pattern cured film;
(IV) forming a first metal wiring on the first patterned cured film;
(V) A method for manufacturing a semiconductor device comprising a step of peeling the carrier.
<2> The method further includes (VI) a step of mounting the second semiconductor element from the active surface so as to straddle the active surfaces of the two or more first semiconductor elements of the plurality of first semiconductor elements. The manufacturing method of the semiconductor device of description.
<3> Further, after the step (IV) and before the step (V),
(IV-1) a step of forming a second photosensitive resin film on the first metal wiring; and (IV-2) second pattern curing by exposing and developing the second photosensitive resin film. Forming a film;
(IV-3) The method for manufacturing a semiconductor device according to <1> or <2>, further comprising a step of forming a second metal wiring on the second patterned cured film.
<4> The method for manufacturing a semiconductor device according to any one of <1> to <3>, wherein the first photosensitive resin material is a sheet-like material.
<5> The method for manufacturing a semiconductor device according to any one of <1> to <4>, wherein the first patterned cured film has a thickness of 50 to 400 μm.
<6> The method for manufacturing a semiconductor device according to any one of <1> to <5>, wherein the first photosensitive resin material is a negative type.
<7> A semiconductor device manufactured using the manufacturing method according to any one of <1> to <6>.

  ADVANTAGE OF THE INVENTION According to this invention, the manufacturing method which can manufacture the high-density semiconductor device excellent in transmission between chips | tips with favorable yield and low cost can be provided.

It is sectional drawing which shows typically the state which mounted the some 1st semiconductor element (1st chip | tip) in the carrier. It is sectional drawing which shows typically the state which sealed the 1st semiconductor element with the 1st photosensitive resin material, and formed the 1st photosensitive resin film. It is sectional drawing which shows typically the state which exposed and developed the 1st photosensitive resin film and formed the 1st pattern cured film. It is sectional drawing which shows typically the state in which the 1st metal wiring was formed. It is sectional drawing which shows typically the state in which the 2nd pattern cured film was formed. It is sectional drawing which shows typically the state in which the 2nd metal wiring was formed. It is sectional drawing which shows typically the state in which the 3rd pattern cured film and the 3rd metal wiring were formed. It is sectional drawing which shows typically the state which peeled the carrier and produced the semiconductor element embedding board | substrate 100. FIG. It is sectional drawing which shows typically the state which mounted the 2nd semiconductor element (2nd chip | tip) so that the some 1st semiconductor element might be straddled, and produced the semiconductor package (semiconductor device). It is sectional drawing which shows typically the semiconductor package containing the semiconductor element laminated body using a silicon penetration electrode (TSV). It is a top view which shows typically the semiconductor package which mounts the 2nd semiconductor element so that a some 1st semiconductor element may be straddled. It is sectional drawing which shows a semiconductor wafer typically. It is sectional drawing which shows typically the state which mounted the film-like underfill on the semiconductor wafer. It is sectional drawing which shows typically the semiconductor element with an underfill individualized.

  Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the drawings. In the following description, the same or corresponding parts are denoted by the same reference numerals, and redundant description is omitted. Further, the positional relationship such as up, down, left and right is based on the positional relationship shown in the drawings unless otherwise specified. Further, the dimensional ratios in the drawings are not limited to the illustrated ratios.

  In addition, when terms such as “left”, “right”, “front”, “back”, “top”, “bottom”, “upward”, “downward” are used, these are intended for explanation. It does not necessarily mean that this relative position is permanent. In addition, the “active surface” refers to a surface having connection portions such as electrodes and bumps in a semiconductor element.

A method for manufacturing the semiconductor package (semiconductor device) 101 shown in FIG. 9 will be described with reference to FIGS. In addition, the manufacturing method of the semiconductor device of this invention can be used suitably in the form where refinement | miniaturization and a multipin increase are required. In particular, the manufacturing method of the present invention can be suitably used in a package form that requires an interposer for mixing different types of chips.
First, the first semiconductor element 2 (first chip) is fixed on the carrier 1 so that the electrode 13 of the semiconductor element 2 is disposed on the carrier 1 side (FIG. 1).

  The carrier 1 is not particularly limited, and is a silicon plate, a glass plate, an SUS plate, a glass cloth-containing substrate, or the like, and a substrate made of a highly rigid material is preferable. Also, a resin layer for fixing the semiconductor element 2 or a metal thin film with a resin layer can be formed on the carrier. Moreover, it is preferable to embed a silicon plate because of low warpage.

  For the resin layer, for example, a resin containing a nonpolar component such as silicone or fluorine, or a resin containing a component that expands or foams when heated can be used.

  The thickness of the carrier 1 is preferably in the range of 0.2 mm to 2.0 mm. When it is thinner than 0.2 mm, handling becomes difficult, while when it is thicker than 2.0 mm, the material cost tends to increase.

  The carrier 1 may be a wafer shape or a panel shape. Although the size is not particularly limited, a wafer having a diameter of 200 mm, a diameter of 300 mm, or a diameter of 450 mm, or a rectangular panel having a side of 300 to 700 mm is preferably used.

  As the semiconductor element 2, a semiconductor element stacked layer can be used, for example, a layer stacked using TSV can be used. FIG. 10 shows an example in which a part of the semiconductor element used for the semiconductor package 101 is the semiconductor element stacked body 12. The thickness of the semiconductor element 2 is preferably 400 μm or less from the viewpoint that the warp can be reduced by thinning the insulating material, and more preferably 200 μm or less from the point that the package can be further thinned. Moreover, it is preferable that it is 30 micrometers or more from a viewpoint of handleability.

  In order to arrange the semiconductor element 2 at an accurate position of the carrier 1, it is preferable that the semiconductor element 2 and the carrier 1 have an alignment mark.

  Since the semiconductor element 2 is obtained by an existing silicon process technology, the interconnect pitch and width are higher than those in the case where the semiconductor element 2 is formed in an organic substrate. Therefore, an excellent interconnect density between elements can be obtained.

  As the semiconductor element 2, for example, a system-on-package, a silicon photonics chip, a MEMS, or a sensor chip can be used. Further, a semiconductor element having TSV can be used.

Next, the first photosensitive resin material is used to seal the semiconductor element 2 so as to cover it, thereby forming the first photosensitive resin film 3 (FIG. 2). The first photosensitive resin material is not particularly limited, but a liquid, solid, or film-shaped photosensitive resin material can be used. In addition, "film form" means what shape | molded the said photosensitive resin material in the laminated body of the single layer or two layers or more.
A film-like photosensitive resin material is preferable in that it can be sealed with low warpage and low cost, and further avoids contamination in a clean room environment. Sealing with a film-like photosensitive resin material may be a laminate method or a compression method.

  As the photosensitive resin material, a negative photosensitive resin material is preferable from the viewpoint of less outgassing at the time of thermosetting and less deformation of the pattern. Although it does not specifically limit as a negative photosensitive resin material, Photosensitive insulating materials, such as a photosensitive adhesive material, a soldering resist, and a photosensitive underfill, can be illustrated.

The photosensitive resin material preferably contains a thermosetting component, and may be further cured by heating after sealing. The heating temperature and time are, for example, 120 to 180 ° C. and 30 minutes to 3 hours. It is preferable that the average thermal expansion coefficient from room temperature to 120 ° C. after heat-curing the photosensitive resin material is in the range of 25 × 10 ⁻⁶ / ° C. to 100 × 10 ⁻⁶ / ° C. When it is less than 25 × 10 ⁻⁶ / ° C., the photosensitive resin material tends to be brittle. On the other hand, when it is larger than 100 × 10 ⁻⁶ / ° C., the package tends to be warped and handling tends to be difficult. For the same reason, the room temperature elastic modulus of the photosensitive resin material after being heat-cured is preferably in the range of 1 GPa to 10 GPa.

  In addition, the sealing step with the photosensitive resin material is preferably a laminating step from the viewpoint of being able to be manufactured at a lower cost than a compression mold using a liquid or solid sealing material and causing less damage to the chip. As the photosensitive resin material, for example, a film-like photosensitive sealing resin can be used.

  The semiconductor element sealing step using the photosensitive resin material is preferably a low-temperature step, and the photosensitive resin material is preferably a photosensitive sealing film that can be sealed at 40 to 120 ° C. A photosensitive sealing film having a sealable temperature lower than 40 ° C. has a strong tack at normal temperature and tends to deteriorate in handleability. On the other hand, the photosensitive sealing film exceeding 120 ° C. tends to have a large warp after sealing.

Next, the first photosensitive resin film 3 is exposed and developed to form a first pattern cured film 3 ′ (FIG. 3).
As an exposure method for the photosensitive resin material, a projection exposure method, a contact exposure method, a direct drawing exposure method, or the like can be used.
As the developing method, sodium carbonate, an alkaline aqueous solution of TMAH, or the like can be used.

  For alignment of the exposure, alignment marks formed on the semiconductor element 2 or the carrier 1 can be used. At this time, in order to ensure the recognizability of the alignment mark, the photosensitive resin material preferably has a maximum transmittance of 50% or more at 400 to 800 nm at a thickness of 50 μm, more preferably 70% or more. . When the maximum transmittance is less than 50%, alignment mark recognition tends to be difficult. When the maximum transmittance is 70% or more, the positional accuracy during exposure is improved and the yield tends to increase. The maximum transmittance can be measured by reading the transmittance at 400 to 800 nm using a spectrophotometer (manufactured by Hitachi High-Technologies: U-3310).

  The thickness of the pattern cured film 3 ′ (height from the surface of the carrier 1) obtained by exposing and developing the photosensitive resin material is preferably 50 to 400 μm from the viewpoint of reducing warpage and improving handleability.

Next, the first metal wiring 4 is formed on the first pattern cured film (FIG. 4). Although the wiring formation method is not specifically limited, For example, it forms using the plating method. Specifically, first, a photosensitive material for wiring formation is applied, exposed, and developed to form a pattern. The metal wiring 4 can be formed by electroplating after forming the seed layer by electroless plating using the pattern as a mask.
Finally, the pattern is removed.
Examples of the metal wiring material include gold, silver, copper, nickel, palladium, a conductive polymer, and a carbon nanotube.

  Next, the second photosensitive resin material is sealed so as to cover the metal wiring 4, exposed and developed to form a second pattern cured film 5 (FIG. 5), and on the second pattern cured film Then, the second metal wiring 6 is formed (FIG. 6). The second photosensitive resin material, its sealing method, exposure and development method, the second metal wiring 6 and its wiring method are the same as those of the first photosensitive resin material 3 and the first metal wiring 4.

The composition of the first photosensitive resin material and the second photosensitive resin material may be the same or different.
The film thickness of the second pattern cured film 5 is preferably 2 to 20 μm from the viewpoint of fine wiring. When the film thickness is less than 2 μm, the unevenness of the wiring layer tends to be large or dielectric breakdown tends to occur. When the film thickness is more than 20 μm, it is difficult to form a fine pattern or warpage tends to be large.
The photosensitive resin material is preferably a film-like material because it can be applied uniformly over a large area.

In the same manner as described above, the third photosensitive resin material is sealed, exposed and developed, and the formation of the third pattern cured film 7 and the formation of the third metal wiring 8 are repeated (FIG. 7), and the carrier 1 is peeled off. Then, a semiconductor element embedded substrate 100 in which high-density wiring is built up is manufactured (FIG. 8).
In the present embodiment, only the third metal wiring is formed. However, the present invention is not limited to this, and the pattern hardening film and the metal wiring can be further formed by repeating the same process. The third and subsequent photosensitive resin materials, the sealing method, the exposure and development method, the third and subsequent metal wirings and the wiring method thereof are the same as those of the second photosensitive resin material and the second metal wiring 6.
Thus, by forming the high density wiring on the semiconductor element sealing body (FIG. 3) by the build-up method, the metal connection portion is reduced, and the semiconductor element embedded substrate 100 having high functionality and good reliability is obtained. be able to.

  When forming a cured pattern film using a photosensitive resin material, patterning the photosensitive resin material in the periphery of the semiconductor element to open a via shape, opening the seed layer through a plating process Vias can be filled with a conductor such as copper to form a Through Mold Via (TMV) structure.

  Although there is no limitation in particular as a peeling method of the carrier 1, Peel peeling, slide peeling, heat peeling, etc. are mentioned. Moreover, it can also wash | clean with a solvent, plasma, etc. after peeling. A rewiring layer can also be formed on the surface from which the carrier 1 is peeled off.

Next, the semiconductor element 9 (second semiconductor element) is mounted on the semiconductor element embedded substrate 100 via the underfill 11 so as to straddle two or more semiconductor elements 2 of the plurality of first semiconductor elements, and the semiconductor package 101 is mounted. Prepared (FIG. 9). Thereby, the electrode part 10 for a connection and the electrode 13 of a 1st semiconductor element are electrically connected.
Each of the connecting electrode portion 10 and the electrode 13 is independently formed using a gold bump or a copper bump formed by plating, a bump formed by solder on copper, a copper exposed by a polishing process, or a gold wire. Examples thereof include a gold stud bump to be formed and a metal ball fixed to an electrode pad by thermocompression using ultrasonic waves as necessary. Further, the connection electrode portion 10 and the electrode 13 may be a laminate including a plurality of metal layers.

  The connection electrode portion 10 does not need to be made of a single metal, and may include a plurality of metals. The connection electrode unit 10 may include gold, silver, copper, nickel, indium, palladium, tin, bismuth, or the like.

  The mounting method is not particularly limited, but a method of injecting the underfill with a capillary after mounting the semiconductor element 9, a method of molding a solid underfill after mounting the semiconductor element 9, and mounting after applying a liquid underfill The system and the system mounted after apply | coating a film-like underfill are mentioned. The underfill may be applied to either the semiconductor element 9 or the semiconductor element embedded substrate 100.

  A film-like underfill 11 is laminated on the semiconductor wafer 9 ′ (FIG. 12) with the connecting electrode portion 10 (FIG. 13) from the viewpoint of manufacturing cost, yield, and connection with high density bumps. Then, the method of pressure-bonding the semiconductor element 9 (FIG. 14) separated into pieces is preferable.

  The film-like underfill is photosensitive from the viewpoint that an unnecessary underfill on the connection electrode portion 10 or the electrode 13 can be removed by an exposure step and a development step, and a good connection body without underfill biting can be obtained. It is preferable that the conductive underfill film.

As the crimping method, for example, there is a method of connecting the separated semiconductor element 9 and the separated semiconductor package 100, or a method of connecting the separated semiconductor element 9 and the semiconductor element embedded substrate 100 in a panel or wafer state. Can be mentioned.
The latter method is preferable from the viewpoint of manufacturing cost and handleability.
The pressure bonding is usually performed at 80 to 350 ° C. for 3 to 30 seconds. When the pressure bonding temperature is lower than 220 ° C., a good metal connection state can be achieved by the reflow process. In order to manufacture a package more efficiently, it is most preferable to make a metal connection by a reflow process after temporarily bonding the individual semiconductor element 9 and the semiconductor element embedded substrate 100 in a panel or wafer state at 150 ° C. or lower. preferable.

  The semiconductor element 9 is preferably a CPU, a graphic processing unit GPU, a volatile memory such as a DRAM or SRAM, a non-volatile memory such as a flash memory, an RF chip, or a chip having a combination of these.

  FIG. 11 is a schematic top view of the semiconductor package 101 manufactured by the above method. In this embodiment, since a semiconductor element is used for transmission between chips, high-speed communication is possible.

  The method for manufacturing a semiconductor device according to an embodiment of the present invention has been described above. However, the present invention is not limited to the above-described embodiment, and modifications may be made as appropriate without departing from the spirit of the present invention.

DESCRIPTION OF SYMBOLS 1 ... Carrier, 2 ... 1st semiconductor element (1st semiconductor element), 3 ... 1st photosensitive resin film, 3 '... 1st pattern cured film, 4 ... 1st metal wiring, 5 ... 1st 2 pattern cured film, 6 ... second metal wiring, 7 ... third pattern cured film, 8 ... third metal wiring, 9 ... second semiconductor element (second semiconductor element), 9 '... connection Semiconductor wafer with electrode portion for use, 10 ... Connecting electrode portion, 11 ... Underfill, 12 ... Semiconductor element laminate, 13 ... Electrode, 100 ... Semiconductor element embedded substrate, 101 ... Semiconductor package (semiconductor device)

Claims (7)

(I) fixing a plurality of first semiconductor elements on a carrier so that an active surface is disposed on the carrier side;
(II) forming a first photosensitive resin film by collectively sealing the first semiconductor element with a first photosensitive resin material;
(III) exposing and developing the first photosensitive resin film to form a first pattern cured film;
(IV) forming a first metal wiring on the first patterned cured film;
(V) A method for manufacturing a semiconductor device comprising a step of peeling the carrier.   2. The semiconductor according to claim 1, further comprising: (VI) mounting a second semiconductor element from an active surface so as to straddle active surfaces of two or more first semiconductor elements of the plurality of first semiconductor elements. Device manufacturing method. Further, after the step (IV) and before the step (V),
(IV-1) a step of forming a second photosensitive resin film on the first metal wiring; and (IV-2) second pattern curing by exposing and developing the second photosensitive resin film. Forming a film;
(IV-3) The method for manufacturing a semiconductor device according to claim 1 or 2, further comprising a step of forming a second metal wiring on the second cured pattern film.   The method for manufacturing a semiconductor device according to claim 1, wherein the first photosensitive resin material is a film-like material.   5. The method of manufacturing a semiconductor device according to claim 1, wherein a thickness of the first pattern cured film is 50 to 400 μm.   The method for manufacturing a semiconductor device according to claim 1, wherein the first photosensitive resin material is a negative type.   The semiconductor device manufactured using the manufacturing method as described in any one of Claims 1-6.

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