JP2016208498A - Radiation imaging apparatus, radiation imaging system, and control method for radiation imaging apparatus - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a radiation imaging apparatus capable of preventing a dark component from being changed even during use in the case of emergency.SOLUTION: The radiation imaging apparatus comprises: a plurality of pixels 200, each of which includes a conversion element 202 and a transistor 203; and a plurality of drive lines 205 electrically connected to gates 203a of the transistors 203. A control unit 210 performs: storage control in which a drive circuit unit 206 is caused to supply an OFF voltage for turning off the transistors 203 to the plurality of drive lines 205, thereby storing electric signals corresponding to radiations in the plurality of pixels 200; main read control in which the drive circuit unit 206 is caused to successively supply an ON voltage for turning on the transistors 203 to the plurality of drive lines 205, thereby reading electric signals corresponding to radiations out of the plurality of pixels 200; and control in which the drive circuit unit is caused to supply a voltage that is between the OFF voltage and the ON voltage and is different from the OFF voltage and the ON voltage to the plurality of drive lines 205 during a period different from a period in which the storage control is performed and a period in which the main read control is performed.SELECTED DRAWING: Figure 2

Description

  The present invention relates to a radiation imaging apparatus, a radiation imaging system, and a control method for the radiation imaging apparatus.

  The radiation imaging apparatus generates an image based on a difference between an image irradiated with radiation (hereinafter referred to as a radiation irradiated image) and an image not irradiated with radiation (hereinafter referred to as a dark image). In particular, when a photoelectric conversion element that is disposed in a radiation imaging apparatus and converts light information into electronic information is made of amorphous silicon, an accurate image can be generated without considering dark image information. It is difficult. This dark image strongly depends on the temperature in the radiation imaging apparatus, and has a property that the dark component increases as the temperature rises. In addition, the characteristics of the amplifier circuit for integrating the charges obtained by radiation also depend on the temperature. Normally, when power is supplied to the amplifier circuit, the characteristics are not stable for a while due to temperature drift.

  Therefore, in the case of a radiation imaging device using amorphous silicon, after turning on the power, the temperature inside the radiation imaging device and the temperature of the amplification circuit become constant, and warm-up operation is performed in order to keep the dark component and temperature drift constant There is. However, when a radiation imaging apparatus is urgently needed, such as an emergency hospital, it is very inconvenient that such a dark component or time for which the temperature drift is constant is required. This is because the dark image and the temperature drift are not constant, so that an image constituted by the difference between the radiation irradiation image and the dark image cannot be said to be a reliable image.

  Therefore, as shown in Patent Document 1 below, in recent years, the radiation imaging apparatus is always warmed up with the power turned on so that it can be used instantaneously at any time. In Patent Document 1, all the voltages applied to the photoelectric conversion element in the radiation imaging apparatus and the thin film transistor for reading out the electric charge accumulated in the photoelectric conversion element are dropped to the ground. In Patent Document 1, it is defined as a sleep state. However, in an emergency, it is difficult to use the radiation imaging apparatus in a state where the dark component is constant. This is because a radiation imaging apparatus is usually used by applying a certain voltage in order to accumulate electric charge in a photoelectric conversion element. Therefore, in the sleep state, if the voltage is dropped to the ground and a voltage is suddenly applied to the photoelectric conversion element at the moment of use in an emergency, a certain amount of time is required until the charge in the photoelectric conversion element reaches a steady state. The problem that it is necessary arises. Meanwhile, the dark component is not stable, and it is difficult to obtain reliable image data.

  In a general radiation imaging apparatus, a method of driving a voltage applied to a photoelectric conversion element and a thin film transistor by a warm-up operation while driving an amplifier circuit and using the same timing as a normal reading drive is employed. However, this method has a problem that the threshold voltage of the thin film transistor changes and causes a change in characteristics. The ratio of the warm-up operation period may be very long, and the threshold value changes more drastically. When the threshold value changes, the component leaking from the transistor changes, resulting in a bad influence on the image.

JP 2011-101893 A

  In the driving method in the sleep state as disclosed in Patent Document 1, it is possible to reduce the temperature drift of the amplifier circuit, while preventing the change of the dark component peculiar to the sensor substrate in emergency use, and It is difficult to keep the threshold value of the thin film transistor constant.

  An object of the present invention is to provide a radiation imaging apparatus, a radiation imaging system, and a radiation imaging that can prevent a change in a dark component during use in an emergency, prevent a change in a threshold voltage of a transistor, and can always generate a stable image even in an emergency. An apparatus control method is provided.

  The radiation imaging apparatus according to the present invention includes a plurality of pixels that each include a conversion element and a transistor and that are arranged in a matrix and that generates an electrical signal corresponding to radiation, and that is electrically connected to the gates of the transistors of the plurality of pixels. A plurality of drive lines connected to each other, a drive circuit unit that supplies a voltage to the plurality of drive lines to drive the plurality of pixels, and a control unit that controls the drive circuit unit, A storage unit configured to store the electrical signal in the plurality of pixels by supplying an off voltage for turning off the transistor to the driving circuit unit to the plurality of driving lines; A period of time for performing the main reading control for reading out the electric signal from the plurality of pixels and the accumulation control by sequentially supplying an ON voltage for turning on the transistor to the plurality of driving lines. The drive circuit unit is supplied with a voltage that is between the off voltage and the on voltage and different from the off voltage and the on voltage to the plurality of drive lines in a period different from the period for performing the main reading control. Control is performed.

  According to the present invention, it is possible to prevent a change in the dark component during use in an emergency, prevent a change in the threshold voltage of the transistor, and always generate a stable image even in an emergency.

It is a figure which shows the structural example of the radiation imaging system by 1st Embodiment. It is a figure which shows the structural example of the radiation imaging device of FIG. It is sectional drawing which shows the structural example of a photodiode and a thin-film transistor. It is a timing chart which shows the drive method of a radiation imaging system. It is a timing chart of a drive sequence. It is a timing chart of a drive sequence. It is a timing chart which shows the drive method of a radiation imaging system. It is a timing chart of a drive sequence.

(First embodiment)
FIG. 1 is a diagram illustrating a configuration example of a radiation imaging system 100 according to the first embodiment of the present invention. The radiation imaging system 100 includes an exposure switch 101, a radiation source control unit 102, a radiation source 103, a radiation imaging device 105, an information processing unit 106, and a subject information input device / image display device 107. The radiation imaging apparatus 105 includes a power switch 105 a of the radiation imaging apparatus 105. The exposure switch 101 is electrically connected to the radiation source control unit 102 with a wired cable, and outputs a switch signal to the radiation source control unit 102. The radiation source control unit 102 controls the radiation source 103 according to the switch signal. The radiation source 103 irradiates the radiation 104 under the control of the radiation source control unit 102. The radiation 104 is irradiated to the radiation imaging apparatus 105 through the patient. A doctor or an engineer can irradiate the patient with the radiation 104 by operating the exposure switch 101. The radiation source control unit 102 is electrically connected to the exposure switch 101, the radiation source 103, and the information processing unit 106. The information processing unit 106 is electrically connected to the subject information input device / image display device 107 and the radiation imaging device 105. The radiation imaging apparatus 105 converts the incident radiation into an electrical signal and outputs the electrical signal to the information processing unit 106. The information processing unit 106 processes the input signal and outputs the processing result to the radiation source control unit 102. The radiation imaging apparatus 105 converts the incident radiation into an electric signal image and outputs the image to the information processing unit 106. The information processing unit 106 processes the input image and outputs the processed image to the subject information input / image display device 107. The subject information input / image display device 107 displays the image.

  By operating the power switch 105a, the radiation imaging apparatus 105 is turned on, and the radiation imaging apparatus 105 can be used. By operating the power switch 105a, a voltage is applied to the sensor substrate in the radiation imaging apparatus 105, and the amplifier circuit starts driving. The exposure switch 101, the radiation source control unit 102, the radiation source 103, the radiation imaging device 105, the information processing unit 106, and the subject information input device / image display device 107 each have input / output terminals, and each of them has a Can communicate.

  FIG. 2 is a diagram illustrating a configuration example of the radiation imaging apparatus 105 of FIG. The radiation imaging apparatus 105 includes a circuit unit 105 b and a pixel array unit 201. The pixel array unit 201 includes a plurality of pixels 200 arranged in a matrix. Each of the plurality of pixels 200 includes a photodiode 202 and a thin film transistor 203. The thin film transistor 203 includes a gate electrode 203a, a source electrode 203b, and a drain electrode 203c. In the pixel 200, the cathode (second terminal of the conversion element) of the photodiode 202 is electrically connected to the drain electrode 203 c of the thin film transistor 203. The plurality of drive lines 205 are electrically connected in common to the gate electrodes 203a of the thin film transistors 203 in the pixels 200 in each row. The plurality of signal lines 204 are electrically connected in common to the source electrode 203b of the thin film transistor 203 in each column of pixels 200, respectively. The plurality of common voltage lines 224 are electrically connected in common to the anodes (first terminals of the conversion elements) of the photodiodes 202 in the pixels 200 of the respective columns. Note that one of the source electrode 203b and the drain electrode 203c of the thin film transistor 203 is electrically connected to the cathode of the photodiode 202 (second terminal of the conversion element), and the other is one of the plurality of signal lines 204. It may be electrically connected to.

  The circuit unit 105 b includes a drive circuit unit 206, a control unit 210, a memory 211, a common voltage application circuit unit 213, and a signal processing unit 217. The signal processing unit 217 includes an amplifier circuit 207, a sample hold circuit 214, a multiplexer 208, and an analog / digital converter (ADC) 209 in each column, and is electrically connected to a plurality of signal lines 204. The plurality of amplifier circuits 207 are electrically connected to the plurality of signal lines 204, respectively. Each of the plurality of amplifier circuits 207 includes a differential amplifier 207a, a capacitor 207b, and a reset switch 207c. The differential amplifier 207a inputs the voltage of one corresponding signal line 204 among the plurality of signal lines 204 to the inverting input terminal, and inputs the reference voltage Vref to the non-inverting input terminal. The capacitor 207b and the reset switch 207c are electrically connected between the inverting input terminal and the output terminal of the differential amplifier 207a. The drive circuit unit 206 is a drive line control unit that controls the voltages of the plurality of drive lines 205. The common voltage application circuit unit 213 is a common voltage application unit that applies the same voltage to the plurality of common voltage lines 224. That is, the common voltage application circuit unit 213 applies the same voltage to the anodes of the photodiodes 202 in all the pixels 200.

  3A and 3B are cross-sectional views illustrating configuration examples of the photodiode 202 and the thin film transistor 203 in FIG. FIG. 3A shows an example in which the photodiode 202 is a PIN photodiode. The PIN photodiode 202 includes a P-type semiconductor layer 301, an intrinsic semiconductor layer 302, and an N-type semiconductor layer 303 from above. A common electrode 202b is provided above the P-type semiconductor layer 301, and an individual electrode 202a is provided below the N-type semiconductor layer 303. The thin film transistor 203 in FIG. 2 includes a gate electrode 203a, a source electrode 203b, a drain electrode 203c, an N-type semiconductor layer 304, and an intrinsic semiconductor layer 305. The drain electrode 203 c is electrically connected to the individual electrode 202 a of the PIN photodiode 202. FIG. 3B is a cross-sectional view illustrating another configuration example of the photodiode 202 and the thin film transistor 203 in FIG. An example in which the photodiode 202 is a MIS photodiode is shown. The MIS photodiode 202 includes an N-type semiconductor layer 401, an intrinsic semiconductor layer 402, and an insulating layer 403 from above. A common electrode 202b is provided above the N-type semiconductor layer 401, and an individual electrode 202a is provided below the insulating layer 403. The thin film transistor 203 in FIG. 2 includes a gate electrode 203a, a source electrode 203b, a drain electrode 203c, an N-type semiconductor layer 404, and an intrinsic semiconductor layer 405. The drain electrode 203 c is electrically connected to the individual electrode 202 a of the MIS photodiode 202.

  Next, the radiation imaging apparatus 105 will be described with reference to FIGS. The radiation imaging apparatus 105 includes a pixel array unit 201 and a circuit unit 105b. The radiation imaging apparatus 105 includes a direct type that directly converts the radiation 104 into an electrical signal to obtain a signal charge, and an indirect type that converts the radiation into visible light and then converts the visible light into a signal charge. In the case of the indirect type, a scintillator is provided in the pixel array unit 201. The scintillator is arranged so as to cover the entire surface of the pixel array unit 201 of the radiation imaging apparatus 105. The material of the scintillator is gadolinium oxysulfide (GOS), cesium iodide (CsI), or the like. The scintillator converts radiation into visible light. The photodiode 202 converts the visible light into an electric signal (charge). The scintillator and photodiode 202 is a conversion element that generates an electrical signal corresponding to radiation. In the case of the direct type, a scintillator is unnecessary, and instead of the photodiode 202, a conversion element that directly converts radiation into an electric signal is provided.

  The pixel array unit 201 is controlled by the drive circuit unit 206 and the common voltage application circuit unit 213. The pixel array unit 201 includes a plurality of pixels 200 in a matrix form of m (x direction) × n (y direction). The pixel 200 includes a photodiode 202 and a thin film transistor 203. The thin film transistor 203 outputs the charge converted by the photodiode 202 to the signal line 204 in accordance with the voltage of the drive line 205. The pixels 200 exist in the x direction and the y direction, respectively, about 1000 to 4000 pixels, and the total number of pixels is about 10 million. The drive lines 205 extend in the x direction and the signal lines 204 extend in the y direction, respectively, and are orthogonal to each other. One drive line 205 is electrically connected to the gate electrodes 203a of all the pixels 200 in the same row. Further, the source electrode 203b of all the pixels 200 in the same column is electrically connected to one signal line 204.

  For example, as shown in FIG. 3A, the photodiode 202 is a PIN photodiode having a P-type semiconductor layer 301, an intrinsic semiconductor layer 302, and an N-type semiconductor layer 303 from above. Alternatively, an NIP photodiode 202 having an N-type semiconductor layer, an intrinsic semiconductor layer, and a P-type semiconductor layer from the top may be used with the reverse structure. Further, as shown in FIG. 3B, a MIS photodiode 202 having an N-type semiconductor layer 401, an intrinsic semiconductor layer 402, and an insulator layer 403 from the top may be used. In the MIS photodiode 202, the semiconductor layer may be a P-type semiconductor. The photodiode 202 has two electrodes, that is, an individual electrode 202 a and a common electrode 202 b, and the potential of either electrode is fixed by the common voltage application circuit unit 213. In FIG. 3A, the individual electrode 202 a is disposed below the photodiode 202 and is electrically connected to the thin film transistor 203. The potential of the common electrode 202b is fixed by the common voltage application circuit unit 213. As a result, an electric field is generated in the photodiode 202. When radiation is incident while the potential of the common electrode 202b is fixed, a pair of electrons and holes is generated in the photodiode 202. One of the electrons and holes is attracted by the electric field generated by the common voltage application circuit unit 213, charges are accumulated in the individual electrodes 202 a that are not fixed, and the potential varies. For example, in the case of the N-type thin film transistor 203 and the MIS photodiode 202, the thin film transistor 203 and the individual electrode 202b are electrically connected, and the potential of the individual electrode 202b varies due to radiation incidence. In the case of the direct type, the material of the photodiode 202 is preferably amorphous selenium. In the case of the indirect type, the semiconductor of the photodiode 202 may be amorphous silicon or polysilicon.

  The thin film transistor 203 is a switching element and includes a gate electrode 203a, a source electrode 203b, and a drain electrode 203c. The thin film transistor 203 may be an N type thin film transistor in which an N type semiconductor layer is used, or a P type thin film transistor in which a P type semiconductor layer is used. In the case of the N-type thin film transistor 203, when the voltage of the gate electrode 203a becomes a voltage Von higher than the threshold voltage, the switch characteristic of the thin film transistor 203 is turned on. In the case of the P-type thin film transistor 203, conversely, when the voltage of the gate electrode 203a becomes a voltage Von lower than the threshold voltage, the switching characteristics of the thin film transistor 203 are turned on. The gate electrode 203 a is electrically connected to the drive line 205, the source electrode 203 b is electrically connected to the signal line 204, and the drain electrode 203 c is electrically connected to the individual electrode 202 a of the photodiode 202. The structure of the thin film transistor 203 may be a bottom-gate thin film transistor in which the drive line 205 is located below the thin film transistor 203 or a top-gate thin film transistor located above.

  The photodiode 202 and the thin film transistor 203 are formed using a CVD (Chemical Vapor Deposition) apparatus. The sensor portion 202 and the thin film transistor 203 may be formed during the same film formation or may be formed through separate film formation. For example, a stacked type in which the photodiode 202 is formed on the thin film transistor 203 as shown in FIGS.

  The drive circuit portion 206 is electrically connected to the drive line 205 in each row, and controls the voltage of the gate electrode 203a of the thin film transistor 203 in units of rows. Since the gate electrodes 203a of all the pixels 200 in the same row are electrically connected to one drive line 205, the drive circuit portion 206 can control the thin film transistors 203 in units of rows. When a voltage Von is applied to the drive line 205 so that the switch characteristic of the thin film transistor 203 sufficiently exceeds the threshold voltage Vth, the electrical signal accumulated in the pixel 200 is transferred to the signal line 204 and the amplifier circuit 207. . The drive circuit unit 206 applies the voltage Von to the drive line 205 in order from the first row to the n-th row, and drives the pixel array unit 201 so as to read the electric signals of the pixels 200 in all rows. .

  In the case where the thin film transistor 203 is an N-type thin film transistor, the driving circuit unit 206 applies a negative voltage Voff of about −15 to −5 volts to the gate electrode 203a when the thin film transistor 203 is in an off state. In addition, the drive circuit portion 206 applies a high voltage Von of about 5 to 20 volts to the gate electrode 203a when the thin film transistor 203 is on.

  On the other hand, when the thin film transistor 203 is a P-type thin film transistor, the driving circuit unit 206 applies a high voltage Voff of about 5 to 20 volts to the gate electrode 203a when the thin film transistor 203 is in an off state. In addition, when the thin film transistor 203 is in an on state, the drive circuit unit 206 applies a voltage Von of about −15 to −5 volts to the gate electrode 203a.

  An off-state voltage Voff is applied to the gate electrode 203a of the thin film transistor 203 at almost a ratio. As a result, in the N-type thin film transistor 203, a negative voltage is dominantly applied to the gate electrode 203a, and the threshold voltage shifts in the negative direction. In the case of the P-type thin film transistor 203, a positive voltage is dominantly applied to the gate electrode 203a, and the threshold voltage shifts in the positive direction.

  The control unit 210 controls the reset switch 207 c, the multiplexer 208, the ADC 209, the memory 211, the drive circuit unit 206, the common voltage application circuit unit 213, and the sample hold circuit 214 in the amplifier circuit 207. The amplifier circuit 207 in each column is electrically connected to the signal line 204, the sample hold circuit 214, and the control unit 210, and converts the electric charge of the signal line 204 in each column into a voltage. Output to. After the incidence of radiation, when the drive circuit unit 206 applies the voltage Von to one drive line 205, the charge of the pixels 200 for one row is output to the signal line 204 of each column. The amplifier circuit 207 in each column converts the charge of the signal line 204 in each column into a voltage and outputs the voltage to the sample hold circuit 214. The drive circuit unit 206 applies a voltage to the drive lines 205 of all rows and then starts to apply a voltage again from the first row. At this time, the charge input to the amplifier circuit 207 is equal to the input charge so far. This is the integral value. When the control unit 210 turns on the reset switch 207c via the amplifier circuit reset line 212, the input charge of the amplifier circuit 207 is reset. Thereafter, when the reset switch 207c is turned off, the reset state of the amplifier circuit 207 is released. The reset switch 207c resets the input charge every time a signal for one pixel is processed.

  The sample hold circuit 214 includes a sample hold switch 215 and a sample hold capacitor 216. When the control unit 210 turns on the sample and hold switch 215, the output signal of the amplifier circuit 207 is written into the sample and hold capacitor 216. When the sample and hold switch 215 is turned off, the signal of the sample and hold capacitor 216 is held and output to the multiplexer 208.

  The multiplexer 208 is electrically connected to the ADC 209 and the sample hold circuit 214, and sequentially outputs the output voltage of the sample hold circuit 214 of each column to the ADC 209. The ADC 209 is electrically connected to the control unit 210 and the memory 211, converts the input analog voltage into a digital signal, and outputs the digital signal to the memory 211. The memory 211 sequentially stores the input digital signal together with the position information (the coordinate information in the x direction and the coordinate information in the y direction) of the pixel 200 corresponding to the digital signal.

  The common voltage application circuit unit 213 is electrically connected to the common electrode 202b of the photodiode 202 via the common voltage line 224, as shown in FIGS. 3A and 3B, to the photodiode 202. Control the voltage to be applied. When radiation is input, the photodiode 202 generates electrons and holes. However, if a certain electric field is not applied to the photodiode 202, the electrons and holes are immediately recombined, and the signal of the pixel 200 cannot be read out. . Further, the maximum amount of radiation that can be detected depends on the voltage applied to the photodiode 202 by the common voltage application circuit unit 213. When the voltage applied to the common electrode 202b of the photodiode 202 by the common voltage application circuit unit 213 is Vs, the reference voltage of the amplifier circuit 207 is Vref, and the capacitance of the photodiode 202 is C, the amount of charge accumulated in the photodiode 202 Becomes C × | Vs−Vref |. As the difference between Vs and Vref is larger, the photodiode 202 can accumulate a larger amount of charge.

  FIG. 4 is a timing chart showing a driving method (control method) of the radiation imaging system 100 according to the present embodiment, and shows a driving method when the radiation imaging system 100 captures a still image. In FIG. 4, the power supply voltage 503, the radiation signal 502, and the drive signal 501 are shown. The power supply voltage 503 is a power supply voltage of the radiation imaging apparatus 105, and the power supply voltage 503 is applied by operating the power switch 105a. The radiation signal 502 is a signal supplied from the radiation source control unit 102 to the radiation source 103. In the low level period of the radiation signal 502, the radiation source 103 does not emit the radiation 104, and in the high level period of the radiation signal 502, the radiation source 103 emits the radiation 104. Note that driving the radiation imaging apparatus 105 while driving the amplifier circuit 207 and not driving the pixel array unit 201 by the driving circuit unit 206 is defined as sleep driving. In addition, driving of the radiation imaging apparatus 105 that drives the pixel array unit 201 by the driving circuit unit 206 while driving the amplifier circuit 207 is defined as idling driving.

  The drive signal 501 is a signal supplied from the control unit 210 to the drive circuit unit 206 and the signal processing unit 217. The driving signal 501 includes a blank reading driving signal 501a, a main reading driving signal 501b, and a sleep driving signal 501c. The high level pulse of the idle reading drive signal 501a indicates the processing of FIG. The high level pulse of the main reading drive signal 501b indicates the process of FIG. The sleep drive signal 501c indicates the processing of FIG. 6A or 6B. 5 and 6, the voltage Vg1 of the gate electrode 203a of the pixel 200 in the first row, the voltage Vg2 of the gate electrode 203a of the pixel 200 in the second row, the voltage Vg3 of the gate electrode 203a of the pixel 200 in the third row, and The voltage Vgm of the gate electrode 203a of the pixel 200 in the m-th row is shown. 5 and 6 show the voltage of the common electrode 202b, the reference voltage Vref of the amplifier circuit 207, and the operation of the sample hold circuit 214.

  First, in FIG. 4, when the power supply voltage 503 is applied, the radiation signal 502 is at a low level, and the radiation imaging apparatus 105 drives the sleep drive sequence 504a. In the sleep drive sequence 504a, the sleep drive signal 501c or 501d becomes a high level, and the process of FIG. 6A or 6B is performed. In the sleep drive sequence 504a, as illustrated in FIG. 6A or 6B, the drive circuit unit 206 sets the voltages Vg1 to Vgm of the gate electrodes 203a of the pixels 200 in all rows to Voff1. The voltage Voff1 is lower than the on-voltage Von and higher than the off-voltage Voff shown in FIG. 5A, and need not be a voltage for turning off the thin film transistor 203. That is, the drive circuit unit 206 supplies a voltage Voff1 between the off voltage Voff and the on voltage Von to the plurality of drive lines 205, which is different from the off voltage Voff and the on voltage Von. Specifically, the control unit 210 supplies a voltage Voff1 between the off voltage Voff and the threshold voltage Vth of the thin film transistor 203 to the drive circuit unit 206, which is different from the off voltage Voff and the threshold voltage Vth. Supply. The voltage Voff1 is, for example, 0 to 5V. Preferably, the voltage Voff1 is lower than the threshold voltage Vth and higher than the off voltage Voff, where Vth is a threshold voltage of the thin film transistor 203. Further, when the threshold voltage of the thin film transistor 203 is Vth, the voltage Voff1 may be almost the same as the voltage Vref + Vth obtained by adding the reference voltage Vref and the threshold voltage Vth of the amplifier circuit 207. In that case, it is possible to more efficiently suppress the threshold voltage shift in the sleep drive sequence 504a, and it is desirable that the voltage Voff1 be a value in the vicinity thereof. The common voltage application circuit unit 213 applies the first voltage Vs to the common electrode 202b of all the pixels 200. The common voltage application circuit unit 213 may apply the second voltage Vs1 to the common electrode 202b of all the pixels 200. The second voltage Vs1 is a voltage that is higher than the first voltage Vs shown in FIG. 5A and lower than the ground potential, and is a voltage that maintains the depletion state of the pixel array unit 201 (photodiode 202). Good. The first voltage Vs and the second voltage Vs1 are negative voltages. The absolute value of the second voltage Vs1 is smaller than the absolute value of the first voltage Vs. In consideration of power consumption and the like, the voltage Vs1 is preferably higher than the voltage Vs and lower than the ground potential. The voltage Vs1 may be the same voltage as the voltage Vs. The controller 210 supplies the reference voltage Vref to all the amplifier circuits 207. The reference voltage Vref is a voltage higher than the ground potential. A power supply voltage is applied to all amplifier circuits 207. In addition, the sample hold switch 215 in each column is off, and the output signal of the amplifier circuit 207 in each column is not written to the sample hold capacitor 216 in each column.

  Next, the radiation imaging apparatus 105 drives the main reading drive sequence 504b in FIG. In the main reading drive sequence 504b, as shown in FIG. 5B, the common voltage application circuit unit 213 applies the first voltage Vs to the common electrode 202b of all the pixels 200 under the control of the control unit 210. . The voltage Vs is a voltage lower than the ground potential. The controller 210 supplies the reference voltage Vref to all the amplifier circuits 207. A power supply voltage is applied to all amplifier circuits 207. First, the drive circuit unit 206 raises the voltage Vg1 of the gate electrode 203a of the pixel 200 in the first row from the off voltage Voff to the on voltage Von, and then falls from the on voltage Von to the off voltage Voff. Here, the on-voltage Von is a voltage for turning on the thin film transistor 203 and is a positive voltage. The off voltage Voff is a voltage for turning off the thin film transistor 203 and is a negative voltage. In the pixel 200 in the first row, the thin film transistor 203 is turned on, and the charge of the photodiode 202 is output to the signal line 204. The sample hold switch 215 of each column is turned on during the high level pulse Vsh, and the output signal of the amplifier circuit 207 of each column is written to the sample hold capacitor 216 of each column. The voltage written in the sample hold capacitor 216 is transferred to the ADC 209 by the multiplexer 208 and converted into digital data. The multiplexer 208 is electrically connected to the plurality of sample and hold capacitors 216 and sequentially transfers them to the ADC 209. The ADC 209 sequentially converts the transferred voltages into digital data. The high level signals of the multiplexer 208 and the ADC 209 in FIG. 5B and FIG. 6B are sequentially transferred by the multiplexer 208 to the ADC 209, and each data is converted into a digital signal by the ADC 209. It means that.

  In the memory 211, the signal of the pixel 200 in the first row is written. Next, the drive circuit unit 206 raises the voltage Vg2 of the gate electrode 203a of the pixels 200 in the second row from the off voltage Voff to the on voltage Von, and then falls from the on voltage Von to the off voltage Voff. In the pixel 200 in the second row, the thin film transistor 203 is turned on, and the charge of the photodiode 202 is output to the signal line 204. The sample hold switch 215 of each column is turned on during the high level pulse Vsh, and the output signal of the amplifier circuit 207 of each column is written to the sample hold capacitor 216 of each column. In the memory 211, signals of the pixels 200 in the second row are written. Similarly, the voltages V1 to Vm of the gate electrodes 203a of the pixels 200 in the first to m-th rows are sequentially changed to high level pulses, and the charges of the photodiodes 202 of the pixels 200 in the first to m-th rows are sequentially signaled. Output on line 204. As described above, in the main reading drive sequence 504b, the drive circuit unit 206 sequentially supplies the plurality of drive lines 205 with the off voltage Voff for turning off the thin film transistor 203 and the on voltage Von for turning on the thin film transistor 203. As a result, the electrical signal accumulated in the pixel 200 having the conversion element (scintillator and photodiode 202) is output to the signal line 204.

  In the main reading drive sequence 504b, the radiation imaging apparatus 105 executes the process of FIG. 5B a plurality of times, and stores the fixed pattern noise (dark image) in a state where the radiation 104 is not irradiated in the memory 211. The number of times that the fixed pattern noise is output to the signal line 204 is averaged as the number of times increases, so that the noise component can be reduced. In FIG. 6, the fixed pattern noise is executed after the power is turned on, but this may be acquired after acquiring the radiation irradiation image.

  Next, the radiation imaging apparatus 105 drives the idle reading drive sequence 504c in FIG. In the idle reading drive sequence 504c, as shown in FIG. 5A, the common voltage application circuit unit 213 applies the voltage Vs to the common electrode 202b of all the pixels 200 in accordance with the control by the control unit 210. The controller 210 supplies the reference voltage Vref to all the amplifier circuits 207. A power supply voltage is applied to all amplifier circuits 207. In addition, the sample hold switch 215 in each column is off, and the output signal of the amplifier circuit 207 in each column is not written to the sample hold capacitor 216 in each column. First, the drive circuit unit 206 raises the voltage Vg1 of the gate electrode 203a of the pixel 200 in the first row from the off voltage Voff to the on voltage Von, and then falls from the on voltage Von to the off voltage Voff. In the pixel 200 in the first row, the thin film transistor 203 is turned on, and the charge of the photodiode 202 is output to the signal line 204. Next, the drive circuit unit 206 raises the voltage Vg2 of the gate electrode 203a of the pixels 200 in the second row from the off voltage Voff to the on voltage Von, and then falls from the on voltage Von to the off voltage Voff. In the pixel 200 in the second row, the thin film transistor 203 is turned on, and the charge of the photodiode 202 is output to the signal line 204. Similarly, the voltages V1 to Vm of the gate electrodes 203a of the pixels 200 in the first to m-th rows are sequentially changed to high level pulses, and the charges of the photodiodes 202 of the pixels 200 in the first to m-th rows are sequentially signaled. Output on line 204. In the idle reading drive sequence 504 c, the dark component charge accumulated in the photodiode 202 is output to the signal line 204 via the thin film transistor 203. In FIG. 5A, the voltages Vs and Vref may be ground potential.

  In the idle reading drive sequence 504 c, the dark component charge accumulated in the photodiode 202 is always discarded to the signal line 204. In the middle of the idle reading drive sequence 504 c, the radiation switch is pressed by the radiologist, a radiation irradiation command is issued from the radiation source control unit 102 to the radiation source 103, and the radiation source 103 emits the radiation 104. At the same time, the radiation irradiation command is transmitted to the radiation imaging apparatus 105 via the information processing unit 106. Then, the radiation imaging apparatus 105 stops the idle reading drive sequence 504c and drives the wait period sequence 504d. In some cases, the radiation irradiation command is not transmitted to the radiation imaging apparatus 105 and the radiation 104 is irradiated during the idle reading drive sequence 504c. In that case, the radiation imaging apparatus 105 detects the irradiation of the radiation 104, stops the idle reading drive sequence 504c, and drives the wait period sequence 504d.

  Next, the radiation signal 502 becomes high level by the radiation irradiation command, and the radiation source 103 emits the radiation 104. In this period, the radiation imaging apparatus 105 drives the wait period sequence 504d. In the wait period sequence 504d, the drive circuit unit 206 sets the voltages Vg1 to Vgm of the gate electrodes 203a of the pixels 200 in all rows to the off voltage Voff. The common voltage application circuit unit 213 applies the voltage Vs to the common electrode 202b of all the pixels 200. The controller 210 supplies the reference voltage Vref to all the amplifier circuits 207. In addition, the sample hold switch 215 in each column is off, and the output signal of the amplifier circuit 207 in each column is not written to the sample hold capacitor 216 in each column. By irradiating the plurality of pixels 200 with the radiation 104 in a state where the voltages Vg1 to Vgm of the gate electrodes 203a of the pixels 200 in all rows are set to the off voltage Voff, an electric signal corresponding to the radiation 104 is transmitted to the plurality of pixels 200. Respectively. In other words, the radiation 104 is applied to the plurality of pixels 200 during the wait period sequence 504d, whereby electrical signals corresponding to the radiation 104 are accumulated in the plurality of pixels 200, respectively. Here, control for accumulating electrical signals in the plurality of pixels 200 is referred to as accumulation control, and a period during which the accumulation control is performed is referred to as an accumulation period.

  After the irradiation with the radiation 104 is completed, the radiation imaging apparatus 105 drives the main reading drive sequence 504e. In the main reading drive sequence 504e, the control unit 210 performs the same driving as the driving of the main reading driving sequence 504b shown in FIG. As a result, the control unit 210 transfers the electrical signal accumulated in all the pixels 200 to the signal line 204 and reads it out by the signal processing unit 217, and stores the radiation irradiation image irradiated with the radiation 104 in the memory 211. . For example, the information processing unit 106 can obtain an image from which fixed pattern noise is removed by generating a difference image between a radiation irradiation image and a dark image. As described above, the control for reading the electrical signals accumulated from the plurality of pixels 200 according to the radiation 104 is referred to as the main reading control, and the period during which the main reading control is performed is referred to as the main reading period.

  After the end of the main reading drive sequence 504e, the radiation imaging apparatus 105 drives the sleep drive sequence 504f. The sleep driving sequence 504f is driving performed between imaging operations, and performs the same driving as the driving of the sleep driving sequence 504a illustrated in FIG. 6A or 6B. Here, the control unit 210 controls the drive circuit unit 206 to supply a plurality of drive lines 205 with a voltage Voff1 that is a voltage between the off voltage Voff and the on voltage Von and is different from the off voltage Voff and the on voltage Von. Do. This control is referred to as threshold voltage shift suppression control, and a period during which the threshold voltage shift suppression control is performed is referred to as a suppression period. That is, the sleep drive sequence 504f is threshold voltage shift suppression control performed by the control unit 210 in a period different from the accumulation period in which accumulation control is performed and the main reading period in which main reading operation is performed. Driving during this period greatly contributes to suppression of the threshold voltage shift of the thin film transistor 203. Therefore, during this period, it is necessary to suppress the threshold voltage shift of the thin film transistor 203 and provide reliable image data at any time. Therefore, the voltage Voff1 in FIG. 6A or 6B is set to about Vref + Vth, and the voltage of the common electrode 202b of the photodiode 202 is set to Vs or Vs1. FIG. 6A and FIG. 6B show the difference between whether or not the sample hold circuit 214, the multiplexer 208, and the ADC 209 are driven during the driving of the sleep drive sequence 504f. The electrical signal obtained by the driving in FIG. 6B may not be used for actual image generation. The voltage Vs1 is a voltage that is lower than the ground potential and higher than the voltage Vs, and maintains the depletion state. By setting the voltage Voff1 to about Vref + Vth, the threshold voltage shift can be suppressed, and the voltage of the common electrode 202b is set to Vs1, so that the dark component is stable even when the radiation imaging apparatus 105 is suddenly used. It can be used in the state. In addition, since the power supply voltage is supplied to the amplifier circuit 207 and power is consumed, the temperature drift of the amplifier circuit 207 can be stably used. Here, it has been described that the voltage Voff1 should be set to about Vref + Vth. However, in actual driving, the voltage Voff1 may be a value smaller than 0 V and larger than the voltage Vs.

  The state of the sleep drive sequence 504f is maintained, and at the time of the next imaging, the radiation imaging apparatus 105 drives the idle reading drive sequence 504g to reset the excess charge accumulated in the photodiode 202. The idle reading drive sequence 504g is the same drive as the idle reading drive sequence 504c. Note that the fixed pattern noise may be acquired again during the idle reading drive sequence 504g and used as correction data for subsequent imaging.

  Thereafter, the radiation 104 is irradiated with the radiation signal 502, and the radiation imaging apparatus 105 drives the wait period sequence 504h. The wait period sequence 504h is the same drive as the wait period sequence 504d.

  When the irradiation with the radiation 104 is completed, the radiation imaging apparatus 105 drives the main reading drive sequence 504i. The main reading drive sequence 504i is the same drive as the main reading driving sequence 504e. In the main reading drive sequence 504e, the first imaging is performed, and in the main reading driving sequence 504i, the second imaging is performed. The sleep driving sequence 504f is performed between the main reading driving sequences 504e and 504i.

(Second Embodiment)
FIG. 7 is a timing chart showing a driving method (control method) of the radiation imaging system 100 according to the second embodiment of the present invention. The radiation imaging system 100 displays a moving image during a period in which radiation is continuously irradiated. A driving method for photographing is shown. Hereinafter, differences of the present embodiment (FIG. 7) from the first embodiment (FIG. 4) will be described.

  First, when the power supply voltage 503 is applied, the radiation signal 502 is at a low level, and the radiation imaging apparatus 105 drives the sleep drive sequence 701a. The sleep drive sequence 701a is the same drive as the sleep drive sequence 504a in FIG. 4 (FIG. 6A or FIG. 6B).

  Next, the radiation imaging apparatus 105 drives the main reading drive sequence 701b. The main reading driving sequence 701 b is the same driving as the main reading driving sequence 504 b (FIG. 5B) in FIG. 4, and fixed pattern noise (dark image) is written in the memory 211.

  Next, the radiation imaging apparatus 105 drives the idle reading drive sequence 701c. The idle reading drive sequence 701c is the same drive as the idle reading drive sequence 504c of FIG. 4 (FIG. 5A).

  Next, the radiation imaging apparatus 105 drives the wait period sequence 701d. The wait period sequence 701d is the same drive as the wait period sequence 504d in FIG. In the middle of the wait period sequence 701d, the radiation signal 502 becomes high level by the radiation irradiation command, and the radiation source 103 starts irradiation of the radiation 104.

  Thereafter, the radiation imaging apparatus 105 starts driving the main reading drive sequence 701e. The main reading drive sequence 701e is the same driving as the main reading driving sequence 504e in FIG. 4 (FIG. 5B), and the first moving image is captured and written in the memory 211. When the radiation signal 502 becomes low level, the radiation source 103 ends the irradiation of the radiation 104. Then, the radiation imaging apparatus 105 ends the driving of the main reading driving sequence 701e. The accumulation control in the present embodiment is a control performed during a period in which the plurality of pixels 200 in the wait period sequence 701d is irradiated with the radiation 104, and a low-level period of the main reading drive signal 501b in the main reading driving sequence 701e. This corresponds to the control to be performed. The main reading control in the present embodiment corresponds to control in which the main reading driving signal 501b in the main reading driving sequence 701e is performed during a high level pulse period. Here, the description has been given using the form in which the radiation signal 502 is always at the high level during the period of the main reading drive sequence 701e. However, the present embodiment is not limited thereto. It may be a moving image shooting in which radiation is irradiated intermittently such that the radiation signal 502 is at a low level during a period when the actual reading drive signal 501b is at a low level during the period of the actual reading drive sequence 701e.

  Next, the radiation imaging apparatus 105 drives the sleep drive sequence 701f. The sleep drive sequence 701f is the same drive as the sleep drive sequence 504f (FIG. 6A or 6B) of FIG.

  After the sleep driving sequence 701f, as in FIG. 4, the radiation imaging apparatus 105 repeats the idle reading driving sequence 701c, the wait period sequence 701d, and the main reading driving sequence 701e for the second moving image shooting. The second moving image is captured by the main reading drive sequence 701e for the second moving image shooting.

  As described above, also in this embodiment, the sleep drive sequence 701f is performed by the control unit 210 in a period different from the accumulation period in which accumulation control is performed and the main reading period in which the main reading operation is performed. In the present embodiment, a sleep driving sequence 701f is performed between the main reading drive sequence 701e for the first moving image shooting and the main reading driving sequence 701e for the second moving image shooting.

(Third embodiment)
Next, a third embodiment of the present invention will be described with reference to FIGS. 8 (a) and 8 (b). Hereinafter, differences from the driving method of the third embodiment (FIGS. 8A and 8B) shown in the first and second embodiments will be described.

  In the drive when the sleep drive sequence 504a and the sleep drive sequence 504f in the first embodiment are at a high level (FIG. 6A or 6B), the gate electrode 203a of each thin film transistor 203 is always at the voltage Voff1. It was fixed. In the driving when the sleep driving sequence 701a and the sleep driving sequence 701e in the second embodiment are at a high level (FIG. 6A or FIG. 6B), each thin film transistor 203 is always fixed to the Voff1 voltage. It was. On the other hand, the third embodiment is characterized in that an on-voltage Von is also applied as shown in FIG. 8 (a) or FIG. 8 (b) instead of FIG. 6 (a) or FIG. 6 (b). And That is, during this period, not the sleep driving in which the voltage applied to all the gate electrodes 203a is constant, but the idling driving in which the on voltage Von and the off voltage Voff1 are applied. In the present embodiment, this idling drive corresponds to threshold voltage shift suppression control. That is, the threshold voltage shift suppression control is not limited to the control in which only the off voltage Voff1 is supplied, but may be the control in which the off voltage Voff1 and the on voltage Von are alternately supplied to the plurality of drive lines 205. In FIG. 8A, the on-voltage Von is sequentially applied between the time when the off-voltage Voff1 is applied to the gate electrode 203a of the thin film transistor 203. In FIG. 8B, after the ON voltage Von is applied to the gate electrode 203a, the sample hold circuit 214, the multiplexer 208, and the ADC 209 are driven. Note that, in the idling drive sequence 501f shown in FIG. 8B, fixed pattern noise may be acquired again and used as correction data at the time of subsequent imaging.

  According to the first and third embodiments, it is possible to prevent the dark component of the radiation imaging apparatus 105 from being changed during emergency use while reducing the temperature drift of the amplifier circuit 207. Further, the threshold voltage Vth of the thin film transistor 203 can be kept constant, and a stable image can always be generated even in an emergency.

  The above-described embodiments are merely examples of implementation in carrying out the present invention, and the technical scope of the present invention should not be construed in a limited manner. That is, the present invention can be implemented in various forms without departing from the technical idea or the main features thereof.

DESCRIPTION OF SYMBOLS 100 Radiation imaging system, 105 Radiation imaging device, 200 pixels, 202 Photodiode, 203 Thin-film transistor, 204 Signal line, 205 Drive line, 206 Drive circuit part, 210 Control part, 213 Common voltage application circuit part, 217 Signal processing part

Claims (15)

A plurality of pixels each including a conversion element and a transistor, arranged in a matrix and generating an electrical signal in response to radiation;
A plurality of drive lines electrically connected to gates of the transistors of the plurality of pixels;
A drive circuit section for supplying a voltage to the plurality of drive lines in order to drive the plurality of pixels;
A control unit for controlling the drive circuit unit,
The control unit is
Accumulation control for accumulating the electric signals in the plurality of pixels by causing the driving circuit section to supply an off voltage for turning off the transistor to the plurality of driving lines;
A main reading control for reading the electrical signal from the plurality of pixels by sequentially supplying an ON voltage for turning on the transistor to the driving circuit unit to the plurality of driving lines;
A voltage different from the off voltage and the on voltage between the off voltage and the on voltage is applied to the drive circuit unit in a period different from the period for performing the accumulation control and the period for performing the main reading control. A radiation imaging apparatus that performs control to be supplied to a plurality of drive lines.   In the another period, the control unit supplies the drive circuit unit with a voltage that is between the off voltage and the threshold voltage of the transistor and is different from the off voltage and the threshold voltage to the plurality of drive lines. The radiation imaging apparatus according to claim 1, wherein:   The radiation imaging apparatus according to claim 2, wherein the control unit causes the drive circuit unit to alternately supply the different voltage and the on-voltage to the plurality of drive lines in the another period. The conversion element includes a first terminal and a second terminal,
One of a source and a drain of the transistor is electrically connected to the second terminal, and the other is electrically connected to one of a plurality of signal lines. Item 4. The radiation imaging apparatus according to Item 2 or 3. The conversion element includes a scintillator that converts radiation into light and a photodiode that converts the light into electric charge,
A first terminal of the conversion element is an anode of the photodiode;
A second terminal of the conversion element is a cathode of the photodiode;
The radiation imaging apparatus according to claim 4, wherein the transistor is an N-type thin film transistor including an N-type semiconductor layer.   The radiation imaging apparatus according to claim 5, further comprising a common voltage application unit that applies the same voltage to the first terminals of the conversion elements of the plurality of pixels. In the period of performing the main reading control, the common voltage application unit applies a first voltage,
The radiation imaging apparatus according to claim 6, wherein the common voltage application unit applies a second voltage different from the first voltage in the another period.   The radiation imaging apparatus according to claim 7, wherein an absolute value of the second voltage is smaller than an absolute value of the first voltage. The first voltage and the second voltage are negative voltages;
The radiation imaging apparatus according to claim 7, wherein the second voltage is higher than the first voltage. And a signal processing unit electrically connected to the plurality of signal lines,
10. The radiation imaging apparatus according to claim 4, wherein a power supply voltage is applied to the signal processing unit during a period in which the control unit performs the main reading control and the other period. . The signal processing unit includes a plurality of amplifier circuits,
Each of the plurality of amplifier circuits includes a differential amplifier that inputs a voltage and a reference voltage of a corresponding one of the plurality of signal lines,
11. The control unit according to claim 10, wherein the control unit causes the drive circuit unit to supply the drive line with a voltage that is substantially the same as a voltage obtained by adding the threshold voltage of the transistor and the reference voltage. Radiation imaging device. The signal processing unit further includes a plurality of sample and hold circuits that respectively write output signals of the plurality of amplifier circuits to a plurality of sample and hold capacitors,
In the period of performing the main reading control, the plurality of sample and hold circuits respectively write the output signals of the plurality of amplifier circuits to the plurality of sample and hold capacitors,
12. The control unit according to claim 11, wherein the control unit controls the plurality of sample and hold circuits not to write output signals of the plurality of amplifier circuits to the plurality of sample and hold capacitors, respectively, during the another period. Radiation imaging device. The signal processing unit further includes a plurality of sample and hold circuits that respectively write output signals of the plurality of amplifier circuits to a plurality of sample and hold capacitors,
In the period for performing the main reading control and the other period, the control unit controls the plurality of sample and hold circuits to write output signals of the plurality of amplifier circuits to the plurality of sample and hold capacitors, respectively. The radiation imaging apparatus according to claim 11. The radiation imaging apparatus according to any one of claims 1 to 13,
A radiation imaging system comprising: a radiation source for irradiating radiation. A plurality of pixels each including a conversion element and a transistor, arranged in a matrix and generating an electrical signal in response to radiation;
A plurality of drive lines electrically connected to gates of the transistors of the plurality of pixels;
A drive circuit section for supplying a voltage to the plurality of drive lines in order to drive the plurality of pixels;
A method of controlling a radiation imaging apparatus comprising:
Accumulation control for accumulating the electrical signals in the plurality of pixels by causing the driving circuit section to supply an off voltage for turning off the transistor to the plurality of driving lines;
A main reading control for reading the electrical signal from the plurality of pixels by sequentially supplying an ON voltage for turning on the transistor to the driving circuit unit to the plurality of driving lines;
In a period different from the period for performing the accumulation control and the period for performing the main reading control, a voltage that is between the off voltage and the on voltage and different from the off voltage and the on voltage is applied to the drive circuit unit. Control to supply the plurality of drive lines;
A control method for a radiation imaging apparatus.

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