JP2016208341A - Communication system - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a communication system capable of frequency offset compensation by accurately estimating frequency offset even for a cable transmission path with large delay power and noise power.SOLUTION: A transmission side of a digital power line carrier system modulates a code string with 2bits obtained by adding 1 bit to a PN code with 2-1 bits by 4PSK and transmits the resultant code string. A communication device at a reception side of the system demodulates a received symbol pattern by 4PSK with a demodulator 21, and a complex autocorrelation calculation unit 24 calculates a complex autocorrelation value at 2/2-symbol intervals. A phase rotation amount calculation circuit 26 calculates an averaged phase rotation amount from the complex autocorrelation value.SELECTED DRAWING: Figure 2

Description

  The present invention relates to a communication system using a power transmission line, and more specifically to a communication system applicable to communication by digital power line carrier using a power transmission line.

In a digital communication system using a metal cable as a transmission line, the frequency between the carrier wave of the transmission device and the demodulation carrier wave of the reception device due to variations in the accuracy of the crystal oscillators mounted on the transmission device and the reception device. An offset occurs, which is a factor that deteriorates characteristics such as a bit error rate.
The frequency offset is an error that occurs due to variations in the manufacturing accuracy of the frequency of the crystal oscillators mounted on the communication device on the transmission side and the reception side, and an error of about ± 30 ppm at maximum occurs in transmission and reception. This error causes a phase rotation in the output of the demodulator of the communication device on the receiving side, the adaptive equalizer cannot operate normally, and deteriorates characteristics such as bit error rate. For this reason, the structure which correct | amends the frequency offset which arises between transmission / reception is provided.

FIG. 5 is a diagram showing an example of a conventional frequency offset correction circuit, showing a configuration in which a circuit for compensating the frequency offset by feedback controlling the frequency offset amount is provided in the demodulation carrier PLL circuit. is there.
In the frequency offset correction circuit 100, the received signal digitally converted by the A / D converter in the receiving communication apparatus is demodulated by the demodulator 101, the transmission path distortion is corrected by the adaptive equalizer 102, and decoded. The signal is decoded by the circuit 103 and output to the error correction unit. Then, the phase difference between the input symbol phase of the adaptive equalizer 102 and the symbol phase determined by the decoding circuit 103 is calculated by the phase correction amount calculation circuit 104, and the oscillation frequency of the PLL circuit 105 is adjusted according to the calculated amount. The voltage is controlled and the phase of the carrier frequency of the demodulator 101 is adjusted.

  For example, Patent Document 1 discloses a frequency offset compensation circuit having the configuration shown in FIG. The frequency offset compensation circuit 110 delay-detects the received baseband signal input from the demodulator by the delay detection circuit 111 and outputs the delay detection signal to the correlation circuit 112. The training signal generator 117 generates a known training signal in advance on the receiving side. The differential encoding circuit 116 generates a differential code sequence based on the training signal, and the transversal filter 115 generates a differential code sequence including a delay component. The transversal filter 115 is provided with a weighting circuit, and adjusts the magnitude of the output signal of each delay element. This weighting circuit is adaptively adjusted according to the state of the transmission line using an LMS algorithm or an RLS algorithm.

  Correlation circuit 112 performs correlation detection using the delayed detection signal output from delay detection circuit 111 and the differential code sequence output from transversal filter 115. The frequency offset estimation circuit 113 outputs a frequency offset estimation value from the output from the correlation circuit 112. The complex multiplier 114 receives the received baseband signal and the frequency offset estimation value, performs complex multiplication, compensates the frequency offset, and outputs the result to the adaptive equalizer.

  Patent Document 2 describes a frequency offset compensation circuit in which the training signal generator provided on the receiving apparatus side as described above is omitted.

JP 7-66842 A Japanese Patent Laid-Open No. 2004-200939

  In the conventional frequency offset correction circuit shown in FIG. 5, the circuit configuration for adjusting the phase of the received signal is a feedback system. Therefore, the transmission path is a system that generates large delay power, or noise power. If the system is large, slip occurs in the phase control, and a bursty bit error occurs. In other words, when this compensation circuit is applied to a digital communication system that uses a transmission line in the transmission line, a large error occurs in the calculation of the frequency offset correction amount due to the influence of a delayed wave with a strong signal strength generated in the transmission line, There has been a problem that an accurate offset correction amount cannot be estimated.

The frequency offset correction circuit shown in FIG. 6 solves such a problem. In the case of this type of frequency offset compensation circuit, a training signal generator 117 that generates a training signal that becomes a known signal is required. That is, in this compensation circuit, since the receiving device is provided with the training signal generator, there is a problem that it takes time to synchronize the code pattern of the training signal of the transmitting device.
Further, the transversal filter 115 for utilizing the delayed wave is required, and an algorithm such as LMS for operating the transversal filter 115 needs to be implemented.
In addition, this method is an effective circuit method for non-minimum phase systems (systems in which delayed wave power is greater than direct wave power), but minimum phase systems (direct wave power is always greater than delayed wave power). The (large) transmission line has a large circuit configuration, which is equivalent to the need for two adaptive equalizers.

  Patent Document 2 describes a frequency offset compensation circuit in which the training signal generator of the receiving apparatus is omitted as described above. However, this compensation circuit does not consider phase rotation correction due to a delayed wave component having a strong signal strength generated in the transmission line. Therefore, when applied to the transmission line, an error occurs in the offset correction amount, and a correct demodulated signal is not generated. Problems arise.

  The present invention has been made in view of the above circumstances, and it is not necessary to generate a training signal in a receiving-side circuit that performs offset correction, and the frequency offset can be increased even in a wired transmission line with large delay power and noise power. It is an object of the present invention to provide a communication system that enables frequency offset compensation by estimating the accuracy.

The present inventor has intensively studied to solve the above-mentioned problem. As a result, the training code used for estimating the frequency offset is 1 in the 2 ⁿ −1 bit PN code used in a communication system such as a mobile phone. It was found that 4PSK modulation is performed with 2 ⁿ even number of bits added. Thus, for 4PSK modulation symbol point in the same 4PSK in 2 ⁿ / 2 of repetition is always generated, the correlation of the symbol between the 2 ⁿ / 2 becomes possible to 1, training recipient There is no need to provide a signal generator. Further, since the 4PSK symbol points at intervals of 2 ⁿ / 2 are always the same, the amount of convolution of the delayed waves is also the same, and the correlation of the delayed waves at intervals of 2 ⁿ / 2 can be set to 1. As a result, it has been found that the frequency offset can be estimated and corrected with high accuracy even on a transmission line in which a large delay wave exists by estimating the frequency offset using symbols of 2 ⁿ / 2 intervals. Has been reached.

A communication system according to the present invention performs transmission offset communication apparatus for transmitting a training pattern for compensating for frequency offset between communication apparatuses during training for starting communication, and performs frequency offset compensation by receiving the training pattern. a receiving-side communication device is a communication system connected through a wired transmission path, the communication apparatus of the transmitting side, the 2 ⁿ bits obtained by adding 1 bit to 2 ⁿ -1 bit PN code code sequence A 2 ⁿ code generation unit that generates a signal, a modulator that performs 4PSK modulation on the 2 ⁿ -bit code string and converts it into a symbol pattern, and a transmission unit that transmits the symbol pattern output from the modulator as the training pattern A demodulator that demodulates a symbol pattern transmitted from the transmission-side communication device using 4PSK. Samples the symbol pattern the demodulator is demodulated by 2 ⁿ / 2-symbol interval, a complex autocorrelation calculating unit for calculating a complex autocorrelation value between two symbols, from the calculation results of the complex-autocorrelation calculating unit, A phase rotation amount calculation unit that calculates an averaged phase rotation amount. As a result, a communication system that enables frequency offset compensation by accurately estimating a frequency offset even in a wired transmission line having a large delay power and noise power without generating a training signal in a circuit on the receiving side that performs offset correction Can be provided.

Furthermore, in the communication system according to the present invention, the transmission-side communication device generates a 2 ^m −1 code generation unit that generates a code sequence using a 2 ^m −1 bit PN code, the 2 ⁿ bit code sequence, and the 2 ^m A switching unit that switches and outputs a code sequence of −1, and the demodulator performs 4PSK modulation on the code sequence of 2 ⁿ bits or the code sequence of 2 ^m −1 switched by the switching unit. The reception side communication apparatus inputs the complex autocorrelation value output from the complex autocorrelation calculation unit, and the input complex autocorrelation value is 1 when the correlation is positive and when the inverse correlation is −1, a shift register that includes an offset estimation PN code determination unit including a code conversion unit that converts a value other than positive correlation or inverse correlation to 0, and inputs n symbols converted by the code conversion unit; Tap of the shift register An adder that calculates the sum of output values; and a threshold determination circuit that monitors the output of the adder, the threshold determination circuit outputting an output value of the adder when 1 is always input as a complex autocorrelation value When the threshold value a is set for n and the output from the adder falls below na, the symbol pattern transmitted from the transmitter is 2 ^m −1 from the symbol pattern of the 2 ⁿ code string. It is a communication system which outputs the determination result which determines having switched to the symbol pattern by a code sequence. As a result, even if the frequency offset is compensated based on the training pattern transmitted from the transmitting side without generating the training pattern on the receiving side, the training pattern is switched from the transmitted training pattern. It will be possible to easily determine.

  According to the present invention, it is not necessary to generate a training signal in a receiving-side circuit that performs offset correction, and it is possible to accurately estimate a frequency offset even in a wired transmission line with a large delay power and noise power and to perform frequency offset compensation. A communication system can be provided.

It is a block diagram for demonstrating the transmission side circuit structure of the digital power line carrier system which concerns on this invention. It is a block diagram for demonstrating the receiving side circuit structure of the digital power line carrier system which concerns on this invention. It is a figure which shows the complex plane which shows the symbol arrangement | positioning in 4PSK modulation. It is a figure which shows the structural example of the PN code completion | finish determination circuit for offset estimation shown in FIG. It is a figure which shows an example of the correction circuit of the conventional frequency offset. It is a figure which shows the other example of the correction circuit of the conventional frequency offset.

Embodiments according to the present invention will be specifically described below.
FIG. 1 is a block diagram for explaining a transmission circuit configuration of a communication apparatus in a communication system according to the present invention. In a communication system, a communication device on the transmission side that transmits a training pattern for compensating for a frequency offset between communication devices during training when starting communication, and a communication on the reception side that receives the training pattern and performs frequency offset compensation The device is connected via a wired transmission path. FIG. 1 shows a circuit configuration of a transmission-side communication apparatus that transmits a training pattern during training.

The communication apparatus on the transmission side includes a frequency offset estimation PN generator 11 that generates a 2 ⁿ −1 bit PN (Pseudorandom Noise) code sequence (2 ⁿ −1 code sequence), which is a frequency offset estimation training pattern; An adaptive equalizer training PN generator 12 that generates a 2 ^m -1 bit PN code string (2 ^m -1 code string), which is a training pattern for the adaptive equalizer, is mounted.

One bit of “0” generated by the bit generation unit 14 is added to the 2 ⁿ −1 code sequence generated by the frequency offset estimation PN generator 11 by the bit addition unit 15, and a 2 ⁿ bit code is generated. It becomes a sequence (2 ⁿ code sequence). The 2 ⁿ code string is used to estimate the frequency offset in the communication device on the receiving side. The frequency offset estimation PN generator 11 and the bit addition unit 15 correspond to the 2 ⁿ code generation unit of the present invention, and the adaptive equalizer training PN generator 12 corresponds to the 2 ^m −1 code generation unit of the present invention. Applicable.
The 2 ⁿ code sequence and 2 ^m −1 code sequence generated by each PN generator are switched by a switch 16 which is a switching unit and output to the modulator 13. In this case, ^{n of} the 2 ⁿ code string is about 6 to 8, and ^{m of} the 2 ^m −1 code string is about 11 to 13.

When initial training is started in the transmission side communication device, a 2 ⁿ code string generated by the frequency offset estimation PN generator 11 and having 1 bit added thereto is input to the modulator 13. Here, the modulator 13 operates as a 4PSK (4 Phase-Shift Keying) modulator, 4PSK-modulates a 2 ⁿ code string, which is a training pattern for frequency offset estimation, and outputs it to the RF circuit. When a predetermined time t has elapsed from the start of the initial training, the 2 ^m -1 code sequence generated by the adaptive equalizer training PN generator 12 is switched to the 2 ^m -1 code sequence. Input to the modulator 13. Also in this case, the modulator 13 operates as a 4PSK modulator, and 4PSK modulates the input 2 ^m -1 code string.

The modulator 13 converts a 2-bit code into one symbol by 4PSK modulation, and outputs a 2 ⁿ / 2 symbol pattern and a 2 ^m / 2 symbol pattern for a set time.
After the end of the training, the modulator 13 is switched from the 4PSK modulator to a 2 ⁿ QAM (Quadrature Amplitude Modulation) modulator, and the input data signal sequence is modulated.
The code string signal output from the modulator 13 is frequency-converted by the RF circuit and transmitted to the communication device on the receiving side. The RF circuit constitutes the transmission unit of the present invention.

FIG. 2 is a block diagram for explaining a receiving circuit configuration of a communication apparatus in the communication system according to the present invention. In a communication device on the receiving side that receives a training pattern in a communication system, a demodulator that operates as a 4PSK demodulator when the RF circuit receives a training pattern for frequency offset estimation using a 2 ⁿ code string transmitted from the communication device on the transmission side 21 demodulates the symbol pattern of the 2 ⁿ code string.

The complex autocorrelation calculation circuit (complex autocorrelation calculation unit) 24 then r (n−2) delayed by 2 ⁿ / 2 symbols by the current symbol point r (n) and the (2 ⁿ / 2) symbol delay circuit 28. ⁿ / 2) is sampled from the symbol pattern, and the autocorrelation between the two symbols is obtained. Here, since the same 4PSK symbol point is generated from the transmission side in a 2 ⁿ / 2 cycle by the PN code, r (n) and r (n−2 ⁿ / 2) are autocorrelations r ( n) · r ^* (n−2 ⁿ / 2) always indicates a value of 1 when there is no frequency offset because the phase rotation is 0 °. The above ^* indicates a conjugate complex number.

Here, ^{assuming that} the transmission channel time-varying characteristics between r (n) and r (n−2 ⁿ / 2) do not change, the convolution amount due to the delay wave in the transmission line is the same, and the correlation of the delay wave Can also be 1. As a result, the influence of the delayed wave can be removed, and the influence of the noise is also removed by a random averaging process, and an autocorrelation value indicating only the frequency offset element is obtained. This theory will be described in detail later.

  The 45 ° phase rotation circuit (phase rotation unit) 25 rotates the complex autocorrelation value output from the complex autocorrelation calculation circuit 24 by 45 °. As a result, the coordinates of the complex autocorrelation values are converted into symbol arrangement positions on the complex plane shown in FIG. Here, by rotating the 45 ° phase, the symbol point is in four quadrants ([++], [+ −], [−−], [− +]) of the complex plane composed of the real part and the imaginary part. It will always be placed in either.

In the real part / imaginary part polarity detection circuit (real part / imaginary part polarity detection unit) 29, the symbol point rotated by 45 ° has four quadrants ([++], [+ −], [−−]) of the complex plane. , [− +]).
For example, in the complex plane of FIG. 3, when the symbol point is a (0.707 + j0.707), [++] (the real part and the imaginary part are [+]) is detected. Similarly, at symbol point b (−0.707 + j0.707), [− +] (the real part is [−] and the imaginary part is [+]) is detected. In addition, at the symbol point c (−0.707−j0.707), [−−] (the real part and the imaginary part are [−]) is detected. At the symbol point d (0.707−j0.707), [+ −] (the real part is [+] and the imaginary part is [−]) is detected.

The transmission symbol deviation estimation circuit (transmission symbol deviation estimation unit) 30 calculates the phase deviation (phase rotation amount) according to the polarities (signs) of the real part and the imaginary part detected by the real part / imaginary part polarity detection circuit 29. presume. Here, when the real part and the imaginary part detected by the real part / imaginary part polarity detection circuit 29 are [++], the transmitted current symbol s (n) and the symbol s (n− ²ⁿ / 2) before are transmitted. ²ⁿ / 2) means that the same symbol has been transmitted, and the transmission symbol shift estimation circuit 30 can estimate the phase rotation amount to be 0 °.
Similarly, when the real part and the imaginary part are [− +], the phase rotation amount can be estimated to be 90 °, and when the real part and the imaginary part are [−−], the phase rotation amount is 180 °. When the real part and the imaginary part are [+ −], the phase rotation amount can be estimated to be 270 °.

The transmission symbol shift estimation circuit 30 outputs one of the values 1, j, −1, and −j according to the estimated amount of phase rotation. Here, when the symbol point detected by the real part / imaginary part polarity detection circuit 29 is in the [++] quadrant, that is, when the phase rotation is estimated to be 0 °, 1 is output.
When the symbol point is in the [− +] quadrant, that is, when the phase rotation is estimated to be 90 °, −j is output, and when the symbol point is in the [−−] quadrant, that is, the phase rotation is 180. When the angle is estimated to be °, −1 is output, and when the symbol point is in the [+ −] quadrant, that is, when the phase rotation is estimated to be 270 °, −j is output.

Since the autocorrelation of the transmitted symbol is represented by s (n) · s ^* (n−2 ⁿ / 2), 2 ⁿ / 2 symbols that have been subjected to 4PSK modulation are used as a frequency offset estimation training pattern by this method. In the case of transmission, the complex autocorrelation value rotated by 45 ° is always [++], and a value of 1 is obtained as the complex autocorrelation value. This theory will be described more specifically below.

The autocorrelation value calculated by the complex autocorrelation calculation circuit 24 is calculated in the presence of a frequency offset. When there is a frequency offset, for example, in order to determine that the autocorrelation value at intervals of 64 symbols (n = 7 in 2 ⁿ / 2 symbols) is always in the “++” quadrant, the phase is rotated by 45 °. The frequency offset must fall within the range of ± 45 °.

Here, since the error of the crystal oscillator is specified to be ± 30 ppm or less, no further error is shown. Since the maximum frequency used for communication in the communication system is 425 kHz, the frequency offset amount when there is an error of ± 30 ppm is about ± 13 Hz, and the rotation amount at this time is a symbol rate of 64 QAM of 32 kbps (31.25 μs). ) Then:
Rotation amount ≒ 360 x freq.offset x Ts
≒ 360 × 13Hz × 31.25 × 10-6
≒ ± 0.146 °

Thus, between 64 symbols, ± 0.146 × 64≈ ± 9.36 °, which does not exceed ± 45 °. Therefore, when the 2 ⁿ code string at the time of training is received, when the autocorrelation value is rotated by 45 °, it always enters the [++] quadrant of the complex plane, and the transmission symbol shift estimation circuit 30 Then, the phase rotation is estimated to be 0 °, and 1 is always output. That is, when the 2 ⁿ / 2 symbols 4PSK modulated as a training pattern for frequency offset estimation is transmitted, it is possible to always output 1 from the transmission symbol shift estimation circuit 30.
If there is a concern that the phase rotation will exceed ± 45 °, the transmission symbol shift estimation circuit 30 can ensure that the sampling symbol interval is as short as 32 symbols or 16 symbols. 1 can be output.

  The phase rotation amount calculation circuit (phase rotation amount calculation unit) 26 calculates the phase rotation amount due to the frequency offset by the following equation (1).

In the above equation (1), the denominator is the amount of phase rotation in the symbol interval (2 ⁿ / 2) estimated as transmitted on the transmission side, and the output output from the transmission symbol shift estimation circuit 30 Use the value. In addition, the numerator of formula (1) is the amount of phase rotation between symbols actually received via the transmission path.
Here, since the 2 ⁿ / 2 symbol pattern is transmitted as the frequency offset estimation training pattern as described above, 1 is output from the transmission symbol shift estimation circuit 30, so that the equation (1) The denominator is always 1, and the amount of phase rotation between 2 ⁿ / 2 symbols received via the transmission path is calculated as Δr. This phase rotation amount is an averaged phase rotation amount due to a frequency offset from which the cause of the delay wave and noise is removed.

The forgetting factor averaging circuit 27 uses the following equation (2) to average Δr (n) for each symbol.
R (n) = βR (n-1) + (1-β) ΔR (n) (2)
Here, β is a forgetting factor having a value of about 0.998.

In the ATA calculation circuit 32, the Atan (Arctangent) calculation is performed by the real part and the imaginary part of R (n) obtained by the forgetting factor averaging circuit 27, and the rotation angle of one symbol is obtained by dividing by 2 ⁿ / 2. Δθ (n) is obtained.

  The second complex multiplier 33 and the 1-symbol delay circuit 34 calculate the phase correction amount Δφ (k) of the k-th symbol of the demodulator 21 operating as a 4PSK demodulator from the average phase rotation angle Δθ (n) of 1 symbol. Is calculated, the process shown in the following equation (3) is performed.

e ^−j Δφ ^(k) = e ^{−j (} Δφ ^{(k−1) +} Δθ ⁽ⁿ⁾⁾ (3)

The first complex multiplier 22 estimates the k th symbol from the phase e ^{j (} ω ^{t +} φ ^(k)) of the k th symbol of the baseband signal output from the demodulator 21 operating as a 4PSK demodulator. In order to correct the phase correction amount Δφ _(k) , the processing shown in the following equation (4) is performed, and finally the frequency offset is corrected.

e ^j ω ^t = e ^{j (} ω ^{t +} φ ^(k) -Δφ ^(k)) (4)

  FIG. 4 is a diagram illustrating a configuration example of the offset estimation PN code end determination circuit 31 illustrated in FIG. 3. In the offset estimation PN code end determination circuit 31, the code conversion circuit 311 converts the output value (+1, j, −1, −j) from the transmission symbol shift estimation circuit 30 to 1 when the correlation is +1. When the inverse correlation is (−1), it is converted to −1, the other values are converted to 0, and n symbols are input to the shift register 312. The shift register 312 inputs the tap output value to the adder 313. The adder 313 receives a value of 1, −1, or 0 corresponding to the number of taps T + 1 of the shift register 312, and the output of the adder 313 is the sum of the input ones. The maximum output value is T + 1. Therefore, in this case, since all the n symbols input to the shift register are 1 in the time domain in which the frequency offset estimation training pattern is transmitted, the output value of the adder 313 always indicates the n value. .

However, when the transmission apparatus on the transmission side shifts from the frequency offset estimation training pattern to the adaptive equalizer training pattern, the 2 ^m -1 code sequence does not always have a correlation of 1 at 2 ⁿ / 2 symbol intervals. As for the output from the transmission symbol deviation estimation circuit 30, the values +1, j, -1, and -j are output at random. Alternatively, the initial value of the shift register (m stage) of the PN generator 12 is set to a code that is opposite in sign to the 1st to m-th bit strings generated by the PN generator 11, thereby transmitting the transmission symbol shift. As for the output from the estimation circuit 30, −1 is m / 2 symbols continuously output. In this case, +1, −1, and 0 are input to the shift register 312 randomly or continuously, and the output value from the adder 313 is not an n value.
In the threshold determination circuit 314, the threshold value of (na) is set to the output value of the adder 313, so that when the value becomes (na) or less, the adaptive equalizer training pattern has been switched. Can be determined.
As a result, even if the frequency offset is compensated based on the training pattern transmitted from the transmitting side without generating the training pattern on the receiving side, the training pattern is switched from the transmitted training pattern. It will be possible to easily determine.

When the determination result of the threshold value determination circuit 314 is input to the signal output control circuit 23 shown in FIG. 2, the signal output control circuit 23 cancels the signal output suppression to the adaptive equalizer so far and performs adaptive equalization. Outputs a signal to the instrument. As a result, an adaptive equalizer training pattern is output to the adaptive equalizer, and training in the adaptive equalizer is started.
Further, the determination result of the threshold value determination circuit 314 in the offset estimation PN code end determination circuit 31 is also output to the ATRAN calculation circuit 32 at the same time, and the averaging process is terminated after elapse of time t symbols, and the rotation angle of one symbol is changed to Δθ. The previous value is fixed at (t−M + 1). M is the number of registers of the shift register 312.

After the training is completed, the demodulator 21 is switched from the 4PSK demodulator to 2 ⁿ QAM demodulation, and the data signal sequence is demodulated.

Next, a description will be given of the theory that, with the above configuration, the phase rotation amount can be derived by the frequency offset from which the influence of the delay wave and noise is removed on the receiving side.
As described above, the training pattern for frequency offset estimation uses a 2n code string in which 1 bit is added to a 2 ⁿ -1 bit PN code string. Here, for example, it is assumed that n = 7.

In this case, 4PSK modulation is performed using a 128-bit repetitive pattern in which 1 bit (0) is added to PN7 (2 ⁷ -1) as a training pattern for frequency offset estimation. For this reason, a symbol becomes a repetition of 64 symbols as follows.
S ₀ , S ₁ , S ₂ ... S ₆₄ , S ₀ , S ₁ , S _2.
On the other hand, since the rotation amount Δφ of one symbol is added due to the frequency offset, the symbol can be expressed as follows when the initial phase is φ.
_{^{S 0 e j φ, S 1}} e j (φ + Δφ), S 2 e j (φ +2 Δφ), ··· S 64 e j (φ +64 Δφ), ···

If the received signal is r (n), the received signal 64 symbols before is r _(n-64) . Therefore, the autocorrelation with the symbol before 64 symbols is given by the following equation (5) where W _(n) is the noise. In this case, the influence of the delayed wave is not considered.
r _(n) r ^* _(n-64) = (S _{(n) mod64} · S ^* _{(n-64) mod64} ) × e ^j64 Δφ + w _(n) (5)

  Therefore, Δr (n) at intervals of 64 symbols is given by the following equation (6).

When the delayed wave is present, the delay wave in the above equation _{(6) a (n) e} j φ (n), joined by ^{_{a (n-64) e j}} φ (n-64), the following equation ( 7).
r _(n) r ^* _(n-64) = (S _{(n) mod64} · S ^* _{(n-64) mod64} ) × (e ^j64 Δφ · a _(n) a _(n-64) e ^{j (} φ ^{(n )} -φ ^(n-64) ) + w _(n) w ^* _(n-64) (7)

Accordingly, the phase rotation amount Δr (n) at intervals of 64 symbols in the presence of a delayed wave is given by the following equation (8).

  For this reason, the rotation amount due to the frequency offset and the rotation amount of the phase due to the delayed wave are added to the phase rotation amount. here,

It is. x [k] is the k-th symbol signal, h [n−k] is the impulse response of the transmission line, and M impulse responses.
Therefore, it can be seen that in Equation (8), φi _(a) and φi _(n−64) may be set to the same rotation amount in order to eliminate the influence of the phase rotation due to the delayed wave. Accordingly, as shown in equations (9) and (10), if a sequence in which the symbol signals of k = −1 to M are the same in x [k] and x [k−64] is used, The amount of convolution at intervals of 64 symbols is always the same, and φi _(n) and φi _(n-64) can be defined to have the same amplitude and the same amount of rotation.
That is, as described above, by performing 4PSK modulation with a signal sequence in which 1 bit (0) is added to PN7 (27-1), the influence of phase rotation due to a delayed wave can be removed.
Therefore, the expression (8) is removed from the influence of the rotation amount of the delayed wave, and becomes the following expression (11).

Furthermore, since the offset estimation training pattern has a period of 64 symbols, the same symbol point is generated in S _(n) and S _(n-64) , and therefore the denominator of Equation (11) always shows a value of 1. It will be. That is, when the phase rotation is 0 °, S _{(n) mod64} · S ^* _{(n−64) mod64} is always 1 as follows.
(0.707 + j0.707) (0.707-j0.707) = 1
(0.707-j0.707) (0.707 + j0.707) = 1
(−0.707 + j0.707) (− 0.707−j0.707) = 1
(−0.707−j0.707) (− 0.707 + j0.707) = 1
Therefore, by obtaining the autocorrelation r _(n) r ^* _(n−64) in Expression (11), the phase rotation amount due to the frequency offset can be calculated. Furthermore, the average value of random noise becomes zero by the averaging process, and the equation (12) is expressed by the equation (12).

Here, A _(n) = a _(n) a _(n-64) .

DESCRIPTION OF SYMBOLS 11 ... PN generator for frequency offset estimation, 12 ... PN generator for adaptive equalizer training, 13 ... Modulator, 14 ... Bit generation part, 15 ... Bit addition part, 16 ... Switch, 21 ... Demodulator, 22 ... 1st complex multiplier, 23 ... signal output control circuit, 24 ... complex autocorrelation calculation circuit, 25 ... 45 ° phase rotation circuit, 26 ... phase rotation amount calculation circuit, 27 ... forgetting factor averaging circuit, 28 ... (2n / 2) Symbol delay circuit, 29... Real part / imaginary part polarity detection circuit, 30... Transmission symbol shift estimation circuit, 31... PN code end determination circuit for offset estimation, 32. 34 ... 1 symbol delay circuit, 100 ... correction circuit, 101 ... demodulator, 102 ... adaptive equalizer, 103 ... decoding circuit, 104 ... phase correction amount calculation circuit, 105 ... PLL circuit, 110 ... frequency Offset compensation circuit 111... Delay detection circuit 112 112 correlation circuit 113 frequency offset estimation circuit 114 complex multiplier 115 transversal filter 116 differential encoding circuit 117 training signal generator 311 ... Sign conversion circuit, 312... Shift register, 313... Adder, 314.

Claims (2)

A transmission-side communication device that transmits a training pattern for compensating a frequency offset between communication devices during training when starting communication, and a reception-side communication device that receives the training pattern and performs frequency offset compensation A communication system connected via a wired transmission path,
The transmission-side communication device includes a 2 ⁿ code generation unit that generates a 2 ⁿ bit code string obtained by adding 1 bit to a 2 ⁿ −1 bit PN code, and 4PSK modulates the 2 ⁿ bit code string A modulator for converting into a symbol pattern, and a transmitter for transmitting the symbol pattern output from the modulator as the training pattern,
The receiving communication apparatus demodulates the symbol pattern transmitted from the transmitting communication apparatus with 4PSK, and samples the symbol pattern demodulated by the demodulator at 2 ⁿ / 2 symbol intervals. A complex autocorrelation calculation unit that calculates a complex autocorrelation value between symbols, and a phase rotation amount calculation unit that calculates an averaged phase rotation amount from a calculation result of the complex autocorrelation calculation unit. Communications system. The communication system according to claim 1,
The transmission-side communication device switches a 2 ^m -1 code generation unit that generates a code sequence using a 2 ^m -1 bit PN code, and switches between the 2 ⁿ bit code sequence and the 2 ^m -1 code sequence. A demodulator that outputs a symbol pattern by performing 4PSK modulation on the 2 ⁿ -bit code sequence or the 2 ^m -1 code sequence switched by the switching unit,
The communication device on the receiving side is
Input the complex autocorrelation value output from the complex autocorrelation calculation unit,
1 is input when the input complex autocorrelation value is positive correlation, -1 is input when inverse correlation is performed, and a code conversion unit that converts a value other than positive correlation or non-correlation to 0 and n symbols converted by the code conversion unit are input. A shift register, an adder that calculates the sum of the tap output values of the shift register, and a threshold determination circuit that monitors the output of the adder, and an offset estimation PN code determination unit,
The threshold value determination circuit sets a threshold value a for the output value n of the adder when 1 is always inputted as a complex autocorrelation value, and the output from the adder falls below na. A communication system that outputs a determination result for determining that a symbol pattern transmitted from the transmission device has been switched from a symbol pattern based on the 2 ⁿ code sequence to a symbol pattern based on the 2 ^m −1 code sequence.

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