JP2016195148A - Method of manufacturing ultraviolet light emission element - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a method of manufacturing an ultraviolet light emission element that can form an n-electrode having low contact resistance on an AlGaN layer exposed by dry etching.SOLUTION: A method of manufacturing an ultraviolet light emission element comprises a pattern forming step of forming a resist pattern 30 on the upper surface of a group III nitride semiconductor laminated portion 20 including an n-type AlGaN layer 21 laminated on an aluminum nitride substrate 10, a dry etching step of performing dry etching in plasma with chloride gas by using a resist pattern 30 as a mask to etch the group III nitride semiconductor laminated portion 20 until the n-type AlGaN layer 21 is exposed, thereby forming a mesa portion 50, and an electrode forming step of forming electrode layers 41 and 42 on parts of the upper surface of the mesa portion 50 and the exposed upper surface of the n-type AlGaN layer 21. In the etching step, the etching is performed under the condition that the antenna power/bias power, which is the ratio of the antenna power and the bias power, ranges from not less than 3.5 to not more than 6.0.SELECTED DRAWING: Figure 1

Description

  The present invention relates to a method for manufacturing an ultraviolet light emitting element.

  The ultraviolet light source has various application fields such as illumination, display, fluorescence analysis, photocatalytic chemistry, and high-resolution optical equipment. Nitride semiconductors are known as light-emitting elements for ultraviolet light sources, especially aluminum nitride gallium (AlGaN), which is a direct-transition wide-gap nitride semiconductor that can emit light in the deep ultraviolet region with a wavelength of 200 nm to 350 nm. Gathered. In order to obtain a diode structure type light emitting element, it is necessary to connect an anode electrode to the p-type layer and a cathode electrode to the n-type layer, respectively.

Patent Document 1 describes an n-type contact electrode formed on an n-type doped AlGaN layer and a method for forming the n-type contact electrode.
In addition, it is difficult to form a metal electrode with good ohmic contact on the upper surface of the n-type AlGaN layer. If the ohmic contact is not sufficient, extra power is consumed at the anode or cathode, or the junction between the n-type AlGaN layer and the electrode part has Schottky properties, which causes unnecessary wavelengths. There is a problem that light emission occurs in the region.

  Patent Document 1 describes that when dry etching is performed, a damage layer is generated in the n-type semiconductor layer, which adversely affects the n-type electrode contact. And it is described that it is necessary to remove the damaged layer by performing a surface treatment with an acid solution or an alkali solution.

International Publication No. 2011/078252

As described above, in order to remove the damaged layer generated in the n-type semiconductor layer, the step of performing the surface treatment with the acid solution or the alkali solution decreases the productivity.
The present invention has been made in view of the above problems, and provides a method for manufacturing an ultraviolet light-emitting element capable of forming an n-electrode having a low contact resistance with high productivity on an AlGaN layer exposed by dry etching. The purpose is that.

  According to one aspect of the present invention, there is provided a method for manufacturing an ultraviolet light emitting element, comprising: a pattern forming step of forming a resist pattern on an upper surface of a group III nitride semiconductor stacked portion including an n-type AlGaN layer stacked on an aluminum nitride substrate; An etching step of performing dry etching in plasma using chlorine gas using a pattern as a mask, etching the group III nitride semiconductor stacked portion until the n-type AlGaN layer is exposed, and forming a mesa portion; Forming an electrode layer on a part of each of the upper surface of the portion and the exposed upper surface of the n-type AlGaN layer, and the etching step includes antenna power / bias that is a ratio of antenna power and bias power. It is characterized in that the power is performed under conditions of 3.5 or more and 6.0 or less.

  According to one embodiment of the present invention, an n-electrode with low contact resistance can be formed with high productivity on an AlGaN layer exposed by dry etching.

It is sectional drawing which shows an example of the ultraviolet light emitting element for demonstrating the manufacturing method of the ultraviolet light emitting element in one Embodiment of this invention. It is sectional drawing for demonstrating a pattern formation process. It is a cross-sectional schematic diagram which shows an example of an etching apparatus. It is a cross-sectional schematic diagram which shows an example of the group III nitride semiconductor laminated part after an etching process and resist pattern peeling.

  In the following detailed description, numerous specific specific configurations are described to provide a thorough understanding of embodiments of the invention. However, it will be apparent that other embodiments may be practiced without limitation to such specific specific configurations. Further, the following embodiments do not limit the invention according to the claims, but include all combinations of characteristic configurations described in the embodiments.

Hereinafter, embodiments for carrying out the present invention will be described with reference to the drawings.
<Method for producing ultraviolet light emitting element>
In the method for manufacturing an ultraviolet light-emitting device according to an embodiment of the present invention, a pattern forming step of forming a resist pattern on the upper surface of a group III nitride semiconductor stacked portion including an n-type AlGaN layer stacked on an aluminum nitride substrate; Using the pattern as a mask, dry etching is performed in plasma using chlorine gas, and the III-nitride semiconductor stacked portion is etched until the n-type AlGaN layer is exposed to form a mesa portion, and the top surface of the mesa portion And an electrode forming step of forming an electrode layer on each part of the upper surface of the exposed n-type AlGaN layer, and the etching step has an antenna power / bias power ratio of 3.5 to 3.5. It is performed under the condition of 6.0 or less.

  Using the resist pattern as a mask, dry etching is performed in plasma using chlorine gas under the condition that the antenna power / bias power is 3.5 or more and 6.0 or less until the n-type AlGaN layer is exposed, that is, n-type. The mesa portion is formed by performing dry etching until the upper surface of the AlGaN layer is exposed or until the side surface of the n-type AlGaN layer forming a part of the mesa portion is exposed. By forming an electrode layer on the upper surface of the n-type AlGaN layer around the mesa portion thus formed, an n-electrode having a low contact resistance can be formed with high productivity.

Hereinafter, each component in the manufacturing method of the ultraviolet light emitting element of one Embodiment of this invention is demonstrated.
<Ultraviolet light emitting device>
First, the configuration of the ultraviolet light emitting device 100 manufactured by the method for manufacturing an ultraviolet light emitting device according to an embodiment of the present invention will be described.

FIG. 1 is a schematic configuration diagram illustrating an example of the ultraviolet light emitting element 100, and represents a cross section.
As shown in FIG. 1, the ultraviolet light emitting element 100 includes an n-type AlGaN layer 21, a light emitting layer 22, and a p-type group III nitride semiconductor layer 23 (hereinafter also simply referred to as a p-type layer 23). The substrate 10 has a mesa portion 50 obtained by dry etching the group III nitride semiconductor laminated portion 20 laminated in this order from the aluminum nitride substrate 10 side. The upper surface of the mesa portion 50 and the periphery of the mesa portion 50 An electrode layer is provided on the upper surface of the n-type AlGaN layer 21 exposed to the surface. That is, the electrode layer 41 is provided on the upper surface of the p-type layer 23, and the electrode layer 42 is provided on the upper surface of the n-type AlGaN layer 21 exposed by dry etching.

<Aluminum nitride substrate>
The aluminum nitride substrate 10 in the ultraviolet light emitting device 100 is not particularly limited as long as the group III nitride semiconductor stacked portion 20 including the n-type AlGaN layer 21 can be stacked on the upper surface thereof.
From the viewpoint of forming the group III nitride semiconductor stacked portion 20 having high crystallinity, the aluminum nitride substrate 10 is preferably a single crystal aluminum nitride substrate.

From the viewpoint of forming the group III nitride semiconductor stacked portion 20 having high crystallinity, the aluminum nitride substrate 10 is preferably an aluminum nitride substrate having a dislocation density of 10 ⁴ cm ⁻² or less.
Examples of the aluminum nitride substrate 10 include those manufactured by a sublimation method, a hydride vapor phase epitaxy (HVPE) method, and a flux method. Moreover, what provided aluminum nitride on dissimilar substrates, such as sapphire, is also contained in an aluminum nitride substrate.

<Group III nitride semiconductor laminate>
The group III nitride semiconductor multilayer portion 20 in the ultraviolet light emitting device 100 is not particularly limited as long as it includes the n-type AlGaN layer 21. From the viewpoint of luminous efficiency, the group III nitride semiconductor stacked unit 20 preferably includes an n-type AlGaN layer 21 and a p-type group III nitride semiconductor layer 23. Furthermore, it is more preferable to include a multiple quantum well (MQW) structure between the n-type AlGaN layer 21 and the p-type group III nitride semiconductor layer 23.

The n-type AlGaN layer 21 means n-type doped Al _x Ga _1-x N (0 <x <1). Examples of the n-type dopant include silicon Si, germanium Ge, oxygen O, and selenium Se. The doping concentration is not particularly limited, and examples thereof include a range of 1 × 10 ¹⁸ [atoms / cm ³ ] to 1 × 10 ²⁰ [atoms / cm ³ ].

<Pattern formation process>
The pattern forming step in the method for manufacturing an ultraviolet light emitting element according to one embodiment of the present invention is a step of forming a resist pattern that serves as a mask in the etching step on the group III nitride semiconductor stacked portion 20 including the n-type AlGaN layer 21. If there is no particular limitation.
In one embodiment of the present invention, the resist pattern is made of a material having an etching rate lower than that of the group III nitride semiconductor stacked portion 20 in the etching process, and in another embodiment of the present invention, the resist pattern is made of a material that is not substantially etched in the etching process. Become.

Also, a method for forming a resist pattern is not particularly limited, but from the viewpoint of productivity, in an embodiment of the present invention, a method capable of patterning by a photolithography method is used. As a specific material for the resist pattern, a novolak resin-based resist can be cited.
Further, the shape of the resist pattern is not particularly limited, and includes any pattern such as a polygonal shape, a circular shape, or an elliptical shape.

<Etching process>
The etching step in the method for manufacturing an ultraviolet light emitting element according to an embodiment of the present invention performs dry etching in plasma. By performing dry etching using chlorine gas under the condition that the antenna power / bias power representing the ratio between the antenna power and the bias power during dry etching is 3.5 or more and 6.0 or less, n-type AlGaN The group III nitride semiconductor stacked portion 20 is etched until the layer 21 is exposed to form the mesa portion 50.

The antenna power means power that forms plasma. The bias power means power that forms a potential difference between the plasma and the aluminum nitride substrate 10.
The mesa portion 50 has a shape corresponding to the resist pattern formed in the pattern forming process. Examples of the shape include a prismatic shape, a cylindrical shape, a truncated pyramid shape, and a truncated cone shape. Etching may be performed until only the surface of the n-type AlGaN layer 21 is exposed, or etching may be performed until a side surface of the n-type AlGaN layer 21 included in a part of the mesa portion 50 is exposed.
When the resist is peeled after the etching is completed, an organic solvent, sulfuric acid hydrogen peroxide solution, or the like usually used for peeling the resist can be used.

<Electrode formation process>
The electrode forming step in the method of manufacturing an ultraviolet light emitting device according to the embodiment of the present invention includes electrode layers 41 and 42 on at least a part of the upper surface of the mesa unit 50 and the upper surface of the n-type AlGaN layer 21 exposed around the mesa unit 50. Is a step of forming. That is, the electrode layer 41 is formed on at least a part of the upper surface of the group III nitride semiconductor multilayer portion 20, that is, the upper surface of the p-type layer 23, and the upper surface of the n-type AlGaN layer 21 exposed around the mesa portion 50. An electrode layer 42 is formed on the substrate.

  Examples of the electrode layers 41 and 42 include a single layer or a laminated structure of metals such as titanium Ti, vanadium V, tantalum Ta, aluminum Al, nickel Ni, gold Au, and platinum Pt. Further, the electrode layer 41 formed on the upper surface of the mesa unit 50 and the electrode layer 42 formed on the upper surface of the exposed n-type AlGaN layer 21 may be formed of the same material or different from each other. In one embodiment of the present invention, the electrode layer 42 formed on the bottom of the mesa 50 uses a laminated structure including Ti, Al, and Au.

The method for forming the electrode layers 41 and 42 is not particularly limited. As an example, a mask pattern is formed by a photolithography method, a desired electrode layer material is deposited on the entire surface by a desired method, and an electrode is formed in a desired region by a lift-off method. The method of forming a layer is mentioned. The formed metal layer may be alloyed by heat treatment.
Next, an embodiment of the method for producing an ultraviolet light emitting device in the present invention will be described more specifically with reference to the drawings.

First, the pattern formation process in the manufacturing method of the ultraviolet light emitting element in one Embodiment of this invention is demonstrated with FIG.
FIG. 2 is a schematic cross-sectional view of the group III nitride semiconductor multilayer portion 20 in a state where the resist pattern 30 is formed. In addition, the ratio of each part in each figure of FIGS. 1-4 is not necessarily what reflected the actual thing.

The group III nitride semiconductor stacked unit 20 shown in FIG. 2 is stacked on the aluminum nitride substrate 10. The group III nitride semiconductor stacked unit 20 includes an n-type AlGaN layer 21, a light emitting layer 22, and a p-type layer 23, and the upper surface of the group III nitride semiconductor stacked unit 20, that is, the upper surface of the p-type layer 23. A resist pattern 30 is formed.
Next, with reference to FIG. 3, an etching process in the method for manufacturing an ultraviolet light emitting element in one embodiment of the present invention will be described.

FIG. 3 is a schematic cross-sectional view showing an example of an inductively coupled plasma type etching apparatus for performing etching in plasma. As an etching apparatus, an etching apparatus using another method such as a capacitively coupled plasma method can be used.
In FIG. 3, 101 is an antenna electrode, and 102 is a bias electrode. The antenna electrode 101 is connected to the ground potential via the matching box 103 and the high frequency power source 104, and similarly, the bias electrode 102 is also connected to the ground potential via the matching box 105 and the high frequency power source 106.

The bias electrode 102 is formed of a susceptor that also serves as a substrate holding table.
An aluminum nitride substrate 10 having a resist pattern 30 formed on the upper surface of the group III nitride semiconductor stacked portion 20 shown in FIG. 2 is fixed on a susceptor (bias electrode 102) that also serves as a substrate holder, and a gas is introduced into the chamber 107. Etching is performed by introducing chlorine gas as an etching gas through the introduction pipe 108 and applying high-frequency power between the bias electrode 102 serving also as a substrate holding table and the antenna electrode 101 using the high-frequency power sources 104 and 106. At this time, the ratio of the power applied to the antenna electrode 101 (antenna power) to the power applied to the bias electrode 102 (bias power) (antenna power / bias power) (hereinafter also referred to as antenna / bias power ratio) is 3. The etching process is performed under conditions of 5 or more and 6.0 or less. In FIG. 3, reference numeral 109 denotes a vacuum exhaust pipe connected to a pump or the like. Reference numeral 110 denotes a refrigerant chamber for controlling the temperature of the semiconductor wafer (aluminum nitride substrate 10) being processed. For example, cooling water is circulated and supplied as a refrigerant at a predetermined temperature from a chiller unit (not shown) via a pipe 111. Is done. Reference numeral 112 denotes an electrostatic chuck for holding a semiconductor wafer (aluminum nitride substrate 10) with an electrostatic attraction force. The electrostatic chuck 112 is connected to a DC power source 114 via a switch 113, and attracts and holds the semiconductor wafer on the electrostatic chuck 112 with an electrostatic force by a high-voltage DC voltage applied by the DC power source 114. Further, a heat transfer gas, for example, helium He gas, from an electric heating gas supply unit (not shown) is supplied between the upper surface of the electrostatic chuck 112 and the semiconductor wafer (aluminum nitride substrate 10) through the gas supply pipe 115. . If the semiconductor wafer is small, it may be etched on a wafer such as SiC that has been electrostatically chucked.

As shown in FIG. 3, by applying power to the antenna electrode 101, chlorine plasma (a coexistence state of chlorine molecules and electrons having unpaired electrons with chlorine ions) is generated, and by applying power to the bias electrode 102, The generated chlorine plasma is attracted to the group III nitride semiconductor multilayer portion 20.
Then, the attracted chlorine plasma causes a chemical reaction with a region of the group III nitride semiconductor stacked portion 20 that is not covered with the resist pattern 30, and etching proceeds. By performing dry etching using chlorine gas under the condition that the antenna / bias power ratio is 3.5 or more and 6.0 or less, it is low on the n-type AlGaN layer 21 exposed by dry etching for forming the mesa portion 50. Although the mechanism that makes it possible to form a contact resistance n-electrode with high productivity has not been elucidated in detail, the contribution of physical etching to the exposed n-type AlGaN layer 21 is suppressed, and a damage layer is generated. It is inferred that this is due to the reduction of

  Moreover, when performing dry etching, it is common to carry out by installing an object to be etched on a susceptor cooled by a chiller unit (not shown). At this time, if the heat exchange efficiency between the susceptor and the etching object is low, the temperature of the substrate on the susceptor becomes high, and it becomes difficult for the resist to be burned out and peeled off, but in one embodiment of the present invention, Such a phenomenon is less likely to occur because the aluminum nitride substrate 10 having a high thermal conductivity is used.

FIG. 4 is a schematic cross-sectional view showing the aluminum nitride substrate 10 and the group III nitride semiconductor laminated portion 20 after the etching process and the resist pattern 30 are peeled off. A region not covered with the resist pattern 30 is etched to form a mesa portion 50, and the n-type AlGaN layer 21 is exposed around the mesa portion 50.
Then, as shown in FIG. 1, electrode layers 41 and 42 are formed on a part of the upper surface of the mesa unit 50, that is, the upper surface of the p-type layer 23 and the upper surface of the exposed n-type AlGaN layer 21, By performing an electrode formation process, the ultraviolet light emitting element 100 shown in FIG. 1 is obtained.

Excitation light emission caused by recombination of carriers in the light emitting layer 22 generated by applying electric power between the electrode layers 41 and 42 is emitted toward the outside of the ultraviolet light emitting element to function as a light emitting element.
The preferred embodiments of the present invention have been described above, but the present invention is not limited to the above-described embodiments.

Hereinafter, the ultraviolet light-emitting device in one embodiment of the present invention will be specifically described with reference to Examples and Comparative Examples. In addition, this invention is not limited to each Example demonstrated below.
The evaluation methods used for the ultraviolet light emitting devices obtained as examples and comparative examples are as follows. The evaluation results are shown in Table 1.

(1) Resist burn-in A wafer on which an ultraviolet light-emitting element is formed is fixed on a silicon carbide-processed SiC susceptor and the resist burn-in is observed with an optical microscope. went.
In Table 1, the result of the resist burn-in determination is as follows.
○: The resist is not burned.
X: The resist is burned out.

(2) Electrical characteristics The etched surface formed by performing dry etching in plasma was patterned using a resist, a Ti / Al electrode was deposited, and then lift-off was performed. Thereafter, the contact resistivity was measured as a performance index of the ohmic contact. The contact resistivity was measured using a CTLM (Circular Transmission Line Model) measurement method. The gap of the ring pattern for measuring contact resistance was set to 20 μm, and the voltage value when current of 100 mA was applied was measured to evaluate the electrical characteristics.
In Table 1, the electrical property pass / fail judgment results represent the following.
○: Contact resistance is small.
X: Contact resistance is large.

An n-type AlGaN layer 21, an AlGaN layer having a multiple quantum well structure as a light emitting layer 22, and a p-type GaN layer as a p-type group III nitride semiconductor layer 23 are formed on an aluminum nitride substrate 10 by MOCVD. A resist “THMR-iP3100MM” manufactured by Tokyo Ohka Kogyo Co., Ltd. was applied to the wafer on which the group III nitride semiconductor stacked unit 20 stacked in this order from the substrate 10 side was formed, and was patterned into an arbitrary shape. As an etching apparatus using the inductively coupled plasma method shown in FIG. 3, a dry etcher “NE-550” manufactured by ULVAC is used, and the patterned wafer is subjected to etching of the group III nitride semiconductor multilayer portion 20 using Cl ₂ gas. The n-type AlGaN layer 21 was exposed. During dry etching in plasma, the antenna power was 175 W, the bias power was 50 W, and the antenna / bias power ratio, which is the ratio between the antenna power and the bias power, was 3.5. The etching pressure was 0.5 Pa. Further, the drawing voltage representing the voltage (1/2 Vpp) applied to the sheath between the wafer and the plasma for drawing ions into the substrate was 180V.
The obtained wafer was observed to evaluate resist burn-in and electrical characteristics.

An ultraviolet light emitting element was produced and evaluated in the same manner as in Example 1 except that the antenna / bias power ratio, which is the ratio of the antenna power and the bias power, was 6.0.
Specifically, the antenna power was 300 W and the bias power was 50 W. The pull-in voltage was 110V.

[Comparative Example 1]
An ultraviolet light emitting element was produced and evaluated in the same manner as in Example 1 except that the antenna / bias power ratio, which is the ratio of the antenna power and the bias power, was 0.5.
Specifically, the antenna power was 50 W and the bias power was 100 W. The pull-in voltage was 640V.

[Comparative Example 2]
An element was fabricated in the same manner as in Example 1 except that a wafer having an AlGaN layer formed on a sapphire substrate was used and the antenna / bias power ratio, which is the ratio of antenna power to bias power, was set to 0.5. And evaluated.
Specifically, the antenna power was 50 W and the bias power was 100 W. The pull-in voltage was 680V.

[Comparative Example 3]
A device was fabricated in the same manner as in Example 1 except that a wafer having an AlGaN layer formed on a sapphire substrate was used and the antenna / bias power ratio, which is the ratio of antenna power and bias power, was set to 3.0. And evaluated.
Specifically, the antenna power was 175 W and the bias power was 50 W. The pull-in voltage was 150V.

[Comparative Example 4]
A device was fabricated in the same manner as in Example 1 except that a wafer having an AlGaN layer formed on a sapphire substrate was used and the antenna / bias power ratio, which is the ratio of antenna power and bias power, was 6.0. And evaluated.
Specifically, the antenna power was 300 W and the bias power was 50 W. The pull-in voltage was 100V.

[Comparative Example 5]
An element was fabricated and evaluated in the same manner as in Example 1 except that the antenna / bias power ratio, which is the ratio between the antenna power and the bias power, was 10.0.
Specifically, the antenna power was 300 W and the bias power was 30 W. The pull-in voltage was 80V.

  From the results of Examples 1 and 2 and from the knowledge obtained through experiments so far, the resist baking is performed by using an aluminum nitride substrate as the substrate and setting the antenna / bias power ratio to 3.5 or more and 6.0 or less. It has been confirmed that it is possible to produce a deep ultraviolet light emitting device exhibiting good electrical characteristics while suppressing sticking. As shown in Comparative Examples 1 and 2, when the antenna / bias power ratio is less than 3.5, the pull-in voltage at the time of etching becomes high, the physical damage to the semiconductor surface is large, and the electrical characteristics are high. It was confirmed that it deteriorated. Further, by using an aluminum nitride substrate as shown in Examples 1 and 2, resist burn-in can be suppressed as compared with the case of using a sapphire substrate as shown in Comparative Examples 3 and 4, but in Comparative Example 5 As shown, when the antenna / bias power ratio is larger than 6.0, it was confirmed that excessive resist burn-in occurs even when an aluminum nitride substrate is used. The resist burn-in makes it difficult to peel off the aluminum nitride substrate.

DESCRIPTION OF SYMBOLS 10 Aluminum nitride substrate 20 Group III nitride semiconductor laminated part 21 N-type AlGaN layer 22 Light emitting layer 23 p-type group III nitride semiconductor layer (p-type layer)
41, 42 Electrode layer 50 Mesa portion 100 Ultraviolet light emitting element

Claims (1)

A pattern forming step of forming a resist pattern on the upper surface of the group III nitride semiconductor laminated portion including the n-type AlGaN layer laminated on the aluminum nitride substrate;
Etching to form a mesa portion by performing dry etching in plasma using chlorine gas using the resist pattern as a mask, etching the group III nitride semiconductor multilayer portion until the n-type AlGaN layer is exposed,
Forming an electrode layer on a part of each of the upper surface of the mesa portion and the exposed upper surface of the n-type AlGaN layer, and
The method of manufacturing an ultraviolet light emitting element, wherein the etching step is performed under a condition where antenna power / bias power, which is a ratio of antenna power and bias power, is 3.5 or more and 6.0 or less.

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