JP2016181682A - 半導体構造での層の上面を保護する方法 - Google Patents
半導体構造での層の上面を保護する方法 Download PDFInfo
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- 238000000137 annealing Methods 0.000 claims description 9
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- 238000012546 transfer Methods 0.000 claims description 6
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- 229910052707 ruthenium Inorganic materials 0.000 claims description 5
- 229910052719 titanium Inorganic materials 0.000 claims description 5
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- 230000006872 improvement Effects 0.000 abstract description 2
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- 238000011065 in-situ storage Methods 0.000 description 1
- 239000011229 interlayer Substances 0.000 description 1
- CPLXHLVBOLITMK-UHFFFAOYSA-N magnesium oxide Inorganic materials [Mg]=O CPLXHLVBOLITMK-UHFFFAOYSA-N 0.000 description 1
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Abstract
【解決手段】本発明は、半導体構造での層(104,304)の上面(108)を保護するための方法であって、基板(102)上に、上面(108)を有する層(104,304)を設け(502)、上面(108)の上に犠牲金属層(106)を堆積し(504)、犠牲金属層(106)の上に機能金属層(110,312)を堆積し(506)、犠牲金属層(106)は、機能金属層(110,312)の堆積の際にスパッタリングによって除去され、その結果、界面(112)が上面(108)と機能金属層(110,312)との間に形成され、機能金属層(110,312)の堆積の際、犠牲金属層(106)は、上面(108)を保護する。
【選択図】図1a
Description
物理的気相成長法PVDを用いて、上面の上に、これと接触する犠牲金属層を堆積し、犠牲金属層は、軽金属元素を含み、
物理的気相成長法を用いて、犠牲金属層の上に、これと接触する機能金属層を堆積し、犠牲金属層は、機能金属層の堆積の際にスパッタリングによって除去され、その結果、界面が上面と機能金属層との間に形成され、
機能金属層の堆積の際、犠牲金属層は、上面を保護するものであり、
層は、初期の厚さに整合した最終厚さ、および初期の組成に対応した最終組成を有する。
Claims (14)
- 半導体構造(100,200,300,400)での層(104,304)の上面(108)を保護するための方法(500)であって、
基板(102)上に、初期の厚さ(t0)、初期の組成(C0)および上面(108)を有する層(104,304)を設けるステップ(502)と、
物理的気相成長法PVDを用いて、上面(108)の上に、これと接触する犠牲金属層(106)を堆積するステップ(504)であって、犠牲金属層(106)は軽金属元素を含む、ステップ(504)と、
物理的気相成長法を用いて、犠牲金属層(106)の上に、これと接触する機能金属層(110,312)を堆積するステップ(506)であって、犠牲金属層(106)は、機能金属層(110,312)の堆積の際にスパッタリングによって除去され、その結果、界面(112)が上面(108)と機能金属層(110,312)との間に形成され、機能金属層(110,312)の堆積の際、犠牲金属層(106)は、上面(108)を保護するものであり、層(104,304)は、初期の厚さ(t0)に整合した最終厚さ(tf)、および初期の組成(C0)に対応した最終組成(Cf)を有する、ステップ(506)と、を含む方法(500)。 - 層(104,304)は、Co,Fe,Bまたはこれらの組合せを含む請求項1記載の方法(500)。
- 犠牲金属層(106)は、Mg,Al,Ca,Znまたはこれらの組合せを含む請求項1または2記載の方法(500)。
- 機能金属層(110,312)は、アモルファス金属層である請求項1〜3のいずれかに記載の方法(500)。
- 機能金属層(110,312)は、Taを含む請求項1〜4のいずれかに記載の方法(500)。
- 犠牲金属層(106)の厚さは、機能金属層(110,312)の厚さの3倍より小さい請求項1〜5のいずれかに記載の方法(500)。
- 犠牲金属層(106)の厚さは、2nmより小さい請求項1〜6のいずれかに記載の方法(500)。
- 250℃〜400℃の上昇した温度で半導体構造(200)をアニール処理するステップをさらに含み、層(104,304)は、[001]配向の層に少なくとも部分的に結晶化する請求項1〜7のいずれかに記載の方法(500)。
- 層(104,304)は、垂直な磁気異方性を有する請求項1〜8のいずれかに記載の方法(500)。
- 層(104,304)および機能金属層(110,312)は、スピン・トランスファー・トルク磁気抵抗ランダムアクセスメモリスタック、STT−MRAMスタックの一部を形成する請求項1〜9のいずれかに記載の方法(500)。
- 物理的気相成長法を用いて、磁気トンネル接合(302)MTJを形成することをさらに含み、層(104,304)は、磁気トンネル接合(302)の一部を形成する請求項1〜10のいずれかに記載の方法(500)。
- 機能金属層(110,312)に近接して電極(314)を形成することをさらに含む請求項1〜11のいずれかに記載の方法(500)。
- 層(104,304)は、高誘電率(high-k)誘電体材料または酸化物を含む請求項1記載の方法(500)。
- 機能金属層(110,312)は、Co,Ti,W,Mo,Ru,Hfまたはこれらの組合せを含む請求項1記載の方法(500)。
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EP15160520.1A EP3073514B1 (en) | 2015-03-24 | 2015-03-24 | Method for protecting a top surface of a layer in a semiconductor structure |
EP15160520.1 | 2015-03-24 |
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US20090073737A1 (en) * | 2007-09-17 | 2009-03-19 | Ulrich Klostermann | Integrated Circuits; Methods for Manufacturing an Integrating Circuit; Memory Modules |
WO2010026705A1 (ja) * | 2008-09-08 | 2010-03-11 | キヤノンアネルバ株式会社 | 磁気抵抗素子とその製造方法、該製造方法に用いる記憶媒体 |
JP2013513255A (ja) * | 2009-12-08 | 2013-04-18 | クアルコム,インコーポレイテッド | 磁気トンネル接合デバイス |
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US7855147B1 (en) * | 2006-06-22 | 2010-12-21 | Novellus Systems, Inc. | Methods and apparatus for engineering an interface between a diffusion barrier layer and a seed layer |
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Patent Citations (3)
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US20090073737A1 (en) * | 2007-09-17 | 2009-03-19 | Ulrich Klostermann | Integrated Circuits; Methods for Manufacturing an Integrating Circuit; Memory Modules |
WO2010026705A1 (ja) * | 2008-09-08 | 2010-03-11 | キヤノンアネルバ株式会社 | 磁気抵抗素子とその製造方法、該製造方法に用いる記憶媒体 |
JP2013513255A (ja) * | 2009-12-08 | 2013-04-18 | クアルコム,インコーポレイテッド | 磁気トンネル接合デバイス |
Non-Patent Citations (1)
Title |
---|
J.SWERTS, ET AL.: "BEOL compatible high tunnel magneto resistance perpendicular magnetic tunnel junctions using a sacri", APPLIED PHYSICS LETTERS, vol. 106, no. 26, JPN7019001618, 1 July 2015 (2015-07-01), US, pages 262407 - 1, ISSN: 0004039283 * |
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US10333059B2 (en) | 2019-06-25 |
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