JP2016178436A - Imaging device and driving method for the same - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an imaging device that can reduce noise in analog-to-digital conversion.SOLUTION: An imaging device includes a pixel containing a photoelectric converter, a holder for holding a signal, and an analog-to-digital converter for converting an analog signal to a digital signal. The analog-to-digital converter converts a signal based on an output signal of a pixel under a pixel reset release state from analog to digital. The analog-digital converter receives, via the holder, the signal based on photoelectric conversion of pixels by the photoelectric converter. The period for which the input signal based on the photoelectric conversion of the pixels by the photoelectric converter is converted from analog to digital, and the analog-to-digital converter converts the signal based on the output signal of the pixel under the pixel reset release state from analog to digital is before or after the period for which the signal based on the photoelectric conversion of the pixels by the photoelectric converter is written into the holder.SELECTED DRAWING: Figure 5

Description

  The present invention relates to an imaging apparatus and a driving method of the imaging apparatus.

  A CMOS type image sensor that receives an optical image formed by an optical system is used in an imaging apparatus such as a digital still camera or a digital video camera. In recent years, with the increase in the number of pixels and the increase in the frame rate, a technique for realizing high-speed reading of the imaging apparatus and a technique for reducing power consumption are required. In addition, a CMOS image sensor takes advantage of the characteristics that can be manufactured in the same process as a CMOS integrated circuit, converts charges into electrical signals for each pixel, and processes electrical signals read from the pixels in parallel for each column. The reading speed can be improved.

  As a readout circuit that reads out signals from pixels in parallel for each column, a configuration is known in which pixel signals are converted from analog to digital (hereinafter referred to as “AD conversion”) for each column. This AD conversion is roughly performed as follows. First, an analog electric signal read out to a vertical signal line is compared with a reference voltage (a linearly changing slope waveform having a certain slope) by a comparator arranged for each column. At the same time, the counting operation is started in synchronization with a clock having a fixed period by a counter arranged for each column as in the comparator. Thereafter, when the magnitude relationship between the analog electric signal and the reference voltage is reversed and the output of the comparator is inverted, the counting operation of the counter is stopped. The final count value of the counter becomes a digital signal corresponding to the magnitude of the analog electric signal.

  In a solid-state imaging device provided with such AD conversion means, a proposal has been made to realize high speed (for example, see Patent Document 1). According to Patent Document 1, a signal holding means and switch element for holding an analog signal output for each column from a plurality of pixel units arranged two-dimensionally in a matrix form, and an analog signal held in the signal holding means are digitally converted. AD conversion means for converting into a signal. Further, the switch element is maintained in the OFF state during the conversion operation by the AD conversion means, and the conversion operation by the AD conversion means and the operation of reading the analog signal from the pixel portion to the column signal line are driven in parallel, thereby reading out the signal. Speed up.

JP 2009-10787 A

  In Patent Document 1, by maintaining the switch element in the OFF state during the AD conversion operation, the analog output unit of the pixel signal and the signal holding unit can be electrically disconnected during the AD conversion period of the signal component of the pixel. It becomes possible. As a result, it is possible to prevent leakage components generated in the charge holding means in the pixel portion from being transmitted to the signal holding means, but no consideration is given to the transmission of noise due to power supply fluctuations generated by the transfer of a large signal. .

  In general, it is known that when a high-luminance subject image is received, the photoelectric conversion signal from the pixel portion is large, causing a power supply fluctuation during signal transfer and affecting the image signal. For example, in Patent Document 1, an operation of AD-converting the reset component held in the signal holding unit and an operation of reading out the photoelectrically converted analog signal from the pixel unit are performed in parallel. For this reason, a high-brightness subject image is received and the power holding / ground level fluctuation of the signal holding means and AD converter occurs, and noise is generated during AD conversion of the reset component.

  An object of the present invention is to provide an imaging apparatus and a driving method of the imaging apparatus that can reduce noise at the time of analog-to-digital conversion even when a power supply fluctuation occurs due to receiving a high-luminance subject image. .

  An imaging apparatus according to the present invention includes a pixel including a photoelectric conversion unit, a holding unit that holds a signal, and an analog-to-digital conversion unit that converts a signal from analog to digital. A signal based on the output signal of the pixel in the reset release state is converted from analog to digital, and the analog-digital conversion unit inputs a signal based on photoelectric conversion by the photoelectric conversion unit of the pixel via the holding unit, A signal based on photoelectric conversion by the photoelectric conversion unit of the input pixel is converted from analog to digital, and the analog-digital conversion unit converts a signal based on the output signal of the pixel in a reset release state of the pixel from analog to digital. During the conversion period, a signal based on photoelectric conversion by the photoelectric conversion unit of the pixel is written to the holding unit. And wherein the period is before or after being.

  According to the present invention, even when a power supply fluctuation occurs due to receiving a high-luminance subject image, noise during analog-digital conversion can be reduced, so that an image intended by the photographer can be output.

It is a figure which shows the structural example of a pixel. It is a figure which shows the structural example of an imaging device. It is a figure which shows the structural example of the read-out part. It is a timing chart explaining read-out operation. It is a figure explaining the parallel processing of read-out operation. It is a figure which shows the structural example of another reading part. It is a timing chart explaining read-out operation.

(First embodiment)
FIG. 1 is a circuit diagram showing a configuration example of a pixel 100 according to the first embodiment of the present invention. The pixel 100 includes a photodiode 101, a transfer transistor 102, a reset transistor 103, an amplification transistor 104, a selection transistor 105, and a floating diffusion 106. The photodiode 101 is a photoelectric conversion unit that converts light into electric charge and accumulates it. The anode of the photodiode 101 is connected to the ground potential node. The cathode of the photodiode 101 is connected to the floating diffusion 106 via the transfer transistor 102. The gate of the amplification transistor 104 is connected to the floating diffusion 106. The floating diffusion 106 is connected to the source of the reset transistor 103 for resetting the floating diffusion 106. The drain of the reset transistor 103 is connected to the power supply voltage node VDD. The amplification transistor 104 has a drain connected to the power supply voltage node VDD and a source connected to the drain of the selection transistor 105. The source of the selection transistor 105 is connected to the output terminal OUT.

  The transfer transistor 102 transfers the charge of the photodiode 101 to the floating diffusion 106 in accordance with the signal PTX. The floating diffusion 106 accumulates charges. The reset transistor 103 resets the floating diffusion 106 in response to the signal PRES. The amplification transistor 104 outputs a voltage based on the electric charge accumulated in the floating diffusion 106. The selection transistor 105 outputs the output voltage of the amplification transistor 104 to the output terminal OUT according to the signal PSEL. The output terminal OUT is connected to the vertical output line VL (FIG. 3). The amplification transistor 104 functions as a source follower amplifier by being connected to the constant current source 301 (FIG. 3) that is the load of the vertical output line VL via the selection transistor 105. Signals PTX, PRES and PSEL are output from the vertical scanning unit 202 in FIG.

  FIG. 2 is a diagram illustrating a configuration example of the imaging apparatus 200 according to the present embodiment. The imaging apparatus 200 includes a pixel unit 201, a vertical scanning unit 202, a reading unit 203, a horizontal scanning unit 204, and a difference output circuit 150. The imaging apparatus 200 can be used by being mounted on an imaging system such as a digital still camera or a digital video camera, for example. The pixel unit 201 includes a plurality of pixels 100 (FIG. 1) arranged in a matrix, receives an optical image formed by the optical system, and outputs an image signal. The vertical scanning unit 202 generates signals PTX, PRES, and PSEL, and sequentially selects the pixels 100 in the pixel unit 201 in units of rows. The pixels 100 in the selected row output pixel signals to the reading unit 203. The reading unit 203 converts the pixel signals for one row from analog to digital. The horizontal scanning unit 204 outputs the signal PH (FIG. 4) to the reading unit 203, thereby sequentially transferring the signals of the pixels 100 in each column to the difference output circuit 150. Note that the imaging apparatus 200 may include a timing generator that provides a timing signal to each of the circuits described above.

  FIG. 3 is a circuit diagram illustrating a configuration example of one column of the reading unit 203. The configuration of the reading unit 203 in FIG. 3 is provided for each column of the pixels 100. A vertical output line (column output line) VL is also provided for each column of the pixels 100. The plurality of columns of reading units 203 are connected to the plurality of columns of pixels 100 via a plurality of columns of column output lines VL, respectively. A plurality of pixels 100 in the same column are connected to one column output line VL. The source of the selection transistor 105 is connected to the column output line VL. The constant current source 301 is a load of the column output line VL and is connected to the column output line VL.

  Next, the configuration of the reading unit 203 will be described. The capacitor 302 is connected between the column output line VL and the input terminal of the amplification amplifier 304. A parallel connection circuit of the capacitor 303 and the switch 305 is connected between the input terminal and the output terminal of the amplification amplifier 304. The amplification amplifier 304 amplifies a signal input from the pixel 100 via the capacitor 302 and the column output line VL. The amplification degree of the amplification amplifier 304 is determined by the ratio between the capacitors 302 and 303. The switch 305 is a switch for resetting the capacitors 302 and 303 (resetting the reading unit 203), and is controlled by a signal PC0R (FIG. 4).

  The switch 306 is a switch for outputting the output signal of the amplification amplifier 304 to the comparator 310 when the reset of the pixel 100 is released according to the signal PTN (FIG. 4). The capacitor 308 is a holding unit that holds a signal. The switch 307 is a switch for accumulating the output signal of the amplification amplifier 304 in the capacitor 308 when outputting a signal based on photoelectric conversion by the photoelectric conversion unit of the pixel 100 in accordance with the signal PTS (FIG. 4). The switch 309 is a switch for outputting a signal accumulated in the capacitor 308 to the comparator 310.

  The ramp voltage generator 311 is provided in common for each column, and outputs a reference signal RAMP (FIG. 4) having a slope and linearly changing with a certain slope to the comparator 310 of each column. The comparator 310 compares the reference signal RAMP output from the ramp voltage generator 311 with the signal output from the switch 306 or 309, and inverts the output signal when the magnitude relationship between the two is reversed.

  The clock supply unit 313 is provided in common for each column, and outputs a clock signal having a fixed period to the counter 312 of each column. When the generation of the slope waveform of the reference signal RAMP is started, the counter 312 starts a count operation synchronized with the clock supplied from the clock supply unit 313. Thereafter, when the output signal of the comparator 310 is inverted, the counting operation of the counter 312 is stopped. Thereafter, the count value of the counter 312 when the switch 306 is on is stored in the N latch 314a. The count value of the counter 312 when the switch 309 is on is stored in the S latch 314b. The count values of the N latch 314a and the S latch 314b are digital signals corresponding to the analog signal output from the pixel 100. That is, the reading unit 203 includes an analog-digital conversion unit that converts a signal output from the pixel 100 from analog to digital. The analog-digital converter includes a comparator 310, a ramp voltage generator 311, a counter 312, a clock supply unit 313, an N latch 314a, and an S latch 314b. The N latch 314a stores a digital signal when the reset of the pixel 100 is released. The S latch 314a stores a digital signal at the time of outputting a signal based on photoelectric conversion by the photoelectric conversion unit of the pixel 100. 2 transfers the digital signals stored in the N latch 314a and the S latch 314b to the difference output circuit 150 in order for each column. The difference output circuit 150 can output a pixel signal from which noise has been removed by outputting a difference between digital signals stored in the N latch 314a and the S latch 314b.

  FIG. 4 is a timing chart showing a driving method of the imaging apparatus 200 according to the present embodiment, and shows a reading operation when the imaging apparatus 200 performs a rolling shutter operation. It is assumed that a transistor and a switch corresponding to each signal are turned on when each signal becomes a high level.

  At times T1 to T3, the signals PRES and PC0R are at a high level. Then, the reset transistor 103 is turned on, and the floating diffusions 106 of all the pixels 100 are reset. Further, the switch 305 is turned on, and the capacitors 302 and 303 of the reading units 203 in all columns are reset, that is, the reading units 203 are reset.

  At times T2 to T8, the signal PSEL of the pixel 100 in the 0th row becomes high level, and the selection transistor 105 of the pixel 100 in the 0th row is turned on. Next, at time T3, the signals PRES and PC0R become low level. Then, the reset transistor 103 is turned off, and the reset of the floating diffusion 106 of all the pixels 100 is released. Further, the switch 305 is turned off, and the reset of the capacitors 302 and 303 of the reading units 203 in all the columns is released.

  Further, at time T3 to T5, the signal PTN becomes high level, the switch 306 is turned on, and the output signal of the amplification amplifier 304 is input to the comparator 310. Here, the output signal of the amplification amplifier 304 is a signal after the reset of the floating diffusion 106 is released (that is, a reset component).

  At times T4 to T5, the ramp voltage generator 311 outputs a reference signal RAMP having a slope waveform to the comparator 310. The level of the reference signal RAMP increases with time. The counter 312 starts a count operation in synchronization with the clock signal at time T4. The comparator 310 inverts the output signal when the reference signal RAMP becomes larger than the output signal of the amplification amplifier 304. Then, the counter 312 ends the counting operation. The count value of the counter 312 is latched in the N latch 314a as a reset component. As a result, the reset component is converted from analog to digital. At time T5, the ramp voltage generator 311 returns the reference signal RAMP to the initial value.

  Further, at time T5 to T6, the signal PTX of the pixel 100 in the 0th row becomes high level, and the transfer transistor 102 is turned on. Then, in the pixel 100 in the 0th row, the transfer transistor 102 transfers the charge of the photodiode 101 to the floating diffusion 106. The charge generated by the photoelectric conversion by the photodiode 101 is transferred to the floating diffusion 106.

  At times T5 to T7, the signal PTS goes high, the switch 307 is turned on, and the output signal of the amplification amplifier 304 is held in the capacitor 308. Next, at time T8 to T10, the signal PAD goes high and the switch 309 is turned on. Then, the signal held in the capacitor 308 is output to the comparator 310.

  In addition, at times T8 to T10, the ramp voltage generator 311 outputs a reference signal RAMP having a slope waveform to the comparator 310. The level of the reference signal RAMP increases with time. The counter 312 starts a count operation in synchronization with the clock signal at time T8. The comparator 310 inverts the output signal when the reference signal RAMP becomes larger than the output signal of the amplification amplifier 304. Then, the counter 312 ends the counting operation. The count value of the counter 312 is latched in the S latch 314b as a photoelectric conversion signal. Thereby, the photoelectric conversion signal is converted from analog to digital.

  Thereafter, at times T11 to T15, the reading unit 203 sequentially outputs the signals in the 0th row stored in the N latch 314a and the S latch 314b to the differential output circuit 150 for each column in accordance with the signal PH. The difference output circuit 150 outputs a difference between the signal of the S latch 314b and the signal of the N latch 314a.

  At time T9, the signal PSEL of the pixel 100 in the first row changes from the low level to the high level, so that the selection transistor 105 of the pixel 100 in the first row is turned on. From time T8 to T11, the signals PRES and PC0R are at a high level. Then, the reset transistor 103 is turned on, and the floating diffusions 106 of all the pixels 100 are reset. Further, the switch 305 is turned on, and the capacitors 302 and 303 of the reading units 203 in all columns are reset, that is, the reading units 203 are reset.

  Next, at time T11, the signals PRES and PC0R become low level. Then, the reset transistor 103 is turned off, and the reset of the floating diffusion 106 of all the pixels 100 is released. Further, the switch 305 is turned off, and the reset of the capacitors 302 and 303 of the reading units 203 in all the columns is released.

  At time T11, the signal PTN goes high, the switch 306 is turned on, and the output signal of the amplification amplifier 304 is input to the comparator 310. Here, the output signal of the amplification amplifier 304 is a signal after the reset of the floating diffusion 106 is released (that is, a reset component).

  Next, at times T12 to T13, the ramp voltage generator 311 outputs a reference signal RAMP having a slope waveform to the comparator 310. The counter 312 starts a count operation in synchronization with the clock signal at time T12. The comparator 310 inverts the output signal when the reference signal RAMP becomes larger than the output signal of the amplification amplifier 304. Then, the counter 312 ends the counting operation. The count value of the counter 312 is latched in the N latch 314a as a reset component.

  In addition, from time T13 to T14, the signal PTX of the pixels 100 in the first row becomes high level, and the transfer transistor 102 is turned on. Then, in the pixel 100 in the first row, the transfer transistor 102 transfers the charge of the photodiode 101 to the floating diffusion 106. The charge generated by the photoelectric conversion by the photodiode 101 is transferred to the floating diffusion 106.

  At times T13 to T15, the signal PTS goes high, the switch 307 is turned on, and the output signal of the amplification amplifier 304 is held in the capacitor 308. Next, at time T16 to T17, the signal PAD becomes high level and the switch 309 is turned on. Then, the signal held in the capacitor 308 is output to the comparator 310.

  In addition, at times T16 to T17, the ramp voltage generator 311 outputs a reference signal RAMP having a slope waveform to the comparator 310. The counter 312 starts a count operation in synchronization with the clock signal at time T16. The comparator 310 inverts the output signal when the reference signal RAMP becomes larger than the output signal of the amplification amplifier 304. Then, the counter 312 ends the counting operation. The count value of the counter 312 is latched in the S latch 314b as a photoelectric conversion signal.

  Thereafter, at times T18 to T19, the reading unit 203 sequentially outputs the signals in the first row stored in the N latch 314a and the S latch 314b to the differential output circuit 150 for each column in accordance with the signal PH. The difference output circuit 150 outputs a difference between the signal of the S latch 314b and the signal of the N latch 314a.

  By repeating the operation described above, pixel signals from the 0th row to the last row can be read out. The operation performed at each time is schematically shown in the lower part of FIG. From time T4 to T5, the analog-to-digital converter converts a signal based on the output signal of the pixel 100 in the reset release state of the pixel 100 from analog to digital (N_AD). Thereafter, at time T5 to T7, the switch 307 writes a signal based on photoelectric conversion by the photoelectric conversion unit of the pixel 100 to the capacitor 308 (S transfer). Thereafter, at times T8 to T10, the analog-to-digital conversion unit converts the signal based on the photoelectric conversion by the photoelectric conversion unit of the pixel 100 written in the capacitor 308 from analog to digital (S_AD).

  The analog-to-digital conversion unit converts a signal based on the output signal of the pixel 100 in the reset release state of the pixel 100 from analog to digital (N_AD). The analog-digital conversion unit inputs a signal based on the output signal from the photoelectric conversion unit of the pixel 100 via the capacitor 308, and converts the signal based on the input output signal from the photoelectric conversion unit of the pixel from analog to digital. (S_AD).

  At times T3 to T5, the third switch 306 inputs a signal based on the output signal of the pixel 100 in the reset release state of the pixel 100 to the analog-digital conversion unit. After that, at times T <b> 5 to T <b> 7, the first switch 307 writes a signal based on the output signal from the photoelectric conversion unit of the pixel 100 to the capacitor 308. After that, at times T8 to T10, the second switch 309 inputs a signal based on the output signal from the photoelectric conversion unit of the pixel 100 written in the capacitor 308 to the analog-digital conversion unit.

  Here, it should be noted that at time T3 to T5, the signal of the reset component is transferred from the amplification amplifier 304 to the comparator 310, and analog-digital conversion is performed. On the other hand, at time T5 to T7, the photoelectric conversion signal is transferred from the amplification amplifier 304 to the capacitor 308. After that, at time T8 to T10, the signal held in the capacitor 308 is output to the comparator 310 to perform analog-digital conversion. Is done. At the same time, the floating diffusion 106 and the readout unit 203 of the pixel 100 are reset at times T8 to T11.

  That is, at time T5 to T7 when the photoelectric conversion signal is transferred from the amplification amplifier 304 to the capacitor 308, the reset component signal is not converted from analog to digital. For this reason, even if the image of a high-luminance subject is received and the potential fluctuation of the power supply / ground of the capacitor 308 or the analog / digital converter occurs, it is not affected by noise during the analog / digital conversion of the reset component signal. . The present embodiment includes the capacitor 308 and the switch 309 corresponding to the switch 307, but does not include the capacitor and the switch corresponding to the switch 306, so that the semiconductor chip size can be reduced.

  FIG. 5A shows the above situation. FIG. 5A shows the passage of time in the right direction so that the parallel processing process of the read operation from the 0th row to the 2nd row can be seen. In FIG. 5A, the reset operation (reset) of the pixel 100 and the reading unit 203 in the 0th row, the transfer of the reset component in the 0th row (N transfer), and the analog / digital conversion of the reset component in the 0th row (N_AD). The process is performed in the order of photoelectric conversion signal transfer (S transfer) in the 0th row. Thereafter, in parallel with the reset operation (reset) of the pixels 100 and the reading unit 203 in the first row, analog-digital conversion (S_AD) of the photoelectric conversion signals in the zeroth row is performed. Thereafter, the processing is performed in the order of reset component transfer (N transfer) of the first row, analog-digital conversion (N_AD) of the reset component of the first row, and transfer (S transfer) of the photoelectric conversion signal of the first row. For example, even if an image of a high-luminance subject is received in the first row, noise is not received because the analog-to-digital conversion operation is not performed when the signal is transferred. Thereby, the image quality is improved.

  On the other hand, FIG. 5B shows a read operation when the operation of the present embodiment is not performed. In parallel with the transfer of the photoelectric conversion signal (S transfer) of the first row, Analog-digital conversion (N_AD) of the eye reset component is performed. For this reason, when a high-brightness subject image is received in the first row, the analog-to-digital conversion (N_AD) of the reset component in the first row is performed when the photoelectric conversion signal is transferred (S transfer). I get noise. This degrades the image quality.

  Comparing FIG. 5A and FIG. 5B, the readout time is slightly longer in FIG. 5A of this embodiment. However, in FIG. 5A of this embodiment, analog-digital conversion of the photoelectric conversion signal of the previous row is performed in parallel with the reset operation of the pixel 100 and the reading unit 203 of the next row, and a sufficient reading speed is achieved. Is secured.

  As described above, in this embodiment, processing is performed in the order of reset component transfer (N transfer), reset component analog-to-digital conversion (N_AD), and photoelectric conversion signal transfer (S transfer). In this embodiment, the analog-digital conversion (S_AD) of the photoelectric conversion signal and the reset operation of the pixel 100 and the reading unit 203 are performed in parallel. Note that the present embodiment is not limited to the processing performed in this order. The processing order of reset component transfer (N transfer) and reset component analog-to-digital conversion (N_AD), photoelectric conversion signal transfer (S transfer), and photoelectric conversion signal analog-to-digital conversion (S_AD) may be reversed. The transfer of the photoelectric conversion signal (S transfer) and the analog / digital conversion (N_AD) of the reset component or the analog / digital conversion (S_AD) of the photoelectric conversion signal may not be performed in parallel.

  That is, first, the switch 307 writes a signal based on photoelectric conversion by the photoelectric conversion unit of the pixel 100 in the capacitor 308 (S transfer). Thereafter, the analog-to-digital conversion unit converts a signal written in the capacitor 308 based on photoelectric conversion by the photoelectric conversion unit of the pixel 100 from analog to digital (S_AD). Thereafter, the analog-to-digital conversion unit converts a signal based on the output signal of the pixel 100 in the reset release state of the pixel 100 from analog to digital (N_AD).

  A period (N_AD) in which a signal based on the output signal of the pixel 100 in the reset release state of the pixel 100 is converted from analog to digital is a period in which a signal based on photoelectric conversion by the photoelectric conversion unit of the pixel 100 is written to the capacitor 308 (S transfer). ) Does not overlap. A period (N_AD) in which a signal based on the output signal of the pixel 100 in the reset release state of the pixel 100 is converted from analog to digital is a period in which a signal based on photoelectric conversion by the photoelectric conversion unit of the pixel 100 is written to the capacitor 308 (S transfer). ) Before or after.

  The difference output circuit 150 is a signal based on the photoelectric conversion by the photoelectric conversion unit of the pixel converted by the analog-digital conversion unit and a signal based on the output signal of the pixel in the reset release state of the pixel converted by the analog-digital conversion unit. Output the difference.

(Second Embodiment)
FIG. 6 is a circuit diagram illustrating a configuration example of one column of the pixel 100 and the readout unit 203 according to the second embodiment of the present invention. In the present embodiment (FIG. 6), the switch 306 in the reading unit 203 is deleted from the first embodiment (FIG. 3). The switch 307 in FIG. 6 is a switch in which the switches 306 and 307 in FIG. 3 are made common, and is driven by a signal PTSN (FIG. 7).

  FIG. 7 is a timing chart showing a method for driving the imaging apparatus 200 according to the present embodiment, and shows a reading operation when the imaging apparatus 200 performs a rolling shutter operation. Hereinafter, differences of the present embodiment (FIG. 7) from the first embodiment (FIG. 4) will be described. A signal PTSN in FIG. 7 is a signal obtained by sharing the signals PTS and PTN in FIG. 4, and is a logical sum (OR) signal of the signals PTS and PTN in FIG. 4. The signal PTSN becomes high level at times T3 to T7, T11 to T15, and T18 to T19. Further, the signal PAD becomes high level at times T4 to T5, T12 to T13, etc. in addition to the times T8 to T10 and T16 to T17.

  At times T3 to T5, the switch 307 is turned on due to the high level of the signal PTSN, and the noise component is transferred from the amplification amplifier 304 to the capacitor 308. At times T4 to T5, the switch 309 is turned on by the high level of the signal PAD, and the noise component of the capacitor 308 is transferred to the comparator 310. As a result, the noise component is converted from analog to digital.

  At times T5 to T7, the switch 307 is turned on by the high level of the signal PTSN, and the photoelectric conversion signal is transferred from the amplifier 304 to the capacitor 308. At times T8 to T10, the switch 309 is turned on by the high level of the signal PAD, and the photoelectric conversion signal of the capacitor 308 is transferred to the comparator 310. As a result, the photoelectric conversion signal is converted from analog to digital.

  As described above, from time T4 to T5, the first switch 307 and the second switch 309 input a signal based on the output signal of the pixel 100 in the reset release state of the pixel 100 to the analog-digital conversion unit. After that, at times T <b> 5 to T <b> 7, the first switch 307 writes a signal based on photoelectric conversion by the photoelectric conversion unit of the pixel 100 to the capacitor 308. After that, at times T8 to T10, the second switch 309 inputs a signal based on photoelectric conversion by the photoelectric conversion unit of the pixel 100 written in the capacitor 308 to the analog-digital conversion unit.

  Compared with the first embodiment, the present embodiment has an advantage that the control load can be reduced by reducing the switch 306 in FIG. 3 and sharing the signals PTS and PTN as the signal PTSN.

  The above-described embodiments are merely examples of implementation in carrying out the present invention, and the technical scope of the present invention should not be construed in a limited manner. That is, the present invention can be implemented in various forms without departing from the technical idea or the main features thereof.

100 pixels, 101 photodiode, 306, 307, 309 switch, 308 capacitor, 310 comparator, 311 ramp voltage generator, 312 counter, 313 clock supply means, 314a, 314b latch

Claims (9)

A pixel including a photoelectric conversion unit;
A holding unit for holding a signal;
An analog-to-digital converter that converts the signal from analog to digital,
The analog-to-digital conversion unit converts a signal based on the output signal of the pixel in the reset release state of the pixel from analog to digital,
The analog-to-digital conversion unit inputs a signal based on photoelectric conversion by the photoelectric conversion unit of the pixel via the holding unit, and converts the input signal based on photoelectric conversion by the photoelectric conversion unit of the pixel from analog to digital Converted to
During the period in which the analog-to-digital conversion unit converts the signal based on the output signal of the pixel in the reset release state of the pixel from analog to digital, a signal based on photoelectric conversion by the photoelectric conversion unit of the pixel is written to the holding unit An imaging device characterized by being before or after a predetermined period. The analog-to-digital conversion unit converts a signal based on the output signal of the pixel in the reset release state of the pixel from analog to digital,
Thereafter, a signal based on photoelectric conversion by the photoelectric conversion unit of the pixel is written to the holding unit,
2. The image pickup apparatus according to claim 1, wherein the analog-to-digital conversion unit converts a signal based on photoelectric conversion of the pixel written in the holding unit by the photoelectric conversion unit from analog to digital. A signal based on photoelectric conversion by the photoelectric conversion unit of the pixel is written to the holding unit,
Thereafter, the analog-to-digital conversion unit converts a signal based on photoelectric conversion by the photoelectric conversion unit of the pixel written in the holding unit from analog to digital,
2. The image pickup apparatus according to claim 1, wherein the analog-to-digital conversion unit converts a signal based on an output signal of the pixel in a reset release state of the pixel from analog to digital. A first switch for writing a signal based on photoelectric conversion by the photoelectric conversion unit of the pixel to the holding unit;
A second switch for inputting a signal based on photoelectric conversion by the photoelectric conversion unit of the pixel written in the holding unit to the analog-digital conversion unit;
4. The device according to claim 1, further comprising: a third switch for inputting a signal based on an output signal of the pixel in a reset release state of the pixel to the analog-digital conversion unit. Imaging device. A first switch for writing a signal based on photoelectric conversion by the photoelectric conversion unit of the pixel to the holding unit;
A second switch for inputting a signal based on photoelectric conversion by the photoelectric conversion unit of the pixel written in the holding unit to the analog-digital conversion unit;
A third switch for inputting a signal based on the output signal of the pixel in the reset release state of the pixel to the analog-digital conversion unit;
The third switch inputs a signal based on the output signal of the pixel in the reset release state of the pixel to the analog-digital conversion unit,
Thereafter, the first switch writes a signal based on photoelectric conversion by the photoelectric conversion unit of the pixel to the holding unit,
3. The imaging apparatus according to claim 2, wherein the second switch inputs a signal based on photoelectric conversion of the pixel written in the holding unit by the photoelectric conversion unit to the analog-digital conversion unit. . A first switch for writing a signal based on the output signal of the pixel to the holding unit;
4. The device according to claim 1, further comprising: a second switch for inputting a signal based on the output signal of the pixel written in the holding unit to the analog-digital conversion unit. Imaging device. A first switch for writing a signal based on the output signal of the pixel to the holding unit;
A second switch for inputting a signal based on the output signal of the pixel written in the holding unit to the analog-digital conversion unit;
The first switch and the second switch input a signal based on the output signal of the pixel in the reset release state of the pixel to the analog-digital conversion unit,
Thereafter, the first switch writes a signal based on photoelectric conversion by the photoelectric conversion unit of the pixel to the holding unit,
3. The imaging apparatus according to claim 2, wherein the second switch inputs a signal based on photoelectric conversion of the pixel written in the holding unit by the photoelectric conversion unit to the analog-digital conversion unit. .   Furthermore, the signal based on the photoelectric conversion by the photoelectric conversion unit of the pixel converted by the analog-digital conversion unit, and the signal based on the output signal of the pixel in the reset release state of the pixel converted by the analog-digital conversion unit The imaging apparatus according to claim 1, further comprising a difference output circuit that outputs a difference between the image pickup apparatus and the image pickup apparatus. A pixel including a photoelectric conversion unit;
A holding unit for holding a signal;
A method for driving an imaging apparatus having an analog-to-digital converter that converts a signal from analog to digital,
Converting the signal based on the output signal of the pixel in the reset release state of the pixel from analog to digital by the analog-digital conversion unit;
The analog-to-digital conversion unit inputs a signal based on photoelectric conversion by the photoelectric conversion unit of the pixel via the holding unit, and the input signal based on photoelectric conversion by the photoelectric conversion unit of the pixel is converted from analog to digital. And converting to
During the period in which the analog-to-digital conversion unit converts the signal based on the output signal of the pixel in the reset release state of the pixel from analog to digital, a signal based on photoelectric conversion by the photoelectric conversion unit of the pixel is written to the holding unit A method for driving an imaging apparatus, characterized by being before or after a predetermined period.

Images