JP2016171698A - Motor control device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a motor control device capable of executing processing at high speed while suppressing increase in power consumption.SOLUTION: According to an embodiment, vector operation means performs UVW/αβ coordinate conversion processing and αβ/dq coordinate conversion processing on the basis of current flowing in a winding of a motor detected by current detection means to calculate d-axis and q-axis current. Position information output means outputs information on a rotation position of the motor; current command output means outputs a d-axis and q-axis current commands so that a control state of the motor agrees with a control command given from the outside. Voltage control means outputs a d-axis and q-axis voltage commands so that the d-axis and q-axis current agree with the d-axis and q-axis current commands, respectively. Voltage command value operation means uses a dq/αβ coordinate converter to perform, on the basis of the d-axis and q-axis voltage commands, conversion to a value displayed by an α-β coordinate system, and uses an αβ/UVW coordinate converter to calculate a voltage command value for each phase of the motor. PWM signal operation means outputs a PWM signal in order to supply voltage agreeing with the voltage command value to the motor. Processing executed by two or more of the means described above is performed by a plurality of dedicated processors.SELECTED DRAWING: Figure 1

Description

  Embodiments described herein relate generally to a motor control device for driving a motor by a PWM signal generated by vector control.

  Conventionally, a microprocessor and a DSP (Digital Signal Processor) are used for motor drive control. When coding these software, the software designer needs to make many functional blocks related to vector control into software, so skillful skills are required, and the number of development days and achievement of specification requirements depends on the skill of the engineer. And coding experience.

  In order to solve such a problem, a technique in which the motor control sequence is entirely implemented in hardware has been developed (see, for example, Patent Document 1). According to the technique described in Patent Document 1, a plurality of operation control modules are configured by digital hardware based on z conversion, and the motor is controlled by causing the sequencer to execute these operation control modules in a set order. Yes. In this case, it is not necessary to develop software and the number of setting parameters is reduced, so that the motor can be easily controlled, and the processing can be executed at a higher speed than when the function is realized by software.

  However, in the above technology, since the module for performing the control operation is implemented in hardware, a specific function desired by the user cannot be added, and it becomes difficult to use it for a product that requires a specific process. End up.

  In order to solve the above-described problem, a technique has been proposed in which a control block having only a fixed processing portion that is common is hardened and a control block that requires a user's degree of freedom is configured by software (see, for example, Patent Document 2). ).

JP 2005-168282 A JP 2009-214940 A

However, in the technique described in Patent Document 2, since a part of the processing depends on software, in order to execute the processing at high speed, it is necessary to increase the clock frequency of the processor, which greatly increases power consumption.
Therefore, a motor control device capable of executing processing at high speed while suppressing an increase in power consumption is provided.

  According to the first aspect of the present invention, when the current detection unit detects a current flowing through the winding of the motor, the vector calculation unit performs a UVW / αβ coordinate conversion process and an αβ / dq coordinate conversion process based on the current, and d Determine the axis and q-axis currents. The position information output means outputs information on the rotational position of the motor, and the current command output means outputs the d-axis and q-axis current commands so that the control state of the motor matches the control command given from the outside. .

  The voltage control means outputs the d-axis and q-axis voltage commands so that the d-axis and q-axis currents coincide with the d-axis and q-axis current commands, respectively, and the voltage command value calculation means outputs the d-axis and q-axis voltage commands. Is converted to a value expressed in the α-β coordinate system by the dq / αβ coordinate converter, and each phase voltage command value of the motor is obtained by the αβ / UVW coordinate converter. The PWM signal calculation means outputs a PWM signal in order to supply a voltage that matches the voltage command value to the motor. And the process which a some means performs among these is performed using a some dedicated processor.

Functional block diagram of a control device that controls the drive of a motor by generating a PWM signal by vector control according to the first embodiment FIG. 1 is a diagram showing the control processing shown in FIG. 1 divided into DC voltage processing, current / voltage processing, and angle processing. (A) is a case where the processing content shown in FIG. 1 is processed by one processor core, and (b) is a diagram showing an example of distribution to two processor cores (Part 1). (A) is a case where the processing contents shown in FIG. 1 are processed by one processor core, and (b) is a diagram showing an example of distribution to two processor cores (Part 2). Diagram showing the configuration of the motor control device The figure which shows the device for motor control shown in FIG. 5 with the hardware constitution nearer to the actual condition Memory access timing chart In the second embodiment, (a) shows a case where the processing content added to the processing shown in FIG. 1 is processed by one processor core, and (b) shows an example of distribution to three processor cores. The figure which is 3rd Embodiment and shows the case where two motors are controlled by two processors

(First embodiment)
The first embodiment will be described below with reference to FIGS. FIG. 1 is a functional block diagram of a control device that generates a PWM signal by vector control and controls driving of a motor. In the vector control, the current flowing in the armature winding of the motor is separated into the direction of the magnetic flux of the permanent magnet and the direction orthogonal thereto, and these are adjusted independently to control the magnetic flux and the generated torque. In the current control, a d-axis current (excitation current) and a q-axis current (torque component current) expressed in a dq coordinate system that rotates with the rotor of the motor are used.

  Functionally, the motor control device 1 has a speed control unit 2 (current command output means), a current control unit 3 (voltage control means), a dq / αβ coordinate (inverse Park) converter 4 (voltage command value calculation means). , Αβ / UVW coordinate (reverse Clark) converter 5 (voltage command value calculation means), PWM forming unit 6 (PWM signal calculation means), A / D conversion unit 7 (current detection means), UVW / αβ coordinate (Clark) Converter 8 (vector operation means), αβ / dq coordinate (Park) converter 9 (vector operation means), sin / cos operation section 10, R / D conversion section 11 (position information output means, position detection means) and speed A calculation unit 12 is provided and performs a sequence control operation in a steady state.

  The speed control unit 2 is configured by connecting a subtractor 13 and a PID controller 14 that controls the subtraction result of the subtractor 13 by PID (Proportional-Integral-Differential). The PID controller 14 includes a d-axis current. Command Idref and q-axis current command Iqref are output. The current control unit 3 includes subtracters 15d and 15q, and PID controllers 16d and 16q. The subtractor 15d subtracts the d-axis current Id from the d-axis current command Idref given from the speed control unit 2 to obtain a d-axis current deviation ΔId. The subtractor 15q subtracts the q-axis current Iq from the q-axis current command Iqref given from the speed control unit 2 to obtain the q-axis current deviation ΔIq. The PID control unit 16d performs a PID calculation on the d-axis current deviation ΔId, and generates a d-axis voltage command Vd expressed in the dq coordinate system. In addition, the PID control unit 16q performs a PID calculation on the q-axis current deviation ΔIq, and generates a q-axis voltage command Vq expressed in the dq coordinate system.

  The d-axis voltage command Vd and the q-axis voltage command Vq are converted into values expressed in the α-β coordinate system by the dq / αβ coordinate converter 4, and each phase voltage command Vu, Vv is further converted by the αβ / UVW coordinate converter 5. , Vw. For the calculation of the coordinate conversion in the dq / αβ coordinate converter 4, a value obtained by calculating sin θ and cos θ through the sin / cos calculation unit 10 by the rotation angle θ of the rotor is used.

  The speed control unit 2 and the αβ / UVW coordinate converter 5 are also supplied with data Vdc_adc obtained by A / D converting the DC power supply voltage Vdc supplied to the inverter circuit 17 by the A / D conversion unit 7. In consideration of the power supply voltage Vdc, the d-axis current command Idref, the q-axis current command Iqref, and the phase voltage commands Vu, Vv, Vw are output. The R / D conversion unit 11 converts a signal from a resolver 19 (position information output means, position detection means) that is a rotation angle detector of the rotor of the motor 18 into a rotation angle θ of the rotor, and a speed calculation unit. 12 is input. The speed calculation unit 12 calculates an angular speed ω of the motor 18 based on the rotation angle θ and inputs it to the speed control unit 2.

  Each phase output terminal of the inverter circuit 17 is connected to each phase stator winding (not shown) of the motor 18, and current sensors 20 u, 20 v, 20 w (current detection) are connected to the wiring connecting the two. Means) are arranged. The current sensors 20u, 20v, and 20w detect the phase currents Iu, Iv, and Iw, respectively, and input detection signals to the A / D conversion unit 7. The current sensors 20u, 20v, and 20w may be disposed on the lower arm side of the inverter circuit 17. Further, a shunt resistor may be used instead of the current sensor 20. The A / D converter 7 inputs data obtained by A / D converting the phase currents Iu, Iv, and Iw to the UVW / αβ coordinate converter 8.

  The UVW / αβ coordinate converter 8 converts the input data into an α-β coordinate system and inputs it to the αβ / dq coordinate converter 9, and the αβ / dq coordinate converter 9 converts the input data into d− It converts into q coordinate system, calculates d-axis current Id and q-axis current Iq, and inputs them to current control unit 3. The αβ / dq coordinate converter 9 receives sin θ and cos θ calculated by the sin / cos calculation unit 10.

  As shown in FIG. 2, the control process shown in FIG. 1 is roughly divided into three processes: DC voltage processing, current / voltage processing, and angle processing. Further, as indicated by circles in the figure, the current / voltage processing is divided into α-axis / d-axis processing and β-axis / q-axis processing, and the angle processing is divided into SIN calculation and COS calculation. Therefore, these processes can be parallelized.

  3A and 4A show a case where the processing content shown in FIG. 1 is processed as steps S1 to S12 by one processor core. 3 (b) and 4 (b) show an example in which these processes are distributed to two processor cores in consideration of the part that can be parallelized as shown in FIG. ing. In FIG. 3B, steps S4 and S6 are divided into steps S4 (α) and S4 (β) and steps S6 (S) and S6 (C), respectively. Sorted into (2). On the other hand, in FIG. 3B, step S4 is assigned to the processor core (1), and step S6 is assigned to the processor core (2). In this case, it is necessary to consider which processor core performs each control process so that the process of each processor core is averaged as much as possible.

  FIG. 5 shows a configuration of the motor control device 21 in the present embodiment. Apart from the main processor core 22, there are two dedicated processor cores 23 (1) and 23 (2) specialized for motor control, and each executes a different control function (task). The distribution of each process is the same as that shown in FIG. In addition, there is a memory 24 (shared memory) that the cores 22, 23 (1) and 23 (2) access in common, and data transfer between the processor cores 23 (1) and 23 (2) Is done through.

The processor core 23 (1) executes the following processes.
DC voltage filter processing (S1)
-Output correction coefficient calculation; S11
・ Motor current offset correction; S2
・ SIN operation; S6 (S)
-Clark conversion (α-axis current calculation); S4 (α)
Park conversion (d-axis current calculation); S7 (d)
D-axis current control; S8 (d)
D-axis non-interference control; S9 (d)
-Reverse Park conversion (α-axis voltage calculation); S10 (α)
・ Reverse Clark conversion; S12

On the other hand, the processor core 23 (2) executes the following processes.
・ Angular velocity calculation / filter processing; S3
・ Phase interpolation; S5
・ COS operation; S6 (C)
-Clark conversion (β-axis current calculation); S4 (β)
Park conversion (q-axis current calculation); S7 (q)
Q-axis current control; S8 (q)
Q-axis non-interference control; S9 (q)
-Reverse Park conversion (β-axis voltage calculation); S10 (β)

In the following, processing for transferring parameters necessary for mutual computation between the processor cores 23 (1) and 23 (2) via the memory 24 will be described.
<S5 → S6 (S)>
The rotation angle θ output in the phase interpolation (S5) of the processor core 23 (2) is stored in the memory 24 because it is also used in the SIN calculation (S6 (S)) of the processor core 23 (1).

<S2 → S4 (β)>
The V-phase current Iv and the W-phase current Iw output in the motor current offset correction (S2) of the processor core 23 (1) are also used in the Clark conversion (S4 (β)) of the processor core 23 (2). It is stored in the memory 24.

<S6 (S) → S4 (β)>
The sin θ output by the SIN calculation (S6 (S)) of the processor core 23 (1) using the rotation angle θ stored in the memory 24 is the Clark transform (S4 (β)) of the processor core 23 (2). However, it is stored in the memory 24 for use.

<S6 (C) → S4 (α)>
The cos θ output in the COS operation S6 (C) of the processor core 23 (2) is stored in the memory 24 because it is also used in the Clark conversion (S4 (α)) of the processor core 23 (1).

<Waiting for execution of S6 → S4>
Since sin θ and cos θ are used in the Clark transform (S4 (α) and S4 (β)) of the processor cores 23 (1) and 23 (2), the SIN operation (S6 (S)) of the processor core 23 (1) is performed. In addition, processing wait is provided until the COS operation (S6 (C)) of the processor core 23 (2) is completed.

<S4 (α) → S7 (q)>
The α-axis current Iα output by the Clark conversion (S4 (α)) of the processor core 23 (1) using cos θ stored in the memory 24 is converted into the Park conversion (S7 (q)) of the processor core 23 (2). ) Is stored in the memory 24 for use.

<S4 (β) → S7 (d)>
The β-axis current Iβ output by the Clark conversion (S4 (β)) of the processor core 23 (2) using Iv, Iw, sin θ stored in the memory 24 is the Park conversion ( Since it is also used in S7 (d)), it is stored in the memory 24.

<Waiting for execution of S4 → S7>
Since the α-axis current Iα and the β-axis current Iβ are used in the Park transformation (S7 (d) and S7 (q)) of the processor cores 23 (1) and 23 (2), the processor cores 23 (1) and 23 The process waits until the Clark conversion (S4 (α) and S4 (β)) of (2) is completed.

<S9 (d) → S10 (β)>
Since the d-axis voltage Vd ′ output in the d-axis non-interference control (S9 (d)) of the processor core 23 (1) is also used in the inverse Park conversion (S10 (β)) of the processor core 23 (2). It is stored in the memory 24.

<S9 (q) → S10 (α)>
On the other hand, the q-axis voltage Vq ′ output in the q-axis non-interference control (S9 (q)) of the processor core 23 (2) is also used in the inverse Park conversion (S10 (α)) of the processor core 23 (1). Therefore, it is stored in the memory 24.

<Waiting for execution of S9 → S10>
Since the d-axis voltage Vd ′ and the q-axis voltage Vq ′ are used in the inverse Park transform (S10 (α) and S10 (β)) of the processor cores 23 (1) and 23 (2), the processor core 23 (1 ) And 23 (2), the process waits until the non-interference control (S9 (d) and S9 (q)) is completed.

<S10 (β) → S12>
The β-axis voltage Vβ output by the inverse Park transformation of the processor core 23 (2) (S10 (β)) using the d-axis voltage Vd ′ stored in the memory 24 is the inverse Clark of the processor core 23 (1). Since it is also used in the conversion (S12), it is stored in the memory 24.

<Waiting for execution of S10 → S12>
Since the β-axis voltage Vβ is used in the inverse Clark transform (S12) of the processor core 23 (1), the inverse Park transform (S10 (α) and S10 (β) of the processor cores 23 (1) and 23 (2) is used. ) To wait until processing is completed.

  Of the processing results executed by the two processor cores 23 (1) and 23 (2) as described above, parameters necessary for the other party's processing are transferred to the other party via the memory 24 and necessary. Accordingly, by providing a wait (wait) for the processing, the processing is synchronized with each other, and the processing of steps S1 to S12 proceeds. The process synchronization is performed by polling or interruption, for example.

  FIG. 6 shows the motor control device 21 shown in FIG. 5 with a hardware configuration closer to the actual situation. The processor core 23 includes an arithmetic unit 25, a local memory (RAM) 26, and an indirect access control unit 27. When the processor core 23 accesses the memory (Shared RAM) 24, the access is made via the indirect access control unit 27 and the arbiter 28 that arbitrates the access to the memory 24.

  The main processor core 22 can also access the memory 26 of the processor core 23, and can also access the memory 24 via the arbiter 28. In the arbiter 28, the access right by the main processor core 22 and the processor cores 23 (1) and 23 (2) is, for example, the core 23 (1) → core 23 (2) → core 22 → core 23 (1) → ... and so on, are allocated cyclically (round robin method).

  FIG. 7 is a timing chart when the cores 22, 23 (1) and 23 (2) access the memory 24. The processor cores 23 (1) and 23 (2) issue read / write commands to the indirect access control units 27 (1) and 27 (2) when accessing the memory 24. The indirect access control unit 27 accesses the memory 24 when the processor cores 23 (1) and 23 (2) have access rights to the memory 24 according to the priority order described above. Access arbitration for the main processor core 22 is performed in the arbiter 28.

In addition, this is not limiting, for example
Core 23 (1) → Core 23 (2) 2 → Core 23 (1) → Core 22 →
In this way, the priority of the processor core 23 (1) can be set to be apparently high.

  As described above, according to the present embodiment, when the current sensors 20u, 20v, 20w detect the currents Iu, Iv, Iw flowing through the windings of the motor 18, the UVW / αβ coordinate converter 8 and the αβ / dq coordinate converter are detected. 9 performs a UVW / αβ coordinate conversion process and an αβ / dq coordinate conversion process based on the currents Iu, Iv, and Iw to obtain d-axis and q-axis currents. The resolver 19 outputs information related to the rotational position of the motor 18, and the speed control unit 2 allows the d-axis and q-axis current commands Idref and so that the control state of the motor 18 matches the control command ωref given from the outside. Iqref is output.

  The current control unit 3 outputs the d-axis and q-axis voltage commands Vd and Vq so that the d-axis and q-axis currents coincide with the d-axis and q-axis current commands, respectively, and the dq / αβ coordinate converter 4 Based on the axis and q axis voltage commands, the dq / αβ coordinate converter converts the values into the α-β coordinate system, and the αβ / UVW coordinate converter 5 converts the motor phase voltage command values Vu, Vv, Vw. Ask. The PWM control unit 6 outputs a PWM signal to supply the motor 18 with voltages that match the voltage command values Vu, Vv, and Vw.

  Then, the motor control device 21 performs the processing executed by these using dedicated processor cores 23 (1) and 23 (2). Specifically, the processor core 23 (1) is caused to execute processing relating to the α axis and the d axis, and the processor core 23 (2) is caused to execute processing relating to the β axis and the q axis. As a result, it is possible to speed up the drive control process of the motor 18 while suppressing power consumption without increasing the frequency of the operation clock of the processor cores 23 (1) and 23 (2). Further, since the control processing is realized by software processing of the processor cores 23 (1) and 23 (2), it is possible to flexibly cope with individual design changes for each user.

  Further, the processor cores 23 (1) and 23 (2) are provided with a memory 24 that is commonly accessed, and control parameters used mutually are transferred to each other via the memory 24. Accordingly, the processes distributed between the two can be executed smoothly. Then, by giving priority to access to the memory 24 by the processor cores 23 (1) and 23 (2), each processor core 23 (1), 23 (2) can be accessed even if access by each other competes. Each process can be executed efficiently.

  Furthermore, since the processing executed by each of the processor cores 23 (1) and 23 (2) is synchronized, even if the processing is distributed to both, the calculation parameters required at each processing stage Can be definitely obtained.

(Second Embodiment)
FIG. 8 shows a second embodiment. The same parts as those in the first embodiment are denoted by the same reference numerals, and the description thereof is omitted. Different parts will be described. In the second embodiment, as shown in FIG. 8A, in addition to the processing (S1 to S12) performed in the first embodiment, rectangular wave torque estimation (S13), rectangular wave torque control (S15), and rectangular wave Switching control (S16) is added. These processes are necessary when switching from the sine wave driving method to the rectangular wave driving method in order to improve the output of the motor 18, for example.

  Then, in order to execute these added processes, as shown in FIG. 8B, another processor core 23 (3) is used, and the processes in steps S13 to S15 are performed on the processor core 23 (3). Sorted to execute. In this way, the processing can be distributed to three or more dedicated processor cores 23 and executed. In addition, as other processes to be executed by the processor core 23 (3), for example, a filter process may be considered.

(Third embodiment)
FIG. 9 shows a third embodiment. FIG. 9A shows a control form of the motor 18 in the first embodiment, and one inverter circuit 17 and the motor 18 are controlled by two processor cores 23 (1) and 23 (2). However, if the processing of steps S1 to S12 is not distributed to the processor cores 23 (1) and 23 (2) and the processing of steps S1 to S12 is executed, as shown in FIG. It is also possible to control the inverter circuit 17 (1) and the motor 18 (1) by the processor core 23 (1) and to control the inverter circuit 17 (2) and the motor 18 (3) by the processor core 23 (2). Yes (however, the processing speed decreases).

  As described above, according to the third embodiment, since the processor cores 23 (1) and 23 (2) individually control the motors 18 (1) and 18 (2), it is necessary to execute the processing at high speed. If there is no control, such a control mode can be adopted.

(Other embodiments)
The position estimation may be performed by a position sensorless method without using the resolver 19.
The method of distributing processes is not limited to that shown in the first embodiment, and may be appropriately changed according to individual design.
Processing may be distributed using four or more processors.
Although several embodiments of the present invention have been described, these embodiments have been presented by way of example and are not intended to limit the scope of the invention. These novel embodiments can be implemented in various other forms, and various omissions, replacements, and changes can be made without departing from the scope of the invention. These embodiments and modifications thereof are included in the scope and gist of the invention, and are included in the invention described in the claims and the equivalents thereof.

  In the drawing, 1 is a motor control device, 2 is a speed control unit (current command output means), 3 is a current control unit (voltage control means), 4 is a dq / αβ coordinate converter (voltage command value calculation means), and 5 is αβ / UVW coordinate converter (voltage command value calculation means), 6 is a PWM forming section (PWM signal calculation means), 7 is an A / D conversion section (current detection means), and 8 is a UVW / αβ coordinate converter (vector calculation). Means), 9 is an αβ / dq coordinate converter 9 (vector calculation means), 11 is an R / D converter (position information output means, position detection means), 19 is a resolver (position information output means, position detection means), Reference numeral 20 denotes a current sensor (current detection means), 21 denotes a motor control device, and 23 (1) and 23 (2) denote processor cores.

Claims (6)

Current detection means for detecting the current flowing in the motor winding;
Vector calculation means for performing UVW / αβ coordinate conversion processing and αβ / dq coordinate conversion processing based on the current to obtain a d-axis current that is an excitation component current and a q-axis current that is a torque component current;
Position information output means for outputting information on the rotational position of the motor;
Current command output means for outputting a d-axis current command and a q-axis current command so that the control state of the motor matches the control command given from outside;
Voltage control means for outputting a d-axis voltage command and a q-axis voltage command so that the d-axis current and the q-axis current coincide with the d-axis current command and the q-axis current command, respectively;
Based on the d-axis voltage command and the q-axis voltage command, the dq / αβ coordinate converter converts the value into a value expressed in the α-β coordinate system, and the αβ / UVW coordinate converter determines the phase voltage command value of the motor. Voltage command value calculation means;
PWM signal calculation means for outputting a PWM signal in order to supply the motor with a voltage that matches the voltage command value,
The processing executed by a plurality of means among the current detection means, the vector calculation means, the current control means, the voltage command value calculation means, and the PWM signal calculation means is performed using a plurality of dedicated processors. Motor control device.   In the configuration having two dedicated processors, one processor is caused to execute processing relating to an α axis and a d axis, and the other processor is caused to execute processing relating to a β axis and a q axis. Item 2. A motor control device according to Item 1.   3. The motor control device according to claim 1, further comprising a shared memory that is accessed in common by the plurality of dedicated processors.   4. The motor control device according to claim 3, wherein a priority is given to access to the shared memory by the plurality of dedicated processors.   5. The motor control device according to claim 1, wherein processing executed in each of the plurality of dedicated processors is synchronized. 6.   The motor control device according to any one of claims 1 to 5, wherein the plurality of dedicated processors individually control the motor.

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