JP2016152238A - Power semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To obtain a power semiconductor device in which non-uniformity of heat generation between power semiconductor elements when the power semiconductor elements are turned on can be relaxed.SOLUTION: In a power semiconductor device, a plurality of power semiconductor elements are arranged from a central part to a peripheral part on each of two conductor substrates facing each other, main electrodes of each power semiconductor element being electrically joined to the conductor substrates, respectively, and a current flowing from one conductor substrate to the other conductor substrate is switch-controlled by applying a control signal to a control electrode of each of the plurality of power semiconductor elements. When the plurality of power semiconductor elements are turned on in the power semiconductor device, power semiconductor elements disposed at the peripheral part are turned on after power semiconductor elements disposed at the central part are turned on.SELECTED DRAWING: Figure 1

Description

  The present invention relates to reduction of eddy current loss when a power semiconductor device configured to flow a large current in parallel to a large number of power semiconductor elements arranged on a conductive substrate.

  Power semiconductor elements are used in various fields for controlling current. In order to control a large current that cannot be controlled by one power semiconductor element, a module in which power semiconductor elements are connected in parallel is used. In order to control a very large current, a module in which a large number of power semiconductor elements are arranged between two substrates of a conductor such as copper is used. Switching on and off a large current flowing between two conductive substrates by turning on and off is performed.

  In such a configuration, it is an object to make the current sharing of a large number of power semiconductor elements uniform, and a method of switching a large number of power semiconductor elements as simultaneously as possible has been proposed. For example, Patent Document 1 proposes a configuration in which the length of the control wiring to each semiconductor switch is made equal, or a semiconductor switch chip with a short turn-on time is arranged closer to the outer periphery.

  On the other hand, Patent Document 2 describes that when current switching control is performed by a single power semiconductor element, it is necessary to take measures against a so-called skin effect in which current flows unevenly in the periphery of the element.

Japanese Patent Laid-Open No. 2000-082773 JP 2003-017512 A

  According to the configuration described in Patent Document 1, the length of the control wiring to each semiconductor switch is made equal, or the semiconductor switch chip having a short turn-on time is arranged near the outer periphery. According to knowledge, the current sharing is considered to be uniform. However, based on the factors found by the present inventors, which will be described later, the current sharing when the current is turned on becomes more uneven, and when the semiconductor switch arranged in the peripheral part and the semiconductor switch arranged in the central part are turned on The heat generation becomes more uneven.

  Further, whether or not the skin effect described in Patent Document 2 that occurs in one power semiconductor element also occurs in a power semiconductor device configured to operate a number of power semiconductor elements in parallel, Whether or not a countermeasure is necessary is not clear at least from Patent Document 2. However, as will be described later, due to the consideration of the present inventors, a skin effect also occurs in a power semiconductor device configured to operate a large number of power semiconductor elements in parallel, and heat is generated between the power semiconductor elements due to this cause. It has become clear that measures to alleviate the non-uniformity may be required.

  The present invention has been made to solve the above-described problems, and an object of the present invention is to obtain a power semiconductor device that can alleviate uneven heat generation between power semiconductor elements at the time of turn-on.

  In the present invention, a plurality of power semiconductor elements each having a main electrode electrically joined to two opposing conductor substrates are arranged from the central portion to the peripheral portion of the conductor substrate. In a power semiconductor device that controls switching of the current flowing through the other conductor substrate by applying a control signal to the control electrodes of the plurality of power semiconductor elements, when the plurality of power semiconductor elements are turned on, The arranged power semiconductor element was turned on later than the arranged power semiconductor element.

  According to the present invention, it is possible to provide a power semiconductor device in which heat generation of the power semiconductor elements arranged in the peripheral portion is suppressed and unevenness of heat generation of each power semiconductor element is reduced.

It is a top view which shows schematic structure of the power semiconductor device by Embodiment 1 of this invention. It is a top view and a side view of a power semiconductor device to which the present invention is applied. It is a diagram which shows operation | movement of the semiconductor device for electric power by Embodiment 1 of this invention. It is a diagram explaining operation of a conventional power semiconductor device as a comparative example. It is a diagram explaining operation | movement of the power semiconductor device by Embodiment 1 of this invention. It is a figure explaining another operation | movement of the power semiconductor device by Embodiment 1 of this invention. It is a diagram explaining the state of the conventional power semiconductor device as a comparative example. It is a figure explaining the effect of the power semiconductor device by Embodiment 1 of this invention in contrast with FIG. It is a top view which shows another schematic structure of the power semiconductor device by Embodiment 1 of this invention. It is a top view which shows another schematic structure of the power semiconductor device by Embodiment 1 of this invention. It is a top view which shows another schematic structure of the power semiconductor device by Embodiment 1 of this invention. It is the top view and side view which show another schematic structure of the power semiconductor device by Embodiment 1 of this invention. It is a top view which shows schematic structure of the semiconductor device for electric power by Embodiment 3 of this invention. It is a top view which shows another schematic structure of the semiconductor device for electric power by Embodiment 3 of this invention. It is a top view which shows another schematic structure of the power semiconductor device by Embodiment 3 of this invention.

Embodiment 1 FIG.
FIG. 2 is a diagram showing a power semiconductor device 1 to which the present invention is applied. FIG. 2A is a top view in which a conductor substrate 51 described later is removed, and FIG. 2B is a side view. As shown in FIG. 2, in the power semiconductor device 1, a plurality of power semiconductor elements 3 are disposed between two conductive substrates, that is, a conductive substrate 51 and a conductive substrate 52 that face each other. Two main electrodes (for example, an emitter and a collector in the case of IGBT and a drain and a source in the case of MOSFET) through which the main current of the power semiconductor element 3 flows are joined to the conductor substrate 51 and the conductor substrate 52, respectively. Each power semiconductor element 3 includes a control electrode (for example, gate of IGBT or MOSFET), and the power semiconductor element 3 is turned on / off by applying an on / off control signal to the control electrode. A current flows between the conductive substrate 51 and the conductive substrate 52 when the power semiconductor element 3 is on.

  When the power semiconductor element is turned on from off, that is, when the power semiconductor element is turned on, the current rise time is as fast as about 1 μs, and at the time of rise, the current contains many high-frequency components. As described above, since many high-frequency components are included when the power semiconductor element is turned on, a so-called skin effect occurs in which current flows concentratedly on the skin of the conductor. The copper skin thickness corresponding to a current rise time of about 1 μs is about 0.1 mm. Power semiconductor elements have a higher resistance than copper and a skin thickness of about several tens of millimeters. On the other hand, the width (the width of the conductor substrate) of the power semiconductor device to which a large current is applied as shown in FIG. 2 is several hundred mm. It is well known that when a high-frequency current flows through a bus bar or the like having a large cross-sectional area, it concentrates on the surface of the bus bar conductor. Similarly, the power semiconductor device has a structure in which a large number of elements are arranged on a wide and large conductive substrate. When the width of the conductive substrate is sufficiently larger than the skin thickness, the power semiconductor device is orthogonal to the surface of the conductive substrate. Since the current flows in the direction of the current, the current flows in a concentrated manner in the power semiconductor element arranged in the peripheral portion of the conductor substrate as the current 6 indicated by the arrow in FIG.

  The present invention has been devised in order to alleviate non-uniformity of heat generation of a plurality of power semiconductor elements due to current concentration at the peripheral portion, which occurs at the time of rising of this current. FIG. 1 is a diagram for explaining the operation of the power semiconductor device 1 according to the first embodiment of the present invention. FIG. 1A is a diagram illustrating the operation state of step 1 immediately after the input control signal is turned on. In the figure, a white element 10 is an off-state element, and is referred to as a peripheral power semiconductor element 10 herein. An element 12 indicated by hatching represents an on-state element, and is referred to herein as a central power semiconductor element 12. FIG. 1B is a diagram illustrating the operation state of step 2 after a lapse of time from the time when the control signal is turned on. As shown in FIG. 2B, in step 2, all the power semiconductor elements 3 are turned on. As described above, a part of the power semiconductor elements 3 arranged in the peripheral portion of the power semiconductor element 3 is used as the peripheral power semiconductor element 10, and the central power that is the other power semiconductor element 3 is used. The semiconductor element 12 is turned on later than the semiconductor element 12. The number of the peripheral power semiconductor elements 10 is not limited. Among the power semiconductor elements 3, at least a part of the power semiconductor elements 3 arranged in the periphery are used as the peripheral power semiconductor elements 10. What is necessary is just to comprise so that it may turn on later than the center part power semiconductor element 12 which is a power semiconductor element. Further, the central power semiconductor element 12 is a part of the central part, in the extreme case, one element, and the other part is the peripheral power semiconductor element 10 and is turned on later than the central power semiconductor element 12. You may comprise.

  FIG. 3 is a diagram showing the timing when the power semiconductor element is turned on. FIG. 3A shows the operation of the central power semiconductor element 12. FIG. 3B is a diagram illustrating the operation of the peripheral power semiconductor element 10. In the power semiconductor device according to the present invention, when the power semiconductor element is turned on, the central power semiconductor element 12 is turned on before the peripheral power semiconductor element 10, and the central power semiconductor element 12 is turned on. The peripheral power semiconductor element 10 is configured to turn on after the time difference Δt. A specific configuration for realizing such a state will be described in the second and subsequent embodiments. Before explaining the effect of turning on the power semiconductor element with this time difference, the problem in the conventional case where all the elements are turned on simultaneously will be considered.

  FIG. 4 is a diagram for explaining the time dependency of heat generation in the conventional case where all elements are turned on simultaneously. FIG. 4A shows an energization pattern of the power semiconductor device, in which a certain current value is repeatedly turned on and off. FIG. 4B is an enlarged view of the portion surrounded by the ellipse in FIG. 4A, that is, the rising portion of the energization pattern. As shown in FIG. 4B, a current that rapidly rises in the power semiconductor device, that is, the conductive substrate flows, so that a current containing a large amount of high-frequency components flows, the current becomes constant thereafter, and the low-frequency components increase. FIG. 4C is a diagram showing time dependency of heat generation in the peripheral and central power semiconductor elements in the power semiconductor device 1 when the current of FIG. 4B is applied. Curve 20 shows the time dependency of the heat generation of the power semiconductor element arranged in the peripheral portion, and curve 22 shows the time dependency of the heat generation of the power semiconductor element arranged in the central portion.

When a sudden rising current containing a lot of high frequency components is applied, as described above, first, the current flows concentrated on the peripheral power semiconductor element, and hardly flows in the center. In this case, a larger amount of current flows in the peripheral power semiconductor element than in a steady state. In particular, since the heat generation is proportional to RI ² , the heat generation becomes larger. Furthermore, since the current rises quickly in the peripheral portion and di / dt increases, the magnetic flux density B also changes greatly, and eddy current flows. Thereby, the heat generation of the power semiconductor element in the peripheral portion is further increased as shown by the curve 20 in FIG. Thereafter, when the current becomes constant, the current begins to flow through the power semiconductor element in the central portion, so that the current is distributed to the entire power semiconductor element and heat generation in the peripheral power semiconductor element is reduced. Moreover, since eddy current is also reduced, heat generation is reduced, and finally heat generation is determined only by resistance and current value.

  When the current becomes constant, the high frequency component decreases and the low frequency component becomes mainly. Since the skin thickness is inversely proportional to the frequency, the skin thickness increases at low frequencies. Since the central part is far from the periphery, this corresponds to a thick skin. That is, only a low-frequency current flows in the central portion, and a slow current flows. For this reason, in the power semiconductor element in the central portion, the current gradually increases and the heat generation gradually increases as shown by the curve 22 in FIG. 4C, and the heat generation becomes a constant value at a certain time. The heat generation of the power semiconductor element in the center does not exceed the heat generation after a sufficient time has elapsed.

  Conventionally, since the number of power semiconductor elements is small, the conductor substrate is small, and the resistance of the element itself is large, the skin thickness is large, so the ratio of the skin thickness to the size of the conductor substrate (module) is the skin thickness. Was larger or almost the same, and the non-uniformity of heat generation due to the skin effect as explained above hardly occurred and became a problem.

  In recent years, large-scale power modules having a very large number of power semiconductor elements are being developed. Moreover, low resistance elements such as SiC are also in the practical use stage. When the resistance is low, the skin thickness is proportional to the square root of the resistivity, so that the skin thickness decreases as the resistivity decreases. As a result, non-uniform heat generation due to the skin thickness effect of the elements on the conductor substrate will become a problem in the future. The inventors are aware of this new problem and propose a method for mitigating non-uniform heat generation according to the present application.

  FIG. 5 is a diagram for explaining the operation and effect of the power semiconductor device according to the present invention. FIG. 5A is a diagram showing the time dependence of the total current flowing through the conductor substrate, as in FIG. 4B showing the conventional state. In the figure, a portion indicated by a straight line 30 is a conductor substrate current in a transition state until the current starts rising and becomes constant, and a portion indicated by a straight line 32 is a conductor substrate current after becoming constant. FIGS. 5B and 5C are the same as FIGS. 3A and 3B, and show the on / off states of the central power semiconductor element 12 and the peripheral power semiconductor element 10, respectively. FIG. FIG. 5D is a diagram showing the heat generation of the power semiconductor element of the present invention, where the curve 24 shows the heat generation of the peripheral power semiconductor element 10 and the curve 26 shows the heat generation of the central power semiconductor element 12. .

  In the present invention, first, the central power semiconductor element 12 is turned on first, and a current starts to flow through the central power semiconductor element 12. In this case, no current flows because the peripheral power semiconductor element 10 is off. The skin thickness is inversely proportional to the square root of the frequency. That is, the smaller the skin thickness value, the higher the frequency, and the larger the skin thickness value, the lower the frequency. Since the central portion is far from the periphery, only a low-frequency current having a large skin thickness flows through the central power semiconductor element 12. Accordingly, the current gradually increases in the central power semiconductor element 12 due to the skin effect. However, since the peripheral power semiconductor element 10 is in the off state, the current in the central power semiconductor element 12 rises faster than in the central power semiconductor element when all the elements are turned on simultaneously.

  The peripheral power semiconductor element 10 is turned on with a delay. At the position of the peripheral power semiconductor element 10, a high frequency component having a small skin thickness value tends to flow. That is, a current flows rapidly through the peripheral power semiconductor element 10. However, since the current has already flowed through the central power semiconductor element 12, the increase in current in the peripheral power semiconductor element 10 is small compared to when all the elements are turned on simultaneously. At least, the current peak is small and heat generation is small, di / dt is small, and the eddy current is small as compared with the case where all the elements are turned on simultaneously. Therefore, as shown by the curve 24 in FIG. 5D, the peak heat generation in the peripheral power semiconductor element 10 is the curve 20 in FIG. 4C showing the heat generation in the conventional peripheral power semiconductor element. Smaller than peak exotherm.

  Note that when the peripheral power semiconductor element 10 is not turned on and remains in an off state, the number of elements that are turned on increases the heat generation of each element even when the current reaches a steady state. Thus, the timing for turning on the peripheral power semiconductor element 10 is preferably between the time when the total current value flowing through the conductor substrate starts to rise and the time when the rise becomes constant. That is, the peripheral power semiconductor element 10 is preferably turned on during the transition state 30 shown in FIG. 5A until the current of the conductor substrate becomes constant. If the current is constant while the peripheral power semiconductor element 10 is in the OFF state, the entire current is shared only by the central power semiconductor element 12, and thus the current of the central power semiconductor element 12 increases. . In consideration of the above, peak heat generation can be minimized by adjusting the number of elements that are initially turned off and the turn-on timing of the peripheral power semiconductor element 10.

  In the above description, for the sake of simplicity, the example in which the full power semiconductor element 3 is turned on in two stages has been described. The turn-on is not limited to two stages, but the power semiconductor elements that are turned on from the center to the periphery may be sequentially turned on. In particular, when a low-resistance power semiconductor element such as SiC is employed, or when the substrate becomes large, the current concentration effect on the peripheral part becomes remarkable, and the power semiconductor element that is turned on is directed from the central part to the peripheral part. It becomes effective to increase it sequentially. An example of this is shown in FIG. 6A shows that only four central power semiconductor elements are turned on in step 1, FIG. 6B shows only two central power semiconductor elements turned on in step 2, and FIG. In FIG. 6 (d), the power semiconductor elements in the central portion are turned on, and in FIG. 6D, 36 power semiconductor elements are turned on in step 4, and the power semiconductor elements to be turned on are sequentially increased from the center toward the periphery. In FIG. 6, the number of power semiconductor elements that are turned on in four stages is increased. However, the number of power semiconductor elements is not limited to four, but is turned on sequentially from the center to the periphery in n stages (n is an integer of 2 or more). do it.

  7 and 8 model a power semiconductor element and a conductive substrate by a three-dimensional finite element method, and give a pulse current that rises quickly and becomes constant as shown in FIG. In this case, the time dependency of the heat generation of the power semiconductor element is shown.

  In the figure, only the heat generation in the middle and the peripheral power semiconductor elements among the many power semiconductor elements is shown. 7 and 8, reference numerals 28 and 29 denote peak heat generation positions, respectively. FIG. 7 is a diagram showing heat generation in the conventional case where all power semiconductor elements are turned on simultaneously. Initially, after the heat generation is concentrated on the peripheral power semiconductor elements and the peak heat generation 28 is applied, the heat generation gradually decreases to a constant value. On the other hand, it is shown that the heat generation of the power semiconductor element in the center portion indicated by the curve 22 gradually increases, approaches a constant value, and both approach the same heat generation. FIG. 8 is a diagram showing heat generation when the peripheral power semiconductor device is turned on later than the central power semiconductor device according to the present invention. A curve 26 indicates the heat generation of the power semiconductor element in the central portion, and a curve 24 indicates the heat generation of the power semiconductor element in the peripheral portion. When the peripheral power semiconductor element is turned on later than the central power semiconductor element and before the time when the current in FIG. 5 (a) becomes constant, the peripheral power semiconductor element is turned on to some extent. The optimized calculation results are shown. The peak heat generation 29 of the peripheral power semiconductor element according to the present invention shown in FIG. 8 is reduced to about ½ compared to the peak heat generation 28 of the conventional peripheral power semiconductor element of FIG. I understand that it is.

  In the above description, the conductive substrate is square. The power semiconductor device 1 may have various shapes such as a conductive substrate having a shape other than a square, that is, a power semiconductor element arranged in an elongated shape, a circle, or a rectangle. Hereinafter, the power semiconductor device 1 of a conductor substrate having various shapes other than the square will be described. In any pattern, as in the case of the square element pattern, the power semiconductor element disposed in the central portion is turned on first, and the power semiconductor element disposed in the peripheral portion is turned on later, and is turned on in two steps. Although the case of changing the element will be described, it goes without saying that the number of power semiconductor elements that are turned on in n stages may be increased. In the following drawings, the power semiconductor element that is turned on in Step 1, that is, the central power semiconductor element 12 is indicated by hatching, and the power semiconductor element that is not turned on, that is, the peripheral power semiconductor element 10 is indicated by white.

  In the example of FIG. 9, the conductor substrate is long and the arrangement of elements is also long. In this case, at least the peripheral power semiconductor elements 10 arranged at both ends are turned on later than the central power semiconductor element 12 arranged at the center.

  In the example of FIG. 10, the arrangement is when the conductive substrate is round. In this case, the peripheral power semiconductor element 10 around the periphery is turned on later than the central power semiconductor element 12 which is the other element. The peripheral power semiconductor element 10 is not necessarily limited to the peripheral power semiconductor element, and more power semiconductor elements are used as the peripheral power semiconductor elements 10 than the power semiconductor elements arranged in the center. You may make it turn on later.

  In the example of FIG. 11, the conductor substrate is rectangular. In this case, a large number of elements at both ends of the long side of the rectangle are used as the peripheral power semiconductor element 10 and are turned on later than the other central power semiconductor elements 12. In such a case, as shown in the figure, it is necessary to increase the peripheral power semiconductor element 10 in the longitudinal direction (X direction in the figure).

  In the above example, it is assumed that the current enters perpendicular to the paper surface, and the case where the power semiconductor elements to be turned on are arranged symmetrically is shown. In some cases, it is better to make the element to turn on asymmetric. FIG. 12 shows this example. For example, when current flows from the X direction, which is the horizontal direction, into the conductor substrate 51, the magnitude of the inductance differs between the elements on the left and right in the X direction, a difference occurs in the inductance of the current path, and the rise of the current with the smaller inductance And the current of the power semiconductor element may be biased in the left-right X direction. We want to minimize the number of devices that are turned off. In this case, it is better to turn off one side more. In other words, it may be effective if the element turned on in step 1 is asymmetric in the X direction and has a bias.

  In any case, the number of the peripheral power semiconductor elements 10 is not limited, but at least a part of the power semiconductor elements 3 arranged in the periphery of the power semiconductor elements 3 is the peripheral power semiconductor element 10. As such, it may be configured to turn on later than the central power semiconductor element 12, which is another power semiconductor element. With this configuration, heat generation when the peripheral power semiconductor element 10 is turned on is alleviated.

Embodiment 2. FIG.
In the second and subsequent embodiments, a specific configuration in which the central power semiconductor element is turned on before the peripheral power semiconductor element will be described. In an actual power semiconductor element, there are an element with a long turn-on time and a element with a short turn-on time, which is the time from when an on-control signal is applied to the control electrode to when it is turned on, that is, until the current between the main electrodes rises. Time varies. Before bonding to the conductor substrate, the turn-on time of each power semiconductor element is measured, the element having a short turn-on time is arranged in the central part, and the element having a long turn-on time is arranged in the peripheral part. That is, the peripheral power semiconductor element 10 described in the first embodiment is an element having a turn-on time longer than the turn-on time of the central power semiconductor element 12. Thus, by selecting and arranging elements having different characteristics of turn-on times, the operation described in the first embodiment can be realized even when the control signals for all power semiconductor elements are simultaneously turned on. . This method does not require a circuit for adjusting the timing at which the power semiconductor element is turned on, and the configuration is simplified.

  Patent Document 1 discloses a configuration in which an element having a short turn-on time is arranged in the peripheral part and an element having a long turn-on time is arranged in the central part. In this configuration, since an element having a short turn-on time is arranged in the peripheral portion, current flows into the peripheral portion at the time of turn-on, so that the current in the peripheral portion increases and heat generation of the peripheral element increases. That is, in Patent Document 1, the heat generation becomes more uneven. Considering an LR circuit as a device having a fast rise, the current rise time constant is L / R, which corresponds to a large R, and the loss increases.

  On the other hand, in the power semiconductor device according to the second embodiment of the present invention, the power semiconductor element having a short turn-on time is arranged in the central portion, and the power semiconductor element having a long turn-on time is arranged in the peripheral portion. As described in the first embodiment, heat generation at the turn-on time of the power semiconductor element in the peripheral portion can be alleviated.

Embodiment 3 FIG.
In the third embodiment, a configuration in which the ON timing of the peripheral power semiconductor element is positively delayed will be described. In order to simplify the description, the number of all power semiconductor elements arranged in the power semiconductor device 1 will be described as 16. However, if a plurality of power semiconductor elements are arranged from the central part to the peripheral part, There is no limit to the number of all power semiconductor elements. FIG. 13 is a schematic diagram showing the configuration of the power semiconductor device according to the third embodiment of the present invention. The control signal is applied from the control signal input point 202 to the control electrode of each power semiconductor element via the wiring 200 to the control electrode of each power semiconductor element. In the configuration of FIG. 13, the wiring to the control electrode of the peripheral power semiconductor element 10 that delays the ON timing is configured to be longer than the wiring to the control electrode of the central power semiconductor element 12. . This configuration has the effect of increasing the inductance of the wiring to the control electrode of the peripheral power semiconductor element 10. Since the inductance of the wiring is large, the rise in the voltage of the control signal of the peripheral power semiconductor element 10 is delayed, and the turn-on of the peripheral power semiconductor element 10 can be delayed from the turn-on of the central power semiconductor element 12. .

  FIG. 14 is a schematic diagram showing another configuration of the power semiconductor device according to the third embodiment of the present invention. In the configuration shown in FIG. 14, a delay member 210 that delays the control signal is inserted in the middle of the wiring to the control electrode of the peripheral power semiconductor element 10. The delay member 210 includes resistance and inductance. Furthermore, a delay circuit may be configured with a resistor and a capacitor as the delay member 210. As described above, the delay member 210 to be inserted may be any element or circuit that delays the control signal. By inserting the delay member 210 into the wiring to the control electrode of the peripheral power semiconductor element 10, the control signal applied to the control electrode of the peripheral power semiconductor element 10 is controlled by the central power semiconductor element 12. Since the control signal applied to the electrode is delayed, the turn-on of the peripheral power semiconductor element 10 can be delayed from the turn-on of the central power semiconductor element 12.

  FIG. 15 is a schematic diagram showing still another configuration of the power semiconductor device according to the third embodiment of the present invention. In the configuration shown in FIG. 15, a control signal for the central power semiconductor element is inputted from the input point 203 to the control electrode of the central power semiconductor element 12 and applied, and the peripheral power semiconductor A control signal for the peripheral power semiconductor element is inputted to the control electrode of the element 10 from the input point 204 and applied. The control signal for the peripheral power semiconductor element is a control signal that is turned on later than the control signal for the central power semiconductor element. As described above, the control signal applied to the control electrode of the central power semiconductor element 12 and the control signal applied to the control electrode of the peripheral power semiconductor element 10 are used as separate control signals. The semiconductor element 12 can be turned on first, and the peripheral power semiconductor element 10 can be turned on with a delay.

  As described above, in the third embodiment, the control signal applied to the control electrode of the peripheral power semiconductor element 10 rather than the ON timing of the control signal applied to the control electrode of the central power semiconductor element 12. As described in the first embodiment, the peripheral power semiconductor element 10 is turned on later than the central power semiconductor element 12, and the peripheral power semiconductor element 10 is turned on. The exotherm of can be reduced.

  Note that a power semiconductor element using silicon carbide (SiC) or the like, which is a wide band gap semiconductor material, is a low resistance element. In a power semiconductor device that mounts a power semiconductor element formed of a wide band gap semiconductor, Since the skin thickness value becomes smaller, the present invention is particularly effective. Other wide band gap semiconductor materials include gallium nitride-based materials and diamond.

DESCRIPTION OF SYMBOLS 1 Power semiconductor device, 3 Power semiconductor element, 10 Peripheral power semiconductor element, 12 Center power semiconductor element, 51, 52 Conductor substrate, 200 Wiring to control electrode, 210 Delay member

Claims (8)

A plurality of power semiconductor elements each having a main electrode electrically joined to two opposing conductive substrates are disposed from the central portion to the peripheral portion of the conductive substrate, and from one conductive substrate to the other conductive substrate. In a power semiconductor device that controls switching of a current flowing through a body substrate by applying a control signal to control electrodes of the plurality of power semiconductor elements,
When the plurality of power semiconductor elements are turned on, a peripheral power semiconductor element that is the power semiconductor element disposed in the peripheral part is a central part that is the power semiconductor element disposed in the central part. A power semiconductor device which is turned on later than the power semiconductor element.   The power semiconductor device according to claim 1, wherein the peripheral power semiconductor element is a power semiconductor element having a longer turn-on time than the central power semiconductor element.   2. The power semiconductor according to claim 1, wherein a length of the wiring to the control electrode of the peripheral power semiconductor element is longer than a length of the wiring to the control electrode of the central power semiconductor element. apparatus.   The power semiconductor device according to claim 1, wherein a delay member is inserted in the middle of the wiring to the control electrode of the peripheral power semiconductor element.   The control signal to the peripheral power semiconductor element and the control signal to the central power semiconductor element are different control signals input from the outside, and from the control signal to the peripheral power semiconductor element 2. The power semiconductor device according to claim 1, wherein a control signal to the central power semiconductor element is turned on first.   The power semiconductor device according to claim 1, wherein the plurality of power semiconductor elements are sequentially turned on from a central portion toward a peripheral portion.   The power semiconductor device according to claim 1, wherein the power semiconductor element is formed of a wide band gap semiconductor.   8. The power semiconductor device according to claim 7, wherein the wide band gap semiconductor is a silicon carbide, a gallium nitride-based material, or a diamond semiconductor.

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