JP2016134420A - Metalized film for capacitor element, and metalized film capacitor using the same - Google Patents

Abstract

PROBLEM TO BE SOLVED: To prevent chain dielectric breakdown between split electrodes while suppressing reduction of an effective electrode area ratio as to a metalized film for a capacitor element, in order to improve the withstand voltage performance and safety performance of the film.SOLUTION: In a vapor deposition electrode 3 on a dielectric film 2, a set of a large area electrode array region Ai and a small area electrode array region Bi (i=1, 2...) is repeated in the width direction Y of the dielectric film. In the small area electrode array region, a plurality of insulation slits for partitioning a split electrode 5 are set as a combination of a narrow insulation slit 4a having a relatively narrow width and a wide insulation slit 4b having a relatively wide width, and the wide insulation slits 4b are arranged at a pitch set so as to sandwich the aggregate of a plurality of split electrodes 5 adjoining along the longitudinal direction X of the dielectric film in the small area electrode array region.SELECTED DRAWING: Figure 1

Description

  The present invention relates to a vapor deposition pattern of a metallized film for a capacitor element.

  In the technical field of metallized film capacitors used in hybrid vehicles (HV), electric vehicles (EV), fuel cell vehicles (FCV) and industrial machinery, the thickness of the dielectric film is reduced to reduce size, weight and cost. Is required to be thin. In order to reduce the thickness of the dielectric film, it is required to improve the withstand voltage performance. As a means for that, improvement of the vapor deposition pattern of the vapor deposition electrode formed on the dielectric film is performed along with the improvement of the material. As a matter of course, even if the dielectric film is made thin, it is necessary to secure the same or better performance as the conventional withstand voltage performance and safety performance.

  There are two main means for realizing the thinning of the dielectric film: (1) improvement / modification of film material and (2) optimization of vapor deposition specifications (deposition pattern / deposition film resistance). Among them, an important know-how is the vapor deposition pattern design, and in order to improve the withstand voltage performance, a method of gradually reducing the capacity reduction rate by reducing the divided electrode area is generally used.

  The metallized film capacitor recovers the insulation of the dielectric breakdown part by the surrounding deposited metal scattering due to the dielectric breakdown of the metallized film (self-healing function (self-healing operation)). Since the surrounding vapor-deposited electrodes are scattered away, the progress of dielectric breakdown stops there and the insulation is restored. However, since the self-recovery function cannot be sufficiently obtained at high temperatures and high voltages where the number of dielectric breakdowns increases, the capacitor may fall into a short mode. In other words, in a metallized film capacitor in which a metallized film having a deposited metal film is laminated and wound on a dielectric film, if the deposited metal is insufficiently scattered, The two layers of deposited metal are electrically connected.

  Therefore, a security mechanism composed of a plurality of divided electrodes and fuses has been devised. When a split electrode is formed in a metallized film, current flows from the surrounding split electrode to the split electrode that caused the dielectric breakdown even if the breakdown exceeds the self-healing function of the metallized film, and the deposited metal of the fuse is removed. By the fuse operation to be scattered, it is possible to recover the insulation by separating the divided electrode that has caused the dielectric breakdown from the other divided electrodes, thereby ensuring high safety.

  By the way, as the area of the divided electrode is reduced, the capacity reduction due to the fuse operation can be suppressed, and the life of the capacitor can be extended. However, if it is subdivided too much, the current flowing into the fuse becomes small, and when the dielectric breakdown occurs, the fuse operation becomes difficult and the safety of the capacitor is lowered. This phenomenon becomes more prominent as the temperature increases.

  Further, when the area of the divided electrode is reduced, the number of fuses increases. However, since the fuse has a higher resistance than the divided electrode, heat generation of the capacitor increases. Such an increase in self-heating causes a decrease in withstand voltage performance and safety performance. In particular, at the center of a capacitor element formed by winding or laminating a metallized film, the temperature rises rapidly due to self-heating, and the withstand voltage performance and the safety performance are deteriorated as compared with other portions.

  Therefore, a small area electrode array region developed in a relatively small area divided state along the dielectric film longitudinal direction (hereinafter simply referred to as “film longitudinal direction”) and a continuous state or a relatively large size along the film longitudinal direction. Means have been devised for centrally arranging large-area electrode array regions developed in an area-divided state (see, for example, Patent Document 1). In the metallized film for the capacitor element, a plurality of divided electrodes defined by insulating slits are provided on the insulating margin side, and a large area electrode array region is provided on the electrode lead-out portion (metallicon) side.

  Furthermore, as a set of the small area electrode array region and the large area electrode array region, this set is repeatedly arranged along the dielectric film width direction (hereinafter simply referred to as “film width direction”), and the small area electrode array A metallized film for a capacitor element has been developed in which each divided electrode in the row region is electrically connected in a state through a fuse by a metal vapor deposition film at the cut of the insulating slit to constitute the vapor deposition electrode.

  For repeated patterns of large-area electrode array areas and small-area electrode array areas, capacitor elements are downsized, withstand voltage performance is improved, flat workability is improved, high flatness, safety performance is improved, and effective electrode area ratio Various studies have been made from various viewpoints such as improvement in (capacitance).

  One means for improving the withstand voltage performance is to reduce the area of the divided electrodes. However, this leads to an increase in the number and area of insulating slits, and in turn, the masking oil residue area. When the oil residue increases, the friction coefficient between the films increases during flattening, the slipperiness of the metallized film deteriorates, and flattening workability is impaired. As a result, small voids (voids) are generated inside the capacitor element, and wrinkles and strains are generated in each layer of the metallized film. As a result, a change in capacitance is caused when a voltage is applied, and an operation sound (buzzing) called “squeal” increases.

  On the other hand, if the line width of the insulating slit is reduced in order to reduce oil residue, the insulating slit is formed between the adjacent divided electrode and the adjacent divided electrode, which causes a failure that is isolated from other divided electrode groups by the activation of the safety function. If this happens, a discharge phenomenon will occur.

  A metallized film capacitor is provided with a plurality of small divided electrodes on the insulation margin side and a non-divided large electrode part on the electrode lead-out side, so that the position of the insulating slit on the metallized film is greatly biased in the width direction. It was. As a result, the slipperiness of the metallized film is remarkably different in the width direction, and when the metallized film is wound, the element winding state varies and affects the voltage resistance at high temperatures.

  In the case of a repeated pattern of a set of large area electrode array area and small area electrode array area, the divided electrode portions and the non-divided electrodes are alternately arranged in the width direction of the metallized film. The position of the insulating slit can be prevented from being unevenly distributed in the width direction, and the slidability of the metallized film can be leveled in the width direction. As a result, when the metallized film is wound, it is possible to suppress variation in the element winding state, and to ensure good voltage resistance at high temperatures. Therefore, it is possible to provide a metallized film capacitor having good safety and voltage resistance at a high temperature (for example, a temperature exceeding 100 ° C.).

  FIG. 8 shows a conventional example of a metallized film for a capacitor element that is strongly required to be safe because it is used at a high temperature and a high voltage. FIG. 9 is an enlarged plan view showing a part of the metallized film. 8 and 9, 1 is a metallized film, 2 is a dielectric film (a state where a part of the vapor deposition electrode is peeled off), 3 is a vapor deposition electrode, 4 is an insulating slit, 5 is a divided electrode, and 6 is a fuse. , 7 are electrode lead-out connections, and 8 is an insulation margin. A1 and A2 are large-area electrode array regions (continuous electrode regions in the illustrated example) continuously developed along the film longitudinal direction X, and B1 and B2 are insulating slits 4 arranged at predetermined intervals in the film longitudinal direction X. Is a small area electrode array region having a plurality of divided electrodes 5 formed by dividing a large area electrode array region A1 and a small area electrode array region B1 (A1, B1), a large area electrode array region A2 and a small area A set (A2, B2) with the area electrode array region B2 is arranged along the film width direction Y. In this example, the repeated arrangement of the set of the large area electrode row region and the small area electrode row region is two rows. Large-area electrode array regions on both sides in the film width direction Y in a state where each divided electrode 5 of the small-area electrode array region B1 in the middle in the film width direction Y passes through the fuses 6 and 6 by the metal vapor deposition film at the cut of the insulating slit 4 It is electrically connected to A1 and A2. That is, the large area electrode array areas A1 and A2 are on both sides in the film width direction Y with respect to the small area electrode array area B1, and each divided electrode 5 is connected to the fuse 6 with respect to the large area electrode array areas A1 and A2 on both sides. , 6 are electrically connected. Further, the large-area electrode array on one side in the film width direction Y in a state where each divided electrode 5 of the small-area electrode array region B2 located at the end in the film width direction Y is interposed with the fuse 6 by the metal vapor deposition film at the cut of the insulating slit 4 It is electrically connected to the region A2. That is, the large area electrode array area A2 is only on one side in the film width direction Y with respect to the small area electrode array area B2, and each divided electrode 5 is connected to the large area electrode array area A2 on one side via the fuse 6. Electrically connected.

  The deposited electrode 3 having a pattern having two sets (A1, B1) and (A2, B2) of the set of the large area electrode array region and the small area electrode array region as described above is formed on the dielectric film 2. And such a vapor deposition electrode 3 is formed in at least one side of the dielectric film 2, and the metallized film 1 is comprised by this.

  In the metallized film 1 shown in FIGS. 8 and 9, an electrode lead connection portion 7 to which an electrode lead portion (metallicon) is connected is formed at one end edge in the film width direction Y, and an insulating margin 8 is provided at the other end edge. Is formed. The insulating slits 4 arranged at a constant pitch along the film longitudinal direction X on the insulating margin 8 side of the metallized film 1 are formed in a Y shape, and the base end portion of the Y-shaped insulating slit 4 is an insulating margin 8. It is connected to the. In addition, in the middle of the film width direction Y, the insulating slits 4 arranged in parallel with the arrangement direction of the Y-shaped insulating slits 4 at the same pitch as the Y-shaped insulating slits 4 are formed in a so-called Mueller-Rear shape. Has been. The Mueller-Rear shape is a shape having inward arrow feathers at both ends of a line segment of a predetermined length. The small-area electrode array region B1 has a plurality of divided electrodes 5 in which vapor-deposited electrode films are divided and formed by Mueller-Rear-shaped insulating slits 4. The small area electrode array region B2 has a plurality of divided electrodes 5 in which vapor-deposited electrode films are dividedly formed by Y-shaped insulating slits 4.

  In addition, a large area electrode array area A1 in which vapor deposition electrode films are continuous in the film longitudinal direction X is adjacently disposed on the electrode lead-out connection portion 7 side of the small area electrode array area B1, and an insulation margin of the small area electrode array area B1. On the 8th side (between the small area electrode array area B1 and the small area electrode array area B2), the large area electrode array area A2 is disposed adjacently.

  The divided electrode 5 in the small area electrode array region B1 is connected to the large area electrode array region A1 via the fuse 6 on the electrode lead-out connection portion 7 side, and is connected to the large area electrode array region via the fuse 6 on the insulating margin 8 side. Connected to A2. The divided electrodes 5 in the small area electrode array region B2 are connected to the large area electrode array region A2 via the fuse 6 on the electrode lead-out connection portion 7 side.

  The metallized film 1 having such a configuration is wound or laminated to form a metallized film multilayer body (columnar body having an oval cross section), and electrode lead portions (metallicons) are formed on both end faces of the metallized film multilayer body. Connected to form a metalized film capacitor element (see, for example, Patent Document 2).

  In the metallized film 1 for a capacitor element having such a configuration, for example, when dielectric breakdown occurs in the divided electrode 5 in the small area electrode array region B1, the large area electrode array regions A1 and A2 are connected via the fuses 6 and 6 on both sides. A large current flows into the divided electrode 5 where the dielectric breakdown has occurred. As a result, the fuses 6 and 6 on both sides operate (vapor deposition metal scatters), and the divided electrode 5 causing the dielectric breakdown is separated from the large-area electrode array regions A1 and A2. Therefore, according to this metallized film 1 for a capacitor element, high safety can be ensured.

JP 2005-12082 A JP 2010-182848 A Japanese Patent Laid-Open No. 11-144959

  In the configuration shown in Patent Document 2, in order to further reduce the area of the divided electrode in order to further improve the withstand voltage performance, the number of repetitions of the set of the large area electrode row region and the small area electrode row region in the film width direction is increased. Is considered. FIG. 10 is a plan view showing a configuration of a metallized film proposed as an improvement in the conventional example shown in FIG. The area of the divided electrodes is reduced by increasing the number of sets of the large area electrode array area and the small area electrode array area from 2 sets to 3 sets.

  However, reducing the size of the divided electrodes increases the number and area of insulating slits (metal non-deposition areas) that divide the divided electrodes, so the effective electrode area ratio (the ratio of metal deposition area to any film area) Ratio) is reduced, and the size reduction of the capacitor is hindered.

  By the way, the line width of the insulation slit is between the fuse operation electrode accompanied by the occurrence of clearing (evaporation scattering / disappearance of the metal vapor deposition film due to insulation breakdown) in the voltage application state and the electrode without the clearing (fuse non-operation). It is designed with the required insulation distance against the potential difference that occurs. In order to suppress a decrease in the effective electrode area ratio, it is desirable to reduce the line width of the insulating slit as much as possible. However, if the insulation distance is short as a result of the narrowing and a discharge occurs between the two electrodes, a current flows into the clearing non-occurring electrode and a fuse operation occurs. In other words, the fuse operation caused by the occurrence of clearing may cause an unexpected fuse operation on the adjacent non-clearing electrode, and it may continue to spread one after another, resulting in chain breakage of the divided electrode group. (Chain fuse operation).

  In addition, regarding the optimum value of the line width of the insulating slit, the line potential is determined based on the results of various experiments because the residual potential of the fuse operating electrode is unknown, but there is a concern of chain breakage between the divided electrodes. In order to remain, the actual situation is that the design is further increased. In other words, the narrowing is naturally limited.

  When the line width of the insulation slit is narrowed in view of the fact that the insulation slit increases when the area of the division electrode is reduced, the narrowing is simply uniform for all the division electrodes. The above-described unexpected fuse operation of the uncleared electrode is likely to be caused. When this occurs in a chain, not only both the withstand voltage performance (capacitor element life performance) and the safety performance are degraded, but also unstable.

  As described above in detail, it is difficult for the conventional technique to reduce the area of the divided electrodes, and to suppress the continuous dielectric breakdown between the divided electrodes without reducing the effective electrode area ratio.

  By the way, when the area is reduced from the state of FIG. 8 to the state of FIG. 10 with the development pattern of the HV capacitor (rated voltage 750 VDC), the line width (0.15 ± 0.05 mm) of the insulating slit is uniform. Although the dimensions are the same, the effective electrode area ratio is consequently reduced from 96.7% to 96.2%.

  The above problem is not only when the large-area electrode array region is developed in a continuous state along the film longitudinal direction, but also when the large-area electrode array region is relatively large-area divided along the film longitudinal direction. This also applies when deploying. Development in a continuous state refers to a uniform region without insulation slits and no partitioning as a pattern change.Development in a relatively large area division state means that insulation slits are spaced at appropriate intervals. Although it exists, the interval is larger than that of the small area electrode array region, and the area of each divided electrode is relatively larger.

  The present invention was created in view of the circumstances as described above, and relates to a metallized film for a capacitor element in which a vapor deposition electrode is a repeated pattern of a set of a large area electrode array region and a small area electrode array region. An object of the present invention is to prevent the dielectric breakdown between the divided electrodes while suppressing the reduction of the area ratio, and to improve the withstand voltage performance and the safety performance of the capacitor element.

  The present invention solves the above problems by taking the following measures.

The metallized film for a capacitor element according to the present invention is:
A small area electrode array region developed in a relatively small area division state along the dielectric film longitudinal direction and a large area electrode array region developed in a continuous state or a relative large area division state along the dielectric film longitudinal direction Are repeatedly arranged along the dielectric film width direction,
And each divided electrode of the small area electrode array region is in a state through a fuse by a metal vapor deposition film at the cut of the insulating slit, and the large area electrode array region is on both sides of the small area electrode array region in the dielectric film width direction. In a certain state, with respect to the large-area electrode array region on both sides, and in the state where the large-area electrode array region is only on one side of the dielectric film width direction of the small-area electrode array region, For the region, the vapor deposition electrode is configured by being electrically connected,
This vapor deposition electrode is formed on at least one side of the dielectric film,
In the small-area electrode array region, the plurality of insulating slits that divide the divided electrodes are a combination of a relatively narrow narrow insulating slit and a relatively wide wide insulating slit.
In addition, the wide insulating slits are arranged at a pitch that sandwiches an assembly of a plurality of divided electrodes adjacent in the longitudinal direction of the dielectric film in the small area electrode array region.

  In the present invention, on the premise that the line width of the insulating slit is narrowed in order to suppress the decrease in the effective electrode area ratio, the line width dimension of the insulating slit is not made uniform, but the width is narrow. I decided to mix things that are wide and wide. That is, the narrow insulating slit is the basic type (standard type) of the insulating slit in order to suppress the decrease in the effective electrode area ratio, and the remaining wide insulating slit is formed to suppress the chain fuse operation.

  It is assumed that clearing occurs in one divided electrode in the small area electrode array region, and the fuse of the slit of the insulating slit that surrounds the divided electrode is operated. Since the insulating slit between the fuse operating electrode and the adjacent non-clearing generating electrode is a narrow insulating slit, depending on the residual potential of the clearing generating electrode, the insulating distance may be reduced with respect to the potential difference between the two electrodes. There may be a shortage. Assume that a discharge occurs between the two electrodes due to a shortage of the insulation distance with respect to the potential difference between the two electrodes, and an overcurrent flows into the clearing-free electrode, causing a fuse operation. However, wide insulating slits are arranged at an appropriate pitch in the small area electrode array region, and the insulating slit between the fuse operation electrode or the divided electrode for unexpected fuse operation and the adjacent non-clearing generation electrode is a wide insulation slit. If so, further unforeseen fuse operation is stopped at the wide insulating slit. That is, further chain fuse operation is prevented.

  Note that the arrangement pitch of the wide insulating slits depends on how many divided electrodes are allowed to allow a chained unexpected fuse operation. This number is at least two (two or more). This number is never set to one. This is because all the insulating slits in the small area electrode array region are wide insulating slits, which leads to a reduction in the effective electrode area ratio.

  The arrangement pitch of the wide insulating slits is assumed to be two divided electrodes. If the right divided electrode of the two divided electrodes becomes a fuse operation electrode, the boundary insulating slit (insulating slit separating the adjacent divided electrodes) is wide-insulated with respect to the adjacent divided electrode on the right side. Since it is a slit, the chain fuse operation does not occur. For the divided electrode adjacent to the left side of the fuse operating electrode, the boundary insulating slit is a narrow insulating slit, which may cause a chained fuse operation. Since the boundary insulating slit is a wide insulating slit, no further chain fuse operation occurs.

  In addition, the arrangement pitch of the wide insulating slits is assumed to be three divided electrodes. If the rightmost divided electrode among the three divided electrodes becomes a fuse operating electrode, the boundary insulating slit is a wide insulating slit with respect to the adjacent divided electrode on the right side, so that the chained fuse operation does not occur. . For the adjacent two divided electrodes on the left side of the fuse operating electrode, the boundary insulating slit is a narrow insulating slit, which may cause a chained fuse operation. For the electrodes, since the boundary insulating slit is a wide insulating slit, no further chain fuse operation occurs. In addition, if the central divided electrode of the three divided electrodes becomes a fuse operation electrode, the boundary insulating slit is a narrow insulating slit for the divided electrode adjacent to the left side and the divided electrode adjacent to the right side. Therefore, there is a possibility that a chained fuse operation is caused. However, since the boundary insulating slit is a wide insulating slit for the adjacent two separated electrodes, further chained fuse operation is not possible. Not expressed. The arrangement pitch of the wide insulating slits may be four or more of the divided electrodes. The number of arrangement pitches depends on various design conditions.

  The smaller the arrangement pitch of the wide insulating slits, the smaller the distribution density of the narrow insulating slits and the more effective the suppression effect of the reduction of the effective electrode area ratio. Can be reduced. Conversely, as the array pitch of the wide insulating slits is increased, the number of divided electrodes that allow chained unexpected fuse operation is increased, but the distribution density of the narrow insulating slits is increased and the effective electrode area ratio is further increased. Can be bigger.

  In any case, according to the above-described configuration of the present invention, one type of line width is provided for the metallized film for a capacitor element in which the vapor deposition electrode is a repeated pattern of a set of a large area electrode array region and a small area electrode array region. Compared with the prior art which is limited to only the above, it is possible to prevent a continuous dielectric breakdown between the divided electrodes while suppressing a decrease in the effective electrode area ratio.

  In addition, as a preferable aspect in the above configuration, the vapor deposition electrode is made of aluminum, zinc, or an alloy thereof, and the electrode thickness of the electrode lead-out connection portion is configured to be thicker than the electrode thickness in other regions. There is. If comprised in this way, the connection reliability of an electrode drawer connection part and an electrode drawer part will become high.

  Furthermore, the metallized film capacitor according to the present invention is a metallized film capacitor in which two metallized films for any of the capacitor elements described above are overlapped to form a pair of metallized films. All of the large area electrode array regions in one metallized film are configured to face the small area electrode array regions in the other metallized film.

  According to the present invention, in a small area electrode array region, current flows from a fuse operation electrode where clearing has occurred to an adjacent electrode where clearing has not occurred, and as a result, unexpected fuse operation occurs in an electrode where no clearing has occurred. Even so, such unexpected fuse operations can be prevented from proceeding in a chain due to the presence of the wide insulating slits arranged at the necessary points at an appropriate pitch. As a result, the withstand voltage performance (lifetime performance) and safety performance of the capacitor element can be improved, and the operation of the capacitor element can be stabilized.

The top view which shows the structure of the metallized film for capacitor elements in the Example of this invention Sectional drawing which shows the structure of the metallized film for capacitor elements in the Example of this invention The top view which expands and shows a part of metallized film in the Example of this invention. The top view which shows the metallized film of the two sheets overlaid in the Example of this invention The perspective view of the capacitor | condenser element using the metallized film concerning the Example of this invention Operation explanatory diagram of a capacitor element using a metallized film according to an embodiment of the present invention The top view which shows the structure of the metallized film for capacitor elements in another Example of this invention. The top view which shows the structure of the metallized film for capacitor elements in a prior art example The top view which expands and shows a part of metallized film in a prior art example The top view which shows the structure of the metallized film proposed as an improvement plan in a prior art example

  Hereinafter, the embodiment of the metallized film for a capacitor element of the present invention having the above-described configuration will be described in detail at the level of specific examples.

  FIG. 1 is a plan view showing a configuration of a metallized film for a capacitor element in an embodiment of the present invention, FIG. 2 is a cross-sectional view thereof, and FIG. 3 is a plan view showing an enlarged part of the metallized film.

  1 and 2, 1 is a metallized film, 2 is a dielectric film (showing a state where a part of the vapor deposition electrode is peeled off), 3 is a vapor deposition electrode made of metal such as aluminum, zinc or an alloy thereof, 4 Is an insulating slit, of which 4a is a narrow insulating slit and 4b is a wide insulating slit. 5 is a divided electrode, 6 is a fuse, 7 is an electrode lead-out connection, 8 is an insulation margin, A1 to A3 are large-area electrode array regions constituting a part of the vapor deposition electrode 3, and B1 to B3 are the remaining portions of the vapor deposition electrode 3 This is a small area electrode array region constituting a portion. The metallized film 1 is obtained by patterning a vapor deposition electrode 3 on the surface of a dielectric film 2. The vapor deposition electrode 3 is composed of a set (A1, B1), (A2, B2), (A3, B3) of three large-area electrode row regions and small-area electrode row regions. A1 is the first large-area electrode array region, B1 is the first small-area electrode array region, and these are a set of the first large-area electrode array region / small-area electrode array region (A1, B1) Configure. A2 is the second large-area electrode array region, B2 is the second small-area electrode array region, and these are a set of the second large-area electrode array region / small-area electrode array region (A2, B2) Configure. A3 is the third large-area electrode array region, B3 is the third small-area electrode array region, and these are a set of the third-area large-area electrode array region / small-area electrode array region (A3, B3) Configure. In this example, the repeated arrangement of the set of the large area electrode row region and the small area electrode row region is three rows. Regarding the difference between the large area electrode array areas A1 to A3 and the small area electrode array areas B1 to B3, the large area electrode array areas A1 to A3 have a relatively small degree of division along the film longitudinal direction X (division The small-area electrode array regions B1 to B3 are relatively divided along the length direction (the divided electrode area is small). This is the area to expand.

  The second and third large-area electrode array regions A2 and A3 have the same configuration. The first large-area electrode array region A1 includes an electrode lead-out connection portion 7 for connecting a metal spray electrode (metallicon) at one end edge in the film width direction Y of the metallized film 1. This electrode lead-out connection portion 7 is a region that is continuously developed along the film longitudinal direction X at one end edge in the film width direction Y of the dielectric film 2 (the conductive film elongated in the lateral direction outside the broken line in FIG. 1). Body region), which is integrally connected to the first large-area electrode array region A1. As shown in FIG. 2, the electrode lead-out connection portion 7 has a thicker electrode than the other region of the vapor deposition electrode 3. For this reason, the connection reliability between the electrode lead-out connecting portion 7 and the electrode lead-out portion (metallicon) is high. This thick electrode lead-out connection portion 7 is called a heavy edge portion, and the other thin region of the vapor deposition electrode 3 is called an active portion. In order to improve the connection reliability with the electrode lead-out portion, the electrode lead-out connection portion 7 is preferably thicker than the vapor deposition electrode on the insulating margin 8 side.

  The first and second small-area electrode array regions B1 and B2 have the same configuration. In these two small area electrode array regions B1 and B2, the insulating slits 4 (the narrow insulating slit 4a and the wide insulating slit 4b) are formed in a so-called Mueller-Rear shape. That is, the insulating slit 4 has a shape having inward arrow blades at both ends of a line segment having a predetermined length. In the third area of the small-area electrode array region B3, the insulating slit 4 (the narrow insulating slit 4a and the wide insulating slit 4b) is Y-shaped (a shape in which the inward arrow blade on one end side is missing in the Mueller-Rear shape). Is formed. The insulating slit 4 is connected to the insulating margin 8 at the other end edge in the film width direction Y of the metallized film 1 in the third small-area electrode array region B3. The insulation margin 8 is an insulating region that is elongated in the lateral direction and is continuously developed in the film longitudinal direction X at the other edge in the film width direction Y of the dielectric film 2. Other configurations are the same as those in the first and second rows. In FIG. 3, the second and third small-area electrode column regions B2 and B3 and the third large-area electrode column region A3 are shown in an enlarged manner. The pattern is the same as that of the small-area electrode row region B2 in the second row. In FIG. 3, the narrow insulating slit 4a in the small area electrode array region is shown in white, while the wide insulating slit 4b is highlighted in black.

  The large-area electrode array region Ai (i = 1, 2, 3) is a region continuously developed along the film longitudinal direction X. The small-area electrode array region Bi (i = 1, 2, 3) has a Mueller-Rear shape arranged in the film longitudinal direction X at a predetermined interval, as in the conventional improvement plan (see FIG. 10). Alternatively, it is a region having a plurality of divided electrodes 5 divided by Y-shaped insulating slits 4. Each divided electrode 5 has an elongated hexagonal shape or an elongated pentagonal shape. Then, three sets of large area electrode array regions and small area electrode array regions (Ai, Bi) are repeatedly arranged along the film width direction Y. Further, in the first to second small-area electrode array regions B1 to B2, each divided electrode 5 as a basic configuration includes a fuse 6 made of a metal vapor deposition film at the cut of the insulating slit 4 on both sides in the film width direction Y. , 6 are electrically connected to the large-area electrode array regions Ai, Ai + 1 on both sides. In the third area of the small area electrode array region B3, each divided electrode 5 as its basic configuration is arranged on one side in a state where the fuse 6 is formed by a metal vapor deposition film at one end of the insulating slit 4 on one side of the film width direction Y. Are electrically connected to the large-area electrode array region A3.

  And the vapor deposition electrode 3 which consists of 3 sets of the above large area electrode row area | regions and the small area electrode row area | regions as mentioned above is formed in the at least single side | surface of the dielectric film 2, and the metallized film 1 is comprised.

The plurality of divided electrodes 5 which are constituent elements of the small area electrode array regions B1 to B3 are partitioned by insulating slits 4 adjacent to each other, but as a unique configuration of the embodiment of the present invention, the plurality of insulating slits 4 is configured as a combination of a narrow insulating slit 4a having a relatively narrow line width and a relatively wide insulating slit 4b having a relatively wide line width. The number of the narrow insulating slits 4a is larger than that of the wide insulating slits 4b. The wide insulating slits 4b are arranged at a pitch that sandwiches an aggregate of a plurality of adjacent divided electrodes 5 along the film longitudinal direction X in the small area electrode array regions B1 to B3. In the case of the illustrated example, the wide insulating slits 4b are arranged at a pitch sandwiching the aggregate of the three divided electrodes 5. Specifically, the narrow insulating slit is represented by the abbreviation <narrow>, and the wide insulating slit is represented by the abbreviation <wide>
<Wide><Narrow><Narrow><Wide><Narrow><Narrow><Wide><Narrow><Narrow><Wide> ……
It is an array like this.

  Prepare two sheets of metallized film 1 composed of vapor deposition electrode 3 formed on dielectric film 2 as described above, and invert metallized films 1 and 1 of both sheets 180 ° as shown in FIG. In this state, the upper and lower layers are overlapped so that the electrode lead-out portion 7 of one metallized film does not overlap the vapor deposition electrode of the other metallized film. The third area electrode array region B3 of the third row of the lower metallized film 1 faces directly below the first area electrode array region A1 of the first row along the side edge of the upper metallized film 1. The electrode lead-out connection portion 7 faces the insulation margin 8. The second and third large area electrode array regions A2 and A3 in the upper metallized film 1 are opposite to the second and first small area electrode array regions B2 and B1 in the lower metallized film 1, respectively. To do. The first and second small area electrode array regions B1 and B2 in the upper metallized film 1 are the third and second large area electrode array regions A3 and A2 in the lower metallized film 1, respectively. Opposite to. The first large-area electrode array region A1 on the side edge of the lower metallized film 1 is directly below the third-area small-area electrode array region B3 of the upper metallized film 1. The insulation margin 8 faces the electrode lead connection 7. In short, the small area electrode array region in one metallized film faces the large area electrode array region in the other metallized film.

  Here, if the large area electrode array region in one metallized film and the large area electrode array region in the other metallized film face each other, there is a risk of short-circuit failure, so the large area electrode array region in one metallized film It is preferable that all face the small area electrode array region in the other metallized film.

  In the state where the upper metallized film 1 and the lower metallized film 1 are overlapped as described above, as shown in FIG. 10 is wound and flattened into a long and narrow oval shape by a press as shown in the figure (the flatness ratio is 0.7 or more) to obtain a metallized film multilayer body 11. Furthermore, electrode lead portions (metallicons) 12 and 12 are formed by metal spraying at both ends in the axial direction of the metallized film multilayer body 11 to obtain a highly flattened metallized film capacitor element C. The electrode lead portions 12 and 12 are electrically connected to electrode lead connection portions 7 and 7 on both axial sides.

  In addition, there is also a type of capacitor element in which two layers of short metallized films 1 and 1 are stacked instead of winding the two long metallized films 1 and 1 as described above.

  Next, the operation of the metallized film capacitor configured as described above will be described.

As shown in FIG. 6A, an arbitrary small area electrode array region Bi (i = 1, 2, 3) is sandwiched between a pair of wide insulating slits 4b, 4b adjacent in the film longitudinal direction X. It is assumed that clearing (see *) occurs in the central divided electrode 5 ₁ among the _three divided electrodes 5 ₃ , 5 ₁ , 5 ₂ . Then, an overcurrent (see the thin line arrow) flows into the fuses 6 ₁ and 6 _{1 at} the cuts of the two narrow insulating slits 4a and 4a surrounding the divided electrode 5 ₁ , as shown in FIG. 6B. Further, it is assumed that these fuses 6 ₁ and 6 ₁ are operated (see ☆). Then, the fuse working electrode 5 ₁ is located in the center is electrically separated from the large-area electrode array region Ai (either i = 1, 2, 3) (see shaded pattern of Figure 6 (b)).

The potential difference between the fact insulating slit is narrow insulating slit 4a, the electrodes 5 _1, 5 ₂ between the clearing not occurred electrode 5 ₂ (see mark ★) adjacent to the fuse working electrode 5 ₁ and the right When the insulation distance is insufficient, a discharge occurs between the electrodes 5 ₁ and 5 ₂ (see the double arrow in FIG. 6B), and the overcurrent (see the thin line arrow) is not generated in the clearing-generated electrode. 5 ₂ flows into the fuse and causes a fuse operation (see the star mark in FIG. 6C). Then, the right side of the fuse working electrode 5 ₂ is electrically disconnected from the large-area electrode array area Ai (see shaded pattern in Figure 6 (c)). Central fuse working electrode 5 ₁ and the clearing non-occurrence electrode 5 ₃ adjacent to the left side because an insulating slit also narrow insulating slit 4a between the (★ mark see), the electrodes 5 _1, between 5 ₃ When the insulation distance is insufficient with respect to the potential difference, a discharge occurs between the electrodes 5 ₁ and 5 ₃ (see the double-headed arrow in FIG. 6C), and no overcurrent (see the thin-line arrow) occurs. It flows to the electrode ₃ cause fuse operation (see ☆ mark FIG 6 (d)).

As described above, when the insulation distance is insufficient with respect to the potential difference between the two adjacent electrodes, the chained fuse operation to the adjacent divided electrodes is caused by the clearing of one divided electrode. The two split electrodes 5 ₃ , 5 ₁ , 5 ₂ sandwiched between a pair of wide insulating slits 4b, 4b adjacent to each other along two film longitudinal directions X become fuse operation electrodes. (See the shading pattern in FIG. 6 (d)).

In the above description, the first divided electrode that causes the fuse operation is the central divided electrode. However, the right divided electrode among the three divided electrodes may cause the fuse operation first. In some cases, the divided electrode may cause a fuse operation first. In any case, when the chained fuse operation is performed twice, the adjacent three divided electrodes 5 ₃ , 5 ₁ , 5 ₂ sandwiched between the pair of adjacent wide insulating slits 4b, 4b are the fuse operation electrodes. After that, since the wide insulating slits 4b and 4b are positioned on both sides of the _three divided electrodes 5 ₃ , 5 ₁ and 5 ₂ , the progress of the further chain fuse operation is suppressed. Will be included.

  The configuration of the large area electrode array region Ai (i = 1, 2,...) May be configured as shown in FIG. That is, by dividing along the film longitudinal direction X at a pitch larger than the pitch of the divided electrodes 5 of the small area electrode array region Bi (i = 1, 2,...), The degree of division is relatively small. It is partitioned into a plurality of divided electrodes 5 '(in a state where the divided electrode area is large). Specifically, the first, second and third large-area electrode array regions A1, A2 and A3 are partitioned in the film longitudinal direction X by linear insulating slits 4c extending in the film width direction Y. The pitch of the linear insulating slits 4c is larger than the pitch of the insulating slits 4 in the small area electrode array region Bi. Here, as an example, 12 pitches of the divided electrodes 5 correspond to divided electrodes 5 ′ for 1 pitch. The linear insulating slit 4c is formed as an extension of the center line of the wide insulating slit 4b in the small area electrode array region Bi (not limited to this). The arrangement of the linear insulating slits 4c is shifted by 3 pitches of the divided electrodes 5 in the first row and the second row, and also by 9 pitches of the divided electrodes 5 in the second row and the third row. It's off. As a result, the first and third columns are in phase. The arrangement of the linear insulating slits 4c is not limited to this.

  In summary, regarding a metallized film for a capacitor element, in a small area electrode array region, a plurality of insulating slits that divide a divided electrode have a relatively narrow line width and a relatively narrow width. The wide insulating slits are arranged in a pitch that sandwiches an aggregate of a plurality of adjacent divided electrodes along the film longitudinal direction in the small area electrode array region. While suppressing the reduction of the electrode area, it is possible to prevent the unexpected fuse operation from proceeding in a chain and to improve the withstand voltage performance and the safety performance.

Note that any number of rows (2 sets, 3 sets, 4 sets,...) Can be selected for the number of repetitions of the set of the small area electrode row region and the large area electrode row region. Further, the phase relationship in the film longitudinal direction X of the wide insulating slits 4b in the plurality of small area electrode array regions Bi (i = 1, 2,...) May be different from the in-phase in the illustrated example. The amount of phase shift is also arbitrary. Further, in the above embodiment, the pitch between a pair of wide insulating slits 4b, 4b adjacent in the film longitudinal direction X is equivalent to three divided electrodes 5 (<wide><narrow><narrow><wide><narrow).Width><narrow><wide><narrow><narrow><wide> ……).
<Wide><Narrow><Wide><Narrow><Wide><Narrow><Wide> ……
Or the pitch of two divided electrodes 5 as shown in FIG.
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Or the pitch of four divided electrodes 5 as shown in FIG.
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As described above, an arbitrary pitch may be employed, such as a pitch corresponding to five of the divided electrodes 5.

  The present invention relates to a metallized film for a capacitor element, which improves the withstand voltage performance and safety performance, and suppresses a reduction in the effective electrode area ratio while preventing a continuous dielectric breakdown between divided electrodes. Useful as.

DESCRIPTION OF SYMBOLS 1 Metallized film 2 Dielectric film 3 Deposition electrode 4 Insulation slit 4a Narrow insulation slit 4b Wide insulation slit 5 Divided electrode 6 Fuse A1-A3 Large area electrode row area B1-B3 Small area electrode row area C Metallized film capacitor X Dielectric film longitudinal direction Y Dielectric film width direction

Claims (4)

A small area electrode array region developed in a relatively small area division state along the dielectric film longitudinal direction and a large area electrode array region developed in a continuous state or a relative large area division state along the dielectric film longitudinal direction Are repeatedly arranged along the dielectric film width direction,
And each divided electrode of the small area electrode array region is in a state through a fuse by a metal vapor deposition film at the cut of the insulating slit, and the large area electrode array region is on both sides of the small area electrode array region in the dielectric film width direction. In a certain state, with respect to the large area electrode array region on both sides, and in the state where the large area electrode array region is only on one side of the dielectric film width direction of the small area electrode array region, the large area electrode array on one side thereof For the region, the vapor deposition electrode is configured by being electrically connected,
This vapor deposition electrode is formed on at least one side of the dielectric film,
In the small-area electrode array region, the plurality of insulating slits that divide the divided electrodes are a combination of a relatively narrow narrow insulating slit and a relatively wide wide insulating slit.
The wide insulating slits are arranged at a pitch sandwiching an aggregate of a plurality of divided electrodes adjacent in the longitudinal direction of the dielectric film in the small area electrode array region. Metallized film.   The wide insulating slits are arranged at a pitch that sandwiches an assembly of at least three or more adjacent divided electrodes along the longitudinal direction of the dielectric film in the small area electrode array region. Metalized film for capacitor elements.   3. The capacitor element according to claim 1, wherein the vapor deposition electrode is made of aluminum, zinc, or an alloy thereof, and the electrode thickness of the electrode lead-out connection portion is thicker than the electrode thickness in other regions. Metallized film. In a metallized film capacitor in which two metallized films for a capacitor element according to any one of claims 1 to 3 are overlapped to form a pair of metallized films,
A metallized film capacitor, wherein all of the large area electrode array region in one metallized film of the pair of metallized films opposes the small area electrode array region in the other metallized film.

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