JP2016116096A - Isolator - Google Patents

Abstract

PROBLEM TO BE SOLVED: To transmit an input signal reliably, while reducing power consumption.SOLUTION: An isolator 1A includes an SR flip-flop circuit 12 for feeding a current to transmission coils 13, 14 in the wake of transition of the logical level of an input signal Sin from one level to the other level, a bridge circuit B1 and a comparator 21 for determining presence or absence of the magnitude of a magnetic field generated in the transmission coils 13, 14, and a D flip-flop circuit 26 for generating an output signal Sout, based on the output signal CPout from the comparator 21. Based on a feedback signal Sfb obtained by feeding back the output signal CPout by means of feedback coils 22, 23 and a bridge circuit B2, the SR flip-flop circuit 12 stops current supply to the transmission coils 13, 14.SELECTED DRAWING: Figure 1

Description

  The present invention relates to a magnetically coupled isolator.

Conventionally, an isolator that electrically isolates two circuits while transmitting a signal from one circuit to another is known. As such an isolator, there are an optically coupled isolator and a magnetically coupled isolator. In general, a magnetically coupled isolator can be operated at a higher speed than an optically coupled isolator.
Prior art document 1 discloses a magnetic coupling type isolator. This magnetic coupling type isolator includes an input circuit including a coil and an output circuit including a magnetoresistive element, and the input circuit and the output circuit are electrically insulated. In the input circuit, a pulsed current is supplied to the coil in synchronization with the rising edge and falling edge of the input signal, and in the output circuit, a change in the magnetic field is detected by a magnetoresistive element to generate an output signal.

JP-T-2001-521160

However, the conventional magnetic coupling type isolator cannot be distinguished from the signal when the disturbance magnetic field affects the magnetoresistive element, and the output signal may be inverted. In addition, when a GMR (Giant Magneto Resistive effect) element is used as the magnetoresistive element, the polarity of the input signal and the output signal can be matched by setting the polarity in the magnetic field generation direction. When the signal is inverted, the polarity of the output signal cannot be corrected until the next edge occurs in the input signal.
The present invention has been made in view of such circumstances, and an object of the present invention is to provide an isolator that is not easily affected by a disturbance magnetic field.

In order to solve the above problem, an isolator according to one aspect of the present invention includes a transmission coil driving unit that causes a current to flow through a transmission coil when a logic level of an input signal transitions from one level to the other level, A transmission determination unit that determines the presence or absence of a magnetic field generated in the transmission coil, and a feedback unit that feeds back a determination result of the transmission determination unit to the transmission coil driving unit;
A first power supply wiring for supplying power to the transmission coil driving unit; a second power supply wiring for supplying power to the transmission determination unit and electrically separated from the first power supply wiring; The driving unit stops supplying current to the transmission coil based on a feedback signal output from the feedback unit.

  According to this aspect, triggered by the transition of the logic level of the input signal, the supply of current to the transmission coil is started, the determination result of the transmission determination unit is fed back, and the supply of current to the transmission coil is stopped. For this reason, when the input signal cannot be transmitted due to the influence of the disturbance magnetic field, the current of the transmission coil continues to flow, and it is confirmed that the current is transmitted by the feedback signal, and then the supply of current to the transmission coil is stopped. Therefore, it is possible to reliably transmit the input signal. In addition, since the current is supplied to the transmission coil only when the logic level of the input signal changes, it is not necessary to always supply the current, and the power consumption can be reduced.

  In the aspect of the isolator described above, the feedback unit determines the presence or absence of a magnetic field generated by the feedback coil and a feedback coil driving unit that supplies current to the feedback coil according to a determination result of the transmission determination unit. It is preferable to include a feedback determination unit that generates a signal.

  According to this aspect, since the feedback unit includes the feedback coil and the feedback determination unit, the determination is made from the transmission determination unit that operates with the power of the second power supply wiring to the transmission coil drive unit that operates with the power of the first power supply wiring. The result can be fed back.

  In the aspect of the isolator described above, the transmission coil driving unit generates a mirror signal having the same logic level as the output signal output based on the determination result of the transmission determination unit, according to the current supplied to the transmission coil. A mirror signal generation unit; and a logic circuit that calculates an exclusive OR of the input signal and the mirror signal, and starting to supply current to the transmission coil based on an output signal of the logic circuit. preferable.

  According to this aspect, the supply of current to the transmission coil is stopped after confirming that the edge of the input signal is transmitted by the feedback signal. Therefore, it is possible to generate a mirror signal having the same logic level as the output signal in accordance with the current supplied to the transmission coil.

The figure which shows the structural example of 1 A of isolators which concern on 1st Embodiment of this invention. The timing chart for demonstrating operation | movement of 1 A of isolators. The figure which shows the structural example of the isolator 1B which concerns on 2nd Embodiment of this invention. The timing chart for demonstrating operation | movement of the isolator 1B. The figure which shows the structural example of the transmission apparatus which concerns on a modification.

<1. First Embodiment>
A first embodiment of the present invention will be described with reference to the drawings. FIG. 1 shows a configuration example of an isolator 1A according to the first embodiment. As shown in the figure, the isolator 1A includes a first circuit 10A and a second circuit 20A. The first circuit 10A and the second circuit 20A in this example are configured by independent IC chips. The isolator 1A is configured by accommodating the IC chip of the first circuit 10A and the IC chip of the second circuit 20A in one IC package.

The first power supply PW1 outputs the first power supply potential VDD1 to the first high potential power supply line L1a through the input terminal T11, and the first ground potential GND1 to the first low potential power supply line L1b through the input terminal T13. Output. The first high-potential power supply line L1a and the first low-potential power supply line L1b function as a first power supply wiring that supplies power from the first power supply PW1.
The second power supply PW2 outputs the second power supply potential VDD2 to the second high potential power supply line L2a through the input terminal T21, and also supplies the second ground potential GND2 to the second low potential power supply line L2b through the input terminal T23. Output. The second high potential power supply line L2a and the second low potential power supply line L2b function as a second power supply wiring that supplies power from the second power supply PW2.
The input signal Sin is supplied to the first circuit 10A via the input terminal T12, and the output signal Sout is output from the second circuit 20A to the outside via the output terminal T22.

  The first circuit 10A includes an exclusive OR circuit 11, an SR flip-flop circuit 12, transmission coils 13 and 14, a resistor 15, a D flip-flop circuit 16, a comparator 17, and a bridge circuit B1. The exclusive OR circuit 11 is a logic circuit that calculates an exclusive OR of the mirror signal Smir and the input signal Sin whose logic level is the same as that of the output signal Sout.

  The output signal 11a of the exclusive OR circuit 11 is supplied to the set terminal S of the SR flip-flop circuit 12, the feedback signal Sfb output from the comparator 17 is supplied to the reset terminal R, and the output terminal Q A coil drive signal Sdr is output. The coil drive signal Sdr is a binary signal having a high level and a low level. When the coil drive signal Sdr is at a high level, a current flows through the transmission coils 13 and 14 to generate a magnetic field. On the other hand, when the coil drive signal Sdr is at a low level, no current flows through the transmission coils 13 and 14 and no magnetic field is generated.

  The D flip-flop circuit 16 is connected to the input terminal D and the inverted output terminal Q bar, and operates as a T flip-flop circuit. For this reason, the logic level of the mirror signal Smir output from the output terminal Q is inverted in synchronization with the falling edge of the coil drive signal Sdr supplied to the clock terminal. The D flip-flop circuit 16 functions as a mirror signal generation unit that generates a mirror signal Smir having the same logic level as the output signal Sout in accordance with the current supplied to the transmission coils 13 and 14.

  The comparator 17 compares the potential of the node N21 and the potential of the node N22 in the bridge circuit B2 described later. Based on the output of the bridge circuit B2, the comparator 17 becomes low level when no current flows in feedback coils 22 and 23, which will be described later, whereas the comparator 17 becomes high level when current flows in the feedback coils 22 and 23. The feedback signal Sfb is output. That is, the comparator 17 and the bridge circuit B2 function as a feedback determination unit that determines the presence or absence of a magnetic field generated by the feedback coils 22 and 23 and generates the feedback signal Sfb.

The bridge circuit B1 includes magnetoresistive elements 31 to 34. The second power supply potential VDD2 is applied to one terminal of the magnetoresistive element 31, and the other terminal is connected to one terminal of the magnetoresistive element 32 via the node N12. The second ground potential GND2 is applied to the other terminal of the magnetoresistive element 32. The second power supply potential VDD2 is applied to one terminal of the magnetoresistive element 33, and the other terminal is connected to one terminal of the magnetoresistive element 34 via the node N11. The second ground potential GND2 is applied to the other terminal of the magnetoresistive element 34.
In this example, when the coil drive signal Sdr becomes high level and a current flows through the transmission coils 13 and 14, the resistance values of the magnetoresistive elements 31 and 34 increase, and the resistance values of the magnetoresistive elements 33 and 32 decrease. The magnetoresistive elements 31 to 34 are selected.
In the above configuration, the exclusive OR circuit 11, the SR flip-flop circuit 12, and the D flip-flop circuit 16 are triggered by the transition of the logic level of the input signal Sin from one level to the other level. It functions as a transmission coil drive unit for passing current through 13 and 14.

  The second circuit 20A includes a comparator 21 connected to the nodes N11 and N12 of the bridge circuit B1, feedback coils 22 and 23, a resistor 24, a low-pass filter (hereinafter referred to as “LPF”) 25, a D flip-flop circuit 26, and A bridge circuit B2 is provided. The comparator 21 compares the potential of the node N11 with the potential of the node N12. Then, based on the output of the bridge circuit B1, the comparator 21 is at a low level when no current flows through the transmission coils 13 and 14, whereas the output signal is at a high level when a current flows through the transmission coils 13 and 14. CPout is output. The bridge circuit B1 and the comparator 21 function as a transmission determination unit that determines the presence or absence of a magnetic field generated by the transmission coils 13 and 14. Further, the wiring from the output terminal of the comparator 21 to the feedback coil 22 and the resistor 24 function as a feedback coil driving unit that allows current to flow through the feedback coils 22 and 23 according to the determination result of the transmission determination unit.

  The output signal CPout is supplied to the inverted clock terminal of the D flip-flop circuit 26 after the high frequency component is removed by the LPF 25. By using the LPF 25, pulsed disturbance noise can be removed. The D flip-flop circuit 26 is connected to the input terminal D and the inverted output terminal Q bar, and operates as a T flip-flop circuit. As a result, an output signal Sout whose logic level is inverted is generated in synchronization with the falling edge of the output signal CPout. The LPF 25 and the D flip-flop circuit 26 function as an output signal generation unit that generates the output signal Sout of the isolator 1A based on the output signal CPout of the comparator 21. The LPF 25 is not an essential configuration.

Next, the bridge circuit B2 includes magnetoresistive elements 41 to 44. The first power supply potential VDD1 is applied to one terminal of the magnetoresistive element 41, and the other terminal is connected to one terminal of the magnetoresistive element 42 via the node N22. The first ground potential GND1 is applied to the other terminal of the magnetoresistive element. The first power supply potential VDD1 is applied to one terminal of the magnetoresistive element 43, and the other terminal is connected to one terminal of the magnetoresistive element 44 via the node N21. The first ground potential GND1 is applied to the other terminal of the magnetoresistive element 44. In this example, when the output signal CPout of the comparator 21 becomes high level and a current flows through the feedback coils 22 and 23, the resistance values of the magnetoresistive elements 41 and 44 increase, and the resistance values of the magnetoresistive elements 43 and 42 decrease. Thus, the magnetoresistive elements 41 to 44 are selected.
In the above configuration, the feedback coils 22 and 23, the bridge circuit B2, and the comparator 17 function as a feedback unit that feeds back the output signal CPout, which is the determination result of the transmission determination unit, to the transmission coil drive unit.

Next, the operation of the isolator 1A will be described with reference to the timing chart of the isolator 1A shown in FIG.
At time t1, the input signal Sin rises from a low level to a high level. At this time, the mirror signal Smir is at a low level. For this reason, the output signal 11a of the exclusive OR circuit 11 transits from a low level to a high level. Since the feedback signal Sfb is at the low level, the coil drive signal Sdr output from the SR flip-flop circuit 12 transitions from the low level to the high level at time t2.

  Then, a current flows through the path of the output terminal Q of the SR flip-flop circuit 12 → the transmission coil 13 → the transmission coil 14 → the resistor 15. Thereby, a magnetic field is generated, the resistance values of the magnetoresistive elements 31 and 34 are increased, and the resistance values of the magnetoresistive elements 33 and 32 are decreased. Therefore, the potential of the node N11 increases and the potential of the node N12 decreases.

  As a result, the output signal CPout of the comparator 21 changes from the low level to the high level at time t3. When the output signal CPout becomes high level, a current flows through the path of the output terminal of the comparator 21 → the feedback coil 22 → the feedback coil 23 → the resistor 24. As a result, a magnetic field is generated, the resistance values of the magnetoresistive elements 41 and 44 are increased in the bridge circuit B2, and the resistance values of the magnetoresistive elements 43 and 42 are decreased. Therefore, the potential of the node N21 increases and the potential of the node N22 decreases.

  As a result, the feedback signal Sfb output from the comparator 17 changes from the low level to the high level at time t4. Since the feedback signal Sfb is supplied to the reset terminal R of the SR flip-flop circuit 12, when the feedback signal Sfb becomes high level, the logic level of the output terminal Q becomes low level. For this reason, at time t5, the coil drive signal Sdr transitions from a high level to a low level. The D flip-flop circuit 16 operates to invert the logic level of the output signal in synchronization with the falling edge of the coil drive signal Sdr supplied to the inversion clock terminal. For this reason, when the coil drive signal Sdr transits from the high level to the low level, the mirror signal Smir transits from the low level to the high level at time t6.

Further, when the coil drive signal Sdr becomes low level at time t5, no current flows through the transmission coils 13 and 14. Then, the output signal CPout of the comparator 21 changes from the high level to the low level at time t6. As a result, no current flows through the feedback coils 22 and 23, and the feedback signal Sfb transitions from the high level to the low level at time t7.
Further, since the output signal CPout is supplied to the inverted clock terminal of the D flip-flop circuit 26 via the LPF 25, when the output signal CPout transits from the high level to the low level, the output signal Sout changes from the low level to the high level at time t8. Transition to.

From time t1 to time t8, the input signal Sin, the mirror signal Smir, and the output signal Sout transited from a low level to a high level. The operation is the same except that the transition to the low level is made.
That is, when the output signal 11a of the exclusive OR circuit 11 rises from the low level to the high level in synchronization with the falling edge of the input signal Sin, the coil drive signal Sdr (time t10) → the output signal CPout ( In the order of time t11) → feedback signal Sfb (time t12), the logic level of each signal changes from the low level to the high level.
When the feedback signal Sfb transitions from the low level to the high level, the coil drive signal Sdr (time t13) → the output signal CPout of the comparator 21 and the mirror signal Smir output from the D flip-flop circuit 16 (time t14) → the feedback signal. In the order of Sfb (time t15), the logic level of each signal changes from a high level to a low level. As a result, the output signal Sout changes from the high level to the low level at time t16.

  As described above, in this embodiment, when the logic level of the input signal Sin transitions from one level to the other level, a current is passed through the transmission coils 13 and 14 to generate a magnetic field, which is generated by the bridge circuit B1 and the comparator 21. Detected with. Then, using the output signal CPout of the comparator 21 as the detection result, a current was passed through the feedback coils 22 and 23 to generate a magnetic field, which was detected by the bridge circuit B2 and the comparator 17. In addition, using the feedback signal Sfb, which is the detection result, the coil drive signal Sdr is transitioned to the low level, and the flow of current through the transmission coils 13 and 14 is stopped.

  That is, since the fact that the logic level of the input signal Sin has changed is transmitted from the first circuit 10A to the second circuit 20A and this is fed back and the supply of current to the transmission coils 13 and 14 is stopped, the logic of the input signal Sin is stopped. Level transitions can be transmitted reliably.

  As shown in FIG. 2, the coil drive signal Sdr has a pulse-like waveform. Therefore, since the period during which current flows through the transmission coils 13 and 14 can be shortened, power consumption can be reduced. On the other hand, when the pulsed magnetic field is generated in the transmission coils 13 and 14 in synchronization with the rising edge and the falling edge of the input signal Sin, the change in the logic level of the input signal Sin is caused by the influence of the disturbance magnetic field. There may be a case where transmission from the first circuit 10A to the second circuit 20A is not possible. In the present embodiment, a feedback path from the second circuit 20A to the first circuit 10A is provided, and the first circuit 10A detects that the transmission has been normally performed, and power supply to the transmission coils 13 and 14 is stopped. The input signal Sin can be reliably transmitted from the first circuit 10A to the second circuit 20A while reducing power.

<2. Second Embodiment>
The isolator 1A according to the first embodiment described above uses the feedback signal Sfb to transition the coil drive signal Sdr to a low level. The isolator 1B according to the second embodiment is different from the isolator 1A according to the first embodiment in that it includes an error detection unit that detects that the logic level of the input signal Sin and the logic level of the output signal Sout do not match due to noise or the like. Is different.

FIG. 3 shows a configuration example of the isolator 1B of the second embodiment. The isolator 1B is configured similarly to the isolator 1A shown in FIG. 1 except that the first circuit 10B is used instead of the first circuit 10A.
The first circuit 10B includes a delay circuit (hereinafter referred to as DL) 51, an inverter 52, a NOR circuit 53, and an output terminal T14 in addition to the configuration of the first circuit 10A. The DL 51 is configured, for example, by connecting a plurality of inverters in series, delays the output signal of the D flop flop circuit 16 by a predetermined time, and supplies the mirror signal Smir to the exclusive OR circuit 11. The delay time of DL51 is set so that the rising edge of the mirror signal Smir occurs after the falling edge of the feedback signal Sfb.

  The inverter 52 and the NOR circuit 53 function as an error detection unit. The inverter 52 inverts the feedback signal Sfb and supplies it to one input terminal of the NOR circuit 53. The output signal 11 a of the exclusive OR circuit 11 is supplied to the other input terminal of the NOR circuit 53.

  FIG. 4 shows a timing chart of the isolator 1B. As shown in the figure, a falling edge of the feedback signal Sfb occurs at time ta, and after that, a rising edge of the mirror signal Smir occurs at time tb.

  In this example, the feedback signal Sfb is at a high level during the period from time tc to time td. On the other hand, the input signal Sin has no corresponding logic level mismatch. This is because noise is superimposed under the influence of a disturbance magnetic field or the like. The NOR circuit 53 calculates the inverted OR of the output signal 52a of the inverter 52 and the output signal 11a of the exclusive OR circuit 11 to generate an error signal Se. For this reason, the error signal Se is at a high level during the period from time tc to time td. Since the error signal Se is output to the outside through the output terminal T14, the external device that generates the input signal Sin can know the transmission error, and can perform processing such as retransmission.

<3. Modification>
The present invention is not limited to the above-described embodiments, and for example, the following modifications are possible. In addition, you may combine embodiment mentioned above and each modification suitably.
(1) In the first and second embodiments described above, the feedback coils 22 and 23 are driven using the output signal of the comparator 21, but the present invention is not limited to this, and the output signal Sout May be used to drive the feedback coils 22 and 23.

(2) In the first embodiment and the second embodiment described above, the comparator 17 is always supplied with power. However, the present invention is not limited to this, and only when the input signal Sin is transmitted. Electric power may be supplied. In this case, the power consumption of the isolators 1A and 1B can be further reduced.

(3) In the first embodiment and the second embodiment described above, the coils 13 and 14 and the bridge circuit B1 are provided in the first circuits 10A and 10B, but the present invention is not limited to this. The two circuits 20A may be provided with the coils 13 and 14 and the bridge circuit B1. In this case, the coil drive signal Sdr is supplied from the first circuits 10A and 10B to the second circuit 20A. Therefore, a plurality of insulating layers may be provided in the second circuit 20A, and the power supply wirings of the second power supply potential VDD2 and the second ground potential GND2 may be electrically separated from the coil drive signal Sdr wiring. Since the input impedance of the comparator 21 is high, if the coils 13 and 14 and the bridge circuit B1 are provided in the second circuit 20A, the comparator 21 can be disposed in the vicinity of the bridge circuit B1, so that the influence of noise can be suppressed. .

(4) In the first embodiment and the second embodiment described above, the coils 22 and 23 and the bridge circuit B2 are provided in the second circuit 20A, but the present invention is not limited to this, and the first circuit The coils 22 and 23 and the bridge circuit B2 may be provided in 10A and 10B. In this case, the output signal CPout of the comparator 21 is supplied from the second circuit 20A to the first circuits 10A and 10B. Therefore, a plurality of insulating layers may be provided in the first circuits 10A and 10B, and the wiring of the output signal CPout of the comparator 21 may be electrically separated from the power wiring of the first power supply potential VDD1 and the first ground potential GND1. . Since the output impedance of the comparator 17 is high, if the coils 22 and 23 and the bridge circuit B2 are provided in the first circuits 10A and 10B, the comparator 17 can be disposed in the vicinity of the bridge circuit B2, so that the influence of noise can be suppressed. There is.

(5) You may use combining the isolator 1B of 2nd Embodiment mentioned above, and the conventional isolator. FIG. 5 shows a configuration example of the transmission apparatus 100 according to the modification. The transmission device 100 is configured as one IC module, for example. The transmission device 100 includes the isolator 1B of the second embodiment and three isolators 1C. The isolator 1B receives an input clock signal CKin that changes at the maximum transfer rate, and outputs an output clock signal CKout. The isolator 1C includes a first circuit 110 and a second circuit 120 that are electrically separated, but does not have a feedback path from the second circuit 120 to the first circuit 110 unlike the isolator 1B. The first circuit 110 includes an edge detection unit, a coil driving unit, a coil, and a bridge circuit. On the other hand, the second circuit 120 includes a determination unit and an output signal generation unit.

  The edge detection unit outputs an edge detection signal that is active for a predetermined time from the rising edge and the falling edge of the input signals Sin1 to Sin3. The coil driving unit supplies a current to the coil during the active period of the edge detection signal. The determination unit determines the presence or absence of a magnetic field generated in the coil using a bridge circuit. The output signal generation unit generates the output signals Sout1 to Sout3 based on the determination result of the determination unit.

  However, if the error signal Se becomes active during the active period of the edge detection signal, the current continues to be supplied to the coil until a predetermined time elapses after the error signal Se becomes inactive. During the period in which the error signal Se is active, it can be considered that the isolator 1C is also affected by disturbance magnetism in the same manner as the isolator 1B. For this reason, it is highly possible that the edges of the input signals Sin1 to Sin3 detected by the first circuit 110 are not transmitted to the second circuit 120 during the period. Therefore, in this period, the period for supplying current to the coil is extended.

Note that an isolator 1A may be used instead of the isolator 1B. In this case, the output signal 11a of the exclusive OR circuit 11 may be used instead of the error signal Se. This is because the output signal 11a is active at least during a period in which it is affected by disturbance magnetism.
According to this modification, the feedback path of the isolator 1B (1A) can be shared with the other isolator 1C, so that the configuration can be simplified.

DESCRIPTION OF SYMBOLS 1A, 1B, 1C ... Isolator, 10A, 10B ... 1st circuit, 11 ... Exclusive OR circuit, 12 ... SR flip-flop circuit, 13, 14 ... Transmission coil, 16, 26 ... D flip-flop circuit, 17, 21 ... Comparator, 20A ... Second circuit, 22,23 ... Feedback coil, PW1 ... First power supply, PW2 ... Second power supply, B1, B2 ... Bridge circuit, Sin ... Input signal, Sout ... Output signal, Sfb ... Feedback signal, Smir ... Mirror signal.

Claims (3)

A transmission coil drive unit that causes a current to flow through the transmission coil when the logic level of the input signal transitions from one level to the other,
A transmission determination unit for determining the presence or absence of a magnetic field generated in the transmission coil;
A feedback unit that feeds back a determination result of the transmission determination unit to the transmission coil driving unit;
A first power supply wiring for supplying power to the transmission coil drive unit;
A power source for supplying power to the transmission determination unit, and a second power source wire electrically separated from the first power source wire,
The transmission coil driving unit stops supplying current to the transmission coil based on a feedback signal output from the feedback unit.
An isolator characterized by that. The feedback unit includes:
According to the determination result of the transmission determination unit, a feedback coil drive unit that causes a current to flow through the feedback coil,
A feedback determination unit that determines the presence or absence of a magnetic field generated by the feedback coil and generates the feedback signal;
The isolator according to claim 1. The transmission coil driver is
A mirror signal generation unit that generates a mirror signal having the same logic level as an output signal output based on a determination result of the transmission determination unit, according to a current supplied to the transmission coil;
A logic circuit for calculating an exclusive OR of the input signal and the mirror signal;
Based on the output signal of the logic circuit, the supply of current to the transmission coil is started.
The isolator according to claim 1 or 2.

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