JP2016111360A - Field effect transistor and field effect transistor manufacturing method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a manufacturing method of a field effect transistor which uses a conductive thin film composed of an aggregation of metal oxide fine particles as a source electrode and a drain electrode, and in addition, an active layer is formed on the conductive film, and which keeps resistance of the conductive thin film at low resistance and makes a carrier concentration to be constant, and has a high ON-state current and less fluctuation.SOLUTION: A manufacturing method of a field effect transistor including an active layer composed of an n-type oxide semiconductor, and a source electrode and a drain electrode which are composed of a conductive thin film composed of an aggregation of fine particles of indium-and-tin-containing metal oxide comprises in the following order: a process of forming the source electrode and the drain electrode; a surface modification process of modifying surfaces of the source electrode and the drain electrode; and a light irradiation process of applying light on the source electrode and the drain electrode under a low oxygen concentration atmosphere.SELECTED DRAWING: Figure 4

Description

  The present invention relates to a field effect transistor and a method for manufacturing the field effect transistor.

  In recent years, active matrix display devices (liquid crystal display devices, light-emitting display devices, electrophoretic display devices, etc.) provided with switching elements made of thin film field effect transistors (FETs) using oxide semiconductors have been actively developed. Has been. In the development thereof, a method of forming a semiconductor layer and an electrode layer by a coating method is expected as a method that can be easily and large in area.

For conductive oxides such as tin-doped indium oxide (ITO), a coating solution in which an indium compound and a tin compound are dissolved, or a coating solution for forming a conductive oxide such as an ITO nanoparticle dispersion is applied to a substrate. The formed conductive thin film is made of an aggregate of metal oxide fine particles.
In order to obtain a high on-current as an FET, it is desirable that the resistance be low at the interface where the semiconductor serving as the active layer contacts the source electrode and the drain electrode.
However, the resistivity of a conductive thin film made of an aggregate of metal oxide fine particles is generally inferior to that of a thin film formed by a vacuum process. Therefore, methods for improving the properties of the conductive film have been proposed in the drying, baking, and post-baking processes after applying the coating liquid (see, for example, Patent Documents 1 to 4).

However, even in the above-mentioned proposed technique, a conductive thin film having the same film quality as that of the vacuum process and having the same physical properties and stability has not been obtained.
Therefore, in a FET in which a conductive thin film formed by a coating method or the like and made of an aggregate of metal oxide fine particles is used as a source electrode and a drain electrode of an FET and an active layer is further formed thereon, it is manufactured. There arises a problem that the carrier concentration of the conductive thin film changes, and the uniformity of the performance of the obtained FET cannot be obtained.

  An object of the present invention is to solve the above-described problems and achieve the following objects. That is, the present invention uses a conductive thin film made of an aggregate of metal oxide fine particles as a source electrode and a drain electrode, and further includes an active layer formed on the conductive thin film. An object of the present invention is to provide a method for manufacturing a field-effect transistor with a low on-state resistance, a constant carrier concentration, a high on-current, and little variation.

Means for solving the problems are as follows.
That is, the manufacturing method of the field effect transistor of the present invention is:
an active layer made of an n-type oxide semiconductor;
A source electrode and a drain electrode made of a conductive thin film made of an aggregate of metal oxide fine particles containing indium and tin; and
A method of manufacturing a field effect transistor comprising:
Forming the source and drain electrodes;
A surface modification step of modifying the surfaces of the source electrode and the drain electrode;
A light irradiation step of irradiating light in a low oxygen concentration atmosphere to the source electrode and the drain electrode in this order,
It is characterized by that.

  According to the present invention, the above conventional problems can be solved, and a conductive thin film made of an aggregate of metal oxide fine particles is used as a source electrode and a drain electrode, and an active layer is formed thereon. In the field effect transistor, it is possible to provide a method for manufacturing a field effect transistor with a low on-state current and a small variation while keeping the resistance of the conductive thin film low and keeping the carrier concentration constant.

FIG. 1 is a schematic cross-sectional view showing an example of a bottom gate / bottom contact field effect transistor. FIG. 2 is a schematic cross-sectional view showing an example of a top gate / top contact field effect transistor. FIG. 3A is a schematic cross-sectional view showing an example of a method for producing a field effect transistor according to the present invention (part 1). FIG. 3B is a schematic cross-sectional view showing an example of a method for producing a field effect transistor according to the present invention (part 2). FIG. 3C is a schematic cross-sectional view showing an example of a method for producing a field effect transistor according to the present invention (part 3). FIG. 3D is a schematic cross-sectional view showing an example of a method for producing a field effect transistor according to the present invention (part 4). FIG. 4 is a graph showing the results of the example (part 1). FIG. 5 is a graph showing the results of the example (part 2). FIG. 6 is a graph showing the results of the example (No. 3).

(Field effect transistor)
The field effect transistor of the present invention includes at least a gate electrode, a source electrode, a drain electrode, an active layer, and a gate insulating layer, and further includes other members as necessary.
The field effect transistor of the present invention can be manufactured, for example, by the method for manufacturing a field effect transistor of the present invention.

<Gate electrode>
The gate electrode is not particularly limited as long as it is an electrode for applying a gate voltage, and can be appropriately selected according to the purpose.

The material of the gate electrode is not particularly limited and may be appropriately selected depending on the purpose. For example, platinum, palladium, gold, silver, copper, zinc, aluminum, nickel, chromium, tantalum, molybdenum, titanium, etc. Metals, alloys thereof, mixtures of these metals, and the like. Also, In ₂ O ₃ (ITO) to which indium oxide, zinc oxide, tin oxide, gallium oxide, niobium oxide, tin (Sn) is added, ZnO to which gallium (Ga) is added, and aluminum (Al) are added. ZnO, conductive oxides such as SnO ₂ to which antimony (Sb) is added, composite compounds thereof, mixtures thereof, and the like.

  There is no restriction | limiting in particular as average thickness of the said gate electrode, Although it can select suitably according to the objective, 20 nm-1,000 nm are preferable and 50 nm-300 nm are more preferable.

<Gate insulation layer>
The gate insulating layer is not particularly limited as long as it is an insulating layer formed between the gate electrode and the active layer, and can be appropriately selected according to the purpose.

  There is no restriction | limiting in particular as a material of the said gate insulating layer, According to the objective, it can select suitably, For example, an inorganic insulating material, an organic insulating material, etc. are mentioned.

  Examples of the inorganic insulating material include silicon oxide, aluminum oxide, tantalum oxide, titanium oxide, yttrium oxide, lanthanum oxide, hafnium oxide, zirconium oxide, silicon nitride, aluminum nitride, and mixtures thereof. Examples of the organic insulating material include polyimide, polyamide, polyacrylate, polyvinyl alcohol, and novolac resin.

  There is no restriction | limiting in particular as average thickness of the said gate insulating layer, Although it can select suitably according to the objective, 50 nm-1,000 nm are preferable and 100 nm-500 nm are more preferable.

<Source electrode and drain electrode>
The source electrode and the drain electrode are electrodes for taking out current. The source electrode and the drain electrode are conductive thin films made of an aggregate of metal oxide fine particles containing indium and tin.

-Conductive thin film-
The conductive thin film is formed by an aggregate of metal oxide fine particles. The conductive thin film is obtained, for example, by applying a coating liquid for forming a conductive thin film, which will be described later, to an object to be coated and drying it, followed by firing.

  There is no restriction | limiting in particular in the shape of the said microparticles | fine-particles, According to the objective, it can select suitably, For example, spherical shape, elliptical spherical shape, a polyhedron etc. are mentioned. Among these, spherical shape is preferable. The spherical shape is not limited to a true spherical shape.

  There is no restriction | limiting in particular as an average particle diameter of the said fine particle, Although it can select suitably according to the objective, The upper limit is preferable 1 micrometer or less, 100 nm or less is more preferable, 50 nm or less is especially preferable. The lower limit is preferably 1 nm or more, more preferably 3 nm or more, and particularly preferably 5 nm or more.

Here, the average particle diameter of the fine particles can be measured by, for example, a scanning electron microscope.
The cross section of the conductive thin film is observed with a scanning electron microscope, and the average value when the particle diameter of 100 fine particles in the cross section of the conductive thin film is measured is defined as the average particle diameter. However, when the fine particles are spherical, the diameter is the particle diameter, and when the fine particles are indefinite, the average value of the longest diameter and the shortest diameter is the particle diameter. When the conductive thin film is on the outermost surface, an atomic force microscope (Nano-Im, manufactured by Pacific Nanotechnology) can also be used.

  When the conductive thin film is used for a source electrode and a drain electrode of a transistor having a small device size, the contact surface between the semiconductor (active layer) and the electrode is several μm to several hundred μm wide. When the size of the fine particles is in the above range (for example, 1 nm to 1 μm), the fine particles and the semiconductor (active layer) in the conductive thin film are in a substantially uniform contact state, and the electrical characteristics are uniform. Can be expected.

  There is no restriction | limiting in particular as a magnitude | size of the said electroconductive thin film, According to the objective, it can select suitably.

There is no restriction | limiting in particular as average thickness of the said electroconductive thin film, Although it can select suitably according to the objective, 40 nm-2 micrometers are preferable, and 70 nm-1 micrometer are more preferable.
The average thickness is measured for an arbitrary four points using an atomic force microscope (Nano-Im, Pacific Nanotechnology) or a contact step meter (α-step, manufactured by KLA Tencor), It can be determined by obtaining an average value of their thicknesses.

--- Fine particles of metal oxide-
The metal oxide in the metal oxide fine particles is not particularly limited as long as it contains indium and tin, and can be appropriately selected according to the purpose, but it is indium tin oxide (ITO). It is preferable in that it has high electrical conductivity.

  There is no restriction | limiting in particular as a ratio of the said indium and the said tin, Although it can select suitably according to the objective, In atomic ratio [tin (B) / indium (A)], 0.01-0. 25 is preferable, and 0.05 to 0.15 is more preferable.

  When the atomic number ratio [tin (B) / indium (A)] is within the preferred range, the conductivity of the conductive thin film made of an aggregate of fine particles of the metal oxide can be further reduced. The effect becomes remarkable when it is in the more preferable range.

-Manufacturing method of conductive thin film-
The method for producing the conductive thin film is not particularly limited and may be appropriately selected depending on the purpose. For example, a screen printing method, a roll coating method, a dip coating method, a spin coating method, an ink jet method, a nanoimprint method, etc. It can be produced by a wet process by the coating method. In particular, a droplet coating method typified by an inkjet method is preferable in that a conductive thin film can be easily formed and a large area conductive thin film can be formed.

  When the conductive thin film is formed by the coating method, a conductive thin film forming coating solution is prepared, the conductive thin film forming coating solution is applied to an object to be coated, dried, and then fired. Can be obtained.

The coating liquid for forming a conductive thin film contains at least one of indium and tin, a metal oxide containing indium and tin, and indium oxide and tin oxide, and if necessary, an organic solvent or the like. Contains other ingredients.
If the said metal oxide contains indium and tin, there will be no restriction | limiting in particular, Although it can select suitably according to the objective, It is preferable that it is indium tin oxide (ITO).

  There is no restriction | limiting in particular as a ratio of the said indium and the said tin, Although it can select suitably according to the objective, In atomic ratio [tin (B) / indium (A)], 0.01-0. 25 is preferable, and 0.05 to 0.15 is more preferable.

  When the atomic number ratio [tin (B) / indium (A)] is within the preferred range, the conductivity of the metal oxide can be further lowered, and when the atomic ratio is within the more preferred range, The effect is remarkable.

  The metal oxide fine particles may be commercially available products. Examples of the commercially available product include ITO nanoparticle dispersion (manufactured by Sakai Seisakusho Co., Ltd., average particle size 20 nm, metal content 10.1% by mass), ITO-1Cden (average particle size 5 nm, manufactured by ULVAC Material Co., Ltd.) Metal content 20.1% by mass), and the like. In general, it is known that metal nanoparticles are sintered at a temperature much lower than their melting point when the average diameter is several nm to several tens of nm, and the average particle diameter is in the above range. The effect of lowering the sintering temperature can be expected. In addition, when the conductive thin film is formed by using a droplet coating method such as inkjet, it is conceivable that the small average particle diameter helps prevent clogging of the nozzle.

  The indium oxide and tin oxide are coated with the conductive thin film-forming coating solution on an object to be coated, dried, and then fired to form a metal oxide containing indium and tin, for example, indium tin oxide ( ITO).

  There is no restriction | limiting in particular as a ratio of the said indium and the said tin, Although it can select suitably according to the objective, In atomic ratio [tin (B) / indium (A)], 0.01-0. 25 is preferable, and 0.05 to 0.15 is more preferable.

  When the atomic number ratio [tin (B) / indium (A)] is within the preferred range, the conductivity of the metal oxide can be further lowered, and when the atomic ratio is within the more preferred range, The effect is remarkable.

  The organic solvent is not particularly restricted and may be appropriately selected according to purpose. Examples thereof include hydrocarbons such as tetradecane; cyclic hydrocarbons such as cyclohexane and cyclododecene; aromatic hydrocarbons such as toluene, xylene and mesitylene. Etc. These may be used individually by 1 type and may use 2 or more types together.

  As the application method, when applied by an inkjet method or a nanoimprint method, it can be applied even at room temperature, but it is possible to heat the object to be coated at about 30 ° C. to 100 ° C. immediately after adhering to the surface of the object to be coated. It is preferable at the point which can suppress that the coating liquid for electroconductive thin film formation spreads wet.

  The drying is not particularly limited as long as it can remove volatile components in the coating liquid for forming a conductive thin film, and can be appropriately selected according to the purpose. In the drying, it is not necessary to completely remove the volatile component, and it is sufficient if the volatile component can be removed to such an extent that firing is not hindered.

  The firing temperature is not less than the temperature at which the metal oxide (metal oxide containing indium and tin) as the main component of the conductive thin film is formed and not more than the heat deformation temperature of the object to be coated. There is no particular limitation, and it can be appropriately selected according to the purpose, but it is preferably 180 ° C to 600 ° C.

  There is no restriction | limiting in particular as said baking atmosphere, According to the objective, it can select suitably, For example, the atmosphere containing oxygen, such as in oxygen and air, is mentioned. Further, the firing atmosphere can be an inert gas such as nitrogen gas.

  After firing, the electrical properties, reliability, and uniformity of the conductive thin film can be further improved by annealing in air, an inert gas atmosphere, or a reducing gas atmosphere.

  There is no restriction | limiting in particular as time of the said baking, According to the objective, it can select suitably.

  The said conductive thin film can control the carrier concentration of a conductive thin film by passing through the light irradiation process mentioned later. When the conductive thin film is used as a source electrode and a drain electrode of a field effect transistor using an n-type oxide semiconductor as an active layer, a higher carrier concentration is preferable. Since the carrier concentration is high, the resistance of the electrode can be lowered and a high on-current can be obtained. In addition, since the carrier concentration is high, an effect of lowering the resistance at the contact interface between the n-type oxide semiconductor and the electrode can be expected, and similarly, a high on-current can be obtained.

The conductive thin film that is the source electrode and the drain electrode has a carrier concentration of 3.0 × 10 ²⁰ cm ⁻³ or more. In the range that contributes to lowering the resistance of the film, it is preferably as high as possible, particularly preferably 4.0 × 10 ²⁰ cm ⁻³ or more.
The carrier concentration can be measured by, for example, a Hall effect measuring device.
The Hall effect is a phenomenon in which an electromotive force is generated in a direction perpendicular to both the current and magnetic field when a magnetic field perpendicular to the current is applied, and is mainly used to determine the carrier concentration, mobility, and carrier type of a semiconductor. It is done.

  Examples of the Hall effect measuring device include a specific resistance / Hall effect measuring system ResiTest 8300 (manufactured by Toyo Corporation).

<Active layer>
The active layer is not particularly limited as long as it is an active layer made of an n-type oxide semiconductor formed between the source electrode and the drain electrode, and can be appropriately selected according to the purpose.

  There is no restriction | limiting in particular as said n-type oxide semiconductor, Although it can select suitably according to the objective, It is preferable to contain at least any one of indium, zinc, tin, gallium, and titanium.

Examples of the n-type oxide semiconductor include ZnO, SnO ₂ , In ₂ O ₃ , TiO ₂ , and Ga ₂ O ₃ . In-Zn-based oxides, In-Sn-based oxides, In-Ga-based oxides, Sn-Zn-based oxides, Sn-Ga-based oxides, Zn-Ga-based oxides, In-Zn-Sn-based materials Oxide, In-Ga-Zn-based oxide, In-Sn-Ga-based oxide, Sn-Ga-Zn-based oxide, In-Al-Zn-based oxide, Al-Ga-Zn-based oxide, Sn- An oxide containing a plurality of metals such as an Al—Zn-based oxide, an In—Hf—Zn-based oxide, and an In—Al—Ga—Zn-based oxide can also be used.

The n-type oxide semiconductor includes at least one of indium, zinc, tin, gallium, and titanium, and an alkaline earth metal because high field effect mobility can be obtained and the electron carrier concentration can be appropriately controlled. Is preferable, and it is more preferable to contain indium and an alkaline earth metal.
Examples of the alkaline earth metal include beryllium, magnesium, calcium, strontium, barium, and radium.
Indium oxide has an electron carrier concentration of about 10 ¹⁸ cm ⁻³ to 10 ²⁰ cm ⁻³ depending on the amount of oxygen deficiency. However, indium oxide has a property that oxygen vacancies are easily generated, and there is a case where unintended oxygen vacancies may be generated in a later step after the formation of the oxide semiconductor film. Forming oxides from two metals, indium and an alkaline earth metal that is easier to bond with oxygen than indium, prevents unintentional oxygen vacancies and facilitates control of the composition. It is particularly preferable because it can be easily controlled.

  The n-type oxide semiconductor is preferably obtained by applying a coating liquid for forming an n-type oxide semiconductor thin film and drying it, followed by firing.

  The coating liquid for forming an n-type oxide semiconductor thin film contains, for example, at least an inorganic indium compound, an inorganic alkaline earth metal compound, and an organic solvent, and further contains other components as necessary.

  There is no restriction | limiting in particular as said inorganic indium compound, According to the objective, it can select suitably, For example, an indium oxo acid, an indium halide, an indium hydroxide, an indium cyanide etc. are mentioned.

  Examples of the indium oxoacid include indium nitrate, indium sulfate, indium carbonate, and indium phosphate.

  There is no restriction | limiting in particular as said indium nitrate, According to the objective, it can select suitably, For example, the hydrate of an indium nitrate etc. are mentioned. Examples of the indium nitrate hydrate include indium nitrate trihydrate and indium nitrate pentahydrate.

  There is no restriction | limiting in particular as said inorganic alkaline-earth metal compound, According to the objective, it can select suitably, For example, an inorganic calcium compound, an inorganic strontium compound, etc. are mentioned.

There is no restriction | limiting in particular as said inorganic calcium compound, According to the objective, it can select suitably, For example, a calcium oxo acid, a calcium halide, a calcium hydroxide, a calcium cyanide etc. are mentioned.
Examples of the calcium oxoacid include calcium nitrate, calcium sulfate, calcium carbonate, and calcium phosphate.
Among these, calcium oxoacid and calcium halide are preferable, and calcium nitrate, calcium sulfate, and calcium chloride are more preferable in terms of high solubility in various solvents.

There is no restriction | limiting in particular as said inorganic strontium compound, According to the objective, it can select suitably, For example, strontium oxo acid, strontium halide, strontium hydroxide, strontium cyanide etc. are mentioned.
Examples of the strontium halide include strontium chloride, strontium bromide, and strontium iodide.
Among these, strontium oxoacids and strontium halides are preferable in terms of high solubility in various solvents, and strontium nitrate, strontium sulfate, and strontium chloride are more preferable.

  There is no restriction | limiting in particular as said organic solvent, Although it can select suitably according to the objective, Glycol ethers and diol are preferable. That is, it is preferable that the coating liquid for forming an n-type oxide semiconductor thin film contains at least one of the glycol ethers and the diols.

Since the glycol ethers dissolve the inorganic indium compound and the inorganic alkaline earth metal compound well and have high stability after dissolution, the glycol ethers are used as the coating liquid for forming the n-type oxide semiconductor thin film. By using it, an n-type oxide semiconductor with high uniformity and few defects can be obtained.
Further, by using the glycol ether in the coating liquid for forming the n-type oxide semiconductor thin film, an n-type oxide semiconductor having a desired shape can be formed with high accuracy.

  There is no restriction | limiting in particular as said glycol ether, Although it can select suitably according to the objective, An alkylene glycol monoalkyl ether is preferable. As carbon number of the said glycol ethers, 3-6 are preferable.

The glycol ethers are preferably used in combination with diols. When the glycol ethers and the diols are used in combination, clogging due to solvent drying in the ink jet nozzle during application by the ink jet method can be eliminated by the action of the diols. Furthermore, by the action of the glycol ethers, it is possible to quickly dry the coating liquid adhered to the substrate and the like, and to prevent the coating liquid from spreading to unnecessary portions. For example, it is possible to quickly dry a coating solution attached to a channel when manufacturing a field effect transistor and to prevent the coating solution from spreading outside the channel region.
In addition, since the glycol ethers usually have a low viscosity of about 1.3 cp to 3.5 cp, they can be easily mixed with a high viscosity diol to easily form the n-type oxide semiconductor thin film. The viscosity of the coating solution can be adjusted.

  The application method is not particularly limited and may be appropriately selected depending on the intended purpose. Examples thereof include screen printing, roll coating, dip coating, spin coating, ink jet, and nanoimprint. . Among these, in the manufacture of an n-type oxide semiconductor thin film having a desired shape, for example, a field effect transistor, a coating liquid to be adhered is obtained in that a designed channel width (in other words, a desired active layer shape) can be obtained. An ink jet method and a nanoimprint method that can control the amount of the dye are preferable. When applying by the inkjet method and the nanoimprint method, it can be applied even at room temperature, but heating the substrate (application object) to about 30 ° C. to 100 ° C. is a coating solution immediately after adhering to the substrate surface. Is preferable in that it is possible to suppress spreading and spreading.

The firing temperature is not particularly limited as long as it is equal to or higher than the temperature at which indium and alkaline earth metal form an oxide and equal to or lower than the thermal deformation temperature of the base material (coating object). Although it can select suitably, 180 to 600 degreeC is preferable.
There is no restriction | limiting in particular as said baking atmosphere, According to the objective, it can select suitably.
There is no restriction | limiting in particular as time of the said baking, According to the objective, it can select suitably.

  There is no restriction | limiting in particular as average thickness of the said active layer, Although it can select suitably according to the objective, 1 nm-200 nm are preferable and 5 nm-100 nm are more preferable.

<Structure of field effect transistor>
The structure of the field effect transistor is not particularly limited and may be appropriately selected depending on the purpose. For example, the bottom gate / bottom contact type (FIG. 1), the top gate / bottom contact type (FIG. 2), and the like. Is mentioned.

  1 to 2, 1 is a base material, 2 is a gate electrode, 3 is a gate insulating layer, 4 is a source electrode, 5 is a drain electrode, and 6 is an active layer.

  The field effect transistor of the present invention can be suitably used for a pixel drive circuit such as a liquid crystal display, an organic EL display, and an electrochromic display, and a field effect transistor for a logic circuit.

(Method for producing field-effect transistor)
The method for producing a field effect transistor of the present invention includes at least a source electrode and a drain electrode formation step, a surface modification step, and a light irradiation step in this order, and further, if necessary, a gate electrode formation step, It includes other processes such as a gate insulating layer forming process and an active layer forming process.

The field effect transistor includes an active layer, a source electrode, and a drain electrode.
The active layer is made of an n-type oxide semiconductor.
The source electrode and the drain electrode are made of a conductive thin film made of an aggregate of metal oxide fine particles containing indium and tin.
The manufacturing method of the field effect transistor is suitable as the manufacturing method of the field effect transistor of the present invention.

  Hereinafter, the manufacturing method will be described separately for the case where the source electrode and the drain electrode are formed on the gate insulating layer and the case where the source electrode and the drain electrode are formed on the base material.

<First manufacturing method>
The field effect transistor manufacturing method (first manufacturing method) of the present invention includes at least a source electrode and drain electrode formation step, a surface modification step, and a light irradiation step in this order, and further if necessary. And other processes such as a gate electrode forming process, a gate insulating layer forming process, and an active layer forming process.
The manufacturing method of the field effect transistor is suitable as the manufacturing method of the field effect transistor of the present invention.

<< Gate electrode formation process >>
The gate electrode forming step is not particularly limited as long as it is a step of forming a gate electrode on a substrate, and can be appropriately selected according to the purpose. For example, (i) sputtering method, dip coating method, etc. (Ii) A step of directly forming a desired shape by a printing process such as ink jet, nanoimprint, or gravure.

-Base material-
There is no restriction | limiting in particular as a shape, a structure, and a magnitude | size of the said base material, According to the objective, it can select suitably.

  There is no restriction | limiting in particular as a material of the said base material, According to the objective, it can select suitably, For example, a glass base material, a plastic base material, etc. are mentioned.

  There is no restriction | limiting in particular as said glass base material, According to the objective, it can select suitably, For example, an alkali free glass, silica glass, etc. are mentioned.

  There is no restriction | limiting in particular as said plastic base material, According to the objective, it can select suitably, For example, a polycarbonate (PC), a polyimide (PI), a polyethylene terephthalate (PET), a polyethylene naphthalate (PEN) etc. are mentioned. It is done.

  In addition, it is preferable that pretreatments, such as oxygen plasma, UV ozone, and UV irradiation washing | cleaning, are performed for the said base material at the point of the cleaning of a surface, and adhesive improvement.

<< Gate insulating layer formation process >>
The gate insulating layer forming step is not particularly limited as long as it is a step of forming a gate insulating layer on the gate electrode, and can be appropriately selected according to the purpose. For example, (i) sputtering, dip Examples include a step of patterning by photolithography after film formation by a coating method or the like, and (ii) a step of directly forming a desired shape by a printing process such as inkjet, nanoimprint, or gravure.

<< Source and drain electrode formation process >>
The source electrode and drain electrode forming step is not particularly limited as long as it is a step of forming the source electrode and the drain electrode made of the conductive thin film, and can be appropriately selected according to the purpose. A step of forming a source electrode and a drain electrode by applying a coating liquid for forming a conductive thin film on the insulating layer, drying and then baking is preferable.

  The coating liquid for forming a conductive thin film contains at least one of indium and tin, a metal oxide containing indium and tin, and indium oxide and tin oxide, and if necessary, an organic solvent or the like. Contains other ingredients. The details and preferred embodiments of the coating liquid for forming a conductive thin film are as described above.

  Through the source electrode and drain electrode formation step, at least the source electrode and the drain electrode are formed apart from each other on the gate insulating layer.

  The application method is not particularly limited and may be appropriately selected depending on the intended purpose. Examples thereof include screen printing, roll coating, dip coating, spin coating, ink jet, and nanoimprint. .

  As an application method, when applying by an inkjet method or a nanoimprint method, it can be applied even at room temperature, but by heating an object to be coated (for example, the gate insulating layer) to about 25 ° C. to 50 ° C. It is also possible to suppress the spreading of the coating liquid immediately after adhering to the surface of the object to be coated.

After the application, it is preferable to perform drying and baking.
The drying is not particularly limited as long as the volatile component in the coating solution can be removed, and can be appropriately selected according to the purpose. In the drying, it is not necessary to completely remove the volatile component, and it is sufficient if the volatile component can be removed to such an extent that the firing is not inhibited.
The firing temperature is not particularly limited as long as it is equal to or lower than the thermal deformation temperature of the article to be coated, and can be appropriately selected according to the purpose, but is preferably 180 ° C to 600 ° C.
There is no restriction | limiting in particular as said baking atmosphere, According to the objective, it can select suitably, For example, the atmosphere containing oxygen, such as in oxygen and air, is mentioned. Further, the firing atmosphere can be an inert gas such as nitrogen gas.
There is no restriction | limiting in particular as time of the said baking, According to the objective, it can select suitably.

<< Surface modification process >>
The surface modification step is a step of modifying the surfaces of the gate insulating layer, the source electrode, and the drain electrode. Here, “modification” includes the meaning of removing contaminants on the surface, and in some cases also includes the meaning of improving the wettability of the coating liquid to the surface.

  The surface modification step is performed as a pretreatment for forming the active layer in order to remove contaminants adsorbed on the surfaces of the gate insulating film, the source electrode, and the drain electrode. By removing contaminants, the interface between the active layer and the gate insulating film and the interface between the active layer and the source electrode and the drain electrode are cleaned, thereby improving the adhesion and inhibiting the current path. By removing impurities, there is an effect of improving on-current and suppressing performance variation between elements.

  In addition, when the active layer forming step is a physical vapor deposition method such as sputtering, a uniform film formation can be expected by removing the contaminants.

  When the active layer forming step is a wet process such as a solution coating method, the wettability of the coating solution for forming the active layer is improved by the surface modification step, and a uniform film formation can be expected.

  The surface modification step is preferably selected from oxygen plasma treatment, UV ozone treatment, UV irradiation, and the like. The UV ozone treatment is particularly preferable because it can be treated under atmospheric pressure and has a strong oxidizing power, so that it takes a short time to remove surface contaminants and modify the surface. . Taking the result of measuring the progress of surface modification of a silicon substrate with a thermal oxide film as a contact angle of water, the contact angle of water decreases to 10 degrees or less in 10 minutes or less in the UV ozone treatment. On the other hand, when the same UV irradiation was performed in an atmosphere substituted with dry nitrogen (that is, in a low oxygen concentration atmosphere), it was found that it took 30 minutes or more to reduce the contact angle of water to 10 degrees or less. Yes. Therefore, an ozone atmosphere having a strong oxidizing power is preferable for removing surface contaminants and modifying the surface.

<< Light irradiation process >>
In the light irradiation step, following the surface modification step as a pretreatment for forming the active layer, a step of controlling the carrier concentration of the conductive thin film to be the source electrode and the drain electrode is performed in a low oxygen concentration atmosphere. And irradiating the source electrode and the drain electrode with light. The irradiated light is preferably ultraviolet light that can be absorbed by the conductive thin film and converted into thermal energy or the like.
In the surface modification step, strong oxidizing power in oxygen plasma treatment, UV ozone treatment, UV irradiation, or the like is used when removing surface contaminants. Therefore, as a side effect, the resistance of the conductive thin film is increased. In the light irradiation step, the carrier concentration can be controlled by the surface modification step, and the resistivity of the conductive thin film having a high resistance can be lowered.
Therefore, the surface modification step and the light irradiation step, the surface modification step increases the resistivity of the conductive thin film as a side effect of removing surface contaminants, whereas the light irradiation step, These steps are different in that the resistivity of the raised conductive thin film is lowered.

  As the lamps that generate ultraviolet rays, low pressure, medium pressure, high pressure, ultrahigh pressure mercury lamps, xenon lamps, halide lamps, excimer lamps, and the like that are usually used for generating ultraviolet rays can be used. The irradiation time by the lamp that generates ultraviolet rays is preferably 1 minute or longer, particularly preferably 5 minutes or longer.

The atmosphere during light irradiation is a low oxygen concentration atmosphere. Here, the low oxygen concentration atmosphere means that ozone or active atomic oxygen generated by reaction of oxygen in the atmosphere by light irradiation does not affect the source electrode and the drain electrode. , It may contain oxygen to the extent that it does not affect. For example, a low-pressure mercury lamp emits ultraviolet light having wavelengths of 185 nm and 254 nm. When ultraviolet light of 185 nm is absorbed by oxygen, a ground state oxygen atom is generated. The ground state oxygen atoms and oxygen combine to generate ozone. When ozone absorbs ultraviolet light of 254 nm, active atomic oxygen is generated. Thus, low-pressure mercury lamp irradiation in an oxygen introduction environment is equivalent to UV ozone treatment.
For example, the excimer lamp (Xe ₂ ) emits ultraviolet light of 172 nm. When ultraviolet light having a wavelength of 172 nm is absorbed by oxygen, an oxygen atom in a ground state and oxygen in an active atomic state are generated. Ground-state oxygen atoms combine with oxygen to produce ozone. Further, when ozone absorbs ultraviolet light having a wavelength of 172 nm, active atomic oxygen is generated. Thus, excimer lamp (Xe ₂ ) irradiation in an oxygen-introducing environment is also equivalent to treatment under strong oxidizing power such as ozone or an active atomic atmosphere.

  As the environment of the low oxygen concentration atmosphere, a reduced pressure (vacuum) environment or an environment substituted by introducing an inert gas such as nitrogen gas or argon gas can be used. The low oxygen concentration atmosphere is preferably a residual oxygen concentration of less than 1%, more preferably less than 0.1%, and particularly preferably less than 0.01%.

<< Active layer formation process >>
The active layer forming step is not particularly limited as long as it is a step of forming an active layer made of an n-type oxide semiconductor on at least the gate insulating layer serving as a channel region, and is appropriately selected according to the purpose. For example, a physical vapor deposition method (physical vapor deposition method) such as sputtering or PLD (laser ablation), a chemical vapor deposition method such as plasma CVD, a solution coating method such as a sol-gel method, or a known film formation method. Can be used. Examples of the method for patterning the active layer include a step using a shadow mask, a step using photolithography, and a step of directly forming a desired shape by printing or inkjet.

  When the active layer forming step and the source and drain electrode forming step are performed, the active layer is formed between the source electrode and the drain electrode.

  In the first manufacturing method, when the active layer forming step is performed after the source electrode and drain electrode forming step, a bottom gate / bottom contact type field effect transistor can be manufactured.

  Here, a manufacturing method of a bottom gate / bottom contact type field effect transistor will be described with reference to FIGS. 3A to 3D.

  First, a conductor film made of aluminum or the like is formed on a base material 1 made of a glass substrate or the like by sputtering or the like, and the formed conductor film is patterned by etching to form the gate electrode 2 (FIG. 3A). ).

Next, a gate insulating layer 3 made of SiO ₂ or the like is formed on the gate electrode 2 and the base material 1 by sputtering or the like so as to cover the gate electrode 2 (FIG. 3B).
Next, a coating liquid for forming an electric thin film is applied onto the gate insulating layer 3 by a droplet discharge method such as an inkjet method, dried, and then fired to form the source electrode 4 and the drain electrode 5 (FIG. 3C).
Next, the surface modification step and the light irradiation step are performed in this order.

Next, an n-type oxide semiconductor film is formed on the gate insulating layer 3 and the source electrode 4 and the drain electrode 5 by sputtering or the like to form an active layer 6 (FIG. 3D).
Thus, a field effect transistor is manufactured.

<Second production method>
The field effect transistor manufacturing method (second manufacturing method) of the present invention further includes at least a source electrode and drain electrode forming step, a surface modification step, and a light irradiation step in this order, and further required. Depending on the situation, other steps are included.
The manufacturing method of the field effect transistor is suitable as the manufacturing method of the field effect transistor of the present invention.

<< Source and drain electrode formation process >>
The source electrode and drain electrode forming step is not particularly limited as long as it is a step of forming the source electrode and drain electrode made of the conductive thin film, and can be appropriately selected according to the purpose. A step of forming a source electrode and a drain electrode by applying a coating liquid for forming a conductive thin film on the top and baking it is preferable.
Through the source electrode and drain electrode formation step, at least the source electrode and the drain electrode are formed apart from each other on the base material.

-Base material-
There is no restriction | limiting in particular as said base material, According to the objective, it can select suitably, For example, the same base material as the base material illustrated in the said 1st manufacturing method is mentioned.

  Examples of the source electrode and drain electrode formation step include the same steps as those exemplified in the source electrode and drain electrode formation step of the first manufacturing method.

<< Surface modification process >>
The surface modification step is a step of modifying the surfaces of the gate insulating layer, the source electrode, and the drain electrode.
Examples of the surface modification step include the same steps as those exemplified in the surface modification step of the first manufacturing method.

<< Light irradiation process >>
In the light irradiation step, following the surface modification step as a pretreatment for forming the active layer, a step of controlling the carrier concentration of the conductive thin film to be the source electrode and the drain electrode is performed in a low oxygen concentration atmosphere. And irradiating the source electrode and the drain electrode with light.
As said light irradiation process, the process similar to the process illustrated in the said light irradiation process of the said 1st manufacturing method is mentioned, for example.

<< Active layer formation process >>
The active layer forming step is not particularly limited as long as it is a step of forming an active layer made of an n-type oxide semiconductor on at least the base material to be a channel region, and is appropriately selected depending on the purpose. Can do.

  As said active layer formation process, the process similar to the process illustrated in the said active layer formation process of the said 1st manufacturing method is mentioned, for example.

  When the active layer forming step and the source and drain electrode forming step are performed, the active layer is formed between the source electrode and the drain electrode.

<< Gate insulating layer formation process >>
The gate insulating layer forming step is not particularly limited as long as it is a step of forming a gate insulating layer on the active layer, and can be appropriately selected according to the purpose. For example, in the first manufacturing method, A step similar to the step exemplified in the gate insulating layer forming step can be given.

<< Gate electrode formation process >>
The gate electrode forming step is not particularly limited as long as it is a step of forming a gate electrode on the gate insulating layer, and can be appropriately selected according to the purpose. The process similar to the process illustrated in the gate electrode formation process is mentioned.

  In the second manufacturing method, when the source electrode and drain electrode forming step is performed after the active layer forming step, a top gate / bottom contact type field effect transistor can be manufactured.

  Examples of the present invention will be described below, but the present invention is not limited to the following examples.

Example 1
<Fabrication of field effect transistor>
-Formation of gate electrode-
A molybdenum film was formed on a glass substrate by DC sputtering so as to have a thickness of about 100 nm. Thereafter, a photoresist was applied, and a resist pattern similar to the pattern of the gate electrode to be formed was formed by pre-baking, exposure by an exposure apparatus, and development. Further, etching was performed with an etching solution composed of phosphoric acid-nitric acid-acetic acid, and the molybdenum film in the region where the resist pattern was not formed was removed. Thereafter, the gate electrode was formed by removing the resist pattern.

-Formation of gate insulation layer-
An SiO ₂ film was formed on the formed gate electrode and the glass substrate by RF sputtering so as to have a thickness of about 200 nm. Thereafter, a photoresist was applied, and a resist pattern similar to the pattern of the gate insulating layer to be formed was formed by pre-baking, exposure by an exposure apparatus, and development. Furthermore, the SiO ₂ film in the region where the resist pattern was not formed was removed by etching using buffered hydrofluoric acid, and then the resist pattern was also removed to form a gate insulating layer.

-Formation of source and drain electrodes-
On the formed gate insulating layer, a commercially available ITO nanometal ink (manufactured by ULVAC, Inc., average particle diameter 5 nm, metal content 20.1 mass%) was applied in a predetermined pattern using an inkjet apparatus. By heating at 300 ° C. under reduced pressure for 1 hour and heating at 400 ° C. for 1 hour in the air, an ITO thin film was formed, and a source electrode and a drain electrode were formed.

-Surface modification process-
As a pretreatment for forming the active layer, the glass substrate on which the source electrode and the drain electrode were formed was subjected to UV ozone treatment using a cleaning apparatus (UV-300 manufactured by Samco Corporation). The set temperature during irradiation was 90 ° C., and the irradiation time was 10 minutes.

-Light irradiation process-
After the UV ozone treatment, the substrate on which the source electrode and the drain electrode were formed was subjected to a light irradiation process using the cleaning device. Specifically, the ozone generator was turned off and the cleaning chamber was purged with nitrogen to realize a low oxygen concentration atmosphere and UV irradiation was performed. The set temperature during irradiation was 90 ° C., and the irradiation time was 10 minutes.

-Formation of active layer-
On the formed gate insulating layer, an Mg—In-based oxide semiconductor film (active layer) was formed by a sputtering method by the method described in Examples of Japanese Patent Application Laid-Open No. 2010-74148. A polycrystalline fired body having a composition of In ₂ MgO ₄ was used as a target. The ultimate vacuum in the sputtering chamber was 2 × 10 ⁻⁵ Pa. The thickness of the obtained n-type oxide semiconductor film (active layer) was 50 nm.
At this time, the channel width was 400 μm, and the channel length defined between the source and drain electrodes was 50 μm.

  Thus, a bottom gate / bottom contact field effect transistor was fabricated.

<Transistor performance evaluation>
About the obtained field effect transistor, transistor performance evaluation of 20 elements was implemented using the semiconductor parameter analyzer apparatus (Agilent Technology company make, semiconductor parameter analyzer B1500A). The current-voltage characteristics were evaluated by changing the source / drain voltage Vds to 10 V and changing the gate voltage from Vg = −20 V to +20 V. The graph of the average current-voltage characteristic of the evaluated 20 elements is shown by the solid line in FIG. Field effect mobility was calculated in the saturation region. Further, the current Ids (calculated average value) and the variation (σ) of the current Ids in the on state (for example, Vg = 20 V) of the transistor were calculated. The results are shown in Table 1.
In FIG. 4, “e” represents a power of 10. For example, e-3 represents × ^{10 -3.} The same applies to FIGS. 5 and 6.

<Production of Hall measuring element>
-Formation of conductive thin film formation-
In the same manner as the formation of the source electrode and the drain electrode in the production of the field effect transistor, ITO nanometal ink was applied in a predetermined pattern on the glass substrate. An ITO thin film was formed by heating at 300 ° C. under reduced pressure for 1 hour and heating at 400 ° C. for 1 hour in the air.

  Thereafter, in the same manner as the surface modification step in the production of the field effect transistor, the glass substrate on which the ITO thin film is formed is subjected to UV ozone treatment using a cleaning device (UV-300 manufactured by Samco Corporation). Went.

  After the UV ozone treatment, UV irradiation was performed in the same manner as the light irradiation step in the production of the field effect transistor.

  Thus, a Hall measuring element was produced.

<Evaluation of electron carrier concentration (density)>
About the obtained Hall measuring element, a specific resistance measurement and a Hall effect measurement are performed using a Hall effect measurement system (ResiTest 8300, manufactured by Toyo Technica Co., Ltd.), and the electron carrier concentration (cm ⁻³ ) of the conductive thin film is obtained. It was. The obtained electron carrier concentration (density) is shown in Table 1.

(Comparative Example 1)
In Example 1, a field effect transistor was fabricated in the same manner as in Example 1 except that the light irradiation step was not performed. Further, the transistor performance evaluation of 20 elements was performed in the same manner as in Example 1. The results are shown in Table 1. A graph of current-voltage characteristics is shown in FIG.

  Further, in Example 1, a hole measuring element was produced in the same manner as in Example 1 except that the light irradiation step was not performed. Further, the electron carrier concentration was evaluated in the same manner as in Example 1. The results are shown in Table 1.

(Comparative Example 2)
In Example 1, a field effect transistor was produced in the same manner as in Example 1 except that the surface modification step was not performed. Further, the transistor performance evaluation of 20 elements was performed in the same manner as in Example 1. The results are shown in Table 1. A graph of current-voltage characteristics is shown in FIG.

  Further, in Example 1, a Hall measuring element was produced in the same manner as in Example 1 except that the surface modification step was not performed. Further, the electron carrier concentration was evaluated in the same manner as in Example 1. The results are shown in Table 1.

(Comparative Example 3)
In Example 1, a field effect transistor was fabricated in the same manner as in Example 1 except that the surface modification process and the light irradiation process were not performed. Further, the transistor performance evaluation of 20 elements was performed in the same manner as in Example 1. The results are shown in Table 1. A graph of current-voltage characteristics is shown in FIG.

  In Example 1, a Hall measuring element was produced in the same manner as Example 1 except that the surface modification step and the light irradiation step were not performed. Further, the electron carrier concentration was evaluated in the same manner as in Example 1. The results are shown in Table 1.

(Comparative Example 4)
A field effect transistor was produced in the same manner as in Example 1 except that the order of the surface modification step and the light irradiation step was changed in Example 1. Further, the transistor performance evaluation of 20 elements was performed in the same manner as in Example 1. The results are shown in Table 1.

  Further, in Example 1, a Hall measuring element was produced in the same manner as in Example 1 except that the order of the surface modification step and the light irradiation step was changed. Further, the electron carrier concentration was evaluated in the same manner as in Example 1. The results are shown in Table 1.

(Example 2)
In Example 1, a field effect transistor and a Hall measuring element were produced in the same manner as in Example 1 except that “formation of source and drain electrodes” was changed to the following method. Further, the transistor performance evaluation of 20 elements was performed in the same manner as in Example 1. The results are shown in Table 1. Further, a graph of current-voltage characteristics is shown in FIG.

-Formation of source and drain electrodes-
On the formed gate insulating layer, a commercially available ITO nanoparticle dispersion (manufactured by Sakai Seisakusho Co., Ltd., average particle diameter 20 nm, metal content 10.1% by mass) was applied in a predetermined pattern using an inkjet apparatus. After drying at 150 ° C. for 15 minutes on a hot plate, it was heated at 480 ° C. for 30 minutes in the atmosphere. Thereafter, an ITO thin film was formed by heating at 480 ° C. for 30 minutes while flowing an argon gas, and a source electrode and a drain electrode were formed.

(Comparative Example 5)
In Example 2, a field effect transistor was fabricated in the same manner as in Example 2 except that the light irradiation step was not performed. Further, the transistor performance evaluation of 20 elements was performed in the same manner as in Example 2. The results are shown in Table 1. Further, a graph of current-voltage characteristics is shown in FIG.

  Further, in Example 2, a hole measuring element was produced in the same manner as in Example 2 except that the light irradiation step was not performed. In addition, the electron carrier concentration was evaluated in the same manner as in Example 2. The results are shown in Table 1.

(Comparative Example 6)
In Example 2, a field effect transistor was fabricated in the same manner as in Example 2 except that the surface modification step was not performed. Further, the transistor performance evaluation of 20 elements was performed in the same manner as in Example 2. The results are shown in Table 1. Further, a graph of current-voltage characteristics is shown in FIG.

  Further, in Example 2, a Hall measuring element was produced in the same manner as in Example 2 except that the surface modification step was not performed. In addition, the electron carrier concentration was evaluated in the same manner as in Example 2. The results are shown in Table 1.

(Comparative Example 7)
In Example 2, a field effect transistor was fabricated in the same manner as in Example 2 except that the surface modification process and the light irradiation process were not performed. Further, the transistor performance evaluation of 20 elements was performed in the same manner as in Example 2. The results are shown in Table 1. Further, a graph of current-voltage characteristics is shown in FIG.

  Further, in Example 2, a Hall measuring element was produced in the same manner as in Example 2 except that the surface modification step and the light irradiation step were not performed. In addition, the electron carrier concentration was evaluated in the same manner as in Example 2. The results are shown in Table 1.

(Comparative Example 8)
In Example 2, a field effect transistor was produced in the same manner as in Example 2 except that the order of the surface modification step and the light irradiation step was changed. Further, the transistor performance evaluation of 20 elements was performed in the same manner as in Example 2. The results are shown in Table 1.

  Moreover, in Example 2, the Hall measuring element was produced like Example 2 except having replaced the order of the surface modification process and the light irradiation process. In addition, the electron carrier concentration was evaluated in the same manner as in Example 2. The results are shown in Table 1.

(Example 3)
In Example 1, a field effect transistor and a Hall measurement element were produced in the same manner as in Example 1 except that “formation of active layer” was changed to the following method. Moreover, the same evaluation as Example 1 was performed. The results are shown in Table 1. Further, a graph of current-voltage characteristics is shown in FIG.

-Formation of active layer-
In a beaker, 3.55 g of indium nitrate (In (NO ₃ ) ₃ .3H ₂ O) and 0.139 g of strontium chloride (SrCl ₂ .6H ₂ O) were weighed, 20 mL of 1,2-propanediol and ethylene. Glycol monomethyl ether (20 mL) was added and mixed and dissolved at room temperature to prepare a coating solution for forming an n-type oxide semiconductor film used in Example 3.

  The n-type oxide semiconductor film-forming coating solution was applied in a predetermined pattern onto the formed gate insulating layer and the source and drain electrodes using an inkjet apparatus. The substrate was dried on a hot plate heated to 120 ° C. for 10 minutes and then baked at 400 ° C. for 1 hour in an air atmosphere to form an In—Sr-based oxide film as an active layer.

(Comparative Example 9)
In Example 3, a field effect transistor was fabricated in the same manner as in Example 3 except that the light irradiation step was not performed. Further, the transistor performance evaluation of 20 elements was performed in the same manner as in Example 3. The results are shown in Table 1. Further, a graph of current-voltage characteristics is shown in FIG.

  Further, in Example 3, a hole measuring element was produced in the same manner as in Example 3 except that the light irradiation step was not performed. Further, the electron carrier concentration was evaluated in the same manner as in Example 3. The results are shown in Table 1.

(Comparative Example 10)
In Example 3, a field effect transistor was fabricated in the same manner as in Example 3 except that the surface modification step was not performed. Further, the transistor performance evaluation of 20 elements was performed in the same manner as in Example 3. The results are shown in Table 1. Further, a graph of current-voltage characteristics is shown in FIG.

  Further, in Example 3, a hole measuring element was produced in the same manner as Example 3 except that the surface modification step was not performed. Further, the electron carrier concentration was evaluated in the same manner as in Example 3. The results are shown in Table 1.

(Comparative Example 11)
In Example 3, a field effect transistor was fabricated in the same manner as in Example 3 except that the surface modification step and the light irradiation step were not performed. Further, the transistor performance evaluation of 20 elements was performed in the same manner as in Example 3. The results are shown in Table 1. Further, a graph of current-voltage characteristics is shown in FIG.

  In Example 3, a Hall measuring element was produced in the same manner as in Example 3 except that the surface modification step and the light irradiation step were not performed. Further, the electron carrier concentration was evaluated in the same manner as in Example 3. The results are shown in Table 1.

(Comparative Example 12)
A field effect transistor was produced in the same manner as in Example 3, except that the order of the surface modification step and the light irradiation step was changed in Example 3. Further, the transistor performance evaluation of 20 elements was performed in the same manner as in Example 3. The results are shown in Table 1.

  Further, in Example 3, a Hall measuring element was produced in the same manner as in Example 3 except that the order of the surface modification step and the light irradiation step was changed. Further, the electron carrier concentration was evaluated in the same manner as in Example 3. The results are shown in Table 1.

From the results of Examples and Comparative Examples in Table 1, it can be confirmed that a higher on-current can be obtained when the light irradiation process is performed on the source electrode and the drain electrode than when the light irradiation process is not performed. It is known that when the resistance of the source and drain electrodes and the resistance of the interface between the source and drain electrodes and the active layer are close to the channel resistance when the transistor is on, the drain voltage is consumed outside the channel and the on-current does not increase. It has been.
In Comparative Examples 1, 5, and 9, it is considered that the resistance of the source electrode and the drain electrode is high because the resistivity of the conductive thin film that becomes the source electrode and the drain electrode is high. Therefore, it is considered that the on-current is low and the calculated field effect mobility is also low.

  In Comparative Examples 2, 6, and 10, there is no surface modification step before forming the active layer. When there is no surface modification step, the source electrode and the drain electrode are not oxidized, so that the carrier concentration of the electrode is not greatly reduced and the resistivity is relatively low. On the other hand, since the surface modification process is not performed when forming the active layer, it is presumed that the active layer cannot be formed uniformly and the on-current varies greatly.

  In Comparative Examples 3, 7, and 11, since the surface modification process is not performed when the active layer is formed, the active layer cannot be formed uniformly, and since there is no light irradiation process, the source electrode and the drain electrode of each transistor are formed. It is presumed that the carrier concentration of the conductive thin film to be formed also varies. As a result, it is estimated that a large variation in the on-state current of the transistor occurred.

  In Examples 1 to 3, when the order of the surface modification step and the light irradiation step was changed (Comparative Examples 4, 8, and 12), the resistivity of the conductive thin film increased by the surface modification step was Since it cannot be reduced by the light irradiation step, the carrier concentration of the conductive thin film forming the source electrode and the drain electrode of each transistor is lowered, and the on-current of the transistor is lowered.

  In the field-effect transistor of the present invention in which the source electrode and the drain electrode are subjected to the light irradiation process, even when the source electrode and the drain electrode are formed using a coating method, the resistance of the electrode is not increased before the active layer forming process. Therefore, high transistor performance can be obtained. In addition, it is possible to initialize the carrier concentration change of the conductive thin film that occurs during the formation of the source electrode and the drain electrode and after the formation of the electrode and before the active layer formation step, thereby reducing variations in transistor performance. Can do.

Example 4
<Fabrication of field effect transistor>
-Formation of gate electrode-
A molybdenum film was formed on a glass substrate by DC sputtering so as to have a thickness of about 100 nm. Thereafter, a photoresist was applied, and a resist pattern similar to the pattern of the gate electrode to be formed was formed by pre-baking, exposure by an exposure apparatus, and development. Further, etching was performed with an etching solution composed of phosphoric acid-nitric acid-acetic acid, and the molybdenum film in the region where the resist pattern was not formed was removed. Thereafter, the gate electrode was formed by removing the resist pattern.

-Formation of gate insulation layer-
An SiO ₂ film was formed on the formed gate electrode and the glass substrate by RF sputtering so as to have a thickness of about 200 nm. Thereafter, a photoresist was applied, and a resist pattern similar to the pattern of the gate insulating layer to be formed was formed by pre-baking, exposure by an exposure apparatus, and development. Furthermore, the SiO ₂ film in the region where the resist pattern was not formed was removed by etching using buffered hydrofluoric acid, and then the resist pattern was also removed to form a gate insulating layer.

-Formation of source and drain electrodes-
On the formed gate insulating layer, a commercially available ITO nanometal ink (manufactured by ULVAC, Inc., average particle diameter 5 nm, metal content 20.1 mass%) was applied in a predetermined pattern using an inkjet apparatus. By heating at 300 ° C. under reduced pressure for 1 hour and heating at 400 ° C. for 1 hour in the air, an ITO thin film was formed, and a source electrode and a drain electrode were formed.

-Surface modification process-
As a pretreatment for forming the active layer, the glass substrate on which the source electrode and the drain electrode were formed was subjected to UV ozone treatment using a cleaning apparatus (UV-300 manufactured by Samco Corporation). The set temperature during irradiation was 90 ° C., and the irradiation time was 10 minutes.

-Light irradiation process-
After the UV ozone treatment, the substrate on which the source electrode and the drain electrode were formed was subjected to a light irradiation process using the cleaning device. Specifically, the ozone generator was turned off and the cleaning chamber was purged with nitrogen to realize a low oxygen concentration atmosphere and UV irradiation was performed. The set temperature during irradiation was 90 ° C., and the irradiation time was 10 minutes.

-Formation of active layer-
In a beaker, 3.55 g of indium nitrate (In (NO ₃ ) ₃ .3H ₂ O) and 0.125 g of calcium nitrate (Ca (NO ₃ ) ₂ .4H ₂ O) were weighed, and 1,2-propanediol 20 mL and 20 mL of ethylene glycol monomethyl ether were added and mixed and dissolved at room temperature to prepare a coating solution for forming an n-type oxide semiconductor film used in Example 4.

  The n-type oxide semiconductor film-forming coating solution was applied in a predetermined pattern onto the formed gate insulating layer and the source and drain electrodes using an inkjet apparatus. The substrate was dried on a hot plate heated to 120 ° C. for 10 minutes and then baked at 400 ° C. for 1 hour in an air atmosphere to form an In—Ca-based oxide film as an active layer.

  Thus, a bottom gate / bottom contact field effect transistor was fabricated.

<Transistor performance evaluation>
About the obtained field effect transistor, transistor performance evaluation of 20 elements was implemented using the semiconductor parameter analyzer apparatus (Agilent Technology company make, semiconductor parameter analyzer B1500A). The current-voltage characteristics were evaluated by changing the source / drain voltage Vds to 10 V and changing the gate voltage from Vg = −20 V to +20 V. Field effect mobility was calculated in the saturation region. Further, the current Ids (calculated average value) and the variation (σ) of the current Ids in the on state (for example, Vg = 20 V) of the transistor were calculated. The results are shown in Table 2.

<Production of Hall measuring element>
-Formation of conductive thin film formation-
In the same manner as the formation of the source electrode and the drain electrode in the production of the field effect transistor, ITO nanometal ink was applied in a predetermined pattern on the glass substrate. An ITO thin film was formed by heating at 300 ° C. under reduced pressure for 1 hour and heating at 400 ° C. for 1 hour in the air.

  Thereafter, in the same manner as the surface modification step in the production of the field effect transistor, the glass substrate on which the ITO thin film is formed is subjected to UV ozone treatment using a cleaning device (UV-300 manufactured by Samco Corporation). Went.

  After the UV ozone treatment, UV irradiation was performed in the same manner as the light irradiation step in the production of the field effect transistor.

  Thus, a Hall measuring element was produced.

<Evaluation of electron carrier concentration (density)>
About the obtained Hall measuring element, a specific resistance measurement and a Hall effect measurement are performed using a Hall effect measurement system (ResiTest 8300, manufactured by Toyo Technica Co., Ltd.), and the electron carrier concentration (cm ⁻³ ) of the conductive thin film is obtained. It was. The obtained electron carrier concentration (density) is shown in Table 2.

(Example 5)
In Example 4, a field effect transistor and a Hall measuring element were produced in the same manner as in Example 4 except that “formation of active layer” was changed to the following method. Further, the same evaluation as in Example 4 was performed. The results are shown in Table 2.

-Formation of active layer-
In a beaker, 3.55 g of indium nitrate (In (NO ₃ ) ₃ .3H ₂ O) and 0.125 g of barium chloride (BaCl ₂ .2H ₂ O) were weighed, 20 mL of 1,2-ethanediol and ethylene glycol. 20 mL of monomethyl ether was added and mixed and dissolved at room temperature to prepare a coating solution for forming an n-type oxide semiconductor film used in Example 5.

  The n-type oxide semiconductor film-forming coating solution was applied in a predetermined pattern onto the formed gate insulating layer and the source and drain electrodes using an inkjet apparatus. The substrate was dried on a hot plate heated to 120 ° C. for 10 minutes, and then baked at 400 ° C. for 1 hour in an air atmosphere to form an In—Ba-based oxide film as an active layer.

  In the field-effect transistor of the present invention in which the source electrode and the drain electrode are subjected to the light irradiation process, even when the source electrode and the drain electrode are formed using a coating method, the resistance of the electrode is not increased before the active layer forming process. Therefore, high transistor performance can be obtained. In addition, it is possible to initialize the carrier concentration change of the conductive thin film that occurs during the formation of the source electrode and the drain electrode and after the formation of the electrode and before the active layer formation step, thereby reducing variations in transistor performance. Can do. In addition, since the film formation surface during the formation of the active layer is kept clean, a uniform active layer can be formed, and variations in transistor performance can be reduced.

(Example 6)
<Fabrication of field effect transistor>
-Formation of gate electrode-
A molybdenum film was formed on a glass substrate by DC sputtering so as to have a thickness of about 100 nm. Thereafter, a photoresist was applied, and a resist pattern similar to the pattern of the gate electrode to be formed was formed by pre-baking, exposure by an exposure apparatus, and development. Further, etching was performed with an etching solution composed of phosphoric acid-nitric acid-acetic acid, and the molybdenum film in the region where the resist pattern was not formed was removed. Thereafter, the gate electrode was formed by removing the resist pattern.

-Formation of gate insulation layer-
An SiO ₂ film was formed on the formed gate electrode and the glass substrate by RF sputtering so as to have a thickness of about 200 nm. Thereafter, a photoresist was applied, and a resist pattern similar to the pattern of the gate insulating layer to be formed was formed by pre-baking, exposure by an exposure apparatus, and development. Furthermore, the SiO ₂ film in the region where the resist pattern was not formed was removed by etching using buffered hydrofluoric acid, and then the resist pattern was also removed to form a gate insulating layer.

-Formation of source and drain electrodes-
On the formed gate insulating layer, a commercially available ITO nanometal ink (manufactured by ULVAC, Inc., average particle diameter 5 nm, metal content 20.1 mass%) was applied in a predetermined pattern using an inkjet apparatus. By heating at 300 ° C. under reduced pressure for 1 hour and heating at 400 ° C. for 1 hour in the air, an ITO thin film was formed, and a source electrode and a drain electrode were formed.

-Surface modification process-
As a pretreatment for forming the active layer, the glass substrate on which the source electrode and the drain electrode were formed was subjected to UV ozone treatment using a cleaning apparatus (UV-300 manufactured by Samco Corporation). The set temperature during irradiation was 90 ° C., and the irradiation time was 10 minutes.

-Light irradiation process-
After the UV ozone treatment, the substrate on which the source electrode and the drain electrode were formed was subjected to a light irradiation process using the cleaning device. Specifically, the ozone generator was turned off and the cleaning chamber was purged with nitrogen to realize a low oxygen concentration atmosphere and UV irradiation was performed. The set temperature during irradiation was 90 ° C., and the irradiation time was 10 minutes.

-Formation of active layer-
An In—Ga—Zn-based oxide thin film was formed over the formed gate insulating layer and the source and drain electrodes by DC sputtering.
As a target, a fired body of In—Ga—Zn—O having a composition ratio of In: Ga: Zn = 1: 1: 1 was used. Here, the sputtering power was 140 W, the pressure during film formation was 0.69 Pa, and the substrate temperature was not controlled. The flow rates of argon gas and oxygen gas flowing during sputtering were adjusted, and the oxygen flow rate ratio was set to 1.8% by volume. The film formation time was 20 minutes and the thickness was 70 nm.

  Thus, a bottom gate / bottom contact field effect transistor was fabricated.

<Transistor performance evaluation>
About the obtained field effect transistor, transistor performance evaluation of 20 elements was implemented using the semiconductor parameter analyzer apparatus (Agilent Technology company make, semiconductor parameter analyzer B1500A). The current-voltage characteristics were evaluated by changing the source / drain voltage Vds to 10 V and changing the gate voltage from Vg = −20 V to +20 V. Field effect mobility was calculated in the saturation region. Further, the current Ids (calculated average value) and the variation (σ) of the current Ids in the on state (for example, Vg = 20 V) of the transistor were calculated. The results are shown in Table 3.

<Production of Hall measuring element>
-Formation of conductive thin film formation-
In the same manner as the formation of the source electrode and the drain electrode in the production of the field effect transistor, ITO nanometal ink was applied in a predetermined pattern on the glass substrate. An ITO thin film was formed by heating at 300 ° C. under reduced pressure for 1 hour and heating at 400 ° C. for 1 hour in the air.

  Thereafter, in the same manner as the surface modification step in the production of the field effect transistor, the glass substrate on which the ITO thin film is formed is subjected to UV ozone treatment using a cleaning device (UV-300 manufactured by Samco Corporation). Went.

  After the UV ozone treatment, UV irradiation was performed in the same manner as the light irradiation step in the production of the field effect transistor.

  Thus, a Hall measuring element was produced.

<Evaluation of electron carrier concentration (density)>
About the obtained Hall measuring element, a specific resistance measurement and a Hall effect measurement are performed using a Hall effect measurement system (ResiTest 8300, manufactured by Toyo Technica Co., Ltd.), and the electron carrier concentration (cm ⁻³ ) of the conductive thin film is obtained. It was. The obtained electron carrier concentration (density) is shown in Table 3.

(Example 7)
In Example 6, a field effect transistor and a Hall measuring element were produced in the same manner as in Example 6 except that “formation of active layer” was changed to the following method. The same evaluation as in Example 6 was performed. The results are shown in Table 3.

-Formation of active layer-
A Zn—Sn-based oxide thin film was formed on the formed insulating layer and the source and drain electrodes by high-frequency sputtering.
As a target, a polycrystalline sintered body (size: 4 inches in diameter) having a composition of Zn ₂ SnO ₄ was used. The flow rates of argon gas and oxygen gas flowing during sputtering were adjusted, and the oxygen flow rate ratio was 60% by volume. The total pressure was 0.3 Pa.
During sputtering, the temperature of the substrate was controlled within the range of 15 ° C. to 35 ° C. by cooling the holder holding the substrate by water cooling. The sputtering power was 150 W, the sputtering time was 20 minutes, and the thickness was 50 nm.

(Example 8)
In Example 6, a field effect transistor and a Hall measuring element were produced in the same manner as in Example 6 except that “formation of active layer” was changed to the following method. The same evaluation as in Example 6 was performed. The results are shown in Table 3.

-Formation of active layer-
A Zn—Ti-based oxide thin film was formed on the formed insulating layer, source electrode, and drain electrode by high-frequency sputtering.
As a target, a polycrystalline sintered body (size: 4 inches in diameter) having a composition of Zn ₂ TiO ₄ was used. The flow rates of argon gas and oxygen gas flowing during sputtering were adjusted, and the oxygen flow rate ratio was 60% by volume. The total pressure was 0.3 Pa.
During sputtering, the temperature of the substrate was controlled within the range of 15 ° C. to 35 ° C. by cooling the holder holding the substrate by water cooling. The sputtering power was 140 W, the sputtering time was 25 minutes, and the thickness was 50 nm.

  In the field-effect transistor of the present invention in which the source electrode and the drain electrode are subjected to the light irradiation process, even when the source electrode and the drain electrode are formed using a coating method, the resistance of the electrode is not increased before the active layer forming process. Therefore, high transistor performance can be obtained. In addition, it is possible to initialize the carrier concentration change of the conductive thin film that occurs during the formation of the source electrode and the drain electrode and after the formation of the electrode and before the active layer formation step, thereby reducing variations in transistor performance. Can do. In addition, since the film formation surface during the formation of the active layer is kept clean, a uniform active layer can be formed, and variations in transistor performance can be reduced.

Example 9
<Fabrication of field effect transistor>
-Formation of gate electrode-
A molybdenum film was formed on a glass substrate by DC sputtering so as to have a thickness of about 100 nm. Thereafter, a photoresist was applied, and a resist pattern similar to the pattern of the gate electrode to be formed was formed by pre-baking, exposure by an exposure apparatus, and development. Further, etching was performed with an etching solution composed of phosphoric acid-nitric acid-acetic acid, and the molybdenum film in the region where the resist pattern was not formed was removed. Thereafter, the gate electrode was formed by removing the resist pattern.

-Formation of gate insulation layer-
An SiO ₂ film was formed on the formed gate electrode and the glass substrate by RF sputtering so as to have a thickness of about 200 nm. Thereafter, a photoresist was applied, and a resist pattern similar to the pattern of the gate insulating layer to be formed was formed by pre-baking, exposure by an exposure apparatus, and development. Furthermore, the SiO ₂ film in the region where the resist pattern was not formed was removed by etching using buffered hydrofluoric acid, and then the resist pattern was also removed to form a gate insulating layer.

-Formation of source and drain electrodes-
On the formed gate insulating layer, a commercially available ITO nanometal ink (manufactured by ULVAC, Inc., average particle diameter 5 nm, metal content 20.1 mass%) was applied in a predetermined pattern using an inkjet apparatus. By heating at 300 ° C. under reduced pressure for 1 hour and heating at 400 ° C. for 1 hour in the air, an ITO thin film was formed, and a source electrode and a drain electrode were formed.

-Surface modification process-
As a pretreatment for forming the active layer, the glass substrate on which the source electrode and the drain electrode were formed was subjected to UV ozone treatment using a cleaning apparatus (UV-300 manufactured by Samco Corporation). The set temperature during irradiation was 90 ° C., and the irradiation time was 10 minutes.

-Light irradiation process-
After the UV ozone treatment, a light irradiation process was performed on the substrate on which the source electrode and the drain electrode were formed using a UV light irradiation apparatus (manufactured by M.D. Excimer). Specifically, a low oxygen concentration atmosphere was realized by purging the sample chamber with nitrogen, and UV irradiation was performed using an excimer lamp having a center wavelength of 222 nm. The irradiation time was 10 minutes.

-Formation of active layer-
In a beaker, 3.55 g of indium nitrate (In (NO ₃ ) ₃ .3H ₂ O) and 0.139 g of strontium chloride (SrCl ₂ .6H ₂ O) were weighed, and 20 mL of 1,2-propanediol was added. 20 mL of ethylene glycol monomethyl ether was added and mixed and dissolved at room temperature to prepare a coating solution for forming an n-type oxide semiconductor film used in Example 9.

  The n-type oxide semiconductor film-forming coating solution was applied in a predetermined pattern onto the formed gate insulating layer and the source and drain electrodes using an inkjet apparatus. The substrate was dried on a hot plate heated to 120 ° C. for 10 minutes and then baked at 400 ° C. for 1 hour in an air atmosphere to form an In—Ca-based oxide film as an active layer.

  Thus, a bottom gate / bottom contact field effect transistor was fabricated.

<Transistor performance evaluation>
About the obtained field effect transistor, transistor performance evaluation of 20 elements was implemented using the semiconductor parameter analyzer apparatus (Agilent Technology company make, semiconductor parameter analyzer B1500A). The current-voltage characteristics were evaluated by changing the source / drain voltage Vds to 10 V and changing the gate voltage from Vg = −20 V to +20 V. Field effect mobility was calculated in the saturation region. Further, the current Ids (calculated average value) and the variation (σ) of the current Ids in the on state (for example, Vg = 20 V) of the transistor were calculated. The results are shown in Table 4.

<Production of Hall measuring element>
-Formation of conductive thin film formation-
In the same manner as the formation of the source electrode and the drain electrode in the production of the field effect transistor, ITO nanometal ink was applied in a predetermined pattern on the glass substrate. An ITO thin film was formed by heating at 300 ° C. under reduced pressure for 1 hour and heating at 400 ° C. for 1 hour in the air.

  Thereafter, in the same manner as the surface modification step in the production of the field effect transistor, the glass substrate on which the ITO thin film is formed is subjected to UV ozone treatment using a cleaning device (UV-300 manufactured by Samco Corporation). Went.

  After the UV ozone treatment, UV irradiation was performed in the same manner as the light irradiation step in the production of the field effect transistor.

  Thus, a Hall measuring element was produced.

<Evaluation of electron carrier concentration (density)>
About the obtained Hall measuring element, a specific resistance measurement and a Hall effect measurement are performed using a Hall effect measurement system (ResiTest 8300, manufactured by Toyo Technica Co., Ltd.), and the electron carrier concentration (cm ⁻³ ) of the conductive thin film is obtained. It was. The obtained electron carrier concentration (density) is shown in Table 4.

  In the field-effect transistor of the present invention in which the source electrode and the drain electrode are subjected to the light irradiation process, even when the source electrode and the drain electrode are formed using a coating method, the resistance of the electrode is not increased before the active layer forming process. Therefore, high transistor performance can be obtained. In addition, it is possible to initialize the carrier concentration change of the conductive thin film that occurs during the formation of the source electrode and the drain electrode and after the formation of the electrode and before the active layer formation step, thereby reducing variations in transistor performance. Can do. In addition, since the film formation surface during the formation of the active layer is kept clean, a uniform active layer can be formed, and variations in transistor performance can be reduced.

(Example 10)
<Fabrication of field effect transistor>
-Formation of source and drain electrodes-
A commercially available ITO nanometal ink (manufactured by ULVAC, Inc., average particle diameter of 5 nm, metal content of 20.1% by mass) was applied onto the glass substrate in a predetermined pattern using an inkjet apparatus. By heating at 300 ° C. under reduced pressure for 1 hour and heating at 400 ° C. for 1 hour in the air, an ITO thin film was formed, and a source electrode and a drain electrode were formed.

-Surface modification process-
As a pretreatment for forming the active layer, the substrate on which the source electrode and the drain electrode were formed was subjected to UV ozone treatment using a cleaning apparatus (UV-300 manufactured by Samco Corporation). The set temperature during irradiation was 90 ° C., and the irradiation time was 10 minutes.

-Light irradiation process-
After the UV ozone treatment, the substrate on which the source electrode and the drain electrode were formed was subjected to a light irradiation process using the cleaning device. Specifically, the ozone generator was turned off and the cleaning chamber was purged with nitrogen to realize a low oxygen concentration atmosphere and UV irradiation was performed. The set temperature during irradiation was 90 ° C., and the irradiation time was 10 minutes.

-Formation of active layer-
On the formed gate insulating layer, an Mg—In-based oxide semiconductor film (active layer) was formed by a sputtering method by the method described in Examples of Japanese Patent Application Laid-Open No. 2010-74148. A polycrystalline fired body having a composition of In ₂ MgO ₄ was used as a target. The ultimate vacuum in the sputtering chamber was 2 × 10 ⁻⁵ Pa. The thickness of the obtained n-type oxide semiconductor film (active layer) was 50 nm.
At this time, the channel width was 400 μm, and the channel length defined between the source and drain electrodes was 50 μm.

-Formation of gate insulation layer-
On the formed source electrode, drain-in electrode, active layer, and glass substrate, a SiO ₂ film was formed to a thickness of about 200 nm by plasma CVD to form a gate insulating layer.

-Formation of gate electrode-
On the gate insulating layer, an Al film was formed to a thickness of about 100 nm by vacuum deposition to form a gate electrode.

  Thus, a top gate / bottom contact field effect transistor was fabricated.

<Transistor performance evaluation>
About the obtained field effect transistor, transistor performance evaluation of 20 elements was implemented using the semiconductor parameter analyzer apparatus (Agilent Technology company make, semiconductor parameter analyzer B1500A). The current-voltage characteristics were evaluated by changing the source / drain voltage Vds to 10 V and changing the gate voltage from Vg = −20 V to +20 V. Field effect mobility was calculated in the saturation region. Further, the current Ids (calculated average value) and the variation (σ) of the current Ids in the on state (for example, Vg = 20 V) of the transistor were calculated. The results are shown in Table 5.

<Production of Hall measuring element>
-Formation of conductive thin film formation-
In the same manner as the formation of the source electrode and the drain electrode in the production of the field effect transistor, ITO nanometal ink was applied in a predetermined pattern on the glass substrate. An ITO thin film was formed by heating at 300 ° C. under reduced pressure for 1 hour and heating at 400 ° C. for 1 hour in the air.

  Thereafter, in the same manner as the surface modification step in the production of the field effect transistor, the glass substrate on which the ITO thin film is formed is subjected to UV ozone treatment using a cleaning device (UV-300 manufactured by Samco Corporation). Went.

  After the UV ozone treatment, UV irradiation was performed in the same manner as the light irradiation step in the production of the field effect transistor.

  Thus, a Hall measuring element was produced.

<Evaluation of electron carrier concentration (density)>
About the obtained Hall measuring element, a specific resistance measurement and a Hall effect measurement are performed using a Hall effect measurement system (ResiTest 8300, manufactured by Toyo Technica Co., Ltd.), and the electron carrier concentration (cm ⁻³ ) of the conductive thin film is obtained. It was. The obtained electron carrier concentration (density) is shown in the table.

(Comparative Example 13)
In Example 10, a field effect transistor was fabricated in the same manner as in Example 10 except that the light irradiation step was not performed. Further, the transistor performance evaluation of 20 elements was performed in the same manner as in Example 10. The results are shown in Table 5.

  In Example 10, a hole measuring element was produced in the same manner as in Example 10 except that the light irradiation step was not performed. Further, the electron carrier concentration was evaluated in the same manner as in Example 10. The results are shown in Table 5.

(Comparative Example 14)
In Example 10, a field effect transistor was fabricated in the same manner as in Example 10 except that the surface modification step was not performed. Further, the transistor performance evaluation of 20 elements was performed in the same manner as in Example 10. The results are shown in Table 5.

  In Example 10, a Hall measuring element was produced in the same manner as Example 10 except that the surface modification step was not performed. Further, the electron carrier concentration was evaluated in the same manner as in Example 10. The results are shown in Table 5.

(Comparative Example 15)
In Example 10, a field effect transistor was fabricated in the same manner as in Example 10 except that the surface modification process and the light irradiation process were not performed. Further, the transistor performance evaluation of 20 elements was performed in the same manner as in Example 10. The results are shown in Table 5.

  Further, in Example 10, a Hall measuring element was produced in the same manner as in Example 10 except that the surface modification process and the light irradiation process were not performed. Further, the electron carrier concentration was evaluated in the same manner as in Example 10. The results are shown in Table 5.

(Comparative Example 16)
In Example 10, a field effect transistor was produced in the same manner as in Example 10 except that the order of the surface modification step and the light irradiation step was changed. Further, the transistor performance evaluation of 20 elements was performed in the same manner as in Example 10. The results are shown in Table 5.

  Moreover, in Example 10, the Hall measuring element was produced like Example 10 except having replaced the order of the surface modification process and the light irradiation process. Further, the electron carrier concentration was evaluated in the same manner as in Example 10. The results are shown in Table 5.

In Example 10, it can be confirmed that a high on-current can be obtained. It is known that when the resistance of the source and drain electrodes and the resistance of the interface between the source and drain electrodes and the active layer are close to the channel resistance when the transistor is on, the drain voltage is consumed outside the channel and the on-current does not increase. It has been.
In Comparative Example 13, since the resistivity of the conductive thin film serving as the source electrode and the drain electrode is high, it is considered that the resistance of the source electrode and the drain electrode is high. Therefore, it is considered that the on-current is low and the calculated field effect mobility is also low.

  In Comparative Example 14, there is no surface modification step before forming the active layer. When there is no surface modification step, the source electrode and the drain electrode are not oxidized, so that the carrier concentration of the electrode is not greatly reduced and the resistivity is relatively low. On the other hand, since the surface modification process is not performed when forming the active layer, it is presumed that the active layer cannot be formed uniformly and the on-current varies greatly.

  In Comparative Example 15, since the surface modification process is not performed when the active layer is formed, the active layer cannot be formed homogeneously, and since there is no light irradiation process, the conductivity for forming the source electrode and the drain electrode of each transistor. It is estimated that the carrier concentration of the thin film also varies. As a result, it is estimated that a large variation in the on-state current of the transistor occurred.

  In Example 10, when the order of the surface modification process and the light irradiation process is changed (Comparative Example 16), the resistivity of the conductive thin film increased by the surface modification process is decreased by the light irradiation process. Therefore, the carrier concentration of the conductive thin film forming the source electrode and the drain electrode of each transistor was lowered, and the on-current of the transistor was lowered.

  In the field-effect transistor of the present invention in which the source electrode and the drain electrode are subjected to the light irradiation process, even when the source electrode and the drain electrode are formed using a coating method, the resistance of the electrode is not increased before the active layer forming process. Therefore, high transistor performance can be obtained. In addition, it is possible to initialize the carrier concentration change of the conductive thin film that occurs during the formation of the source electrode and the drain electrode and after the formation of the electrode and before the active layer formation step, thereby reducing variations in transistor performance. Can do.

Aspects of the present invention are as follows, for example.
<1> an active layer made of an n-type oxide semiconductor;
A source electrode and a drain electrode made of a conductive thin film made of an aggregate of metal oxide fine particles containing indium and tin; and
A method of manufacturing a field effect transistor comprising:
Forming the source and drain electrodes;
A surface modification step of modifying the surfaces of the source electrode and the drain electrode;
A light irradiation step of irradiating light in a low oxygen concentration atmosphere to the source electrode and the drain electrode in this order,
This is a method of manufacturing a field effect transistor.
<2> A step of forming the source electrode and the drain electrode is a coating solution for forming a conductive thin film containing at least one of indium and tin, a metal oxide containing indium and tin, and indium oxide and tin oxide. The step of applying and drying, followed by firing to form the source electrode and the drain electrode,
It is a manufacturing method of the field effect transistor as described in said <1>.
<3> The step of forming the source electrode and the drain electrode is a step of forming the source electrode and the drain electrode on the gate insulating layer,
The surface modification step is a step of modifying the surfaces of the gate insulating layer, the source electrode, and the drain electrode.
The method for producing a field effect transistor according to any one of <1> to <2>.
<4> The step of forming the source electrode and the drain electrode is a step of forming the source electrode and the drain electrode on a substrate.
The surface modification step is a step of modifying the surface of the base material, the source electrode, and the drain electrode.
The method for producing a field effect transistor according to any one of <1> to <2>.
<5> The method for producing a field effect transistor according to any one of <1> to <4>, wherein the light in the light irradiation step is ultraviolet light.
<6> The method for producing a field effect transistor according to any one of <1> to <5>, wherein the low oxygen concentration atmosphere is an atmosphere of an inert gas mainly containing nitrogen gas or argon gas. is there.
<7> a gate electrode for applying a gate voltage;
A source electrode and a drain electrode for extracting current;
An active layer provided adjacent to the source electrode and the drain electrode and made of an n-type oxide semiconductor;
A gate insulating layer provided between the gate electrode and the active layer;
A field effect transistor comprising:
The source electrode and the drain electrode are conductive thin films made of an aggregate of metal oxide fine particles containing indium and tin,
The carrier concentration of the source electrode and the drain electrode is 3.0 × 10 ²⁰ cm ⁻³ or more.
This is a field-effect transistor.

DESCRIPTION OF SYMBOLS 1 Base material 2 Gate electrode 3 Gate insulating layer 4 Source electrode 5 Drain electrode 6 Active layer

JP 2010-283190 A Japanese Patent No. 2558995 International Publication No. 2011/102350 Pamphlet JP-A-11-106935

Claims (7)

an active layer made of an n-type oxide semiconductor;
A source electrode and a drain electrode made of a conductive thin film made of an aggregate of metal oxide fine particles containing indium and tin; and
A method of manufacturing a field effect transistor comprising:
Forming the source and drain electrodes;
A surface modification step of modifying the surfaces of the source electrode and the drain electrode;
A light irradiation step of irradiating light in a low oxygen concentration atmosphere to the source electrode and the drain electrode in this order,
A method of manufacturing a field effect transistor. The step of forming the source electrode and the drain electrode applies a coating solution for forming a conductive thin film containing at least one of indium and tin, a metal oxide containing indium and tin, and indium oxide and tin oxide, It is a step of performing baking after drying to form the source electrode and the drain electrode.
A method of manufacturing the field effect transistor according to claim 1. The step of forming the source electrode and the drain electrode is a step of forming the source electrode and the drain electrode on the gate insulating layer,
The surface modification step is a step of modifying the surfaces of the gate insulating layer, the source electrode, and the drain electrode.
A method for manufacturing a field effect transistor according to claim 1. The step of forming the source electrode and the drain electrode is a step of forming the source electrode and the drain electrode on a substrate.
The surface modification step is a step of modifying the surface of the base material, the source electrode, and the drain electrode.
A method for manufacturing a field effect transistor according to claim 1.   The method of manufacturing a field effect transistor according to claim 1, wherein the light in the light irradiation step is ultraviolet light.   The method for manufacturing a field effect transistor according to claim 1, wherein the low oxygen concentration atmosphere is an atmosphere of an inert gas containing nitrogen gas or argon gas as a main component. A gate electrode for applying a gate voltage;
A source electrode and a drain electrode for extracting current;
An active layer provided adjacent to the source electrode and the drain electrode and made of an n-type oxide semiconductor;
A gate insulating layer provided between the gate electrode and the active layer;
A field effect transistor comprising:
The source electrode and the drain electrode are conductive thin films made of an aggregate of metal oxide fine particles containing indium and tin,
The carrier concentration of the source electrode and the drain electrode is 3.0 × 10 ²⁰ cm ⁻³ or more.
A field effect transistor.