JP2016111086A - Semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor device having a planar shape which can minimize a portion of a semiconductor wafer to be discarded when a plurality of semiconductor chips having the same planar shape are formed from a semiconductor wafer and lessen the impact of thermal stress, which occurs in the semiconductor chip.SOLUTION: A plurality of semiconductor chips 11 are divided from a semiconductor wafer 20 to have the same planar shape and the planar shape of each semiconductor chip 11 has six connection parts 17 for connecting straight lines 15, 16 adjacent to each other so as to have an obtuse angled interior angle formed by the one straight line 15 and the other straight line 16 adjacent to the one straight line 15. All of the six connection parts 17 have R shapes. Because of this, when the semiconductor wafer 20 is divided into chips, a portion of the semiconductor wafer 20 to be discarded can be minimized. The R shape of the connection part 17 can lessen the impact of thermal stress, which is exerted on the semiconductor chip 11.SELECTED DRAWING: Figure 1

Description

  The present invention relates to a semiconductor device in which chips are divided from a semiconductor wafer so as to have a plurality of identical planar shapes.

  Conventionally, for example, Patent Document 1 proposes a structure that can reduce the influence of thermal stress generated in a semiconductor chip by forming the planar shape of the semiconductor chip close to a circle. A semiconductor chip is obtained by dividing a chip from a semiconductor wafer so as to have the same planar shape.

Japanese Patent No. 4161410

  However, in the above conventional technique, when a semiconductor wafer is processed, a gap between a circle and a circle is larger when a semiconductor chip having a circular planar shape is laid out than when a semiconductor chip having a polygonal planar shape is laid out. For this reason, there is a problem that when a semiconductor wafer is processed to form a plurality of semiconductor chips having a circular planar shape, a lot of parts are discarded from the semiconductor wafer.

  On the other hand, a semiconductor chip having a polygonal planar shape has a problem that although a portion discarded when a semiconductor wafer is processed is reduced, a thermal stress generated in the semiconductor chip becomes larger than a circular one.

  In view of the above points, the present invention can reduce the portion discarded from a semiconductor wafer when a plurality of semiconductor chips having the same planar shape are formed from the semiconductor wafer, and reduce the influence of thermal stress generated on the semiconductor chip. An object of the present invention is to provide a semiconductor device having a planar shape.

  In order to achieve the above object, according to the first aspect of the present invention, a plurality of semiconductor chips (11) divided from the semiconductor wafer (20) so as to have the same planar shape are provided.

  The semiconductor chip (11) has a planar shape such that an internal angle formed by one straight line (15) and the other straight line (16) adjacent to the one straight line (15) is an obtuse angle. It has a multiple of 6 connecting parts (17) connecting (15, 16), and at least one of the multiple connecting parts (17) of 6 has an R shape.

  According to this, since the semiconductor chip (11) is laid out on the semiconductor wafer (20) as a polygon whose plane shape is approximately a multiple of 6, the gap between the semiconductor chips (11) is smaller than when the plane shape is circular. Is laid out on the semiconductor wafer (20). Accordingly, it is possible to reduce the portion discarded from the semiconductor wafer (20) when the semiconductor wafer (20) is divided into chips.

  Moreover, since at least one connection part (17) is R-shaped, the stress concentrated on the R-shaped connection part (17) is relieved. Therefore, the influence of thermal stress on the semiconductor chip (11) by the R-shaped connecting portion (17) can be reduced.

  In addition, the code | symbol in the bracket | parenthesis of each means described in this column and the claim shows the correspondence with the specific means as described in embodiment mentioned later.

1 is a plan view of a semiconductor chip according to a first embodiment of the present invention. It is the top view by which each semiconductor chip was laid out on the semiconductor wafer. It is a top view of the semiconductor chip for demonstrating R width | variety. It is the figure which showed the relationship between R width and the output fluctuation difference of a sensing part, and the relationship between R width and the area thrown away from a semiconductor wafer by dicing. It is a top view of the semiconductor chip concerning a 2nd embodiment of the present invention.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings. In the following embodiments, the same or equivalent parts are denoted by the same reference numerals in the drawings.

(First embodiment)
Hereinafter, a first embodiment of the present invention will be described with reference to the drawings. In this embodiment, a pressure sensor configured to detect pressure will be described as an example of a semiconductor device.

  As shown in FIG. 1, the pressure sensor 10 includes a semiconductor chip 11. The semiconductor chip 11 is a chip divided from a semiconductor wafer by dicing a semiconductor wafer such as a Si wafer.

  The semiconductor chip 11 is a sensor chip having a sensing unit 12 for detecting pressure as a physical quantity. The sensing unit 12 includes a plurality of gauge resistors 13 whose resistance values change according to the application of pressure. Each gauge resistor 13 is electrically connected to form a bridge circuit. Each gauge resistor 13 is a diffused resistor formed on the semiconductor chip 11, for example.

  Although not shown, the semiconductor chip 11 is fixed via a bonding glass on the diaphragm of a metal stem on which a diaphragm that bends when pressure is applied. When pressure is applied to the semiconductor chip 11 via the diaphragm, the resistance value of each gauge resistor 13 changes due to the piezoresistive effect. Therefore, the bridge circuit outputs a voltage value corresponding to the pressure as a sensor signal based on a change in the resistance value of each gauge resistor 13. The semiconductor chip 11 may be formed with an amplifier circuit that performs an amplification process on the sensor signal.

  Further, the planar shape of the one surface 14 of the semiconductor chip 11 is substantially hexagonal. Specifically, the connecting portion 17 connects the straight lines 15 and 16 so that an internal angle formed by one straight line 15 and the other straight line 16 adjacent to the one straight line 15 becomes an obtuse angle. And six sets of each straight line 15 and 16 and the connection part 17 are provided. In addition, when counting the set of each straight line 15 and 16 and the connection part 17, one straight line 15 is made into the other straight line 16, and the other straight line 16 is made into one straight line 15. Thereby, the planar shape of the semiconductor chip 11 is a hexagonal shape having six connection portions 17.

  Furthermore, in this embodiment, all the six connection parts 17 are R-shaped. The R shape is a rounded shape with chamfered corners formed by an extension line of one straight line 15 and an extension line of the other straight line 16 intersecting each other. In other words, the connection portion between one side surface and the other side surface of the semiconductor chip 11 has an R shape. Accordingly, the planar shape of the semiconductor chip 11 is a hexagonal base, but the planar shape is generally close to a circle.

  The semiconductor chip 11 having the above planar shape can be manufactured by processing one semiconductor wafer. Specifically, the semiconductor chip 11 is manufactured as follows. First, a semiconductor wafer such as a Si wafer or a SiC wafer is prepared. Then, a structure such as a sensing unit 12 and circuit wiring is formed by a semiconductor process in a portion corresponding to each semiconductor chip 11 in the semiconductor wafer.

  Subsequently, as shown in FIG. 2, the semiconductor chips 11 are laid out on the semiconductor wafer 20 in a honeycomb shape so as to have a plurality of identical planar shapes and no gaps between the semiconductor chips 11. As described above, since the planar shape of the semiconductor chip 11 is based on the hexagonal shape, it can be laid out on the semiconductor wafer 20 without a gap. That is, a mask is arranged in a portion corresponding to each semiconductor chip 11 in the semiconductor wafer 20.

Thereafter, the semiconductor wafer 20 is divided into a plurality of semiconductor chips 11 by plasma dicing. Plasma dicing is a processing method in which a part of the semiconductor wafer 20 is chemically removed by the plasma gas acting on the part of the semiconductor wafer 20 exposed from the mask. Plasma dicing is also called plasma etching. When the semiconductor wafer 20 is a Si wafer, a gas such as SF ₆ (sulfur hexafluoride) is used. By adopting a processing method using plasma dicing, it is possible to easily form a chip having an irregular shape that cannot be obtained by dicing with a cutting blade, that is, a planar semiconductor chip 11 based on the hexagonal shape according to the present embodiment. .

  As described above, a plurality of semiconductor chips 11 having the same planar shape are simultaneously formed from the semiconductor wafer 20.

  Next, the effect of making the connecting portion 17 of the semiconductor chip 11 R-shaped will be described. First, the R width is defined. As shown in FIG. 3, the vertex of the first corner 18a formed by the extension of one straight line 15 and the extension of the other straight line 16 intersect, and the diagonal of the first corner 18a. The second corner portion 18b positioned at is connected by a virtual straight line. And the length from the 1st corner | angular part 18a to the connection part 17 among the said virtual straight lines is defined as R width | variety. In FIG. 3, the sensing unit 12 is omitted.

  The inventors investigated the relationship between the R width and the output fluctuation difference of the sensing unit 12. The output fluctuation difference is a change in the output of the sensing unit 12, that is, the voltage value when the R width is changed while applying a constant pressure to the sensing unit 12. Further, the relationship between the R width and the area discarded from the semiconductor wafer 20 by dicing was examined. These relationships were investigated by simulation. The result is shown in FIG.

  As shown in FIG. 4, when the R width is 0, the planar shape of the semiconductor chip 11 is a hexagon. In this case, the output fluctuation difference of the sensing unit 12 is the largest. As the R width increases, the output fluctuation difference decreases. When the R width is 1, the planar shape of the semiconductor chip 11 is circular, and in this case, the output fluctuation difference of the sensing unit 12 is the smallest.

  This is because the distribution of the thermal stress generated in the semiconductor chip 11 approaches the concentric distribution by increasing the roundness of the R shape of the connection portion 17 of the semiconductor chip 11. That is, the influence of the thermal stress generated in the semiconductor chip 11 is reduced by increasing the R width. Therefore, the influence of the thermal stress can be reduced by making the connecting portion 17 of the semiconductor chip 11 into an R shape. That is, the output fluctuation of the sensing unit 12 based on the thermal stress can be reduced.

  When the R width is 1, that is, when the planar shape is circular, the area discarded by dicing is the largest. This is because the gap between the connecting portions 17 of adjacent semiconductor chips 11 is the largest. As the R width decreases, the portion discarded from the semiconductor wafer 20 decreases. This is because the gap between the connecting portions 17 of adjacent semiconductor chips 11 in the semiconductor wafer 20 becomes smaller. Therefore, by making the connection part 17 of the semiconductor chip 11 into an R shape, it is possible to reduce the portion discarded from the semiconductor wafer 20 when the semiconductor wafer 20 is divided into chips.

  From the above results, if the R width is in the range of 0.2 or more and 0.9 or less, it is possible to reduce the portion discarded from the semiconductor wafer 20 while reducing the influence of thermal stress. If importance is attached to the cost, the R width should be close to 0.2. On the other hand, when the accuracy of the output of the sensing unit 12 is increased, the R width may be close to 0.9.

(Second Embodiment)
In the present embodiment, parts different from the first embodiment will be described. In the present embodiment, as shown in FIG. 5, not all of the connection portions 17 of the semiconductor chip 11 have an R shape, but the shape of one connection portion 17 a is an R shape of the other connection portion 17. Is different. That is, the planar shape is designed so that the one connection portion 17a has two corner portions 17b.

  Therefore, the planar shape of the semiconductor chip 11 according to the present embodiment is based on a hexagon, but the five connection portions 17 corresponding to the corner portions of the hexagon are R-shaped, and one connection portion 17a includes two It is designed to have a corner 17b. As described above, since plasma dicing using a mask is performed when the semiconductor wafer 20 is divided into chips, the shape of the connecting portion 17a can be freely determined depending on the design of the mask.

  Even if one or a plurality of corner portions 17b are formed in one connection portion 17a, the size of the corner portion 17b is smaller than the size of the R-shaped connection portion 17, so that the influence of thermal stress by the corner portion 17b is small.

(Other embodiments)
The configuration of the semiconductor chip 11 described in each of the above embodiments is an example, and the present invention is not limited to the configuration described above, and other configurations that can realize the present invention may be employed. For example, the planar shape of the semiconductor chip 11 does not need to be a hexagonal base, and may be a polygon that is a multiple of 6 such as a dodecagon or an 18-gon. That is, the semiconductor chip 11 only needs to have a planar shape having multiple connection portions 17 of six. Here, the “hexagon” does not have to satisfy the regular polygon condition that the lengths of all sides are the same, and the length of a pair of sides is longer than the length of the other pair of sides. good.

  Further, it is not necessary that all of the connection portions 17 have an R shape, and at least one of multiple connection portions 17 that is a multiple of 6 may have an R shape. For example, when a hexagon is used as a planar base, one connecting portion 17 may be formed in an R shape and five connecting portions 17a may be formed in a square shape. Also, the four connecting portions 17 may be R-shaped, and the two connecting portions 17a may be rectangular. Similarly, the corner-shaped connection portion 17a may be formed with one corner portion or a plurality of corner portions.

  In each of the above embodiments, the semiconductor wafer 20 is divided into chips by plasma dicing, but this is an example of dicing. For example, the semiconductor wafer 20 may be divided into chips by laser dicing using laser light.

  In each said embodiment, although the semiconductor chip 11 was comprised as a sensor chip which detects a pressure, this is an example. Therefore, the semiconductor chip 11 may be configured as a sensor chip that detects acceleration, for example. The semiconductor chip 11 may be configured as a circuit chip in which a circuit such as an amplifier circuit is formed instead of the sensor chip. When the semiconductor chip 11 is configured as a circuit chip, there is an advantage that the circuit is hardly affected by thermal stress.

11 Semiconductor chip 15, 16 Straight line 17 Connection part 20 Semiconductor wafer

Claims (6)

A semiconductor chip (11) divided into chips from a semiconductor wafer (20) so as to have a plurality of identical planar shapes,
The semiconductor chip (11) has the planar shape such that an internal angle formed by one straight line (15) and the other straight line (16) adjacent to the one straight line (15) is an obtuse angle. A semiconductor having a plurality of connection parts (17) connecting the straight lines (15, 16), and at least one of the connection parts (17) of the multiples of 6 has an R shape. apparatus.   2. The semiconductor device according to claim 1, wherein all of the connection portions (17) of the multiple connection portions (17) of the six are R-shaped.   The connection part (17a) different from the connection part (17) having an R shape among the multiple connection parts (17) of 6 has one or a plurality of corner parts (17b). The semiconductor device according to claim 1.   The semiconductor device according to any one of claims 1 to 3, wherein the planar shape of the semiconductor chip (11) has six connection portions (17).   The semiconductor device according to claim 1, wherein the semiconductor wafer is divided into chips by plasma dicing.   The semiconductor device according to claim 1, wherein the semiconductor chip (11) is configured as a sensor chip having a sensing unit (12) for detecting a physical quantity.

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