JP2016082159A - Nitride semiconductor element - Google Patents

Nitride semiconductor element Download PDF

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JP2016082159A
JP2016082159A JP2014214453A JP2014214453A JP2016082159A JP 2016082159 A JP2016082159 A JP 2016082159A JP 2014214453 A JP2014214453 A JP 2014214453A JP 2014214453 A JP2014214453 A JP 2014214453A JP 2016082159 A JP2016082159 A JP 2016082159A
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nitride semiconductor
substrate
passivation layer
layer
semiconductor element
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恒輔 佐藤
Kosuke Sato
恒輔 佐藤
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Asahi Kasei Corp
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Asahi Kasei Corp
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Abstract

PROBLEM TO BE SOLVED: To provide a nitride semiconductor element excellent in adhesion between a nitride semiconductor portion and a passivation layer.SOLUTION: A nitride semiconductor element comprises: a substrate 1 composed of aluminum nitride single crystal; a nitride semiconductor part 3 formed on the substrate 1; a passivation layer 5 which is formed on the substrate 1 and covers the nitride semiconductor part; and an altered layer 7 which is formed on a lateral face 6a of a laminated part 6 having the substrate 1 and the passivation layer 5 and contains whole constituent elements of the substrate 1 and the passivation layer 5 as constituent components.SELECTED DRAWING: Figure 1

Description

本発明は窒化物半導体素子に関する。   The present invention relates to a nitride semiconductor device.

窒化物半導体素子は、さまざまな電子機器に用いられており、外部からの電力を光に変換する発光素子や外部からの光を電力へと変換する受光素子などの光学デバイス、各種センサ、演算処理装置などに応用されている。
また、窒化物半導体素子の耐環境性を向上させること、表面準位を経由したリーク電流を抑制することを目的として、窒化物半導体素子の表面にパッシベーション層を積層させる手法が広く用いられている。このパッシベーション層が、窒化物半導体素子の使用に伴い、例えば腐食や応力により窒化物半導体素子の表面から剥離する可能性がある。このような可能性を低減するために、様々な工夫がなされている。 Nitride semiconductor elements are used in various electronic devices. Optical devices such as light-emitting elements that convert external power into light and light-receiving elements that convert external light into power, various sensors, and arithmetic processing It is applied to devices.
Also, a method of laminating a passivation layer on the surface of a nitride semiconductor element is widely used for the purpose of improving the environmental resistance of the nitride semiconductor element and suppressing the leakage current via the surface level. . With the use of the nitride semiconductor element, this passivation layer may be peeled off from the surface of the nitride semiconductor element due to, for example, corrosion or stress. Various attempts have been made to reduce such a possibility.

例えば、非特許文献１には、パッシベーション層としてＳｉＯＮを用いることで、表面準位経由のリーク電流を抑制する手法が開示されている。この手法は、窒化物半導体部とパッシベーション層との結合が形成されていることを示しており、密着性の向上に寄与しているものと考えられる。
また、特許文献１には、窒化物半導体部の表面に凹凸を形成することで絶縁膜（パッシベーション層）と窒化物半導体部との密着性を向上させる手法が開示されている。 For example, Non-Patent Document 1 discloses a technique for suppressing a leakage current via a surface level by using SiON as a passivation layer. This technique indicates that a bond is formed between the nitride semiconductor portion and the passivation layer, and is considered to contribute to the improvement of adhesion.
Patent Document 1 discloses a technique for improving the adhesion between an insulating film (passivation layer) and a nitride semiconductor portion by forming irregularities on the surface of the nitride semiconductor portion.

特開２００１―１８５８０２号公報Japanese Patent Laid-Open No. 2001-185802

Ｓ． Ａｒｕｌｋｕｍａｒａｎ ｅｔ ａｌ． Ａｐｐｌｉｅｄ Ｐｈｙｓｉｃｓ Ｌｅｔｔｅｒｓ， ｖｏｌ．８４， Ｎｏ．４， ６１３−６１５ （２００４）．S. Arulkumaran et al. Applied Physics Letters, vol. 84, no. 4, 613-615 (2004).

このように、窒化物半導体素子の耐久性を向上させる観点から、窒化物半導体部とパッシベーション層との密着性が高い窒化物半導体素子が期待されている。しかし、非特許文献１や特許文献１に記載の窒化物半導体素子では、窒化物半導体部とパッシベーション層との間のすべての領域に明確な界面が存在する。この界面が、パッシベーション層の剥離の起点になるという懸念がある。   As described above, from the viewpoint of improving the durability of the nitride semiconductor element, a nitride semiconductor element having high adhesion between the nitride semiconductor portion and the passivation layer is expected. However, in the nitride semiconductor device described in Non-Patent Document 1 and Patent Document 1, there is a clear interface in all regions between the nitride semiconductor portion and the passivation layer. There is a concern that this interface is a starting point for peeling of the passivation layer.

また、例えば窒化物半導体部の洗浄が不十分で、窒化物半導体部とパッシベーション層との間に有機物などの不純物が含まれている場合には、パッシベーション層は窒化物半導体部から容易に剥離してしまう可能性がある。
そこで、本発明は、このような事情に鑑みてなされたものであって、窒化物半導体部とパッシベーション層との密着性に優れた窒化物半導体素子を提供することを目的とする。 Further, for example, when the nitride semiconductor part is not sufficiently cleaned and impurities such as organic substances are contained between the nitride semiconductor part and the passivation layer, the passivation layer is easily peeled off from the nitride semiconductor part. There is a possibility that.
Therefore, the present invention has been made in view of such circumstances, and an object thereof is to provide a nitride semiconductor element having excellent adhesion between a nitride semiconductor portion and a passivation layer.

本発明者は上記課題を解決するために鋭意検討した結果、以下の態様により、上記課題を解決できることを見出し、本発明を完成させた。
すなわち、本発明の一態様に係る窒化物半導体素子は、窒化アルミニウム単結晶からなる基板と、前記基板上に形成された窒化物半導体部と、前記基板上に形成されて前記窒化物半導体部を覆うパッシベーション層と、前記基板と前記パッシベーション層とを有する積層部の側面に形成され、前記基板及び前記パッシベーション層の全ての成分元素を構成元素として含む変質層と、を備えることを特徴とする。 As a result of intensive studies to solve the above problems, the present inventors have found that the above problems can be solved by the following aspects, and have completed the present invention.
That is, a nitride semiconductor device according to one aspect of the present invention includes a substrate made of aluminum nitride single crystal, a nitride semiconductor portion formed on the substrate, and the nitride semiconductor portion formed on the substrate. And an alteration layer formed on a side surface of a laminated portion including the substrate and the passivation layer and including all the constituent elements of the substrate and the passivation layer as constituent elements.

本発明の一態様によれば、窒化物半導体部とパッシベーション層との密着性に優れた窒化物半導体素子を実現することが可能になる。   According to one embodiment of the present invention, it is possible to realize a nitride semiconductor element that is excellent in adhesion between the nitride semiconductor portion and the passivation layer.

本発明の実施形態に係る窒化物半導体素子の第１の構成例を示す平面図及び断面図である。It is the top view and sectional drawing which show the 1st structural example of the nitride semiconductor element which concerns on embodiment of this invention. 本発明の実施形態に係る窒化物半導体素子の第２の構成例を示す平面図及び断面図である。It is the top view and sectional drawing which show the 2nd structural example of the nitride semiconductor element which concerns on embodiment of this invention. 本発明の実施形態に係る窒化物半導体素子の第３の構成例を示す平面図及び断面図である。It is the top view and sectional drawing which show the 3rd structural example of the nitride semiconductor element which concerns on embodiment of this invention. 実施例で得られた窒化物半導体素子の側面ＳＥＭ画像である。It is a side SEM image of the nitride semiconductor element obtained in the Example. 比較例で得られた窒化物半導体素子の側面ＳＥＭ画像である。It is a side SEM image of the nitride semiconductor element obtained by the comparative example.

以下、本発明を実施するための形態（以下、本実施形態）について説明する。
＜窒化物半導体素子の構造＞
まず、窒化物半導体素子の構造について説明する。
本実施形態に係る窒化物半導体素子は、窒化アルミニウム単結晶からなる基板と、基板上に形成された窒化物半導体部と、基板上に形成されて窒化物半導体部を覆うパッシベーション層と、基板とパッシベーション層とを有する積層部の側面に形成され、基板及びパッシベーション層の全ての成分元素を構成元素として含む変質層と、を備える。 Hereinafter, modes for carrying out the present invention (hereinafter, this embodiment) will be described.
<Structure of nitride semiconductor device>
First, the structure of the nitride semiconductor device will be described.
The nitride semiconductor device according to the present embodiment includes a substrate made of aluminum nitride single crystal, a nitride semiconductor portion formed on the substrate, a passivation layer formed on the substrate and covering the nitride semiconductor portion, a substrate, An alteration layer formed on a side surface of the laminated portion having the passivation layer and including all the component elements of the substrate and the passivation layer as constituent elements.

基板及びパッシベーション層のすべての成分元素を構成元素として含む変質層を、基板とパッシベーション層とを有する積層部の側面に備える。この変質層により、基板とパッシベーション層とを側面の側から連結することができる。これにより、従来よりも窒化物半導体部とパッシベーション層との密着性に優れ、耐久性の高い窒化物半導体素子を実現することが可能になる。特に、窒化物半導体部とパッシベーション層との間に有機物などの不純物が含まれている場合であっても、窒化物半導体部からのパッシベーション層の剥離を抑制する効果がある。この効果は、上記の変質層により、窒化物半導体部とパッシベーション層との密着性が向上していることに起因していると考えられる。   The altered layer containing all the component elements of the substrate and the passivation layer as constituent elements is provided on the side surface of the stacked portion having the substrate and the passivation layer. With this altered layer, the substrate and the passivation layer can be connected from the side. As a result, it is possible to realize a nitride semiconductor element that is more excellent in adhesion between the nitride semiconductor portion and the passivation layer than the conventional one and has high durability. In particular, even when impurities such as organic substances are included between the nitride semiconductor portion and the passivation layer, there is an effect of suppressing the separation of the passivation layer from the nitride semiconductor portion. This effect is thought to be due to the improved adhesion between the nitride semiconductor portion and the passivation layer due to the above-described deteriorated layer.

また、基板とパッシベーション層とを有する積層部の側面とは、窒化物半導体素子の両側の主面（例えば、表面と裏面）の端部（エッジ）を結ぶ面を意味する。すなわち、基板とパッシベーション層とを有する積層部の側面とは、窒化物半導体素子の側面のことであり、窒化物半導体素子を基板主面に水平な方向から観察した際に確認できる面を意味する。具体的には、上記の側面とは、変質層を無視して観察した際に確認できる基板側面、窒化物半導体部の側面、パッシベーション層の側面の各々の一部もしくは全てであり、これら各々の側面単独又はこれら各々の側面の組み合わせに対応する面である。上記の側面は、上記条件を満たす面であれば特に制限はなく、傾斜、球状、凹凸を含む面なども含まれる。
また、変質層は、上記の側面の少なくとも一部に形成され、好ましくは基板（又は、基板のダイシングライン）を平面視で取り囲むように形成される。 Further, the side surface of the stacked portion having the substrate and the passivation layer means a surface connecting the end portions (edges) of the main surfaces (for example, the front surface and the back surface) on both sides of the nitride semiconductor element. That is, the side surface of the stacked portion having the substrate and the passivation layer is a side surface of the nitride semiconductor element, and means a surface that can be confirmed when the nitride semiconductor element is observed from a direction horizontal to the main surface of the substrate. . Specifically, the above-mentioned side surface is a part or all of the substrate side surface, the side surface of the nitride semiconductor portion, and the side surface of the passivation layer that can be confirmed when observing while disregarding the altered layer. It is a surface corresponding to a single side surface or a combination of these side surfaces. The above-described side surface is not particularly limited as long as it satisfies the above conditions, and includes an inclined surface, a spherical surface, a surface including irregularities, and the like.
The altered layer is formed on at least a part of the side surface, and is preferably formed so as to surround the substrate (or the dicing line of the substrate) in a plan view.

次に、本実施形態の窒化物半導体素子の各構成要件について説明する。以下の各構成要件の説明は、それぞれ独立して又は組み合わせて上述した本実施形態に係る窒化物半導体素子に適用可能である。
〔基板〕
基板は、窒化アルミニウム（ＡｌＮ）単結晶からなるものであれば特に制限されず、ｎ型又はｐ型にドーピングされたものであってもよいし、ノンドープであってもよい。また、本実施形態の技術思想を逸脱しない範囲で、基板はＴｉやＷなどの遷移金属、ＺｎやＣｄなどの典型元素の金属、Ｃ、Ｏ、Ｓｉ、Ｆ、Ｃｌ、Ｂｒ、Ｉ、Ｈ等の不純物を含んでいてもよい。また、窒化アルミニウム単結晶からなる基板を得る方法は特に制限されず、炉内で窒化アルミニウム原料を昇華させることで単結晶を成長させる昇華法や、塩化アルミニウムや臭化アルミニウムなどのハライドガスと、アンモニアや窒素などの窒素含有ガスとを反応させることで窒化アルミニウムを成長させるＨＶＰＥ法、アルミニウムと窒素とを含有する溶液の温度や圧力を制御することで窒化アルミニウムを成長させる溶液成長法などが挙げられる。これらの方法は、窒化アルミニウム単結晶の種結晶やサファイア基板や炭化ケイ素基板などの異種基板を用いる形態であってもよいし、そうでなくてもよい。 Next, each component of the nitride semiconductor device of this embodiment will be described. The following description of each component is applicable to the nitride semiconductor device according to this embodiment described above independently or in combination.
〔substrate〕
The substrate is not particularly limited as long as it is made of an aluminum nitride (AlN) single crystal, and may be n-type or p-type doped or non-doped. Further, the substrate may be a transition metal such as Ti or W, a metal of a typical element such as Zn or Cd, C, O, Si, F, Cl, Br, I, H, or the like without departing from the technical idea of the present embodiment. The impurities may be included. The method for obtaining a substrate made of an aluminum nitride single crystal is not particularly limited, and a sublimation method for growing a single crystal by sublimating an aluminum nitride raw material in a furnace, a halide gas such as aluminum chloride or aluminum bromide, Examples include an HVPE method in which aluminum nitride is grown by reacting with a nitrogen-containing gas such as ammonia or nitrogen, and a solution growth method in which aluminum nitride is grown by controlling the temperature and pressure of a solution containing aluminum and nitrogen. It is done. These methods may or may not use a seed crystal of aluminum nitride single crystal, a different type substrate such as a sapphire substrate or a silicon carbide substrate.

＜窒化物半導体部＞
窒化物半導体部は、窒化物半導体素子としての機能を発現することができれば特に限定されないが、耐圧、耐環境性の観点から特にＡｌｘＧａｙＩｎｚＮ（０≦ｘ≦１、０≦ｙ≦１、０≦ｚ≦１、ｘ＋ｙ＋ｚ＝１）であることが望ましい。
窒化物半導体部は、単層構造であってもよいし、積層構造であってもよい。また、窒化物半導体部は、ノンドープ層であってもよいし、ｎ型半導体層であってもよいし、ｐ型半導体層であってもよい。また、必要に応じて量子井戸構造の層を採用してもよい。また、電極との接触抵抗を低減するために、高濃度にドーピングされた層をさらに採用してもよい。一例としては、「ｎ型半導体層／量子井戸構造のノンドープ層／ｐ型半導体層」の積層構造を窒化物半導体部として採用し、窒化物半導体素子を発光素子とすることが挙げられる。また別の一例としては、「ｎ型半導体層／ノンドープ半導体層」の積層構造を窒化物半導体部として採用し、窒素化合物半導体素子をトランジスタ素子とすることが挙げられる。また、窒化物半導体部はメサ構造やトレンチ構造などの凹凸形状を有していてもよい。 <Nitride semiconductor part>
The nitride semiconductor portion is not particularly limited as long as it can exhibit a function as a nitride semiconductor element, but Al x Ga y In z N (0 ≦ x ≦ 1, 0 ≦ y in particular from the viewpoint of breakdown voltage and environmental resistance. ≦ 1, 0 ≦ z ≦ 1, x + y + z = 1) are desirable.
The nitride semiconductor portion may have a single layer structure or a laminated structure. The nitride semiconductor part may be a non-doped layer, an n-type semiconductor layer, or a p-type semiconductor layer. Moreover, you may employ | adopt the layer of a quantum well structure as needed. In order to reduce the contact resistance with the electrode, a layer doped at a high concentration may be further employed. As an example, a laminated structure of “n-type semiconductor layer / non-doped layer of quantum well structure / p-type semiconductor layer” is employed as the nitride semiconductor portion, and the nitride semiconductor element is used as a light emitting element. As another example, a laminated structure of “n-type semiconductor layer / non-doped semiconductor layer” is employed as the nitride semiconductor portion, and a nitrogen compound semiconductor element is used as a transistor element. Further, the nitride semiconductor portion may have an uneven shape such as a mesa structure or a trench structure.

〔パッシベーション層〕
パッシベーション層とは、窒化物半導体部の表面を覆うように基板上に積層された層を表し、その目的は静電気、水、物理的な衝撃などから窒化物半導体素子を保護することである。この目的を達成する膜は全て本実施形態に係るパッシベーション層に適応される。静電気、水、物理的な衝撃などから窒化物半導体素子を好適に保護する観点から、パッシベーション層としてＳｉＯ２、ＳｉＮ、ＳｉＯＮ、Ａｌ２Ｏ３、ＴｉＯ２が挙げられるがこの限りではない。また、パッシベーション層は単層であってもよいし、複数の材料が積層された積層構造であってもよい。 [Passivation layer]
The passivation layer represents a layer laminated on the substrate so as to cover the surface of the nitride semiconductor portion, and its purpose is to protect the nitride semiconductor element from static electricity, water, physical impact, and the like. All films that achieve this purpose are applied to the passivation layer according to this embodiment. From the viewpoint of suitably protecting the nitride semiconductor element from static electricity, water, physical impact, and the like, examples of the passivation layer include SiO 2 , SiN, SiON, Al 2 O 3 , and TiO 2, but are not limited thereto. In addition, the passivation layer may be a single layer or a stacked structure in which a plurality of materials are stacked.

〔変質層〕
変質層は、窒化アルミニウムからなる基板の構成元素、つまりＡｌとＮを組成として含み、かつ、パッシベーション層のすべての構成元素を含む層である。例えば、パッシベーション層としてＳｉＯ２を用いた場合には、構成元素として少なくともＡｌ、Ｎ、Ｓｉ、Ｏを含む層を表す。また、本発明における変質層は、窒化物半導体素子の側面に局所的に形成されていてもよいし、側面全面に形成されていてもよい。ただし材料効率良く密着性を向上させる観点から、変質層は、パッシベーション層の表面から基板側へパッシベーション層の厚みより厚く形成されることが好ましい。また変質層を除いた窒化物半導体素子の側面が、基板と窒化物半導体部とパッシベーション層を含む場合、変質層は、パッシベーション層の表面から基板側へパッシベーション層と窒化物半導体部の厚みの合計より厚く形成されることが好ましい。 [Degenerated layer]
The altered layer is a layer that includes constituent elements of the substrate made of aluminum nitride, that is, Al and N as a composition, and includes all the constituent elements of the passivation layer. For example, when SiO 2 is used as the passivation layer, it represents a layer containing at least Al, N, Si, and O as constituent elements. In addition, the altered layer in the present invention may be locally formed on the side surface of the nitride semiconductor element or may be formed on the entire side surface. However, from the viewpoint of improving the adhesion with high material efficiency, the altered layer is preferably formed thicker than the thickness of the passivation layer from the surface of the passivation layer to the substrate side. When the side surface of the nitride semiconductor element excluding the altered layer includes the substrate, the nitride semiconductor portion, and the passivation layer, the altered layer is the sum of the thickness of the passivation layer and the nitride semiconductor portion from the surface of the passivation layer to the substrate side. It is preferable to form it thicker.

〔具体例〕
次に、構造の具体例を示す。
図１（ａ）及び（ｂ）は、本実施形態に係る窒化物半導体素子の構成例を示す平面図と断面図である。図１（ａ）及び（ｂ）に示すように、この窒化物半導体素子は、窒化アルミニウムからなる基板１と、基板１上に形成された窒化物半導体部３と、基板１上に形成されて窒化物半導体部３を覆うパッシベーション層５と、基板１とパッシベーション層５とを有する積層部６の側面６ａに形成され、基板１及びパッシベーション層５の全ての成分元素を構成元素として含む変質層７とを備える。 〔Concrete example〕
Next, a specific example of the structure is shown.
FIGS. 1A and 1B are a plan view and a cross-sectional view showing a configuration example of the nitride semiconductor device according to this embodiment. As shown in FIGS. 1A and 1B, this nitride semiconductor element is formed on a substrate 1 made of aluminum nitride, a nitride semiconductor portion 3 formed on the substrate 1, and the substrate 1. An alteration layer 7 formed on the side surface 6a of the laminated portion 6 having the passivation layer 5 covering the nitride semiconductor portion 3 and the substrate 1 and the passivation layer 5 and containing all the component elements of the substrate 1 and the passivation layer 5 as constituent elements. With.

この例では、積層部６の側面６ａは、基板１の外周面（すなわち、端面）１ａとパッシベーション層の外周面５ａとを含む。また、積層部６は、基板１の外周部１１とパッシベーション層５とが接している界面９を有する。変質層７は、基板１の外周面１ａからパッシベーション層５の外周面５ａ又は上面５ｂにかけて形成されている。これにより、変質層７は、基板１とパッシベーション層５との界面９を側面の側から覆うとともに、基板１とパッシベーション層５とを側面の側から連結している。   In this example, the side surface 6a of the laminated portion 6 includes an outer peripheral surface (that is, an end surface) 1a of the substrate 1 and an outer peripheral surface 5a of the passivation layer. The laminated portion 6 has an interface 9 where the outer peripheral portion 11 of the substrate 1 and the passivation layer 5 are in contact with each other. The altered layer 7 is formed from the outer peripheral surface 1 a of the substrate 1 to the outer peripheral surface 5 a or the upper surface 5 b of the passivation layer 5. Thereby, the altered layer 7 covers the interface 9 between the substrate 1 and the passivation layer 5 from the side surface side, and connects the substrate 1 and the passivation layer 5 from the side surface side.

なお、窒化物半導体素子は、窒化物半導体部３に電気的に接続する配線層（図示せず）を備えていてもよい。また、図１（ａ）及び（ｂ）では、窒化物半導体素子が窒化物半導体部３を複数備える場合を図示しているが、本発明において窒化物半導体部の数は複数に限定されない。本実施形態では、例えば図２（ａ）及び（ｂ）に示すように、窒化物半導体素子が備える窒化物半導体部３の個数は１つでもよい。   The nitride semiconductor element may include a wiring layer (not shown) that is electrically connected to the nitride semiconductor portion 3. 1A and 1B illustrate the case where the nitride semiconductor element includes a plurality of nitride semiconductor portions 3, the number of nitride semiconductor portions is not limited to a plurality in the present invention. In the present embodiment, for example, as shown in FIGS. 2A and 2B, the number of nitride semiconductor portions 3 included in the nitride semiconductor element may be one.

また、図１（ａ）及び（ｂ）では、変質層７を除いた窒化物半導体素子の側面は基板１とパッシベーション層５とを含み、窒化物半導体部３を含まない場合を示しているが、本実施形態はこれに限定されない。本実施形態は、例えば図３（ａ）及び（ｂ）に示すように、変質層７を除いた窒化物半導体素子の側面は、基板１と窒化物半導体部３とパッシベーション層５とを含んでいてもよい。   1A and 1B show a case where the side surface of the nitride semiconductor element excluding the altered layer 7 includes the substrate 1 and the passivation layer 5 and does not include the nitride semiconductor portion 3. The present embodiment is not limited to this. In the present embodiment, for example, as shown in FIGS. 3A and 3B, the side surface of the nitride semiconductor element excluding the altered layer 7 includes a substrate 1, a nitride semiconductor portion 3, and a passivation layer 5. May be.

すなわち、図３（ａ）及び（ｂ）に示すように、積層部６は、基板１とパッシベーション層５との間に窒化物半導体部３を含んでいてもよく、基板１の外周部１１と窒化物半導体部３とが接している界面１９を有していてもよい。積層部６の側面６ａは、基板１の外周面１ａと、窒化物半導体部３の外周面３ａと、パッシベーション層の外周面５ａとを含む。図３（ａ）及び（ｂ）では、変質層７は、基板１の外周面１ａから、窒化物半導体部３の外周面３ａを通ってパッシベーション層５の外周面５ａ又は上面５ｂにかけて形成されている。これにより、変質層７は、基板１と窒化物半導体部３とが接している界面１９や、窒化物半導体部３とパッシベーション層５とが接している界面２９を側面の側から覆うとともに、基板１と窒化物半導体部３とパッシベーション層５とを側面の側から連結している。このように、図２及び図３に示す形態も本発明に含まれる。   That is, as shown in FIGS. 3A and 3B, the stacked portion 6 may include a nitride semiconductor portion 3 between the substrate 1 and the passivation layer 5, and the outer peripheral portion 11 of the substrate 1 The interface 19 may be in contact with the nitride semiconductor portion 3. Side surface 6a of stacked portion 6 includes outer peripheral surface 1a of substrate 1, outer peripheral surface 3a of nitride semiconductor portion 3, and outer peripheral surface 5a of the passivation layer. 3A and 3B, the altered layer 7 is formed from the outer peripheral surface 1a of the substrate 1 to the outer peripheral surface 5a or the upper surface 5b of the passivation layer 5 through the outer peripheral surface 3a of the nitride semiconductor portion 3. Yes. Thereby, the altered layer 7 covers the interface 19 where the substrate 1 and the nitride semiconductor portion 3 are in contact with each other and the interface 29 where the nitride semiconductor portion 3 and the passivation layer 5 are in contact with each other from the side surface. 1, the nitride semiconductor part 3 and the passivation layer 5 are connected from the side. Thus, the forms shown in FIGS. 2 and 3 are also included in the present invention.

＜窒化物半導体素子の製造方法＞
次に、窒化物半導体素子を製造方法について説明する。
本実施形態に係る窒化物半導体素子の製造方法は、窒化アルミニウム基板と、窒化アルミニウム基板上に形成された窒化物半導体部と、窒化アルミニウム基板上に形成されて窒化物半導体部を覆うパッシベーション層と、を有する窒化物半導体素子に対し、レーザ照射を行うことで、窒化物半導体素子の側面に、窒化アルミニウム基板及びパッシベーション層の全ての成分元素を構成元素として有する変質層を形成する。 <Nitride Semiconductor Device Manufacturing Method>
Next, a method for manufacturing a nitride semiconductor device will be described.
A method for manufacturing a nitride semiconductor device according to the present embodiment includes an aluminum nitride substrate, a nitride semiconductor portion formed on the aluminum nitride substrate, and a passivation layer formed on the aluminum nitride substrate and covering the nitride semiconductor portion. By performing laser irradiation on the nitride semiconductor element having the above, an altered layer having all the constituent elements of the aluminum nitride substrate and the passivation layer as constituent elements is formed on the side surface of the nitride semiconductor element.

ここでレーザ照射とは、レーザ光を対象物に照射し熱を発生させ、素子材料が変質、気化することで加工する技術である。レーザ照射の種類としては、照射により素子分離を行うレーザダイシング、表面にアブレーション加工傷を形成するレーザスクライブ、基材を溶融させるＬＭＡ（Ｌａｓｅｒ Ｍｅｌｔｉｎｇ Ａｌｔｅｒａｔｉｏｎ法）、基材内部に集光し、変質層を形成するステルスダイシングなどが挙げられる。   Here, the laser irradiation is a technique of processing by irradiating an object with laser light to generate heat, and the element material is altered and vaporized. Types of laser irradiation include laser dicing for element separation by irradiation, laser scribe to form ablation scratches on the surface, LMA (Laser Melting Alteration Method) for melting the base material, condensing inside the base material, altered layer And stealth dicing to form.

＜実施形態の効果＞
本実施形態によれば、基板及びパッシベーション層のすべての成分元素を構成元素として含む変質層を、基板とパッシベーション層とを有する積層部の側面に備える。この変質層により、基板とパッシベーション層とを側面の側から連結することができる。これにより、基板とパッシベーション層との間に位置する各層の密着性を高めることができ、基板とパッシベーション層との間に位置する窒化物半導体部についても、パッシベーション層との密着性を高めることができる。 <Effect of embodiment>
According to this embodiment, the altered layer containing all the component elements of the substrate and the passivation layer as constituent elements is provided on the side surface of the stacked portion including the substrate and the passivation layer. With this altered layer, the substrate and the passivation layer can be connected from the side. Thereby, the adhesiveness of each layer located between a board | substrate and a passivation layer can be improved, and the adhesiveness with a passivation layer can also be improved also about the nitride semiconductor part located between a board | substrate and a passivation layer. it can.

例えば、図１（ａ）及び（ｂ）に示した窒化物半導体素子や、図２（ａ）及び（ｂ）に示した窒化物半導体素子では、変質層７は、基板１の外周面１ａからパッシベーション層５の外周面５ａ又は上面５ｂにかけて形成されている。この変質層７により、基板１の外周部１１とパッシベーション層５とを窒化物半導体素子の外周面の側から連結することができる。これにより、基板１の外周部１１とパッシベーション層５との密着性を高めることができ、基板１とパッシベーション層５との間に位置する窒化物半導体部３についても、パッシベーション層５との密着性を高めることができる。また、変質層７は、基板１とパッシベーション層５との界面９を、窒化物半導体素子の外周面の側から部分的に又は全面的に覆っている。これにより、窒化物半導体素子の外周面から界面９への水分や不純物等が侵入することを抑制することができる。   For example, in the nitride semiconductor device shown in FIGS. 1A and 1B and the nitride semiconductor device shown in FIGS. 2A and 2B, the altered layer 7 is formed from the outer peripheral surface 1 a of the substrate 1. It is formed over the outer peripheral surface 5 a or the upper surface 5 b of the passivation layer 5. By this altered layer 7, the outer peripheral portion 11 of the substrate 1 and the passivation layer 5 can be connected from the outer peripheral surface side of the nitride semiconductor element. Thereby, the adhesiveness of the outer peripheral part 11 of the board | substrate 1 and the passivation layer 5 can be improved, and the adhesiveness with the passivation layer 5 also about the nitride semiconductor part 3 located between the board | substrate 1 and the passivation layer 5 is demonstrated. Can be increased. Further, the altered layer 7 partially or entirely covers the interface 9 between the substrate 1 and the passivation layer 5 from the outer peripheral surface side of the nitride semiconductor element. Thereby, it is possible to prevent moisture, impurities, and the like from entering the interface 9 from the outer peripheral surface of the nitride semiconductor element.

また、例えば図３（ａ）及び（ｂ）に示した窒化物半導体素子では、変質層７は、基板１の外周面１ａから、窒化物半導体部３の外周面３ａを通ってパッシベーション層５の外周面５ａ又は上面５ｂにかけて形成されている。この変質層７により、基板１の外周部１１と窒化物半導体部３とパッシベーション層５とを窒化物半導体素子の外周面の側から連結することができる。これにより、基板１の外周部１１と窒化物半導体部３との密着性を高めることができるとともに、窒化物半導体部３とパッシベーション層５との密着性も高めることができる。また、変質層７は、基板１と窒化物半導体部３との界面１９や、窒化物半導体部３とパッシベーション層５との界面２９を、窒化物半導体素子の外周面の側から部分的に又は全面的に覆っている。これにより、窒化物半導体素子の外周面から各界面１９、２９への水分や不純物等が侵入することを抑制することができる。
このように、本実施形態によれば、従来よりも窒化物半導体部とパッシベーション層との密着性に優れており、窒化物半導体部からパッシベーション層が剥離しにくく、耐久性の高い窒化物半導体素子を実現することが可能になる。 For example, in the nitride semiconductor device shown in FIGS. 3A and 3B, the altered layer 7 is formed on the passivation layer 5 from the outer peripheral surface 1 a of the substrate 1 through the outer peripheral surface 3 a of the nitride semiconductor portion 3. It is formed over the outer peripheral surface 5a or the upper surface 5b. With this altered layer 7, the outer peripheral portion 11, the nitride semiconductor portion 3, and the passivation layer 5 of the substrate 1 can be connected from the outer peripheral surface side of the nitride semiconductor element. Thereby, the adhesiveness between the outer peripheral portion 11 of the substrate 1 and the nitride semiconductor portion 3 can be enhanced, and the adhesiveness between the nitride semiconductor portion 3 and the passivation layer 5 can also be enhanced. In addition, the altered layer 7 partially or partially passes the interface 19 between the substrate 1 and the nitride semiconductor portion 3 and the interface 29 between the nitride semiconductor portion 3 and the passivation layer 5 from the outer peripheral surface side of the nitride semiconductor element. Covers the entire surface. Thereby, it is possible to prevent moisture, impurities and the like from entering the interfaces 19 and 29 from the outer peripheral surface of the nitride semiconductor element.
As described above, according to the present embodiment, the nitride semiconductor element is more excellent in adhesion between the nitride semiconductor part and the passivation layer than the conventional one, and the passivation layer is less likely to be peeled off from the nitride semiconductor part. Can be realized.

［実施例］
ＡｌＮ基板の第１主面上にＮ型ＡｌＧａＮ、ＡｌＧａＮ発光層、Ｐ型ＡｌＧａＮ、Ｐ型ＧａＮを積層し、その上層にパッシベーション層としてＳｉＯ２を積層し、窒化物半導体ウェハを得た。この窒化物半導体ウェハに株式会社ディスコ製のレーザソー「ＤＦＬ７１６０」を用いてアブレーション加工を行い、第１主面側の第１領域にスクライブ傷を形成した。次に、三星ダイヤモンド社製のブレードブレーカ「ＬＢ５０１」を用いて外力を加え、窒化物半導体素子（発光素子）に分割した。 [Example]
N-type AlGaN, an AlGaN light emitting layer, P-type AlGaN, and P-type GaN were stacked on the first main surface of the AlN substrate, and SiO 2 was stacked as a passivation layer thereon to obtain a nitride semiconductor wafer. This nitride semiconductor wafer was subjected to ablation processing using a laser saw “DFL7160” manufactured by DISCO Corporation, and scribe scratches were formed in the first region on the first main surface side. Next, an external force was applied using a blade breaker “LB501” manufactured by Samsung Diamond Co., Ltd. to divide the nitride semiconductor element (light emitting element).

図４に、本手法により作製した窒化物半導体素子の側面ＳＥＭ画像を示す。このＳＥＭ画像は、走査型電子顕微鏡「Ｓ−４７００（ＨＩＴＡＣＨＩ）」（１０，０００倍率倍）を用いて撮像した。
図４のＡが変質層であり、Ｂが窒化アルミニウム基板である。ＥＤＸ（エネルギー分散型Ｘ線）分析装置「ＥＭＡＸ−７０００（ＨＯＲＩＢＡ）」を用いて図４中のＡ箇所、Ｂ箇所の組成解析を行った結果を表１に示す。本結果より、変質層は構成元素としてＡｌ、Ｓｉ、Ｎ、Ｏを含んでいることが分かる。すなわち、この変質層は、基板の成分元素であるＡｌとＮ、及びパッシベーション層の成分元素であるＳｉとＯのすべてを含んでいることが確認された。 FIG. 4 shows a side SEM image of a nitride semiconductor device manufactured by this method. This SEM image was taken using a scanning electron microscope “S-4700 (HITACHI)” (10,000 × magnification).
4A is a deteriorated layer, and B is an aluminum nitride substrate. Table 1 shows the results of composition analysis of the A and B locations in FIG. 4 using an EDX (energy dispersive X-ray) analyzer “EMAX-7000 (HORIBA)”. From this result, it can be seen that the altered layer contains Al, Si, N, and O as constituent elements. That is, it was confirmed that this deteriorated layer contained all of Al and N as the component elements of the substrate and Si and O as the component elements of the passivation layer.

本実施例で得られた窒化物半導体素子を大気中に放置し、１４，０００時間経過後に再度観察したところ、パッシベーション層と窒化物半導体積層部間の剥離は見られなかった。 When the nitride semiconductor device obtained in this example was left in the atmosphere and observed again after 14,000 hours had elapsed, no separation between the passivation layer and the nitride semiconductor multilayer portion was observed.

［比較例］
実施例と同様にＡｌＮ基板の第１主面上にＮ型ＡｌＧａＮ、ＡｌＧａＮ発光層、Ｐ型ＡｌＧａＮ、Ｐ型ＧａＮを積層し、その上層にパッシベーション層としてＳｉＯ２を積層し、窒化物半導体ウェハを得た。この窒化物半導体ウェハを、劈開を利用して素子に分割した。
図５に、本手法により作製した素子の側面ＳＥＭ画像（５度傾斜）を示す。このＳＥＭ画像は、走査型電子顕微鏡「Ｓ−４７００（ＨＩＴＡＣＨＩ）」（１０，０００倍率倍）を用いて撮像した。図５に示すように、このＳＥＭ画像では変質層の形成は見られず、ＡｌＮとＳｉＯ２の明確な界面が見られた。
本比較例で得られた窒化物半導体素子を大気中に放置し、１４，０００時間経過後に再度観察したところ、パッシベーション層と窒化物半導体積層部間で部分的に剥離が見られた。 [Comparative example]
As in the example, N-type AlGaN, AlGaN light emitting layer, P-type AlGaN, and P-type GaN are stacked on the first main surface of the AlN substrate, and SiO 2 is stacked as a passivation layer on the first surface. Obtained. This nitride semiconductor wafer was divided into elements using cleavage.
FIG. 5 shows a side SEM image (5-degree inclination) of an element manufactured by this method. This SEM image was taken using a scanning electron microscope “S-4700 (HITACHI)” (10,000 × magnification). As shown in FIG. 5, in this SEM image, the formation of a deteriorated layer was not observed, and a clear interface between AlN and SiO 2 was observed.
When the nitride semiconductor device obtained in this comparative example was left in the atmosphere and observed again after 14,000 hours had elapsed, partial peeling was observed between the passivation layer and the nitride semiconductor multilayer portion.

＜その他＞
本発明は、以上に記載した実施形態やその具体例、実施例に限定されるものではない。当業者の知識に基づいて実施形態やその具体例、実施例に設計の変更等を加えてもよく、また、実施形態やその具体例、実施例を任意に組み合わせてもよく、そのような変更等を加えた態様も本発明の範囲に含まれる。 <Others>
The present invention is not limited to the above-described embodiments, specific examples, and examples. Based on the knowledge of those skilled in the art, design changes or the like may be added to the embodiments, specific examples, and examples, and the embodiments, specific examples, and examples may be arbitrarily combined, and such changes may be made. Embodiments to which these are added are also included in the scope of the present invention.

１ 基板
１ａ （基板の）外周面
３ 窒化物半導体部
３ａ （窒化物半導体部の）外周面
５ パッシベーション層
５ａ （パッシベーション層の）外周面
５ｂ （パッシベーション層の）上面
６ 積層部
６ａ （積層部の）側面
７ 変質層
９、１９、２９ 界面
１１ （基板の）外周部 DESCRIPTION OF SYMBOLS 1 Substrate 1a Peripheral surface 3 (of substrate) Nitride semiconductor portion 3a (Nitride semiconductor portion) outer peripheral surface 5 Passivation layer 5a (Passivation layer) outer peripheral surface 5b (Passivation layer) upper surface 6 Lamination portion 6a (Lamination portion) ) Side surface 7 Altered layer 9, 19, 29 Interface 11 (outside of substrate)

Claims (4)

窒化アルミニウム単結晶からなる基板と、
前記基板上に形成された窒化物半導体部と、
前記基板上に形成されて前記窒化物半導体部を覆うパッシベーション層と、
前記基板と前記パッシベーション層とを有する積層部の側面に形成され、前記基板及び前記パッシベーション層の全ての成分元素を構成元素として含む変質層と、を備える窒化物半導体素子。 A substrate made of an aluminum nitride single crystal;
A nitride semiconductor portion formed on the substrate;
A passivation layer formed on the substrate and covering the nitride semiconductor portion;
A nitride semiconductor device comprising: a modified layer formed on a side surface of a stacked portion including the substrate and the passivation layer and including all the constituent elements of the substrate and the passivation layer as constituent elements. 前記側面は、前記基板の外周面と前記パッシベーション層の外周面とを含む請求項１に記載の窒化物半導体素子。   The nitride semiconductor device according to claim 1, wherein the side surface includes an outer peripheral surface of the substrate and an outer peripheral surface of the passivation layer. 前記積層部は、前記基板と前記パッシベーション層とが接している界面又は前記基板と窒化物半導体部とが接している界面を有する請求項１又は２に記載の窒化物半導体素子。   The nitride semiconductor device according to claim 1, wherein the stacked portion has an interface where the substrate and the passivation layer are in contact or an interface where the substrate and the nitride semiconductor portion are in contact. 前記変質層は、前記界面を前記側面の側から覆っている請求項３に記載の窒化物半導体素子。
The nitride semiconductor element according to claim 3, wherein the deteriorated layer covers the interface from the side surface.
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