JP2016073173A - Power supply system - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a power supply system having two DC power sources that can enhance the efficiency and reduce the manufacturing cost by reducing power loss.SOLUTION: A power converter 50 executes DC/DC conversion between DC power sources B1 and B2 and between a power line PL connected to a load 30 and NL. The power converter 50 has unidirectional switching elements S1 to S6 and reactors L1, L2. The switching elements S1, S4 are connected to each other in reverse parallel between nodes N1 and N2. The switching elements S2, S3 are connected to each other in reverse parallel between the node N2 and the power line NL. The switching elements S5, S6 are connected to each other in reverse parallel between the node N1 and the power line PL. The DC power source B1 and the reactor L1 are connected to each other in series between the node N2 and the power line NL. The DC power source B2 and the reactor L2 are connected to each other in series between the nodes N1 and N2.SELECTED DRAWING: Figure 1

Description

  The present invention relates to a power supply system, and more particularly to control of a power supply system including a power converter connected between two DC power supplies and a common power line.

  2. Description of the Related Art A power supply system that uses a power converter connected between a plurality of power sources and a load to supply power to the load by combining the plurality of power sources is used.

  For example, Japanese Patent Laying-Open No. 2009-11021 (Patent Document 1) discloses a converter (a boost converter and a converter) provided for each of a DC power source composed of an engine generator and a diode converter and a DC power source composed of a capacitor. A hybrid power supply device used in equipment such as a crane, in which a step-up / down converter is connected in parallel, is described.

  Japanese Patent Laid-Open No. 2013-13234 (Patent Document 2) discloses an operation mode (series connection) in which DC / DC conversion is performed in a state where two DC power supplies are connected in series by switching switching patterns of a plurality of switching elements. Mode) and a configuration of a power converter capable of switching between an operation mode (parallel connection mode) in which DC / DC conversion is performed in a state where two DC power supplies are used in parallel.

JP 2009-11021 A JP2013-13234A

  Since the hybrid power supply apparatus of Patent Document 1 has a configuration in which two converters are connected in parallel, in a region where the load voltage is high, the boost ratio in each converter must be increased. For this reason, since the loss in the reactor in the converter increases, it is difficult to increase the efficiency. In addition, AC power generated by the engine generator is AC / DC converted by a diode converter, and then DC / DC converted by a boost converter. Therefore, high efficiency is achieved even by power loss during power conversion. Is inhibited.

  On the other hand, in the power supply system described in Patent Document 2, in the region where the load voltage is high, the step-up ratio can be suppressed by applying the series connection mode. However, in the circuit configuration of Patent Document 2, a phenomenon occurs in which a current for power conversion of the first DC power supply and a current for power conversion of the second DC power supply flow through a common switching element. . As a result, there is a concern that the conduction loss of the switching element depending on the amount of passing current is increased as compared with Patent Document 1.

  In the configuration of Patent Document 2, the power converter is configured by eight semiconductor elements (switching elements and diodes). However, if the number of elements constituting the power converter can be reduced, the power loss is reduced and the manufacturing cost is reduced. Can be achieved.

  The present invention has been made to solve such problems, and its object is to reduce power loss by suppressing the number of semiconductor elements used in a power supply system having two DC power supplies. It is an object of the present invention to provide a circuit configuration of a power converter capable of realizing high efficiency and reduction in manufacturing cost.

  In one aspect of the present invention, the power supply system controls a DC voltage supplied to a load connected between the first power line on the high voltage side and the second power line on the low voltage side. The power supply system includes a first DC power supply, a second DC power supply, a power converter, and a control device for controlling the operation of the power converter. The power converter is configured to perform DC voltage conversion between the first and second DC power supplies and the first and second power lines. The power converter includes first to sixth semiconductor elements, and first and second reactors. The first semiconductor element is connected between the first and second nodes to form a current path from the first node to the second node. The second semiconductor element is connected between the second node and the second power line to form a current path from the second power line to the second node. The third semiconductor element is connected in antiparallel with the second semiconductor element between the second node and the second power line in order to form a current path from the second node to the second power line. . The fourth semiconductor element is connected in antiparallel with the first semiconductor element between the first node and the second node to form a current path from the second node to the first node. The fifth semiconductor element is connected between the first power line and the first node in order to form a current path from the first node toward the first power line. The sixth semiconductor element is connected in antiparallel with the fifth semiconductor element between the first power line and the first node in order to form a current path from the first power line to the first node. . The first reactor is connected in series with the first DC power source between the second node and the second power line. The second reactor is connected in series with the second DC power source between the first node and the second node. Each of the first to sixth semiconductor elements is configured by a switching element or a diode capable of controlling on / off of the current path. Of the first to sixth semiconductor elements, at least the first, third and sixth semiconductor elements are constituted by switching elements. The control device controls on / off of each switching element. The power converter operates by switching a plurality of operation modes having different DC voltage conversion modes by switching the mode of on / off control of the switching elements by the control device.

  Preferably, the plurality of operation modes include a series connection mode and a parallel connection mode. In the series connection mode, the power converter includes the first and second DC power supplies and the first and second DC power supplies so as to control the DC voltage to the voltage command value with the first and second DC power supplies connected in series. DC voltage conversion is performed with the second power line. In the parallel connection mode, the power converter converts the DC voltage between the first DC power source and the first and second power lines, and the second DC power source so as to control the DC voltage to the voltage command value. DC voltage conversion between the first and second power lines is performed in parallel.

  More preferably, in the serial connection mode, the control device always forms a current path by the sixth semiconductor element during the regenerative operation of the load, and always interrupts the current path by the sixth semiconductor element during the power running operation of the load. .

  Alternatively, more preferably, in the parallel connection mode, the control device charges the first DC power supply while fixing the current path by the third and fourth semiconductor elements in a cut-off state during the regenerative operation of the load. A first charging operation for discharging the first DC power supply, and a first charging operation for discharging the first DC power supply while fixing the current path by the first and second semiconductor elements in a cut-off state while charging the second DC power supply. The operation of the power converter is controlled so as to selectively execute one of the two charging operations.

  Preferably, the plurality of operation modes further include a first direct power supply mode. In the first direct power supply mode, the power converter is configured to turn on / off the switching element so that the first and second DC power supplies are connected in series between the first and second DC power supplies. The combination is fixed.

  More preferably, in the first direct power supply mode, the control device maintains the current path formed by the sixth semiconductor element during the load regenerative operation, while maintaining the current path generated by the sixth semiconductor element during the power running operation of the load. Keep the route in a blocked state.

  Alternatively, preferably, in the power supply system, one of the first and second DC power supplies includes a power generation mechanism that outputs an AC voltage, and an AC that converts the AC voltage output from the power generation mechanism into a DC voltage. It is configured as a variable voltage DC power source including a DC / DC converter. The plurality of operation modes further include a second direct power supply mode. In the second direct power supply mode, the power converter includes only the other DC power source of the first and second DC power sources, or the other DC power source and the variable voltage DC power source in series. The on / off combination of the switching elements is fixed so that the state of being electrically connected between the power lines is maintained.

  More preferably, the variable voltage DC power source is configured to variably control the DC voltage of one DC power source within a voltage range equal to or lower than the upper limit voltage by variably controlling the output voltage of the power generation mechanism. When the sum of the output voltage of the other DC power source and the upper limit voltage of the one DC power source is higher than the required voltage of the DC voltage set according to the operating state of the load, the control device performs the second direct power supply. Select a mode. When the second direct power supply mode is selected, if the required voltage is lower than the output voltage of the other power supply voltage, the control device stops the operation of the power generation mechanism and only the other DC power supply is used. Electrical connection between the two power lines. On the other hand, when the required voltage is higher than the output voltage of the other DC power supply, the control device electrically connects the other DC power supply and the variable voltage DC power supply between the first and second power lines in series. In this state, the output voltage of the power generation mechanism is controlled according to the voltage difference between the required voltage and the output voltage of the other DC power source.

  More preferably, the control device selects the series connection mode when the required voltage is higher than the sum of the output voltage and the upper limit voltage of the other DC power supply.

  Preferably, the control device selects any one of a plurality of operation modes according to a required voltage of a DC voltage set according to an operation state of the load. The voltage command value is set to a voltage higher than the required voltage.

  More preferably, the control device selects the series connection mode when the required voltage is higher than the sum of the output voltages of the first and second DC power supplies.

  Preferably, the control device calculates a first duty ratio for controlling the output from the first DC power source and a second duty ratio for controlling the output from the second DC power source. And the first and second control pulse signals obtained in accordance with the comparison of the first carrier wave and the first duty ratio and the pulse width modulation by the comparison of the second carrier wave and the second duty ratio, respectively. And means for generating an on / off control signal for a switching element among the first to sixth semiconductor elements. The phase difference between the first carrier wave and the second carrier wave is such that the inflection point of the current of the first reactor and the inflection point of the current of the second reactor overlap on the time axis. It is variably controlled according to the first and second duty ratios.

  More preferably, the phase difference between the first and second carrier waves is such that the maximum point of the first reactor current and the minimum point of the second reactor current overlap on the time axis during the powering operation of the load. Alternatively, control is performed so that the minimum point of the current of the first reactor and the maximum point of the current of the second reactor overlap on the time axis.

  More preferably, the phase difference between the first and second carrier waves is such that the maximum point of the current of the first reactor and the maximum point of the current of the second reactor are on the time axis during the regeneration operation of the load. Or the local minimum point of the first reactor current and the local minimum point of the second reactor are controlled to overlap on the time axis.

  Preferably, each of the first to sixth switching elements is constituted by a switching element.

  More preferably, when the control device turns off one of the first to sixth switching elements, from the generation of a turn-on command for another switching element that is alternately turned on / off with the one switching element. One switching element turn-off command is generated after elapse of a predetermined period.

  Preferably, the first, third and sixth semiconductor elements are constituted by switching elements, and the second, fourth and fifth semiconductor elements are constituted by diodes.

  According to the present invention, in a power supply system including two DC power supplies, by reducing the number of semiconductor elements to be used, it is possible to realize power conversion capable of realizing high efficiency and reduction in manufacturing cost by reducing power loss. The circuit configuration of the vessel can be provided.

It is a circuit diagram which shows the structure of the power supply system according to embodiment of this invention. It is the schematic which shows the structural example of the load shown by FIG. It is a block diagram for demonstrating the operation mode selection of a power converter. It is a chart for demonstrating the several operation mode which the power converter shown in FIG. 1 has. It is a 1st figure for demonstrating the output control from the 1st DC power supply in PB mode. It is a 2nd figure for demonstrating the output control from the 1st DC power supply in PB mode. It is a 1st figure for demonstrating the output control from the 2nd DC power supply in PB mode. It is a 2nd figure for demonstrating the output control from the 2nd DC power supply in PB mode. It is a wave form diagram which shows the control operation example of the switching element of the power converter in PB mode. It is a table | surface explaining the gate logical formula for setting the control signal of each switching element in PB mode. It is a conceptual diagram explaining the voltage control by the power converter control in PB mode. It is a block diagram explaining the control calculation for power converter control in PB mode. It is a 1st figure for demonstrating DC / DC conversion (step-up operation | movement) in SB mode. It is a 2nd figure for demonstrating DC / DC conversion (step-up operation) in SB mode. FIG. 10 is a third diagram for explaining DC / DC conversion (step-up operation) in the SB mode. It is a wave form diagram for demonstrating the control operation example of the switching element in SB mode. It is a table | surface explaining the gate logic formula for setting the control signal of each switching element in SB mode. It is a block diagram explaining the control calculation for power converter control in SB mode. It is a circuit diagram for demonstrating operation | movement of the power converter in SD mode. It is a table | surface explaining the gate logical formula for setting the control signal of each switching element in SD mode. It is an equivalent circuit schematic of the power converter in SD mode. It is a wave form diagram which shows the example of control operation | movement of the switching element of the power converter in PB mode at the time of application of carrier phase control. FIG. 23 is a first circuit diagram for illustrating a current path in each period of FIG. 22. FIG. 23 is a second circuit diagram for illustrating a current path in each period of FIG. 22. FIG. 23 is a third circuit diagram for explaining a current path in each period of FIG. 22. It is a functional block diagram for demonstrating the structure relevant to the PWM control to which the carrier phase control according to the modification of Embodiment 1 is applied. FIG. 11 is a circuit diagram for illustrating a current path during a regenerative operation in SD mode according to the second embodiment. It is a table | surface explaining the gate logic formula for setting the control signal of each switching element at the time of regeneration operation | movement of SD mode. FIG. 11 is a first circuit diagram for illustrating a current path during a regenerative operation in SB mode according to the third embodiment. FIG. 12 is a second circuit diagram for illustrating a current path during a regenerative operation in SB mode according to the third embodiment. It is a table | surface explaining the gate logic formula for setting the control signal of each switching element at the time of regeneration operation | movement of SB mode. 10 is a diagram illustrating a gate logical expression for setting a control signal of each switching element during a regenerative operation in PB mode according to Embodiment 3 (DC power supply B1 is a charging target). It is a wave form diagram which shows the example of control operation | movement of the switching element of a power converter at the time of regeneration operation of PB mode (DC power supply B1 is charge object). It is a 1st circuit diagram for demonstrating the current path | route in each period of FIG. It is a 2nd circuit diagram for demonstrating the current pathway in each period of FIG. It is a 3rd circuit diagram for demonstrating the current pathway in each period of FIG. It is a table | surface explaining the gate logical formula for setting the control signal of each switching element at the time of the regeneration operation | movement (DC power supply B2 is charging object) of PB mode. It is a wave form diagram which shows the example of control operation | movement of the switching element of a power converter at the time of regeneration operation of PB mode (DC power supply B1 is charge object). It is a 1st circuit diagram for demonstrating the current path | route in each period of FIG. It is a 2nd circuit diagram for demonstrating the current pathway in each period of FIG. It is a 3rd circuit diagram for demonstrating the current pathway in each period of FIG. It is a chart explaining control of direct-current power supplies B1 and B2 at the time of power running / regenerative operation of load in each operation mode. FIG. 11 is a circuit diagram showing a configuration of a power supply system according to a third embodiment. FIG. 44 is a schematic circuit diagram showing a first configuration example of the variable DC voltage source shown in FIG. 43. FIG. 44 is a schematic circuit diagram showing a second configuration example of the variable DC voltage source shown in FIG. 43. It is a conceptual diagram for demonstrating the operation mode selection of the power converter in the power supply system according to Embodiment 3. FIG. FIG. 11 is a circuit diagram showing a modification of the configuration of the power supply system according to the third embodiment. In the power converter according to the present embodiment, it is an example of a waveform diagram of a switching element when a dead time is provided when switching on and off alternately switching elements. FIG. 49 is an example of a waveform diagram of a switching element when an overlap time is provided by switching control according to the fourth embodiment instead of the dead time in FIG. 48. It is an operation | movement waveform diagram of the power supply system at the time of applying the switching control according to this Embodiment 4. It is a block diagram explaining the control structure for switching control according to this Embodiment 4. FIG. It is a circuit diagram explaining the circuit structure of the power converter according to this Embodiment 5. FIG.

  Embodiments of the present invention will be described below in detail with reference to the drawings. In the following, the same or corresponding parts in the drawings are denoted by the same reference numerals, and the description thereof will not be repeated in principle.

[Embodiment 1]
(Circuit configuration)
FIG. 1 is a circuit diagram showing a configuration of a power supply system according to an embodiment of the present invention.

  Referring to FIG. 1, power supply system 5 includes DC power supply B <b> 1, DC power supply B <b> 2, power converter 10, and control device 100.

  In the present embodiment, DC power supplies B1 and B2 are constituted by power storage devices such as secondary batteries and electric double layer capacitors. For example, DC power supply B1 is comprised with secondary batteries, such as a lithium ion secondary battery and a nickel metal hydride battery. The DC power source B2 is constituted by a DC voltage source element having excellent output characteristics such as an electric double layer capacitor and a lithium ion capacitor. The DC power supply B1 and the DC power supply B2 correspond to “first DC power supply” and “second DC power supply”, respectively.

  The power converter 10 is configured to control a DC voltage VH (hereinafter also referred to as an output voltage VH) between the high voltage side power line PL and the low voltage side power line NL. The power line NL is typically constituted by a ground wiring.

  The load 30 operates by receiving the output voltage VH of the power converter 10. Voltage command value VH * of output voltage VH is set to a voltage suitable for the operation of load 30. Voltage command value VH * may be variably set according to the state of load 30. Furthermore, the load 30 may be configured to be able to generate charging power for the DC power sources B1 and / or B2 by regenerative power generation or the like.

  Power converter 10 includes power semiconductor switching elements S1 to S6 and reactors L1 and L2. In the present embodiment, an IGBT (Insulated Gate Bipolar Transistor), a power MOS (Metal Oxide Semiconductor) transistor, a power bipolar transistor, or the like is used as a power semiconductor switching element (hereinafter also simply referred to as “switching element”). be able to.

  Switching elements S1 to S6 are controlled to be turned on and off in response to control signals SG1 to SG5 from control device 100, respectively. Hereinafter, the switching elements S1 to S6 are each in an on state when the control signals SG1 to SG6 are at a logic high level (hereinafter also referred to as “H level”), so that a current path can be formed. On the other hand, the switching elements S1 to S6 are turned off when the control signals SG1 to SG6 are at a logic low level (hereinafter also referred to as “L level”), and the current path is cut off.

  Switching element S1 is electrically connected between nodes N1 and N2. The switching element S1 forms a current path from the node N1 to the node N2 when turned on, and blocks the current path when turned off. Switching element S4 is electrically connected between nodes N1 and N2 in antiparallel with switching element S1. The switching element S1 forms a current path from the node N2 to the node N1 when turned on, and blocks the current path when turned off.

  DC power supply B2 and reactor L2 are electrically connected in series between nodes N1 and N2. Similarly, DC power supply B1 and reactor L1 are electrically connected in series between node N2 and power line NL.

  Switching element S3 is electrically connected between node N2 and power line NL. The switching element S3 forms a current path from the node N2 to the power line NL when turned on, and cuts off the current path when turned off. Switching element S2 is electrically connected between node N2 and power line NL in antiparallel with switching element S3. The switching element S2 forms a current path from the power line NL to the node N2 when turned on, and blocks the current path when turned off.

  Switching element S5 is electrically connected between node N1 and power line PL. Switching element S5 forms a current path from node N1 to power line PL when turned on, and blocks the current path when turned off. The switching element S5 functions as a switch that turns on and off the power running current supplied to the load 30.

  Switching element S6 is electrically connected between node N1 and power line PL in antiparallel with switching element S5. Switching element S6 forms a current path from power line PL to node N1 when turned on, and blocks the current path when turned off. The switching element S5 functions as a switch for turning on and off the regenerative current supplied from the load 30.

  In the configuration example of FIG. 1, the switching elements S1 to S6 correspond to “first semiconductor element” to “sixth semiconductor element”, respectively. In the configuration example of FIG. 1, each of “first semiconductor element” to “sixth semiconductor element” is configured by a switching element capable of controlling the formation and blocking of a current path. Reactors L1 and L2 correspond to “first reactor” and “second reactor”, respectively.

  Further, in the configuration example of FIG. 1, each of the pair of switching elements S1 and S4, the pair of switching elements S2 and S3, and the pair of switching elements S5 and S6 connected in antiparallel is a reverse blocking IGBT module or the like. The bidirectional switches 11 to 13 can be configured as one module.

  The control device 100 is configured by, for example, an electronic control unit (ECU) having a CPU (Central Processing Unit) and a memory (not shown). The control device 100 is configured to perform arithmetic processing using detection values from the respective sensors based on a map and a program stored in the memory. Alternatively, at least a part of the control device 100 may be configured to execute predetermined numerical / logical operation processing by hardware such as an electronic circuit.

  Control device 100 generates control signals SG1 to SG6 for controlling on / off of switching elements S1 to S6 in order to control output voltage VH according to voltage command value VH *. Although not shown in FIG. 1, the voltage (denoted as V1) and current (denoted as I1) and the voltage (denoted as V2) and current (denoted as I2) of the DC power supply B2 And a detector (voltage sensor) for the output voltage VH is provided. The outputs of these detectors are given to the control device 100.

FIG. 2 is a schematic diagram showing a configuration example of the load 30 shown in FIG.
Referring to FIG. 2, load 30 is configured to include, for example, a traveling motor for an electric vehicle. Load 30 includes a smoothing capacitor CH, an inverter 32, a motor generator 35, a power transmission gear 36, and drive wheels 37.

  The motor generator 35 is a traveling motor for generating vehicle driving force, and is constituted by, for example, a multi-phase permanent magnet type synchronous motor. The output torque of the motor generator 35 is transmitted to the drive wheels 37 via a power transmission gear 36 constituted by a speed reducer and a power split mechanism. The electric vehicle travels with the torque transmitted to the drive wheels 37. Further, the motor generator 35 generates power by the rotational force of the drive wheels 37 during regenerative braking of the electric vehicle. This generated power is AC / DC converted by the inverter 32. This DC power can be used as charging power for DC power supplies B1 and B2 included in the power supply system 5.

  In a hybrid vehicle in which an engine (not shown) is mounted in addition to the motor generator, vehicle driving force required for the electric vehicle is generated by cooperatively operating the engine and the motor generator 35. At this time, it is also possible to charge the DC power sources B1 and B2 using the power generated by the rotation of the engine.

  As described above, the electric vehicle comprehensively represents a vehicle equipped with a traveling motor, and includes both a hybrid vehicle equipped with an engine and an electric motor, an electric vehicle not equipped with an engine, and a fuel cell vehicle. .

(Operation of power converter)
Similarly to the power converter described in Patent Document 2, the power converter 10 has a plurality of different DC power conversion (DC / DC conversion) modes between the DC power supplies B1 and B2 and the power lines PL and NL. It has an operation mode. These operation modes are selectively applied by switching the mode of on / off control of the switching element.

  In the first embodiment, a circuit operation of a power running operation (at the time of supplying current to the load 30) is described for each of a plurality of operation modes of the power converter 10.

  FIG. 3 shows a block diagram for selecting an operation mode of the power converter in the power supply system according to the present embodiment. Furthermore, FIG. 4 shows a chart for explaining a plurality of operation modes of the power converter shown in FIG.

  Referring to FIG. 3, control device 100 includes a required voltage setting unit 102 and a mode selection unit 104. Each function block in each block diagram including FIG. 3 has its function realized by software processing by the control device 100 (ECU) by executing a predetermined program and / or hardware processing by a dedicated electronic circuit. Shall be.

  The required voltage setting unit 102 sets the required load voltage VHrq according to the operating state of the load 30.

  Here, the output voltage VH supplied to the load 30 needs to be set to a certain voltage or higher according to the operating state of the load 30. As illustrated in FIG. 2, when the load 30 includes the motor generator 35, the output voltage VH corresponding to the DC link side voltage of the inverter 32 is a coil winding (not shown) of the motor generator 35. It is necessary to be higher than the induced voltage generated in (1).

  Further, in the torque control of the motor generator 35, the current phase when outputting the same torque varies depending on the DC link voltage (output voltage VH) of the inverter 32. Further, the ratio of the output torque to the current amplitude in the motor generator 35, that is, the motor efficiency changes according to the current phase. Therefore, when the torque command value of motor generator 35 is set, the optimum current phase at which the efficiency at motor generator 35 is maximized, that is, the power loss at motor generator 35 is minimized, corresponding to the torque command value. And an output voltage VH for realizing the optimum current phase can be determined.

  Considering these factors, the load request voltage VHrq relating to the output voltage VH can be set as the operating state of the load 30 based on the rotation speed and torque of the motor generator 35. As described above, when the induced voltage of the motor generator 35 is taken into consideration, in order to control the load 30, it is necessary to set at least the range of VH ≧ VHrq. Furthermore, if VH = VHrq, loss at the load 30 can be suppressed. Note that as the operating state of the load 30, it is also possible to set the load request voltage VHrq using the operating state (vehicle speed, accelerator opening, etc.) of the electric vehicle on which the motor generator 35 is mounted.

  The mode selection unit 104 selects an operation mode based on the load request voltage VHrq and the load power command value PL * obtained according to the operation state of the load 30 and the operation states (power supply states) of the DC power supplies B1 and B2. select. The mode selection unit 104 generates a mode selection signal MD indicating the selection result of the operation mode.

  The load power command value PL * corresponds to the load power PL when the load 30 operates according to the operation command. For example, load power command value PL * can be obtained from the rotational speed of motor generator 35 and the torque command value. In Embodiment 1, since only the power running operation is described, PL *> 0.

  Referring to FIG. 4, a plurality of operation modes selected by mode selection signal MD include a parallel connection mode (hereinafter also referred to as PB mode), a series connection mode (hereinafter also referred to as SB mode), and a direct power supply mode. (Hereinafter also referred to as DS mode). The DS mode in the power converter 10 corresponds to the “first direct power supply mode”.

  In the PB mode, parallel DC / DC conversion is performed between the DC power supplies B1 and B2 and the power lines PL and NL. In the PB mode, the output voltage VH can be controlled within a range from max (V1, V2) to an upper limit voltage VHmax that is a control upper limit value of the output voltage VH (max (V1, V2) ≦ VH ≦ VHmax). . For max (V1, V2), when V1> V2, max (V1, V2) = V1, and when V2> V1, max (V1, V2) = V2. Further, the upper limit voltage VHmax is an upper limit value determined in consideration of the breakdown voltage of the component.

  In the SB mode, DC / DC conversion is performed between the DC power supplies B1 and B2 connected in series and the power lines PL and NL. In the SB mode, since the output voltage VH cannot be set lower than (V1 + V2), the output voltage VH can be controlled within the range from (V1 + V2) to the upper limit voltage VHmax (V1 + V2 <VH ≦ VHmax). .

  In PB mode and SB mode, output voltage VH between power lines PL and NL is controlled according to voltage command value VH * with on / off control of switching elements S1 to S6. The on / off control of the switching elements S1 to S6 in each mode will be described later.

  On the other hand, in the DS mode, on / off of switching elements S1 to S6 is fixed so that DC power supplies B1 and B2 are connected in series between power lines PL and NL. In the DS mode, the output voltage VH is determined depending on the voltages V1 and V2 of the DC power supplies B1 and B2, and thus cannot be directly controlled (fixed to VH = V1 + V2).

  For this reason, in the DS mode, the output voltage VH cannot be set to a voltage suitable for the operation of the load 30, which may increase the power loss in the load 30. On the other hand, in the DS mode, since the switching elements S1 to S6 are not turned on / off, the power loss of the power converter 10 is greatly suppressed. Therefore, depending on the operating state of the load 30, application of the DS mode increases the power loss decrease amount in the power converter 10 more than the power loss increase amount of the load 30, thereby reducing the power loss in the entire power supply system 5. There is a possibility that it can be suppressed.

  For example, the mode selection unit 104 operates in such a manner that the loss of the entire power supply system 5 is minimized from among the operation modes in which VH ≧ VHreq in consideration of the limitation of the VH range that can be output in each operation mode. A mode can be selected.

  Next, the circuit operation of the power converter 10 in each operation mode will be described. First, circuit operation and control in the PB mode will be described with reference to FIGS.

(Circuit operation and control in PB mode)
5 and 6 show an operation for output control (first DC power supply) of the DC power supply B1.

  Referring to FIG. 5, by turning on switching element S3, a current path 61 when the lower arm of the step-up chopper is turned on can be formed for DC power supply B1. Current path 61 is formed such that current IL1 of reactor L1 (hereinafter also referred to as reactor current IL1) flows through DC power supply B1, reactor L1, node N2, switching element S3 (ON), and power line NL. Thereby, the electric power output from DC power supply B1 is accumulate | stored in the reactor L1 as electromagnetic energy.

  Referring to FIG. 6, by turning off switching element S3 while turning on switching elements S4 and S5, current path 63 is formed for DC power supply B2 when the upper arm of the boost chopper is turned on. Can do. Thereby, the sum of the electric power output from DC power supply B1 and the electric power by the electromagnetic energy accumulated in reactor L1 during the upper arm on period is output to power line PL.

  7 and 8 show operations for output control of the DC power supply B2 (second DC power supply).

  Referring to FIG. 7, by turning on switching element S1, it is possible to form a current path 62 when the lower arm of the boost chopper is turned on with respect to DC power supply B2. Current path 62 is formed such that current IL2 of reactor L2 (hereinafter also referred to as reactor current IL2) flows through DC power supply B2, reactor L2, node N1, switching element S1 (ON), and node N2. Thereby, the electric power output from DC power supply B2 is accumulate | stored in the reactor L2 as electromagnetic energy.

  Referring to FIG. 8, switching element S1 is turned off while switching elements S2 and S5 are turned on to form a current path 64 for DC power supply B2 when the upper arm of the boost chopper is turned on. Can do. Thereby, the sum of the electric power output from DC power supply B2 and the electric power by the electromagnetic energy accumulated in reactor L2 during the upper arm on period is output to power line PL.

  As understood from FIGS. 5 to 8, for DC power supply B <b> 1, switching element S <b> 3 forms a lower arm element, while switching element S <b> 4 forms an upper arm element. Similarly, for DC power supply B2, switching element S1 forms a lower arm element, while switching element S2 forms an upper arm element. Switching element S5 constitutes a switch (powering switch) for turning on / off the powering current from DC power supplies B1, B2 to load 30.

  FIG. 9 is a waveform diagram for explaining an example of the control operation of the switching element in the PB mode. In FIG. 9, a common (same frequency and same phase) carrier wave CW is provided for PWM control of the DC power sources B1 and B2.

  Referring to FIG. 9, control pulse signal SD1 is generated based on a voltage comparison between duty ratio DT1 for controlling the output of DC power supply B1 and carrier wave CW. Similarly, control pulse signal SD2 is generated based on a comparison between duty ratio DT2 for controlling the output of DC power supply B2 and carrier wave CW. Control pulse signals / SD1, / SD2 are inverted signals of control pulse signals SD1, SD2, respectively. An example of calculating the duty ratios DT1 and DT2 will be described later.

  FIG. 10 shows a gate logical expression for setting a control signal for each switching element in the PB mode.

  Control pulse signal SD1 is set to H level when duty ratio DT1 is higher than carrier wave CW. For this reason, the control signal SG3 of the switching element S3 that forms the lower arm element with respect to the DC power supply B1 is set according to the control pulse signal SD1. On the other hand, the control signal SG4 of the switching element S4 that forms the upper arm element with respect to the DC power supply B1 is set according to the control pulse signal / SD1.

  Similarly, control pulse signal SD2 is set to H level when duty ratio DT2 is higher than carrier wave CW. For this reason, the control signal SG1 of the switching element S1 that forms the lower arm element with respect to the DC power supply B2 is set according to the control pulse signal SD2. On the other hand, control signal SG2 of switching element S2 that forms the upper arm element with respect to DC power supply B2 is set according to control pulse signal / SD2.

  In the first embodiment, since the operation of the load 30 in the power running mode is described, the switching element S5 is fixed on, while the switching element S6 is fixed off. Therefore, control signal SG5 of switching element S5 is fixed at the H level, while control signal SG6 of switching element S6 is fixed at the L level.

  As described above, in the PB mode, DC / DC conversion for inputting / outputting DC power in parallel between the DC power supplies B1, B2 and the load 30 (power lines PL, NL) is executed, and then the output voltage VH is set to a voltage command. It can be controlled to the value VH *. In addition, since the DC / DC conversion of the DC power supply B1 and the DC / DC conversion of the DC power supply B2 can be controlled independently, the power distribution ratio k between the DC power supplies B1 and B2 with respect to the total power PH is set in the PB mode. Can be set. Here, it is defined as k = P1 / PH. The power distribution ratio k can be set to an arbitrary value of 0 ≦ k ≦ 1.0.

  Next, control of the power converter in the PB mode will be described using FIG. 11 and FIG. FIG. 11 is a conceptual diagram illustrating voltage control by the power converter 10 in the PB mode, and FIG. 12 is a block diagram illustrating control calculation for power converter control.

  Referring to FIG. 11, each of electric power P1 of DC power supply B1 and electric power P2 of DC power supply B2 is shown as a positive value (P1> 0, P2> 0) during discharging, and is negative (P1 <0, It is assumed that P2 <0). The load power PL consumed by the load 30 is also indicated by a positive value (PL> 0) during the power running operation of the load 30, and is indicated by a negative value (PL <0) during the regenerative operation of the load 30. The total power PH of DC power supplies B1 and B2 is represented by the sum of powers P1 and P2 (PH = P1 + P2).

  Focusing on the power transfer in the smoothing capacitor CH connected between the power lines PL and NL, the output voltage VH rises when the total power PH is larger than the load power PL (PH> PL), while PH <PL Decreases in condition. Therefore, in the power converter control in the PB mode, the command value of the total power PH is set according to the voltage deviation ΔVH of the output voltage VH with respect to the voltage command value VH *. Furthermore, by distributing the total power PH between the powers P1 and P2 according to the power distribution ratio k, the outputs of the DC power supplies B1 and B2 can be power controlled (current controlled).

  Referring to FIG. 12, control unit 150a for controlling power converter 10 in the PB mode includes voltage controller 152, power distribution ratio setting unit 155, multiplication unit 158, and subtraction units 159, 166, and 168. And division units 160 and 165, current controllers 170 and 175, and a PWM control unit 200a.

  Based on the voltage deviation (ΔVH = VH * −VH) of the output voltage VH, the voltage controller 152 calculates a power command value PH * of the total power PH required for voltage control. For example, voltage controller 152 sets PH * according to the following equation (1) by PI calculation.

PH * = Kp · ΔVH + Σ (Ki · ΔVH) (1)
In Expression (1), Kp is a proportional control gain, and Ki is an integral control gain. These control gains also reflect the capacitance value of the smoothing capacitor CH. By setting power command value PH * in accordance with equation (1), feedback control for reducing voltage deviation ΔVH can be realized.

  Alternatively, when the load power PL can be predicted from the operating state of the load 30, the predicted value PL * can be further reflected to set the power command value PH * according to the equation (2). In this way, the output voltage VH can be controlled in a form that feeds forward power consumption at the load 30.

PH * = Kp · ΔVH + Σ (Ki · ΔVH) + PL * (2)
The power distribution ratio setting unit 155 sets the power distribution ratio k in the PB mode. The power distribution ratio k is based on the state of the DC power sources B1 and B2 (for example, the balance of SOC (State of Charge) or charge / discharge upper limit power) or the output power level (PH) according to a predetermined map or the like. I can decide.

  Multiplier 158 calculates power command value P1 * of DC power supply B1 according to multiplication of power command value PH * set by voltage controller 152 and power distribution ratio k set by power distribution ratio setting unit 155. To do. Subtraction unit 159 calculates power command value P2 * of DC power supply B2 by subtracting power command value P1 * from power command value PH *. In this way, the power command values P1 * and P2 * for the DC power supplies B1 and B2 are set.

In general, for power P1 and P2 of DC power supplies B1 and B2, upper limit values of charging power and discharging power are respectively set based on SOC, temperature, and the like. Therefore, although not shown, the power command values P1 * and P2 * are set so as to be within a range not exceeding the upper limit value of the charge / discharge power of the DC power sources B1 and B2. In addition, power command value PH * is set so as not to exceed the upper limit range defined by the sum of the upper limit values of the charge / discharge power of DC power supplies B1 and B2. The current command value I1 * of the DC power supply B1 is calculated by dividing the value P1 * by the voltage V1 of the DC power supply B1. Similarly, division unit 165 calculates current command value I2 * of DC power supply B2 by dividing power command value P2 * by voltage V2 of DC power supply B2.

  Subtraction unit 166 calculates current deviation ΔI1 (ΔI1 = I1 * −I1) between current I1 of DC power supply B1 and current command value I1 *. Subtraction unit 168 calculates current deviation ΔI2 (ΔI2 = I2 * −I2) between current I2 of DC power supply B2 and current command value I2 *.

  Current controllers 170 and 175 calculate duty ratios DT1 and DT2 for controlling the outputs of DC power supplies B1 and B2, respectively, by current feedback control based on current deviations ΔI1 and ΔI2. For example, the duty ratios DT1 and DT2 are calculated according to the following formulas (3) and (4) involving PI calculation.

DT1 = Kp · ΔI1 + Σ (Ki · ΔI1) + Dff1 (3)
DT2 = Kp · ΔI2 + Σ (Ki · ΔI2) + Dff2 (4)
In equations (3) and (4), Kp is a proportional control gain, and Ki is an integral control gain. These control gains can be set separately from the equations (1) and (2). Dff1 and Dff2 are feedforward terms according to the theoretical step-up ratio in the step-up chopper, for example, Dff1 = 1.0− (V1 / VH *), Dff2 = 1.0− (V2 / VH *). .

  The PWM controller 200a generates the control pulse signals SD1 and SD2 by the pulse width modulation control described with reference to FIG. 9 based on the duty ratios DT1 and DT2 and the carrier wave CW set by the current controllers 170 and 172. Further, control signals SG1 to SG6 of switching elements S1 to S6 are generated according to control pulse signals SD1 (/ SD1) and SD2 (/ SD2) according to the gate logical expression shown in FIG.

  In this way, the power converter 10 converts the voltage deviation of the output voltage VH into a power command value in the DC / DC conversion in the PB mode, and performs current control on the outputs of the DC power supplies B1 and B2. The output voltage VH can be controlled to the voltage command value VH *. Further, the power distribution ratio k between the DC power supplies B1 and B2 can be easily controlled.

  Alternatively, in the PB mode, as described in Patent Document 2, one output of the DC power supplies B1 and B2 is controlled to compensate for the voltage deviation ΔVH (ΔVH = VH * −VH) of the output voltage VH (voltage It is also possible to control (current control) the other output of the DC power supplies B1 and B2 so as to compensate for the current deviation of the current I1 or I2. Also in this case, the current control command value (I1 * or I2 *) can be set so as to control the output power of the power source, so that the power distribution ratio k between the DC power sources B1 and B2 is controlled. Is possible.

  Furthermore, even if the lower arm on period (FIG. 5) of the DC power supply B1 and the upper arm on period (FIG. 8) of the DC power supply B2 overlap, the current directions between the node N2 and the power line NL where the current paths 61 and 64 overlap each other. Is the opposite, the conduction loss in the switching elements S2 and S3 is reduced. Similarly, even if the lower arm on period (FIG. 7) of the DC power supply B2 and the upper arm ON period (FIG. 6) of the DC power supply B1 overlap, currents between the nodes N1 and N2 where the current paths 62 and 63 overlap each other. Since the directions are opposite, the conduction loss in the switching elements S1 and S4 is reduced.

  Further, even if the upper arm on period (FIGS. 6 and 8) overlaps between DC power supplies B1 and B2, current paths 63 and 64 do not overlap except for switching element S6 that is a power running switch. Similarly, even if the lower arm on period (FIGS. 5 and 7) overlaps between DC power supplies B1 and B2, current paths 61 and 62 do not overlap each other.

  Thus, in power converter 10 according to the present embodiment, in the PB mode, the current due to DC / DC conversion related to DC power supply B1 and the current due to DC / DC conversion related to DC power supply B2 are shared switching elements. The phenomenon that the conduction loss of the switching element increases due to overlapping flows does not occur. Therefore, DC / DC conversion can be executed with high efficiency.

(Circuit operation and control in SB mode)
Next, the circuit operation and control in the SB mode will be described with reference to FIGS.

13 to 15 are circuit diagrams for explaining the operation of the power converter in the SB mode. Referring to FIG. 13, by turning on switching elements S1 and S3, current paths 61 and 62 for storing energy in reactors L1 and L2 are formed for each of DC power supplies B1 and B2 connected in series. The Current paths 61 and 62 are similar to those shown in FIGS. As a result, the state in which the lower arm element of the boost chopper circuit is turned on is formed with respect to the DC power sources B1 and B2 connected in series. Referring to FIG. 14, switching elements S1 and S3 are turned off, By turning on S2, S4 and S5, a current path 65 is formed. Thereby, the sum of the energy from DC power supplies B1 and B2 connected in series and the energy accumulated in reactors L1 and L2 is output to power line PL. As a result, a state in which the upper arm element of the step-up chopper circuit is turned on is formed for the DC power sources B1 and B2 connected in series.

  The current path 65 is a current path when IL1 = IL2. At this time, no current flows through the switching elements S2 and S4.

  However, when the voltages V1 and V2 are different, or when the inductance values of the reactors L1 and L2 are different, the reactor current IL1 is turned on when the switching elements S1, S3 are turned off and the switching elements S2, S4, S5 are turned on. And IL2 are considered to be different values.

  For example, as shown in FIG. 15, when IL1> IL2, the path of the reactor current IL1 is secured by the current path 67 when the switching element S4 is turned on.

  As described above, in the SB mode, DC / DC conversion between the DC voltage (Va + Vb) and the output voltage VH is executed by the boost chopper circuit shown in FIGS. Therefore, in the SB mode DC / DC conversion, the relationship expressed by the following equation (3) is established between the voltages V1 and V2 of the DC power supplies B1 and B2 and the output voltage VH. In equation (5), the duty ratio of the lower arm elements (switching elements S1, S3) during the ON period is Ds.

VH = 1 / (1-Ds). (V1 + V2) (5)
FIG. 16 is a waveform diagram for explaining an example of the control operation of the switching element in the SB mode.

  Referring to FIG. 16, in the SB mode, control pulse signal SDs is generated based on a comparison between duty ratio DTs for controlling output voltage VH to voltage command value VH * and carrier wave CW. The control pulse signal / SDs is an inverted signal of the control pulse signal SDs.

  FIG. 17 shows a gate logical expression for setting a control signal for each switching element in the SB mode.

  Referring to FIG. 17, control pulse signal SDs is set to the H level when duty ratio DTs is higher than carrier wave CW. For this reason, control signals SG1 and SG3 of switching elements S1 and S3 that form lower arm elements for DC power supplies B1 and B2 connected in series are set according to control pulse signal SDs. In contrast, control signals SG2 and SG4 of switching elements S2 and S4 that form upper arm elements for DC power supplies B1 and B2 connected in series are set according to control pulse signal / SDs.

  In the powering mode of the load 30 described in the first embodiment, as in the PB mode, the switching element S5 that constitutes the powering switch is fixed on, while the switching element S6 that constitutes the regenerative switch is fixed off. Is done. Therefore, also in the SB mode, control signal SG5 of switching element S5 is fixed to H level, while control signal SG6 of switching element S6 is fixed to L level.

  FIG. 16 shows the operation when the rising rate of reactor current IL1 indicated by the solid line is higher than the rising rate of reactor current IL2 indicated by the dotted line during the on period of the lower arm elements (switching elements S1 and S3). An example is shown.

  At this time, if the reactor currents IL1 and IL2 turn down in response to the turn-off of the lower arm elements (switching elements S1 and S3) and the turn-on of the upper arm elements (switching elements S2 and S4), IL1> IL2. Reactor currents IL1 and IL2 flow through current paths 67 and 65 shown in FIG. Then, reactor current IL1 gradually approaches IL2, and when IL1 = IL2, only current path 65 shown in FIG. 14 is formed. In addition, illustration is abbreviate | omitted. On the other hand, when IL1 <IL2, the path of the reactor current IL2 is secured by the current path formed by turning on the switching element S2.

  FIG. 18 is a block diagram illustrating a control calculation for power converter control in the SB mode.

  Referring to FIG. 18, control unit 150b for controlling power converter 10 in the SB mode includes a subtraction unit 192, a voltage controller 195, and a PWM control unit 200b.

  The subtraction unit 192 calculates a voltage deviation ΔVH (ΔVH = VH * −VH) between the output voltage VH and the voltage command value VH *.

  The voltage controller 195 uses a combination of the duty ratio Ds by feedforward control according to the equation (5) and the duty ratio by feedback control for compensating for the voltage deviation ΔVH based on the voltages V1, V2 and the voltage command value VH *. The duty ratio DTs in the SB mode can be calculated.

  The PWM control unit 200b generates the control pulse signal SDs by the pulse width modulation control described with reference to FIG. 16 based on the duty ratio DTs and the carrier wave CW set by the voltage controller 195. Further, control signals SG1 to SG6 of switching elements S1 to S6 are generated according to control pulse signals SDs and / SDs in accordance with the gate logical expression shown in FIG.

  Thus, in the SB mode, power converter 10 can control output voltage VH to voltage command value VH * by controlling the step-up ratio from voltage (V1 + V2). Since the boost ratio (VH / V1 + V2) in the SB mode is suppressed more than the boost ratios VH / V1 and VH / V2 in the PB mode, the loss in the reactors L1 and L2 can be suppressed by reducing the current ripple. As a result, the efficiency of DC / DC conversion in the power converter 10 can be increased.

  In the SB mode, DC / DC conversion is performed with the power line PL (load 30) in a state where the DC power sources B1 and B2 are connected in series. Therefore, the power P1 of the DC power source B1 and the DC power source B2 The power P2 cannot be directly controlled. That is, the ratio of the electric power P1 and P2 of the DC power supplies B1 and B2 is automatically determined according to the following equation (6) according to the ratio of the voltages V1 and V2.

P1: P2 = V1: V2 (6)
(Circuit operation and control in DS mode)
FIG. 19 is a circuit diagram for explaining the operation of the power converter in the DS mode, and FIG. 20 is a chart for explaining a gate logical expression for setting a control signal of each switching element in the DS mode. Furthermore, FIG. 21 shows an equivalent circuit diagram of the power converter 10 in the DS mode.

  Referring to FIG. 19, in the DS mode, switching elements S1 to S4 and S6 are fixed to off, and only switching element S5 is fixed to on. As a result, as shown in the equivalent circuit diagram of FIG. 21, the state where the DC power sources B1 and B2 connected in series are electrically connected between the power lines PL and NL is maintained, and the current path 65 is continuously provided. It is formed.

  Therefore, as shown in FIG. 20, in the DS mode, control signals SG1 to SG4 and SG6 of switching elements S1 to S4 and S6 are fixed to the L level. On the other hand, the control signal SG5 of the switching element S5 is fixed at the H level.

  In the DS mode, the output voltage VH is determined depending on the voltages V1 and V2 of the DC power supplies B1 and B2 (VH = V1 + V2) and cannot be directly controlled. However, since ON / OFF of switching elements S1 to S6 is fixed, in power converter 10, loss due to ON / OFF of the switching elements (switching loss) does not occur. Further, the conduction loss of the switching element occurs only in one switching element (S6). For this reason, in the DS mode, the loss in the power converter 10 is significantly suppressed, so that high efficiency can be achieved.

  As described above in the first embodiment, according to the configuration of power converter 10 according to the present embodiment, a plurality of operation modes (PB mode, SB) are achieved by a smaller number of semiconductor elements than in Patent Document 2. DC / DC conversion in which the mode and the DS mode are switched can be executed with high efficiency corresponding to at least the power running operation of the load 30. In particular, in each mode, it is possible to increase efficiency by suppressing loss (particularly conduction loss) in the power converter as compared with the power converter disclosed in Patent Document 2.

[Modification of Embodiment 1]
In the modification of the first embodiment, carrier wave phase control (hereinafter referred to as carrier phase control) in pulse width modulation control in PB mode in which output control is performed on both DC power supplies B1 and B2 will be described.

  FIG. 22 shows a control operation example of the switching element of the power converter in the PB mode when the carrier phase control is applied.

  Referring to FIG. 22, in the modification of the first embodiment to which carrier phase control is applied, carrier wave CW1 for PWM control of DC power supply B1 and carrier wave CW2 for PWM control of DC power supply B2 Are generated as separate signals of the same frequency. Further, the phase difference φ between the carrier waves CW1 and CW2 is adjusted. On the other hand, the waveform diagram shown in FIG. 9 corresponds to φ = 0 degrees.

  Even if the phases of the carrier waves CW1 and CW2 are changed, the ratio of the H level period of the control pulse signals SD1 and SD2 obtained by comparison with the duty ratios DT1 and DT2 does not change. Therefore, the average values of reactor currents IL1 and IL2 do not change. That is, the outputs of DC power supplies B1 and B2 are controlled by duty ratios DT1 and DT2, and there is no effect even if phase difference φ between carrier waves CW1 and CW2 is changed.

  On the other hand, it is understood that the phase relationship (current phase) between reactor current IL1 and reactor current IL2 changes by changing phase difference φ between carrier waves CW1 and CW2. For this reason, in the modification of the first embodiment, in the PB mode, power loss in switching elements S1 to S6 is reduced by carrier phase control that appropriately adjusts phase difference φ between carrier waves CW1 and CW2.

  Inflection points occur in reactor currents IL1 and IL2 in response to the edges of control pulse signals SD1 (/ SD1) and SD2 (/ SD2) according to duty ratios DT1 and DT2. At the edge where the control pulse signal SD1 changes from the L level to the H level, the minimum point of the reactor current IL1 (inflection point where the current changes from the decrease to the increase) occurs, and at the edge where the current changes from the H level to the L level, A local maximum point (an inflection point where the current turns from rising to lowering) occurs.

  Similarly, a minimum point of reactor current IL2 is generated corresponding to the edge at which control pulse signal SD2 transitions from the L level to the H level, and in response to the edge transitioning from the H level to the L level, reactor current IL2 A maximum point is generated.

  23 to 25 are circuit diagrams for explaining current paths in each period of FIG.

  FIG. 23 is a diagram illustrating a current path between time ta and tb in FIG. 22, that is, a period in which reactor current IL2 increases while reactor current IL1 decreases.

  Referring to FIG. 23, for reactor current IL1, a current path 63 is formed when the upper arm element of the step-up chopper is turned on by turning on switching element S4. On the other hand, for reactor current IL2, a current path 62 is formed when the lower arm element of the step-up chopper is turned on by turning on switching element S1. Further, the switching element S5 corresponding to the power running switch is also turned on.

  In the state of FIG. 23, it is understood that the conduction loss and the switching loss can be reduced because the currents in the opposite directions pass through the switching elements S1 and S4 connected in parallel. A current corresponding to the total power PH flows through the switching element S5. On the other hand, since no current flows through the switching elements S2, S3, S6, no conduction loss occurs.

  FIG. 24 shows a current path between time tb and tc in FIG. 22, that is, a period in which reactor current IL1 rises while reactor current IL2 falls.

  Referring to FIG. 24, for reactor current IL1, a current path 61 is formed when the lower arm element of the step-up chopper is turned on by turning on switching element S3. On the other hand, for reactor current IL2, by turning on switching element S2, current path 64 when upper arm element is turned on is formed.

  In the state of FIG. 24, currents in different directions flow in switching elements S2 and S3 connected in parallel. Therefore, conduction loss and switching loss in the switching elements S2 and S3 are reduced. On the other hand, no conduction loss occurs in the switching elements S1, S4, and S6.

  FIG. 25 shows a current waveform between times tc and td in FIG. 22, that is, a period in which both reactor currents IL1 and IL2 are rising.

  Referring to FIG. 25, by turning on switching elements S1 and S3, current paths 61 and 62 when the lower arm element of the boost chopper is turned on are formed for reactor currents IL1 and IL, respectively. Yes. At this time, conduction losses corresponding to reactor currents IL2 and IL1 occur in switching elements S1 and S2. On the other hand, no conduction loss occurs for other switching elements because no current flows.

  23 to 25, a path is formed in which the reactor currents IL1 and IL2 cancel each other in a period in which the polarities of the slopes of the reactor currents IL1 and IL2 are opposite as shown in FIGS. As a result, the conduction loss and the switching loss can be reduced. Therefore, in the PB mode during the power running operation, the phases of reactor currents IL1 and IL2 are matched on the time axis with respect to the phases of reactor currents IL1 and IL2, so that the period shown in FIG. Thus, by controlling the phase difference φ, power loss in the switching element can be suppressed.

  For example, as shown in FIG. 22, the phase difference φ of the carrier wave can be controlled so that the current phase is such that the minimum point of reactor current IL1 and the maximum point of reactor current IL2 coincide. In this way, in one cycle of carrier waves CW1 and CW2, it is possible to secure the maximum period during which the characteristics of the slopes of reactor currents IL1 and IL2 are opposite over the period from time ta to tc.

  Further, through FIGS. 23 to 25, in the PB mode of the power converter 10, in any of the switching elements S1 to S6, the phenomenon that the conduction loss increases due to the reactor currents IL1 and IL2 overlapping so as to be intensified does not occur. It is understood.

  In the waveform diagram of FIG. 22, as a result of controlling the phase difference φ as described above, a boost chopper is provided for each period during which both reactor currents IL1 and IL2 decrease, that is, reactor currents IL1 and IL2. There is no period for turning on the upper arm element. In such a period, the current path 63 shown in FIG. 6 and the current path 64 shown in FIG. 8 are formed.

  Also in this case, reactor current IL1 flows through switching elements S4 and S5, while reactor current IL2 flows through S2 and S5. Therefore, as in the period in which both reactor currents IL1 and IL2 rise as shown in FIG. 25, the effect of suppressing conduction loss due to cancellation of reactor currents IL1 and IL2 does not occur, but switching element S5 serving as a power running switch Except for, it is understood that the conduction loss does not increase due to the overlap of reactor currents IL1 and IL2.

  FIG. 26 is a functional block diagram for illustrating a configuration related to PWM control to which carrier phase control according to the modification of the first embodiment is applied.

  Referring to FIG. 26, in the modification of the first embodiment, a carrier phase control unit 190 is further provided in addition to the configuration of FIG. Carrier phase control section 190 generates carrier waves CW1 and CW2 shown in FIG. 22 after adjusting phase difference φ.

  As understood from FIG. 22, the control pulse signals SD1 and SD2 change according to the duty ratios DT1 and DT2. Therefore, it can be understood that the phase difference φ capable of realizing the current phase as shown in FIG. 22 can be determined according to the duty ratios DT1 and DT2. Therefore, a phase difference for realizing a current phase such that the maximum point of reactor current IL1 and the minimum point of reactor current IL2 or the minimum point of reactor current IL1 and the maximum point of reactor current IL2 coincide on the time axis. It is possible to obtain the relationship between φ and the duty ratios DT1 and DT2 in advance and store the correspondence as a map or a function expression in advance.

  The carrier phase control unit 190 sets an appropriate phase difference φ according to the map or the relational expression based on the duty ratios DT1 and DT2 calculated according to the power converter control (FIG. 12) in the PWM mode, and the phase difference Carrier waves CW1 and CW2 can be generated according to φ.

  The PWM controller 200a generates control pulse signals SD1 (/ SD1) and SD2 (/ SD2) by the PWM control shown in FIG. That is, control pulse signal SD1 (/ SD1) is generated based on a voltage comparison between duty ratio DT1 and carrier wave CW1, and control pulse signal SD2 (/ SD2) is generated according to a voltage comparison between duty ratio DT2 and carrier wave CW2. Is done.

  Thus, in the power supply system according to the modification of the first embodiment, the switching in the DC / DC conversion in the PB mode during the power running operation is performed by applying the carrier phase control for realizing the current phase as shown in FIG. By reducing the element loss (conduction loss and / or switching loss), it is possible to further increase the efficiency of power conversion.

[Embodiment 2]
In the first embodiment, the power running operation in each operation mode of the power converter 10 has been described. The power converter 10 can also perform DC / DC conversion with charging of the DC power sources B1 and / or B2 in response to the regenerative operation of the load 30 by a circuit operation as described below. In the second embodiment, circuit operation and control during regeneration in each of the DS mode, the SB mode, and the PB mode described in the first embodiment will be described.

(Regenerative operation in DS mode)
FIG. 27 is a circuit diagram for explaining a current path during the regenerative operation in the DS mode.

  Referring to FIG. 27, during the regenerative operation in DS mode, both DC power supplies B1 and B2 connected in series are charged by the regenerative current from load 30. That is, a current path 65r in which the reactor current IL1 = IL2 is formed, and the current direction is opposite to that of the current path 65 shown in FIG.

  FIG. 28 shows gate logical expressions of control signals SG1 to SG6 of switching elements S1 to S6 during the regenerative operation in the DS mode.

  Referring to FIG. 28, control signal SG6 is fixed at the H level so as to fix switching element S6 to the on state so that current path 65r shown in FIG. 27 is formed. On the other hand, since all of switching elements S1 to S5 are turned off, control signals SG1 to SG5 are fixed at the L level.

  In this manner, the DC power sources B1 and B2 connected in series can be charged by the regenerative current from the load 30 by fixing the on / off states of the switching elements S1 to S6 according to the control signals SG1 to SG6 of FIG. At this time, the output voltage VH of the power line PL becomes VH = V1 + V2, and cannot be freely controlled according to the voltage command value VH *. This is the same as in the DS mode powering operation.

(Regenerative operation in SB mode)
29 and 30 are circuit diagrams for showing current paths during the regeneration operation in the SB mode. FIG. 31 shows a chart showing the gate logic ratios of the control signals SG1 to SG6 during the regeneration operation in the SB mode.

  Referring to FIGS. 29 and 30, during the regeneration operation in the SB mode, the period in which current path 65r shown in FIG. 29 is formed and the period in which current paths 61r and 62r shown in FIG. On / off of the switching elements S1 to S6 is controlled so as to be realized.

  In the SB mode, in order to control the output voltage VH to the voltage command value VH *, the duty ratio of the switching element S6 that is a regenerative switch is controlled. On the other hand, the switching element S5 (power running switch) is maintained in the off state.

  FIG. 29 shows a current path when the switching element S6 is on. When switching element S6 is on, current path 65r is formed such that the regenerative current from load 30 that has passed through switching element S6 charges DC power supplies B1 and B2 connected in series between node N1 and power line NL. The In current path 65r, reactor currents IL1 and IL2 are common. In order to form the current path 65r, it is sufficient that only the switching element S6 is turned on and the switching elements S1 to S5 are turned off.

  FIG. 30 shows a current path when the switching element S6 is off. When the switching element S6 is turned off, the paths of the reactor currents IL1 and IL2 are required while the supply of the regenerative current from the load 30 is stopped. Therefore, by turning on switching elements S2 and S4, current paths 61r and 62r of reactor currents IL1 and IL2 are secured.

  The current path 61r is a current path whose current direction is opposite to that of the current path 61 (FIG. 13) when the lower arm element of the step-up chopper is turned on with respect to the DC power supply B1. Similarly, the current path 62r is a current path having a current direction opposite to that of the current path 62 (FIG. 13) when the lower arm element of the step-up chopper is turned on with respect to the DC power supply B2. The switching elements S2 and S4 are turned on to form the current paths 61r and 62r, while the switching elements S1 and S3 are turned off.

  Therefore, as shown in FIG. 31, during the regeneration operation in the SB mode, control signal SG6 of switching element S6 is set according to control pulse signal / SDs from control unit 150b shown in FIG. On the other hand, control signal SG5 of switching element S5 fixed in the off state is fixed at the L level. Similarly to FIG. 18, the duty ratio DTs in the SB mode is set so as to control the output voltage VH to the voltage command value VH *, and the control pulse signal SDs is generated according to the duty ratio DTs.

  Furthermore, the control signals SG2 and SG4 of the switching elements S2 and S4 are set according to the control pulse signal SDs from the control unit 150b shown in FIG. 18 in order to form the current paths 61r and 62r. Control signals SG1 and SG3 of switching elements S1 and S3 that are fixed in the off state are fixed at the L level.

  Thus, during the regenerative operation in the SB mode, the DC power supplies B1 and B2 are connected in series with the regenerative current while controlling the output voltage VH to the voltage command value VH * by controlling the switching element S6 according to the duty ratio DTs. It is possible to charge by.

(Regenerative operation 1 in PB mode)
Next, the regenerative operation in the PB mode will be described. In power converter 10 according to the present embodiment, in the regeneration operation in the PB mode, only one of DC power sources B1 and B2 is to be charged, and the other DC power source is discharged. First, the regenerative operation for charging the DC power supply B1 will be described with reference to FIGS.

  FIG. 32 is a table for explaining gate logical expressions of control signals SG1 to SG6 of switching elements S1 to S6 during a regenerative operation in the PB mode in which DC power supply B1 is charged.

  Referring to FIG. 32, control pulse signals SD1, / SD1, SD2, and / SD2 are output from output voltage VH to voltage command value VH by control unit 150a shown in FIG. 22 in the same manner as in the PB mode powering operation. * Generated to control.

  During the regenerative operation in the PB mode in which the DC power supply B1 is charged, the switching element S6 that is a regenerative switch needs to operate as an upper arm element of the DC power supply B1. Therefore, control signal SG6 of switching element S6 is set according to control pulse signal / SD1 from control unit 150a shown in FIG.

  The switching element S5 corresponding to the power running switch needs to function as an upper arm element of the DC power source B2 to be discharged. Therefore, control signal SG5 of switching element S5 is set according to control pulse signal / SD2 from control unit 150a (FIG. 22).

  The switching element S2 needs to be turned on and off alternately with the switching element S6 in order to secure a path for the reactor current IL1 when the switching element S6 is turned off. Furthermore, the switching element S2 needs to function as an upper arm element of the DC power source B2 to be discharged. Therefore, control signal SG2 of switching element S2 is set according to the logical sum (OR) of control pulse signals SD1 and / SD2 from control unit 150a shown in FIG.

  The switching element S1 functions as a lower arm element of the DC power supply B2 to be discharged and needs to operate as an upper arm element of the DC power supply B1 to be charged. Therefore, control signal SG1 of switching element S1 is set according to the logical sum (OR) of control pulse signals / SD1 and SD2 from control unit 150a shown in FIG.

  On the other hand, it is not necessary to form the current path 61 (FIG. 5) for storing energy in the reactor L1 for the DC power source B1 to be charged. Therefore, the switching element S3 for forming the current path 61 is maintained in the off state. As a result, the control signal SG3 is fixed at the L level.

  Similarly, it is not necessary to form a current path in the opposite direction to the current path 62 (FIG. 7) for the DC power source B2 to be discharged. Therefore, since switching element S4 is maintained in the OFF state, control signal SG4 is fixed at the L level.

  FIG. 33 shows an operation waveform diagram during the regenerative operation in the PB mode in which the DC power supply B1 is a charge target. In FIG. 33, for comparison, a waveform diagram when the current phase (phase difference φ) is controlled by the carrier phase control as in FIG. 22 is shown.

  In FIG. 33, the reactor current IL1 of the DC power supply B1 to be charged is a regenerative current, that is, a negative current (IL1 <0). Therefore, the reactor current IL1 decreases from time ta to tb, but the charging current (absolute value) increases during this period. On the other hand, the reactor current IL1 increases from time tb to td, but the charging current (absolute value) decreases during this period. On the other hand, reactor current IL2 of DC power supply B2 is a power running current, that is, a positive current (IL2> 0).

  Thereafter, even during the regeneration of the reactor current IL1, in the waveform diagram of FIG. 33, the reactor current IL2 at the time tb is a minimum point (an inflection point where the current starts to increase from the decrease), and the reactor current IL1 at the time tb is It is expressed as a local maximum point (an inflection point at which the current turns from rising to lowering).

  34 to 36 are circuit diagrams for explaining current paths in each period of FIG.

  FIG. 34 shows a current path between time ta and tb in FIG. 33, that is, a period during which reactor current IL1 decreases (charge current increases) while reactor current IL2 increases (discharge current increases). .

  Referring to FIG. 34, a current path 63r of reactor current IL1 for charging DC power supply B1 to be charged by a regenerative current from load 30 is formed by turning on switching elements S1 and S6. The current path 63r has a current direction opposite to that of the current path 63 (FIG. 6) formed during the ON period of the upper arm element of the DC power supply B1 during the power running operation. Thereby, the charging current of DC power supply B1 increases. That is, reactor current IL1 decreases as shown in FIG.

  On the other hand, for the DC power source B2 to be discharged, the current path 62 similar to that in FIG. 7 is formed by turning on the switching element S1 corresponding to the lower arm element. That is, in the period from time ta to tb, the upper arm element is turned on with respect to the DC power supply B1 (charging) and the lower arm element is turned on with respect to the DC power supply B2 (discharging), so that the switching elements S1 and S6 are While being turned on, the other switching elements S2 to S5 are turned off.

  FIG. 35 shows a current path between time tb and tc in FIG. 33, that is, a period during which reactor current IL1 increases (charge current decreases) while reactor current IL2 decreases (discharge current decreases). .

  Referring to FIG. 35, from time tb to tc, switching element S6 is turned off, so that charging of DC power supply B1 is stopped. Reactor current IL1 flows through current path 61r formed when switching element S2 is turned on. The current path 61r has a current direction opposite to that of the current path 61 (FIG. 5) formed during the ON period of the lower arm element of the DC power supply B1 during the power running operation. Thereby, the charging current of DC power supply B1 decreases. That is, reactor current IL1 rises as shown in FIG.

  On the other hand, for the DC power source B2 to be discharged, switching elements S2 and S5 corresponding to the upper arm elements are turned on to form a current path 64 similar to that in FIG. Since the lower arm element is turned on for DC power supply B1 and the upper arm element is turned on for DC power supply B2 between times tb and tc in FIG. 33, switching elements S2 and S5 Is turned on, while the other switching elements S1, S3, S4, and S6 are turned off.

  FIG. 36 shows a current path between time tc and td in FIG. 33, that is, a period during which reactor current IL1 increases (charge current decreases) and reactor current IL2 increases (discharge current increases).

  Referring to FIG. 36, at time tc to td, switching element S6 is turned off, while switching element S2 is turned on, so that reactor current IL1 is similar to FIG. 35 (time tb to tc). It flows through the current path 61r. Thereby, reactor current IL1 continues to rise.

  On the other hand, for DC power source B2 to be discharged, reactor current IL2 flows through current path 62 as in FIG. 34 (time ta to tb). Thereby, reactor current IL2 rises. That is, since the lower arm element is turned on for both DC power supplies B1 and B2 between times tc and td in FIG. 33, switching elements S1 and S2 are turned on, while other switching elements S3 to S6 are turned on. Is off.

  In FIG. 33, as in FIG. 22, there is no period during which reactor current IL1 decreases (charge current increases) and reactor current IL2 decreases (discharge current decreases). However, the current path 63r shown in FIG. 34 and the current path 64 shown in FIG. 35 are formed by controlling both the DC power supplies B1 and B2 to turn on the upper arm element of the boost chopper. be able to. Specifically, switching elements S1, S2, S5, and S6 are turned on in response to control pulse signals / SD1 and / SD2.

  With such on / off control of the switching elements S1 to S6 according to FIG. 32, in the PB mode, the charging of the DC power supply B1 and the discharging of the DC power supply B2 according to the regenerative operation of the load 30 are performed in parallel, and the output The voltage VH can be controlled to the voltage command value VH *.

  In the current paths 62 and 63r in FIG. 34, the reactor current IL1 and IL2 flow in the same direction in the switching element S1 because the current direction of the reactor current IL1 is opposite to that in the powering operation in the PB mode. . Thereby, it is understood that the conduction loss in the switching element S1 increases. Similarly, in current paths 61r and 64 in FIG. 35, reactor currents IL1 and IL2 flow in switching element S2 in the same direction. Thereby, it is understood that the conduction loss in the switching element S1 increases.

  In contrast, in current paths 61r and 62 of FIG. 36, there is no overlap between reactor currents IL1 and IL2 in each of switching elements S1 to S6. Further, even in the period in which the current paths 63r and 64 (not shown) are formed, the reactor elements IL1 and IL2 do not overlap in the switching elements S1 to S4, and are different from each other in the switching elements S5 and S6 connected in parallel. It is understood that a directional current flows.

  Therefore, during the regenerative operation in the PB mode, unlike the power running operation, both reactor currents IL1 and IL2 in which the polarities of the gradients of reactor currents IL1 and IL2 are the same, or both reactor currents IL1 and IL2 are reduced. In the period when the voltage rises, the loss (conduction loss and / or switching loss) in the switching elements S1 to S6 can be reduced.

(Regenerative operation 2 in PB mode)
Next, the regenerative operation in the PB mode when the DC power source B2 is targeted will be described.

  FIG. 37 is a chart for explaining gate logical expressions of control signals SG1 to SG6 of switching elements S1 to S6 during a regenerative operation in the PB mode in which DC power supply B2 is charged.

  Referring to FIG. 37, control pulse signals SD1, / SD1, SD2, / SD2 are generated by control unit 150a shown in FIG. 22 so as to control output voltage VH to voltage command value VH *.

  During the regenerative operation in the PB mode in which the DC power supply B2 is charged, the switching element S6 that is a regenerative switch needs to operate as an upper arm element of the DC power supply B2. Therefore, control signal SG6 of switching element S6 is set according to control pulse signal / SD2 from control unit 150a shown in FIG.

  The switching element S5 corresponding to the power running switch needs to function as an upper arm element of the DC power source B1 to be discharged. Therefore, control signal SG5 of switching element S5 is set according to control pulse signal / SD1 from control unit 150a (FIG. 22).

  The switching element S4 needs to be turned on and off alternately with the switching element S6 in order to secure a path for the reactor current IL2 when the switching element S6 is turned off. Further, the switching element S4 needs to function as an upper arm element of the DC power source B1 that is a discharge target. Therefore, control signal SG2 of switching element S2 is set according to the logical sum (OR) of control pulse signals / SD1 and SD2 from control unit 150a shown in FIG.

  The switching element S3 functions as a lower arm element of the DC power supply B1 to be discharged and needs to operate as an upper arm element of the DC power supply B2 of the DC power supply B2 to be charged. Therefore, control signal SG1 of switching element S1 is set according to the logical sum (OR) of control pulse signals SD1 and / SD2 from control unit 150a shown in FIG.

  On the other hand, it is not necessary to form the current path 62 (FIG. 7) for accumulating energy in the reactor L2 for the DC power source B2 to be charged. Therefore, the switching element S1 for forming the current path 62 is maintained in the off state. As a result, the control signal SG1 is fixed at the L level.

  Similarly, it is not necessary to form the current path 61r (FIG. 35) for the DC power source B1 to be discharged. Therefore, since switching element S2 is maintained in the OFF state, control signal SG2 is fixed at the L level.

  FIG. 38 shows an operation waveform diagram during the regenerative operation in the PB mode in which the DC power supply B2 is charged. Also in FIG. 38, for comparison, a waveform diagram when the current phase (phase difference φ) is controlled by the carrier phase control as in FIGS. 22 and 33 is shown.

  In FIG. 38, the reactor current IL2 of the DC power supply B2 to be charged is a regenerative current, that is, a negative current (IL2 <0). Therefore, the reactor current IL2 increases from time ta to tb, but the charging current (absolute value) decreases during this period. On the other hand, the reactor current IL2 decreases from time tb to tc, but the charging current (absolute value) increases during this period. On the other hand, the reactor current IL1 of the DC power supply B1 is a power running current, that is, a positive current (IL1> 0).

  39 to 41 are circuit diagrams for explaining current paths in each period of FIG.

  FIG. 39 shows a current path between time ta and tb in FIG. 38, that is, a period during which reactor current IL2 increases (charge current decreases) while reactor current IL1 decreases (discharge current decreases). .

  Referring to FIG. 39, from time ta to tb, the lower arm element is turned on for DC power supply B2, while the upper arm element is turned on for DC power supply B1. Thereby, the switching element S6 is turned off and the switching element S4 is turned on. As a result, charging of the DC power supply B2 is stopped, and the reactor current IL2 flows through a current path 62r formed by turning on the switching element S4. Thereby, the charging current of DC power supply B2 decreases. That is, reactor current IL2 rises as shown in FIG.

  On the other hand, for DC power supply B1 to be discharged, switching elements S4 and S5 corresponding to the upper arm elements are turned on to form a current path 63 similar to that in FIG. As a result, the switching elements S4 and S5 are turned on, while the other switching elements S1 to S3 and S6 are turned off.

  FIG. 40 shows a current path from time tb to tc in FIG. 38, that is, a period in which reactor current IL2 decreases (charge current increases) while reactor current IL1 increases (discharge current increases).

  Referring to FIG. 40, a current path 64 of reactor current IL2 for charging DC power supply B2 to be charged by a regenerative current from load 30 is formed by turning on switching elements S3 and S6. Thereby, the charging current of DC power supply B2 increases. That is, reactor current IL2 decreases as shown in FIG.

  On the other hand, for the DC power source B1 that is a discharge target, the current path 61 similar to that in FIG. 5 is formed by turning on the switching element S3 corresponding to the lower arm element. That is, during the period from time tb to tc, the upper arm element is turned on with respect to the DC power supply B2 (charging) and the lower arm element is turned on with respect to the DC power supply B1 (discharging), so that the switching elements S3 and S6 are While being turned on, the other switching elements S1, S2, S4 and S5 are turned off.

  FIG. 41 shows a current path between time tc and td in FIG. 38, that is, a period during which reactor current IL1 rises (discharge current increases) and reactor current IL2 rises (charge current decreases).

  Referring to FIG. 41, from time tc to td, switching element S6 is turned off, while switching element S4 is turned on, so that reactor current IL2 is similar to FIG. 39 (time ta to tb). It flows through the current path 62r. Thereby, reactor current IL2 rises.

  On the other hand, for DC power source B1 to be discharged, reactor current IL1 flows through current path 61 as in FIG. 40 (time tb to tc). Thereby, reactor current IL1 continues to rise. That is, between time tc and td in FIG. 38, the lower arm element is turned on for both DC power supplies B1 and B2, so that switching elements S3 and S4 are turned on, while other switching elements S1, S2 are turned on. , S5, S6 are turned off.

  In FIG. 38, as in FIGS. 22 and 33, there is no period in which reactor current IL2 decreases (charge current increases) and reactor current IL1 decreases (discharge current decreases). However, the current path 64r shown in FIG. 40 and the current path 63 shown in FIG. 39 are formed by controlling the DC power sources B1 and B2 to turn on the upper arm element of the boost chopper. be able to. Specifically, switching elements S3 to S6 are turned on in response to control pulse signals / SD1, / SD2.

  With such on / off control of the switching elements S1 to S6 according to FIG. 38, in the PB mode, the charging of the DC power supply B2 and the discharging of the DC power supply B1 corresponding to the regenerative operation of the load 30 are performed in parallel. The voltage VH can be controlled to the voltage command value VH *.

  Also in the PB mode in which DC power supply B2 is charged, reactor currents IL1 and IL2 are the same in switching element S4 in current paths 62r and 63 in FIG. 39 and in switching element S3 in current paths 61r and 64 in FIG. It will flow in the direction. Thereby, it is understood that the conduction loss in the switching element increases.

  On the other hand, in current paths 61 and 62r in FIG. 41, there is no overlap between reactor currents IL1 and IL2 in each of switching elements S1 to S6. Further, even in the period in which the current paths 63 and 64r (not shown) are formed, the reactor elements IL1 and IL2 do not overlap in the switching elements S1 to S4, and are different from each other in the switching elements S5 and S6 connected in parallel. It is understood that a directional current flows.

  Therefore, even when DC power supply B2 is a charge target, during the regenerative operation in PB mode, the period in which the polarities of reactor currents IL1 and IL2 have the same polarity, specifically, both reactor currents IL1 and IL2 decrease. The loss (conduction loss and / or switching loss) in the switching elements S1 to S6 can be reduced during the period during which the reactor currents IL1 and IL2 increase.

  As described above, when the carrier phase control described in the modification of the first embodiment is applied during the regenerative operation in the PB mode, the minimum point of the reactor current IL1 is determined regardless of whether the charging target is the DC power supply B1 or B2. The carrier is such that the minimum point of the reactor current IL2 matches on the time axis, or the current phase is such that the maximum point of the reactor current IL1 and the maximum point of the reactor current IL2 match on the time axis. It is preferable to control the wave phase difference φ. In this way, it is possible to secure the maximum period during which the polarities of the gradients of reactor currents IL1 and IL2 are the same in one cycle of carrier waves CW1 and CW2.

  Thus, power converter 10 according to the present embodiment performs DC / DC conversion in which a plurality of operation modes (PB mode, SB mode, and DS mode) are switched with high efficiency even during the regenerative operation of load 30. can do. In other words, power converter 10 can execute DC / DC conversion corresponding to both the power running operation and the regenerative operation of load 30 in each of the PB mode, the SB mode, and the DS mode. Furthermore, the loss in the switching element can be further reduced by applying the carrier phase control even during the regenerative operation in the PB mode.

  FIG. 42 shows control of DC power supplies B1 and B2 during powering / regenerative operation of load 30 in each operation mode.

  Referring to FIG. 42, in the PB mode, DC / DC conversion is performed in parallel between DC power supplies B1 and B2 and load 30 such that both DC power supplies B1 and B2 are discharged during powering operation of load 30. Is executed. In contrast, when the load 30 performs a regenerative operation in the PB mode, the power converter 10 operates with one of the DC power sources B1 and B2 as a charging target.

  That is, during the regenerative operation of the load 30, DC / DC conversion is performed such that the DC power supply B1 is charged while the DC power supply B2 is discharged while the output voltage VH is controlled to the voltage command value VH *. And the load 30 can be executed in parallel. Alternatively, DC / DC conversion that charges the DC power supply B2 while discharging the DC power supply B1 while controlling the output voltage VH to the voltage command value VH * is performed between the DC power supplies B1 and B2 and the load 30. Can be executed in parallel. Both of these can be used properly by switching the switching patterns of the switching elements S1 to S6 between FIG. 32 and FIG.

  In the PB mode, duty ratios DT1 and DT2 for generating control pulse signals SD1 (/ SD1) and SD2 (/ SD2) through powering operation and regenerative operation (charging DC power supply B1 or B2) are output voltages. It can be calculated according to a common control logic (eg, FIG. 12) for controlling VH.

  The selection of the charging target during the regenerative operation can be executed based on the state of the DC power sources B1 and B2, for example, the amount of charge (SOC) and the temperature. Further, when both DC power sources B1 and B2 are prohibited from being charged due to a fully charged state or the like, the regenerative operation of the load 30 is prohibited.

  In the SB mode, DC / DC conversion can be executed so that the output voltage VH is controlled to the voltage command value VH * in a mode in which both B1 and B2 connected in series are discharged during the power running operation of the load 30. . On the other hand, when the load 30 performs a regenerative operation, DC / DC conversion is performed so as to control the output voltage VH to the voltage command value VH * in a mode in which both DC power sources B1 and B2 connected in series are charged. Can do.

  Further, in the DS mode, when the load 30 is in a power running operation, electric power can be supplied to the load 30 by discharging the DC power sources B1 and B2 connected in series. On the other hand, during the regenerative operation of the load 30, the regenerative power from the load 30 can be recovered by charging the DC power supplies B1 and B2 in a state of being connected in series.

  In the SB mode and the DS mode, when at least one of the DC power sources B1 and B2 is prohibited from being charged due to a fully charged state or the like, the regenerative operation of the load 30 is prohibited.

  As described above, in the PB mode and the SB mode, the switching patterns of the switching elements S1 to S6 are different between the power running operation and the regenerative operation of the load 30. The switching of the switching pattern (gate logical expression) can be determined based on, for example, the operation command value of the load 30.

  For example, when load 30 includes motor generator 35 (FIG. 2), motor generator 35 performs a power running operation (PL *) according to a product (PL *) of a torque command value of motor generator 35 and a rotational speed (forward rotation or reverse rotation). The switching pattern can be controlled so as to be switched depending on whether PL *> 0) or regenerative operation (PL * <0).

  In the PB mode, the loss in the switching element can be further suppressed during the power running operation and the regenerative operation of the load 30 by combining the carrier phase control described in the modification of the first embodiment. However, as described above, the preferable current phase of the reactor current differs between the power running operation and the regenerative operation. Therefore, it is preferable that the map and the relational expression for setting the phase difference φ for the carrier phase control described above are set independently during the regenerative operation and during the load operation.

[Embodiment 3]
In the third embodiment, the configuration and operation of a power supply system when one of DC power supplies B1 and B2 is configured as a variable DC voltage source including a generator will be described.

FIG. 43 is a circuit diagram showing a configuration of power supply system 5 # according to the third embodiment.
Referring to FIG. 43, in power supply system 5 # according to the third embodiment, one of DC power supplies B1 and B2 is formed of a variable DC voltage source. The configuration example of FIG. 23 shows a case where the DC power supply B1 of FIG. 1 is configured by a variable DC voltage source. Hereinafter, the DC power supply B1 configured by the variable DC voltage source is referred to as a DC power supply B1 #.

  DC power supply B1 # includes a power generation mechanism 110 that generates an AC voltage, an AC / DC converter 120, and a smoothing capacitor 130. The AC voltage generated by the power generation mechanism 110 is variably controlled according to the voltage command value Vac *.

44 and 45 are circuit diagrams showing configuration examples of DC power supply B1 #.
Referring to FIG. 44, power generation mechanism 110 includes an engine 112 and a generator 115.

  The operation of engine 112 is controlled in accordance with an output command (engine torque and engine speed) set according to AC voltage command Vac *. The generator 115 outputs an AC voltage by generating electricity with the output of the engine 112. The output voltage of the generator 115 changes according to the torque and the rotational speed of the engine 112. For this reason, the AC voltage Vac from the generator 115 can be controlled according to the control command Vac * by appropriately setting the engine output command (torque, rotation speed) according to the voltage command Vac *.

  The AC / DC converter 120 includes a diode bridge 121. Diode bridge 121 rectifies the AC voltage from generator 115 and outputs DC voltage V1 #.

  Using the amplitude voltage Vp and the angular frequency ω of each phase for the AC voltage, the output voltage V1 # can be expressed by the following equation (7).

V1 # = (3√3 / π) · Vp · sin (ωt) (7)
That is, voltage V1 # of DC power supply B1 # can be controlled by the AC voltage output from generator 115 in accordance with voltage command value Vac *. Therefore, voltage V1 # can be variably controlled by appropriately setting voltage command Vac * according to the command value of voltage V1 #.

  Referring to FIG. 45, AC / DC converter 120 can also be configured by PWM rectifier 122.

  The PWM rectifier 122 is a three-phase AC / DC converter, and a switching module constituted by a switching element and an antiparallel diode is arranged in the upper arm and the lower arm of each phase.

  According to PWM rectifier 122, output voltage V1 # can be variably controlled by on / off control of the switching element. That is, in DC power supply B1 # shown in FIG. 45, output voltage V1 # is controlled by an engine output command for controlling the AC voltage from generator 115 and a control command to PWM rectifier 122. Thus, even if an AC voltage from generator 115 has an error from voltage command value Vac *, output voltage V1 # can be controlled according to the command value.

  The power generation mechanism 110 configured by the engine 112 and the generator 115 in the configuration of FIGS. 44 and 45 is mounted on, for example, a hybrid vehicle.

  Referring to FIG. 43 again, in the power supply system according to the third embodiment, DC power supply B1 # including power generation mechanism 110 performs only the power running (discharge) operation. Therefore, in power supply system 5 # according to the embodiment, only the power running operation is applied to DS mode and SB mode. The DS mode in power converter 10 # corresponds to the “second direct power supply mode”.

On the other hand, in the PB mode, both the DC power supply B1 # and the DC power supply B2 are targets for discharging during the power running operation of the load 30, while the DC power source B2 is fixedly charged for the regenerative operation of the load 30. The That is, when the DC power supply B2 is prohibited from being charged due to a fully charged state or the like, the regenerative operation of the load 30 is prohibited.

  FIG. 46 is a conceptual diagram for illustrating operation mode selection in power supply system 5 # according to the third embodiment. Also in power supply system 5 #, it is necessary to select the operation mode so that VH ≧ VHrq according to load request voltage VHrq.

  FIG. 46 shows operation mode selection when the required load voltage VHrq gradually increases from VHrq = 0 as shown by the dotted line as time elapses.

  Referring to FIG. 46, VHrq ≦ V2 at times t0 to t1. In this region, the power generation mechanism 110 is stopped, and the DS mode using only the DC power supply B2 is applied with the output voltage V1 # = 0 of the DC power supply B1 #.

In this DS mode, during the power running operation of the load 30, the switching elements S2 and S5 are fixed on (switching elements S1, S3, S4 and S6 are fixed off), so that only the DC power supply B2 is connected to the power lines PL and NL. It is preferable to electrically connect between them. Similarly,
During regenerative operation of the load 30, the switching elements S3 and S6 are fixed on (switching elements S1, S2, S4 and S5 are fixed off), so that only the DC power supply B2 is electrically connected between the power lines PL and NL. It is preferable to connect. Thereby, it is possible to operate the load 30 while fixing the output voltage (VH = V2) higher than the load required voltage VHrq.

  When VHrq> V2 is satisfied at time t1, by operating the power generation mechanism 110, the voltage V1 #> 0 of the DC power supply B1 can be obtained. During operation of power generation mechanism 110, voltage V1 # can be controlled within the range of 0 <V1 # <V1max by setting voltage command value Vac *. The upper limit voltage V1max from the DC power supply B1 is determined corresponding to the maximum output voltage from the power generation mechanism 110.

  Therefore, at times t1 to t2 in the range of V2 <VHrq <V3 (V3 = V2 + V1max), the voltage V1 # of the DC power supply B1 # is variably controlled to (VHrq−V2), thereby controlling the load request voltage VHrq. The load 30 can be operated by the output voltage VH. In this DS mode, as described in the first or second embodiment, in power converter 10, switching element S5 is turned on during powering operation of load 30 (switching elements S1 to S4 and S6 are turned off). On the other hand, during the regenerative operation of the load 30, the switching element S6 is turned on (the switching elements S1 to S5 are turned off).

  When the required load voltage VHrq further rises to VHrq> V3 (time t2), the output voltage VH cannot be controlled to VH ≧ VHrq in the DS mode. Therefore, the operation mode is switched from the SD mode to the SB mode at times t2 to t3 where V3 <VHrq <VHmax.

  In the SB mode, voltage command value VH * = VHrq is set while DC power supply B1 # is controlled to V1 # = V1max. As a result, on / off of switching elements S1 to S6 is controlled such that output voltage VH is controlled to voltage command value VH * according to duty ratio DTs by control unit 150b shown in FIG. Specifically, the switching elements S1 to S6 are turned on / off in accordance with the control pulse signal SDs (/ SDs) based on the duty ratio DTs as shown in FIG. 17 (during the power running operation of the load 30) or FIG. 31 (regenerative operation of the load 30). ) Switching pattern (gate logic).

  Thereby, in the SB mode, the output voltage VH is controlled to the voltage command value VH * by boosting the voltage (V2 + V1max), so that the boost ratio is suppressed. Thereby, since the AC resistance loss of the iron loss and copper loss in reactor L1, L2 can be reduced, the efficiency of power converter 10 can be raised.

  In power supply system 5 # according to the third embodiment, voltage range applicable to the DS mode in which loss of power converter 10 is small can be expanded by variably controlling voltage V1 # of DC power supply B1 #. Thereby, efficiency of power supply system 5 # can be increased. Furthermore, it is possible to suppress the occurrence of a voltage difference between the output voltage VH and the load request voltage VHrq in the DS mode.

  Further, by limiting the operation of power generation mechanism 110 (DC power supply B1 #) in the DS mode to a voltage range of VHrq> V2, it is possible to cope with a wide voltage range even if the output voltage from power generation mechanism 110 is lowered. Can do. For this reason, cost reduction can be achieved by downsizing the engine 112 that constitutes the power generation mechanism 110.

  In the configuration example of FIG. 43, the DC power source B1 is configured by the variable DC voltage source B1 #. However, as shown in FIG. 47, the DC power source B2 is configured by the variable DC voltage source B2 # (DC power source B2 #). It is also possible to do. In this case, output voltage V2 # of DC power supply B2 # is controlled according to voltage command value Vac * to power generation mechanism 110. In power supply system 5 # shown in FIG. 47 as well as in FIG. 46, power generation mechanism 110 depends on the relationship between required load voltage VHrq and voltage V1 of DC power supply B1 and upper limit voltage V2max of DC power supply B2 #. DS mode (V2 # = 0) in which is stopped, DS mode (0 <V2 # ≦ V2max) in which the power generation mechanism 110 operates, and SB mode (V2 # = V2max) can be selectively applied.

[Embodiment 4]
In the fourth embodiment, control at the time of switching on and off of a switching element for preventing occurrence of malfunction in power converter 10 will be described.

  In general, in normal boost chopper control, when switching on and off between the upper and lower arm elements so as not to cause a short-circuit path between the power lines PL and NL, a period called a so-called dead time in which both are turned off. It is known to intentionally provide.

  In power converter 10 according to the present embodiment, for example, switching elements S3 and S4 are alternately turned on and off in the PB mode (FIGS. 10 and 17). As described above, during the power running operation of the load 30, the switching elements S3 and S4 function as a lower arm element and an upper arm element, respectively, with respect to the DC power supply B1. On the other hand, during the regenerative operation of the load 30, the switching elements S3 and S4 function as an upper arm element and a lower arm element, respectively, with respect to the DC power supply B2. Also during the SB mode powering operation (FIG. 17), switching elements S3 and S4 are alternately turned on and off.

  FIG. 48 shows a waveform diagram of the switching elements when the switching elements S3 and S4 are turned on / off by providing a dead time in the PB mode of the power converter 10.

  Referring to FIG. 48, control signal SG3 of switching element S3 and control signal SG4 of switching element S4 are basically set to complementary levels according to control pulse signals SD1 and / SD1.

  Dead time Td is provided such that both control signals SG3 and SG4 are set to the L level so that switching elements S3 and S4 are not turned on simultaneously. Therefore, in the dead time period, both switching elements S3 and S4 are turned off.

  When the switching element S3 is turned off, the current I (S3) of the switching element S3 rapidly decreases. However, since the switching element S4 is in the off state at this time, the current I (S4) of the switching element S4 = 0. That is, reactor current IL1 cannot flow through switching element S4 when switching element S3 is turned off. At this time, if the energy stored in reactor L1 is lower than the energy stored in reactor L2, the path of reactor current IL1 cannot be secured, and thus reactor current IL1 rapidly decreases.

  On the other hand, when the switching element S4 is turned on as the dead time Td elapses, the path of the reactor current IL1 is secured, so that the current I (S4) increases rapidly. As a result, the reactor current IL1 becomes discontinuous during the dead time Td, and current oscillation occurs.

  A similar phenomenon occurs between the switching elements S1 and S2. That is, if a dead time is provided when switching elements S1 and S2 are switched on and off, reactor current IL2 becomes discontinuous and current oscillation occurs.

  FIG. 49 shows a waveform diagram of the switching element when an overlap time is provided by switching control according to the fourth embodiment in place of the dead time in FIG.

  Referring to FIG. 49, in the switching control according to the fourth embodiment, when switching on / off of switching elements S3 and S4, an overlap time Ta at which both of switching elements S3 and S4 are turned on is provided.

  Therefore, when the switching element S3 is turned off, the control signal SG3 is changed from the L level to the H level while the control signal SG3 is at the H level, and when the overlap time Ta elapses from this timing, the control signal SG3 is changed from the H level. Change to L level.

  As a result, even during a period in which the switching element S3 is turned off and the current I (S3) rapidly decreases, the switching element S4 is already turned on, so that the path of the reactor current IL1 can be secured by the current I (S4). As a result, the reactor current IL1 does not become discontinuous and no current oscillation occurs.

  Similarly, when the switching element S4 is turned off, the control signal SG3 is changed from L level to H level while the control signal SG4 is at H level, and when the overlap time Ta elapses from this timing, the control signal SG4 is changed to H level. To L level. As a result, even during a period in which the switching element S4 is turned off and the current I (S4) rapidly decreases, the switching element S3 is already turned on, so that the path of the reactor current IL1 can be secured by the current I (S3). As a result, no current oscillation occurs in reactor current IL1.

  FIG. 50 is an operation waveform diagram of the power supply system when the switching control according to the fourth embodiment is applied. FIG. 50 shows, as an example, an operation waveform when the PWM control similar to that in FIG. 37 is applied during the power running operation in the PB mode.

  Referring to FIG. 50, when switching on and off switching elements S3 and S4 functioning as the upper arm element and the lower arm element, respectively, with respect to DC power supply B1, overlap time Ta is set between control signals SG3 and SG4. Provided. Thereby, the discontinuity described in FIG. 48 does not occur at the inflection point (maximum point or minimum point) of reactor current IL1, and reactor current IL1 changes stably.

  Similarly, an overlap time Ta is provided between control signals SG1 and SG2 when switching on and off switching elements S1 and S2 that function as an upper arm element and a lower arm element, respectively, with respect to DC power supply B2. Thereby, discontinuity does not occur at the inflection point (maximum point or minimum point) of reactor current IL2, and reactor current IL2 changes stably.

  FIG. 51 is a block diagram illustrating a control configuration for switching control according to the fourth embodiment.

  Referring to FIG. 51, control signal generation unit 205 can be provided in addition to the configurations of FIGS. 12, 18 and 26. The control signal generator 205 controls the switching elements S1 to S6 according to the control pulse signals SD1 (/ SD1) and SD2 (/ SD2) in the PB mode and the control pulse signal SDs (/ SDs) in the SB mode. SG1 to SG6 are generated.

  In the PB mode, the control signal generation unit 205 uses the gate logical expressions of FIG. 10 (power running operation), FIG. 32 (regenerative operation), or FIG. 37 (regenerative operation) to control pulse signals SD1 (/ SD1) and SD2 In accordance with (/ SD2), control signals SG1 to SG6 are generated. At this time, when changing from the L level to the H level, the L level period is extended by the overlap period Ta. On the other hand, when changing from the H level to the L level, the overlap period Ta Control signals SG1 to SG6 are generated so that the H-level period is extended by the length of time.

  Similarly, in the SB mode, the control signal generation unit 205 uses the gate logical expression of FIG. 17 (power running operation) or FIG. 31 (regenerative operation) according to the control pulse signal SDs (/ SDs) to control signals SG1 to SG6. Is generated. At this time, the control signals SG1 to SG6 are generated so that the H level period is extended by the overlap period Ta when changing from the H level to the L level.

  Thereby, according to the switching control according to the fourth embodiment, it is adapted to the circuit configuration of power converter 10 according to the present embodiment, avoiding the occurrence of discontinuity in reactor currents IL1 and IL2, and then in PB mode. And DC / DC conversion by the operation in the SB mode can be stabilized.

[Embodiment 5]
In the fifth embodiment, a modified example of the circuit configuration of the power converter according to the present embodiment will be described.

  52, in the power supply system according to the fifth embodiment, power converter 10 # is arranged instead of power converter 10 shown in FIG. Power converter 10 # is different from power converter 10 shown in FIG. 1 in that diodes D2, D4, D5 are arranged instead of switching elements S2, S4, S5. Since the configuration of the other part is power converter 10, detailed description will not be repeated.

  Diodes D2, D4, and D5 are arranged to form a current path in the same direction as switching elements S2, S4, and S5 in power converter 10. The diodes D2, D4, and D5 do not have a function of blocking the current path in response to a control signal from the control device 100, but form a current path similar to that of the switching elements S2, S4, and S5 when forward bias is applied. be able to.

  Therefore, in the PB mode, the switching elements S1, S3, and S6 are controlled on and off by using the gate logical expressions of FIG. 10 (power running operation), FIG. 32 (regenerative operation), or FIG. 37 (regenerative operation). During the period in which the signals SG2, SG4, and SG5 are to be set to the H level, the current paths of the reactor currents IL1 and IL2 can be secured by the diodes D2, D4, and D5.

  Similarly, in the SB mode, the control signals SG2, SG4, SG5 are controlled by turning on / off the switching elements S1, S3, S6 by using the gate logical expression of FIG. 31 (power running operation) or FIG. 32 (regenerative operation). In the period in which is set to H level, the current paths of reactor currents IL1 and IL2 can be secured by diodes D2, D4 and D5.

  In the DS mode, the diode D5 can secure a current path during the power running operation of the load 30 and can secure a current path during the regenerative operation of the load 30 by turning on the switching element S6.

  Thus, power converter 10 # also performs DC / DC conversion selectively applied to PB mode, SB mode, and DS mode corresponding to power running operation and regenerative operation of load 30 with power converter 10. The same can be done.

  In power converter 10 #, switching elements S1, S3, and S6 correspond to “first semiconductor element”, “third semiconductor element”, and “sixth semiconductor element”, respectively, while diode D2 , D4, and D5 correspond to “second semiconductor element”, “fourth semiconductor element”, and “fifth semiconductor element”, respectively. In power converter 10 #, reactor currents IL1 and IL2 do not become discontinuous even if the overlap time described in the fourth embodiment is not provided.

  In the present embodiment, the configuration of power converters 10 and 10 # has been described with reference to the connection relationship between switching elements S1 to S6 and reactors L1 and L2, but the components of power converters 10 and 10 # are illustrated. However, it is not meant to be limited to these elements. That is, in the present embodiment, the description that the components are “electrically connected” means that there are other circuit elements and connector terminals between the two elements, and the above-described components are connected via the other circuit elements. This includes securing electrical connection between the components.

  Further, in the present embodiment, the load 30 and the power generation mechanism 110 are exemplified by the configuration including the electric motor for driving the electric vehicle or the engine, but the application of the present invention is not limited to such a case. . That is, the load 30 can be configured by any device as long as it is a device that operates with the DC voltage VH. The power generation mechanism 110 can also be configured by any power generation element as long as the variable DC voltage source can be configured by a combination with an AC / DC converter or a combination with a DC / DC converter. .

  The embodiment disclosed this time should be considered as illustrative in all points and not restrictive. The scope of the present invention is defined by the terms of the claims, rather than the description above, and is intended to include any modifications within the scope and meaning equivalent to the terms of the claims.

  5 Power System, 10 Power Converter, 11-13 Bidirectional Switch, 30 Load, 32 Inverter, 35 Motor Generator, 36 Power Transmission Gear, 37 Drive Wheel, 61, 61r, 62, 62r, 63, 63r, 64, 64r , 65, 65r, 67 Current path, 100 control device, 102 required voltage setting unit, 104 mode selection unit, 110 power generation mechanism, 112 engine, 115 generator, 120 converter, 121 diode bridge, 122 rectifier, 130 smoothing capacitor, 150a, 150b control unit, 152, 195 voltage controller, 155 power distribution ratio setting unit, 158 multiplication unit, 159, 166, 168, 192 subtraction unit, 160, 165 division unit, 170, 172, 175 current controller, 190 Carrier phase control unit, 200a, 200b PWM control unit, 205 control signal generation unit, B1, B2 DC power supply, B1 #, B2 # variable DC voltage source, CH smoothing capacitor, CW, CW1, CW2 carrier wave, D2, D4, D5 diode, DT1, DT2, DTs Duty ratio, I1 current (DC power supply B1), I2 current (DC power supply B2), I1 *, I2 * current command value, IL1, IL2 reactor current, L1, L2 reactor, MD mode selection signal, N1, N2 node, NL , PL power line, P1 *, P2 * power command value, PH * power command value (total power), S1 to S6 power semiconductor switching elements, SD1, SD2, SDs, / SD1, / SD2, / SDs control pulse signal, SG1 to SG6 control signal, Ta overlap time, Td dead time, V1max, V2m x upper limit voltage (output voltage V1 #, V2 #), VHmax upper limit voltage (output voltage VH), V1 voltage (DC power supply B1), V1 # output voltage (DC power supply B1 #), V2 voltage (DC power supply B2), V2 # Output voltage (DC power supply B2 #), VH output voltage, VH * voltage command value (output voltage VH), VHrq load required voltage, k power distribution ratio.

Claims (17)

A power supply system for controlling a DC voltage supplied to a load connected between a first power line on a high voltage side and a second power line on a low voltage side,
A first DC power supply;
A second DC power source;
A power converter for performing DC voltage conversion between the first and second DC power sources and the first and second power lines;
A control device for controlling the operation of the power converter,
The power converter is
A first semiconductor element electrically connected between the first and second nodes to form a current path from the first node to the second node;
A second semiconductor element connected between the second node and the second power line to form a current path from the second power line to the second node;
A third node connected in anti-parallel with the second semiconductor element between the second node and the second power line to form a current path from the second node to the second power line; A semiconductor element;
In order to form a current path from the second node to the first node, a fourth connected in antiparallel with the first semiconductor element between the first node and the second node. A semiconductor element;
A fifth semiconductor element (S5, D5) connected between the first power line and the first node to form a current path from the first node to the first power line;
In order to form a current path from the first power line to the first node, the fifth semiconductor element is connected in anti-parallel with the fifth semiconductor element between the first power line and the first node. 6 semiconductor elements;
A first reactor connected in series with the first DC power source between the second node and the second power line;
A second reactor connected in series with a second DC power source between the first node and the second node;
Each of the first to sixth semiconductor elements is constituted by a switching element or a diode capable of controlling on / off of a current path,
Of the first to sixth semiconductor elements, at least the first, third and sixth semiconductor elements are constituted by the switching elements,
The control device controls on / off of each of the switching elements,
The power converter operates by switching a plurality of operation modes having different DC voltage conversion modes by switching a mode of on / off control of the switching element by the control device. The plurality of operation modes are:
The power converter is configured to control the DC voltage to a voltage command value in a state where the first and second DC power supplies are connected in series, and the first and second DC power supplies and the first and second DC power supplies. A serial connection mode for performing the DC voltage conversion with a second power line;
The DC voltage conversion between the first DC power source and the first and second power lines, and the second DC so that the power converter controls the DC voltage to a voltage command value. The power supply system according to claim 1, further comprising: a parallel connection mode in which the DC voltage conversion between a power supply and the first and second power lines is performed in parallel.   In the serial connection mode, the control device always forms a current path by the sixth semiconductor element during the regenerative operation of the load, while constantly forming a current path by the sixth semiconductor element during the power running operation of the load. The power supply system according to claim 2, wherein the power supply system is cut off.   In the parallel connection mode, the control device charges the first DC power source while fixing the current path by the third and fourth semiconductor elements in a cut-off state during the regenerative operation of the load. A first charging operation for discharging the second DC power supply, and the second DC power supply while discharging the first DC power supply with the current path by the first and second semiconductor elements fixed in a cut-off state. The power supply system according to claim 2, wherein the operation of the power converter is controlled to selectively execute one of a second charging operation for charging the battery. The plurality of operation modes are:
A first direct power supply in which the on / off combination of the switching elements is fixed so that the state in which the first and second DC power supplies are connected in series between the first and second DC power supplies is maintained. The power supply system according to claim 2, further comprising a mode.   In the first direct power supply mode, the control device maintains a current path formed by the sixth semiconductor element during the regenerative operation of the load, while the sixth semiconductor element during the power running operation of the load. The power supply system according to claim 5, wherein the current path is maintained in an interrupted state. One DC power source of the first and second DC power sources includes a power generation mechanism that outputs an AC voltage, and an AC / DC converter that converts the AC voltage output from the power generation mechanism into a DC voltage. Configured as a variable voltage DC power supply,
The plurality of operation modes are:
Only the other DC power source of the first and second DC power sources, or the other DC power source and the variable voltage DC power source are electrically connected in series between the first and second power lines. The power supply system according to claim 2, further comprising a second direct power supply mode in which a combination of on and off of the switching elements is fixed so that a maintained state is maintained. The variable voltage DC power supply is configured to variably control the DC voltage of the one DC power supply in a voltage range equal to or lower than an upper limit voltage by variably controlling the output voltage of the power generation mechanism.
When the sum of the output voltage of the other DC power source and the upper limit voltage of the one DC power source is higher than the required voltage of the DC voltage set according to the operating state of the load, the control device, The second direct power supply mode is selectable;
When the second direct power supply mode is selected, the control device stops the operation of the power generation mechanism when the required voltage is lower than the output voltage of the other power supply voltage. Only when the required voltage is higher than the output voltage of the other DC power source, the other DC power source and the variable voltage DC The output voltage of the power generation mechanism is controlled in accordance with the voltage difference between the required voltage and the output voltage of the other DC power source with a power source electrically connected in series between the first and second power lines. The power supply system according to claim 7.   The power supply system according to claim 8, wherein the control device selects the series connection mode when the required voltage is higher than a sum of an output voltage of the other DC power supply and the upper limit voltage. The control device selects one of the plurality of operation modes according to a required voltage of a DC voltage set according to an operation state of the load,
The power supply system according to any one of claims 2 to 4, wherein the voltage command value is set to a voltage equal to or higher than the required voltage.   The power supply system according to claim 10, wherein the control device selects the series connection mode when the required voltage is higher than a sum of output voltages of the first and second DC power supplies. The controller is
Means for calculating a first duty ratio for controlling an output from the first DC power source and a second duty ratio for controlling an output from the second DC power source;
First and second control pulse signals obtained according to the comparison of the first carrier wave and the first duty ratio, and the pulse width modulation by the comparison of the second carrier wave and the second duty ratio, respectively. Based on the first to sixth semiconductor elements for generating an on / off control signal of the switching element,
The phase difference between the first carrier wave and the second carrier wave is such that the inflection point of the current of the first reactor and the inflection point of the current of the second reactor overlap on the time axis. The power supply system according to claim 2, wherein the power supply system is variably controlled according to the first and second duty ratios.   The phase difference between the first and second carrier waves is such that the maximum point of the current of the first reactor and the minimum point of the current of the second reactor are on the time axis during the powering operation of the load. The power supply system of Claim 12 controlled so that it may overlap, or the minimum point of the electric current of a said 1st reactor and the maximum point of the electric current of a said 2nd reactor overlap on a time axis.   The phase difference between the first and second carrier waves is such that, during the regenerative operation of the load, the maximum point of the current of the first reactor and the maximum point of the current of the second reactor are on the time axis. The power supply system of Claim 12 controlled so that it may overlap, or the minimum point of the electric current of the said 1st reactor and the minimum point of the electric current of the said 2nd reactor overlap on a time axis.   The power supply system according to claim 1, wherein each of the first to sixth switching elements is configured by the switching element.   When the control device turns off one of the first to sixth switching elements, the control device performs a predetermined period from the generation of a turn-on command of another switching element that is alternately turned on / off with the one switching element. The power supply system according to claim 15, wherein after the elapse, the one switching element turn-off command is generated. The first, third and sixth semiconductor elements are constituted by the switching elements,
The power supply system according to claim 1, wherein the second, fourth, and fifth semiconductor elements are configured by the diode.

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