JP2016066782A - Semiconductor device manufacturing method and electronic component manufacturing method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor device manufacturing method which can develop connection reliability and bonding reliability and effectively inhibit stray of resin.SOLUTION: A semiconductor device manufacturing method includes: a process of providing a layer 110 of a resin composition on a surface with a first terminal 102 of a semiconductor chip 103; a process of laminating the semiconductor chip 103 on a semiconductor wafer 100 via the layer of the resin composition; a process of bonding the first terminal 102 and a second terminal 101 by heating at a first temperature; and a process of performing solder reflow. At least one of the first terminal 102 and the second terminal 101 has a solder layer 104 on a terminal surface, and the first temperature is a temperature lower than a melting point of a solder component which composes the solder layer 104 by not less than 20°C and not more than 40°C, and the semiconductor device manufacturing method includes a process of contacting the first terminal and the second terminal and subsequently deforming the solder layer 104 to bring the first terminal 102 into closer relation with the second terminal 101 to form a bonded surface.SELECTED DRAWING: Figure 3

Description

  The present invention relates to a method for manufacturing a semiconductor device and a method for manufacturing an electronic component.

  In recent years, development of high-density mounting technology for semiconductor integrated circuits has been promoted in response to demands for higher functionality and miniaturization of electronic devices. As an example of such mounting technology, a chip on chip (COC) method in which another semiconductor chip is stacked and mounted on a semiconductor chip, or a chip on wafer (COW) in which a semiconductor chip is stacked and mounted on a semiconductor wafer such as silicon. ) Method, Wafer On Wafer (WOW) method in which a semiconductor wafer is stacked and mounted on a semiconductor wafer, and Chip On Substrate (COS) method in which a semiconductor chip is stacked and mounted on a substrate.

  In order to electrically connect the two types of base materials in this way, terminals are provided on both base materials, a solder layer is provided on at least one of the base materials, and heating is performed with these terminals arranged in the vicinity of each other. To do. As a result, the solder is melted and both terminals can be electrically connected.

  Here, Patent Document 1 describes the following contents as a semiconductor chip mounting method. That is, an adhesive that seals the joint between the semiconductor chip bump and the connection pad portion of the mounting substrate is attached to the mounting surface of the semiconductor chip on the mounting substrate, and the semiconductor chip is pressed against the mounting substrate under pressure conditions. The technology to be installed in is described.

  Patent Document 2 discloses a contact step in which heating is performed at a temperature lower than the solder melting point to bring the protruding electrode of the semiconductor chip into contact with the electrode portion of the substrate, and the bonding material is not completely cured. , A void removal step of removing the void by heating the bonding material that is not completely cured in a pressurized atmosphere, and heating at a temperature equal to or higher than the melting point of the semiconductor, so that the protruding electrode of the semiconductor chip and the electrode portion of the substrate And a method of manufacturing a semiconductor device having an electrode bonding step for melting and bonding them.

JP 2001-332583 A JP2013-102092A

Patent Document 1 discloses a condition for raising the temperature to about 175 ° C. as a condition for temporarily connecting the semiconductor chip and the mounting substrate. However, in Patent Document 1, tin-lead eutectic point solder having a melting point of 183 ° C. is used, and there is room for improvement in terms of environmental load.
That is, in Patent Document 1, although a relatively low soldering temperature is disclosed, in order to achieve this, it is necessary to select a solder having a low melting point. When such solder is used, it is often the case. The reality is that there are still challenges.

Further, as a result of intensive studies by the present inventors, it has been found that there is the following background.
That is, it has been found that if the bonding temperature at the time of solder bonding is excessively increased, a problem that the resin composition between the base materials protrudes from between the base materials may occur. Furthermore, since the resin is gradually cured by excessive heating conditions, the pot life of the resin composition for sealing is limited, and can be applied to a method that requires time for the entire process such as the COW method. It has turned out to be difficult.
In the above-mentioned Patent Document 2, since the electrodes are joined under heating conditions at a temperature equal to or higher than the solder melting point, such problems cannot be solved sufficiently.

  The present invention has been made in view of such circumstances, and provides a method for manufacturing a semiconductor device that expresses high connectivity and bonding reliability and can effectively suppress the protrusion of resin.

According to the present invention,
Preparing a first base material provided with a first terminal and a second base material provided with a second terminal;
Providing a layer of a resin composition on the surface of the first base material provided with the first terminal;
Laminating the first base material so that the first terminal and the second terminal face each other through the resin composition layer with respect to the second base material;
Joining the first terminal and the second terminal via solder by heating at a first temperature;
A step of performing solder reflow by further heating,
A method for manufacturing a semiconductor device, comprising:
At least one of the first terminal and the second terminal includes a solder layer on the terminal surface,
The first temperature is a temperature that is 20 ° C. or more and 40 ° C. or less lower than the melting point of the solder component constituting the solder layer,
In the step of joining the first terminal and the second terminal, after the first terminal and the second terminal are brought into contact with each other, the solder layer is further deformed to deform the first terminal. There is provided a method for manufacturing a semiconductor device, comprising the step of forming a joint surface between the first terminal and the second terminal by bringing the terminal and the second terminal closer to each other. .

Moreover, according to the present invention,
Preparing a first base material provided with a first terminal and a second base material provided with a second terminal;
Providing a layer of a resin composition on the surface of the first base material provided with the first terminal;
Laminating the first base material so that the first terminal and the second terminal face each other through the resin composition layer with respect to the second base material;
Joining the first terminal and the second terminal via solder by heating at a first temperature;
A step of performing solder reflow by further heating,
A method for manufacturing a semiconductor device, comprising:
At least one of the first terminal and the second terminal includes a solder layer on the terminal surface,
The first temperature is a temperature that is 20 ° C. or more lower than the melting point of the solder component constituting the solder layer,
In the step of joining the first terminal and the second terminal, after the first terminal and the second terminal are brought into contact with each other, the solder layer is further deformed to deform the first terminal. Forming a joint surface between the first terminal and the second terminal by bringing the terminal and the second terminal closer to each other;
The bonding surface includes an alloy of a solder component constituting the solder layer and a metal component constituting the first terminal or the second terminal.
A method for manufacturing a semiconductor device is provided.

  Moreover, according to this invention, the manufacturing method of an electronic component which includes the manufacturing method of said semiconductor device in a process is provided.

According to the method for manufacturing a semiconductor device of the present invention, the first base material and the second base material can be electrically joined under a temperature condition that is 20 ° C. lower than the melting point of the solder component.
Moreover, even if it is a case where pressurization conditions are employ | adopted at the time of solder joining, the protrusion of the resin composition from between a 1st base material and a 2nd base material can be suppressed.

It is a longitudinal cross-sectional view which shows an example of embodiment of an electronic component. It is a longitudinal cross-sectional view which shows an example of embodiment of an electronic component. It is a longitudinal cross-sectional view for demonstrating an example of embodiment of the manufacturing method of a semiconductor device. It is a longitudinal cross-sectional view for demonstrating an example of embodiment of the manufacturing method of a semiconductor device. It is a longitudinal cross-sectional view for demonstrating an example of embodiment of the manufacturing method of a semiconductor device. It is a figure which shows the electron micrograph which shows the result of an Example. It is a photograph for explaining the definition of the term “joining” in the present specification. It is a photograph for explaining the definition of the term “contact” or “contact” in the present specification.

  Hereinafter, embodiments will be described with reference to the drawings as appropriate. In the present specification, “to” means “from the above to the following” unless otherwise specified.

  First, prior to describing the method for manufacturing a semiconductor device of the present embodiment, an example of an electronic component on which the semiconductor device obtained by the present embodiment is mounted will be described.

  1 and 2 are longitudinal sectional views showing examples of the electronic component of the present embodiment. In the following description, the upper side of the figure may be referred to as “upper” and the lower side of the figure may be referred to as “lower”.

  An electronic component 20 shown in FIG. 1 is a Chip On Chip (COC) type semiconductor package, and includes two semiconductor chips 21, a substrate 40 that supports the semiconductor chip 21, and a wiring pattern 24 formed in a predetermined pattern. And a plurality of conductive bumps 60. The semiconductor chip 21 and the wiring pattern 24 on the substrate 40 are electrically connected via wires 26, and the semiconductor chip 21 is bonded to the substrate 40 with an adhesive 25. Further, the insulation between the connection parts 23 of the semiconductor chip 21 is maintained by the insulation part 22.

  An electronic component 30 shown in FIG. 2 is a Chip On Chip (COC) type semiconductor package, and includes two semiconductor chips 31, a substrate 40 that supports the semiconductor chip 31, and a wiring pattern 32 formed in a predetermined pattern. And a plurality of conductive bumps 60. The semiconductor chip 31 and the wiring pattern 32 on the substrate 40 are electrically connected via the conductive portion 33 and the conductive portion 34, and the insulating properties are maintained between the connecting portions by the insulating portion 35.

  The substrate 40 is an insulating substrate, for example, a material containing various organic resins such as polyimide resin, imide resin, amide resin, epoxy resin, cyanate resin, bismaleimide triazine resin (BT resin), or a glass fiber substrate. It is comprised with the composite material which consists of a material containing the above-mentioned inorganic material and the above-mentioned organic resin. The planar view structure of the substrate is usually a quadrangle such as a square or a rectangle.

  On the upper surface of the substrate 40, for example, wiring patterns 24 and 32 made of a conductive metal material such as copper are provided in a predetermined shape. In addition, a plurality of vias (not shown) are formed through the substrate 40 in the thickness direction.

  Each bump 60 is electrically connected to a part of the wiring patterns 24 and 32 through the via and protrudes from the lower surface of the substrate 40. The portion of the bump 60 that protrudes from the substrate 40 has a substantially spherical shape.

  The bump 60 is composed mainly of a brazing material such as solder, silver brazing, copper brazing, or phosphor copper brazing.

  The semiconductor chip 21 and the substrate 40 of the electronic component 20 shown in FIG. 1 are connected by an adhesive 25 made of various resin materials such as an epoxy resin, and are electrically connected via a wire 26. Further, the semiconductor chip 31 and the wiring pattern 32 of the electronic component 30 shown in FIG. 2 are electrically connected.

  The electronic component described above has a structure in which a semiconductor chip and a semiconductor chip, or a semiconductor chip and a substrate are laminated, and an insulating part is provided around these connecting parts to ensure insulation reliability. .

In other words, it can be said that it is important to develop a technique for efficiently electrically connecting each layer in manufacturing the electronic component as described above.
Under such technical background, as a result of intensive studies by the present inventors, it has been found that the semiconductor device manufacturing method shown below can efficiently electrically connect each layer.
Hereinafter, each embodiment will be described in detail.

[First Embodiment]
The manufacturing method of the semiconductor device of this embodiment is as follows:
Preparing a first base material provided with a first terminal and a second base material provided with a second terminal;
Providing a layer of a resin composition on the surface of the first base material provided with the first terminal;
Laminating the first base material so that the first terminal and the second terminal face each other through the resin composition layer with respect to the second base material;
Joining the first terminal and the second terminal via solder by heating at a first temperature;
A step of performing solder reflow by further heating,
A method for manufacturing a semiconductor device, comprising:
At least one of the first terminal and the second terminal includes a solder layer on the terminal surface,
The first temperature is a temperature that is 20 ° C. or more and 40 ° C. or less lower than the melting point of the solder component constituting the solder layer,
In the step of joining the first terminal and the second terminal, after the first terminal and the second terminal are brought into contact with each other, the solder layer is further deformed to deform the first terminal. A method of manufacturing a semiconductor device comprising the step of forming a joint surface between the first terminal and the second terminal by bringing the terminal and the second terminal closer to each other.

  Hereinafter, a method for forming a semiconductor device having a structure in which a base material and another base material are laminated as described above will be described with reference to FIGS. 3, 4, and 5.

<First manufacturing method>
FIG. 3 is a view for explaining the method of manufacturing the semiconductor device according to this embodiment.
In the <first manufacturing method>, the semiconductor chip 103 is provided with a terminal 102 including a solder layer 104, and a resin composition layer 110 is provided on the surface where the terminal 102 is provided. The semiconductor chip 103 is arranged so that the terminal 102 and the terminal 101 provided in the semiconductor wafer 100 are opposed to the semiconductor wafer 100 with the resin composition layer 110 interposed therebetween, and is then heated to be electrically connected to the semiconductor wafer 100. Connection is achieved.
That is, in the <first manufacturing method>, the “first substrate” in the present invention corresponds to the “semiconductor chip 103” and the “second substrate” corresponds to the “semiconductor wafer 100”. However, various base materials can be set as long as the object of the invention is not impaired. An organic substrate such as a rigid organic substrate and a flexible organic substrate, an inorganic substrate such as a silicon substrate, a silicon chip, a silicon wafer, and the like similarly. The base materials can be combined as appropriate in accordance with the structure of the semiconductor device to be manufactured.

In the present <first manufacturing method>, the resin composition layer 110 is provided on the semiconductor chip 103. Instead, the resin composition is provided on the side of the semiconductor wafer 100 on which the terminals 101 are provided. The layer 110 may be provided. Further, the resin composition layer 110 may be provided on both the surface side of the semiconductor chip 103 where the terminals 102 are provided and the surface side of the semiconductor wafer 100 where the terminals 101 are provided. Even in such an embodiment, the same effect as the present <first manufacturing method> can be exhibited.
Hereinafter, the steps in the present <first manufacturing method> will be described in order.

First, as shown in FIG. 3A), a semiconductor wafer 100 provided with terminals 101 is prepared.
The member constituting the terminal 101 can be selected from known materials without particular limitation as long as it is a member that can sufficiently achieve electrical connection. Specific examples thereof include copper, gold, nickel, aluminum, iron, and stainless steel.

Next, as shown in FIG. 3 b), a semiconductor chip 103 having a resin composition layer 110 is prepared. Here, the semiconductor chip 103 is provided with a terminal 102, and a solder layer 104 is provided at the tip of the terminal 102. Further, a resin composition layer 110 is provided so as to cover the terminals 102 and the solder layer 104.
In order to prepare such a semiconductor chip 103, for example, the following method can be employed.
That is, a resin composition layer 110 is formed on a semiconductor wafer provided with a plurality of terminals 102 and solder layers 104, and then the semiconductor wafer 103 is diced into a predetermined size, thereby obtaining a desired semiconductor chip 103. Can be obtained. Here, the terminal 102 can employ a known material similar to the terminal 101 described above.

The solder component constituting the solder layer 104 used in the present embodiment may be appropriately selected from known components. Examples thereof include Sn, In, or Sn, Ag, Cu, Zn, Bi, Pd, Examples of the solder include at least two of Sb, Pb, In, and Au.
Among these, it is preferable to use lead-free solder from the viewpoint of environmental considerations.

The melting point of the solder component can be set as appropriate depending on the type of electronic component to which the semiconductor device is applied. For example, a solder component of 210 ° C. or higher, more preferably 220 ° C. or higher can be used. Thereby, terminals can be connected more firmly.
An example of this is tin-silver solder (for example, melting point: 221 ° C.).

As a method for forming the layer 110 of the resin composition, a known method can be adopted. When the resin composition is in a liquid state at 25 ° C., a printing method, a dispensing method, etc. can be mentioned. When the resin composition is solid at 25 ° C., for example, the resin composition is dissolved / dispersed in a solvent, spin coated on a semiconductor wafer, applied, and then the solvent is removed to form a resin layer The method of doing is mentioned.
When the resin composition is formed into a film, the resin composition can be applied onto another substrate surface such as polyester, dried to form a film, and then peeled and laminated on a semiconductor wafer.

Among these, when the resin composition is in a liquid state at 25 ° C., a dispensing method is preferable, and this can prevent entrainment of bubbles at the interface with the semiconductor wafer.
As a method of forming a film and laminating it on a semiconductor wafer, a lamination method or a thermocompression bonding method can be employed. These methods are preferable because not only can air bubbles be prevented from entering the interface with the semiconductor wafer, but also the thickness of the insulating layer can be easily adjusted.

Here, the resin composition according to the present embodiment will be specifically described.
In the manufacturing method of the semiconductor device of the present embodiment, as will be described later, heating is performed at a temperature lower by 20 ° C. or more than the melting point of the solder component used, and the first base material and the second base material are electrically connected. Make a good connection. From such a viewpoint, the resin composition preferably has a flux function.
As a more specific aspect, the resin composition includes, for example, (a) a thermosetting resin, (b) a compound having a flux function, (c) a film-forming resin, (d) a curing accelerator, (e) It can be prepared by including a filler and (f) other additives.

  Hereinafter, each component constituting the resin composition applicable to the present invention will be described.

(A) Thermosetting resin As the thermosetting resin, known resins can be used, and are not particularly limited. For example, epoxy resin, phenoxy resin, cyanate resin, silicone resin, oxetane resin, phenol resin, ( Examples include meth) acrylate resins, polyester resins (unsaturated polyester resins), diallyl phthalate resins, maleimide resins, polyimide resins (polyimide precursor resins), bismaleimide-triazine resins, and the like. In particular, a thermosetting resin containing at least one selected from the group consisting of epoxy resins, (meth) acrylate resins, phenoxy resins, cyanate resins, polyester resins, polyimide resins, silicone resins, maleimide resins, and bismaleimide-triazine resins. It is preferable to use it. Among these, an epoxy resin is preferable from the viewpoint of excellent curability and storage stability, heat resistance, moisture resistance, and chemical resistance of a cured product.

As the epoxy resin, one having two or more epoxy groups in one molecule can be used. Specifically, phenol novolac type epoxy resin, cresol novolac type epoxy resin, cresol naphthol type epoxy resin, biphenyl type epoxy resin, biphenyl aralkyl type epoxy resin, naphthalene type epoxy resin, diallyl bisphenol A type epoxy resin, bisphenol A type epoxy resin Resin, bisphenol F type epoxy resin, bisphenol S type epoxy resin, o-allyl bisphenol A type epoxy resin, 3,3 ′, 5,5′-tetramethyl 4,4′-dihydroxybiphenyl type epoxy resin, 4,4 ′ -Dihydroxybiphenyl type epoxy resin, 1,6-dihydroxybiphenyl type epoxy resin, brominated cresol novolac type epoxy resin, bisphenol D type epoxy resin, glycidyl ester of 1,6 naphthalenediol And epoxy resins such as triglycidyl ethers of ethers and aminophenols. These may be used alone or in combination. In order to obtain a resin composition having excellent reliability, it is preferable that the ionic impurities such as Na ⁺ and Cl ⁻ of the epoxy resin are as small as possible.

  The epoxy resin preferably contains a liquid at 25 ° C. Thereby, the filling property in the terminal vicinity of the resin composition can be improved. Moreover, when joining base materials, the unevenness | corrugation (gap) produced by the some terminal etc. on a base material can be embedded more effectively. In addition, when the resin composition is formed into a film, flexibility and flexibility can be imparted to the film, so that a film having excellent handling properties can be obtained. Moreover, the electrical connection between the substrates can be made better.

  Specific examples of the epoxy resin that is liquid at 25 ° C. include bisphenol A type epoxy resin, bisphenol F type epoxy resin, bisphenol S type epoxy resin, o-allyl bisphenol A type epoxy resin, 3,3 ′, 5,5′- Tetramethyl 4,4'-dihydroxybiphenyl type epoxy resin, 4,4'-dihydroxybiphenyl type epoxy resin, 1,6-dihydroxybiphenyl type epoxy resin, phenol novolac type epoxy resin, brominated cresol novolac type epoxy resin, bisphenol type Examples thereof include an epoxy resin, glycidyl ether of 1,6-naphthalenediol, triglycidyl ether of aminophenols, and a monoepoxy compound having one epoxy group in the molecule.

  Among these, it is preferable to use bisphenol A type epoxy resin and bisphenol F type epoxy resin. Thereby, the adhesiveness with respect to the base material of a resin composition and the mechanical characteristic after hardening of a resin composition can be made excellent.

  The epoxy resin that is liquid at 25 ° C. is more preferably one having a viscosity at 25 ° C. of 500 mPa · s or more and 50,000 mPa · s or less, more preferably 800 mPa · s or more and 40,000 mPa · s. The following are mentioned. By making the viscosity at 25 ° C. within the above range, the produced film has appropriate flexibility and excellent handling properties.

  The content of the thermosetting resin in the total solid content of the resin composition is not particularly limited, but is preferably 10% by mass to 75% by mass, and more preferably 15% by mass to 45% by mass. . Thereby, the heat resistance after hardening and mechanical characteristics can be made particularly excellent.

(B) Compound having a flux function The resin composition according to the present embodiment preferably contains a compound having a flux function. Thereby, the surface oxide film of the solder layer provided in the terminal can be removed, and electrical connection can be easily performed.
As will be described later, in the method for manufacturing a semiconductor device of this embodiment, the terminals are connected to each other at a relatively low temperature. In order to remove the oxide film on the surface of the solder layer at such a low temperature, it can be said that it is a particularly preferable embodiment to include a compound having the flux function and to select an appropriate blend and an appropriate compound.

The compound having a flux function is not particularly limited as long as it has a function of removing the oxide film on the solder surface, but a compound having a carboxyl group or both a carboxyl group and a phenolic hydroxyl group is preferable.
Moreover, an acid anhydride compound can be mentioned as a compound which can express the same effect, even if it does not have a carboxyl group.

  The blending amount of the compound having a flux function in the total solid content of the resin composition is not particularly limited, but is preferably 1% by mass or more and 30% by mass or less, and more preferably 3% by mass or more and 20% by mass or less. preferable. When the compounding amount of the compound having the flux function is within the above range, the flux function can be improved, and when the resin composition is cured, an unreacted epoxy resin or a compound having the flux function remains. Can be prevented, and migration resistance can be improved.

  In addition, among the compounds that act as curing agents for epoxy resins, there are compounds having a flux function (hereinafter, such compounds are also referred to as curing agents having a flux function). For example, aliphatic dicarboxylic acids, aromatic dicarboxylic acids and the like that act as curing agents for epoxy resins also have a flux function. In the present embodiment, a curing agent having such a flux function that acts also as a compound having a flux function and also acts as a curing agent for an epoxy resin can be suitably used.

  In addition, the compound having a flux function having a carboxyl group refers to a compound having one or more carboxyl groups in the molecule, and may be liquid or solid. Further, the compound having a flux function including a carboxyl group and a phenolic hydroxyl group means a compound having one or more carboxyl groups and phenolic hydroxyl groups in the molecule, and may be liquid or solid.

  Of these, examples of the compound having a flux function having a carboxyl group include aliphatic carboxylic acids and aromatic carboxylic acids.

Examples of the aliphatic carboxylic acid relating to the compound having a flux function having a carboxyl group include a compound represented by the following general formula (1), formic acid, acetic acid, propionic acid, butyric acid, valeric acid, caproic acid pivalate, and capryl. Examples include acid, lauric acid, myristic acid, palmitic acid, stearic acid, acrylic acid, methacrylic acid, crotonic acid, oleic acid, fumaric acid, maleic acid, oxalic acid, malonic acid, oxalic acid, and the like.
_{HOOC- (CH 2) n -COOH (} 1)
(In formula (1), n represents an integer of 1 or more and 20 or less.)

  Aromatic carboxylic acids related to the compound having a flux function with a carboxyl group include benzoic acid, phthalic acid, isophthalic acid, terephthalic acid, hemimellitic acid, trimellitic acid, trimesic acid, merophanic acid, planitic acid, pyromellitic acid , Merit acid, xylyl acid, hemelic acid, mesitylene acid, prenylic acid, toluic acid, cinnamic acid, salicylic acid (2-hydroxybenzoic acid), 3-hydroxybenzoic acid, 4-hydroxybenzoic acid, 2,3-dihydroxybenzoic acid Examples include acids, 2,4-dihydroxybenzoic acid, gentisic acid (2,5-dihydroxybenzoic acid), 2,6-dihydroxybenzoic acid, 3,5-dihydroxybenzoic acid, and the like, or derivatives thereof.

  Among these compounds having a flux function having a carboxyl group, the activity of the compound having a flux function, the amount of outgas generated during curing of the resin composition, and the elastic modulus and glass transition temperature of the cured resin composition The compound represented by the general formula (1) is preferable from the viewpoint of good balance. And among the compounds shown by the general formula (1), the compound in which n is 3 to 10 can suppress an increase in the elastic modulus in the resin composition after curing, and the semiconductor chip and the substrate It can use preferably by the point which can improve the adhesiveness of circuit members, such as.

Among the compounds represented by the general formula (1), examples of the compound in which n is 3 to 10 include, for example, n = 3 glutaric acid (HOOC— (CH ₂ ) ₃ —COOH), n = 4 adipic acid _{(HOOC- (CH 2) 4 -COOH} ), n = 5 of pimelic acid _{(HOOC- (CH 2) 5 -COOH} ), sebacic acid of _{n = 8 (HOOC- (CH 2} ) 8 -COOH) , and n = 10 HOOC— (CH ₂ ) ₁₀ —COOH and the like.
These derivatives are also useful as compounds having a flux function, such as methyl glutaric acid, dimethyl glutaric acid, methyl adipic acid, dimethyl adipic acid, methyl pimelic acid, dimethyl pimelic acid, methyl sebacic acid, dimethyl sebacic acid. Derivatives such as can also be used in the same manner.

The above-mentioned carboxyl group or a compound having both a carboxyl group and a phenol hydroxyl group is taken in three-dimensionally by reaction with an epoxy resin.
Therefore, from the viewpoint of improving the formation of a three-dimensional network of the epoxy resin after curing, the compound having a flux function is a curing having a flux activity that acts as a curing agent for the epoxy resin. It is preferable to use an agent. As a hardening | curing agent which has flux activity, the compound provided with the hydroxyl group which can be added to an epoxy resin and the carboxyl group which shows a flux effect | action (oxide film removal effect | action) is mentioned in 1 molecule, for example.

Examples of the curing agent having such a flux function include salicylic acid (2-hydroxybenzoic acid), 3-hydroxybenzoic acid, 4-hydroxybenzoic acid, 2,3-dihydroxybenzoic acid, 2,4-dihydroxybenzoic acid, and gentidine. Examples include acids (2,5-dihydroxybenzoic acid), 2,6-dihydroxybenzoic acid, 3,4-dihydroxybenzoic acid, and the like. These can be used alone or in combination of two or more.
Among these, it is preferable to use a compound having one carboxyl group and one hydroxyl group in the molecule as the compound having a flux function from the balance between high flux activity and appropriate reactivity with the thermosetting resin. .
Thereby, the surface oxide film of the solder layer can be effectively removed even under heating conditions at a relatively low temperature.

Particularly preferred compounds include compounds having one phenolic hydroxyl group and one carboxyl group in the molecule, and specifically include salicylic acid (2-hydroxybenzoic acid), 3-hydroxybenzoic acid, 4-hydroxybenzoic acid. Mention may be made of hydroxybenzoic acids such as acids.
Since these compounds are relatively easily available and have extremely high flux activity, they can be particularly preferably used in this embodiment.

  Moreover, the compounding quantity of the hardening | curing agent which has a flux function in resin composition total solid content is although it does not specifically limit, It is preferable that they are 1 mass% or more and 30 mass% or less, and they are 3 mass% or more and 20 mass% or less. It is particularly preferred. When the blending amount of the curing agent having a flux function in the resin composition is within the above range, the flux activity of the resin composition can be improved and the resin composition is stably incorporated into the thermosetting resin.

  Moreover, as an acid anhydride which has a flux function, an alicyclic acid anhydride, an aromatic acid anhydride, etc., or these derivatives are mentioned.

  Examples of alicyclic acid anhydrides related to the compound having a flux function include methyltetrahydrophthalic anhydride, methylhexahydrophthalic anhydride, methylhymic anhydride, hexahydrophthalic anhydride, tetrahydrophthalic anhydride, and trialkyltetrahydrophthalic anhydride. And acid, methylcyclohexene dicarboxylic acid anhydride, and the like or derivatives thereof.

  Examples of the aromatic acid anhydride relating to the compound having a flux function include phthalic anhydride, trimellitic anhydride, pyromellitic anhydride, benzophenonetetracarboxylic anhydride, and the like, or derivatives thereof.

  When an epoxy resin is used as the thermosetting resin, the compounding ratio (mass ratio) between the epoxy resin and the compound having a flux function is not particularly limited, but (epoxy resin / compound having a flux function) is 0.5 or more and 12 Is preferably 2 or less and particularly preferably 2 or more and 10 or less. By setting (epoxy resin / compound having a flux function) in the above range, the resin composition can be stably cured, and migration resistance can be improved.

  In the present embodiment, among these compounds having a flux function, one or more from the group consisting of the aforementioned hydroxybenzoic acid, sebacic acid and glutaric acid or derivatives thereof, phthalic anhydride or phthalic anhydride derivatives Is a preferred embodiment.

(C) Film forming resin In the present embodiment, it is preferable to use a thermosetting resin and a film forming resin in combination. Such a film-forming resin is not particularly limited as long as it is soluble in an organic solvent and has a film-forming property by itself. Those having either thermoplastic or thermosetting properties can be used, and these can be used in combination.

Examples of the film-forming resin include (meth) acrylic resin, phenoxy resin, polyester resin, polyurethane resin, polyimide resin, siloxane-modified polyimide resin, polybutadiene, polypropylene, styrene-butadiene-styrene copolymer, styrene-ethylene- Butylene-styrene copolymer, polyacetal resin, polyvinyl butyral resin, polyvinyl acetal resin, butyl rubber, chloroprene rubber, polyamide resin, acrylonitrile-butadiene copolymer, acrylonitrile-butadiene-acrylic acid copolymer, acrylonitrile-butadiene-styrene copolymer Examples include coalescence, polyvinyl acetate, and nylon. These may be used alone or in combination of two or more.
Among these, as the film-forming resin, it is preferable to use at least one selected from the group consisting of (meth) acrylic resins, phenoxy resins, and polyimide resins.

  In this embodiment, “(meth) acrylic resin” refers to a polymer of (meth) acrylic acid and its derivatives, or a copolymer of (meth) acrylic acid and its derivatives and other monomers. Means. Here, for example, the expression “(meth) acrylic acid” means “acrylic acid or methacrylic acid”.

  The weight average molecular weight of the film-forming resin is not particularly limited, but is preferably 10,000 or more, more preferably 20,000 to 1,000,000, and even more preferably 30,000 to 900,000. When the weight average molecular weight is in the above range, the film forming property of the resin composition can be further improved.

  When the resin composition is used as an adhesive film, the content of the film-forming resin is not particularly limited, but is preferably 0.5% by mass or more and 50% by mass or less in the total solid content of the resin composition, and 1% by mass. % To 40% by mass, more preferably 3% to 35% by mass. When the content is within the above range, the fluidity of the resin composition can be suppressed, and the handling of the adhesive film becomes easy.

(D) Curing accelerator It is preferable that the resin composition which concerns on this embodiment contains a hardening accelerator. By adding a curing accelerator, the resin composition can be easily cured after the terminals are connected to each other.

  A hardening accelerator can be suitably selected according to the kind etc. of curable resin. As the curing accelerator, for example, an imidazole compound having a melting point of 150 ° C. or higher can be used. When the melting point of the curing accelerator used is 150 ° C. or higher, the solder component constituting the solder layer can move to the surface of the internal electrode provided on the semiconductor chip before the curing of the resin composition is completed. The electrical connection between the internal electrodes can be made good. Examples of the imidazole compound having a melting point of 150 ° C. or higher include 2-phenyl-4-methylimidazole, 2-phenylhydroxyimidazole, 2-phenyl-4-methylhydroxyimidazole, and the like. They can be used in combination.

Although content of the said hardening accelerator in resin composition total solid content is not specifically limited, It is preferable that it is 0.005 mass% or more and 10 mass% or less, and is 0.01 mass% or more and 5 mass% or less. Is more preferable. As a result, the function as a curing accelerator can be exhibited more effectively, the curability of the resin composition can be improved, and the melt viscosity of the resin at the melting temperature of the solder component constituting the solder layer is increased. However, a good solder joint structure can be obtained. Moreover, the preservability of the resin composition can be further improved.
These curing accelerators may be used alone or in combination of two or more.

(E) Filler The resin composition according to the present embodiment may further include a filler. Thereby, it becomes easy to reduce the linear expansion coefficient of the resin composition and adjust the minimum melt viscosity of the resin composition, and the electrical connection of the terminals can be stably performed.

The filler blended in the resin composition applicable to the present invention is not particularly limited. For example, in addition to organic fillers using organic materials such as resin particles containing organic resin components and rubber particles containing rubber components, inorganic fillers are also included. Materials can be mentioned.
Among these, an inorganic filler is preferable from the viewpoint of improving the reliability of the semiconductor device. By containing the inorganic filler, the linear expansion coefficient of the resin composition layer can be reduced, and thus the reliability can be improved.
Further, from the viewpoint of improving impact resistance, it is preferable to use an organic filler and an inorganic filler in combination. As the organic filler used in this case, rubber particles containing a rubber component such as acrylic rubber, silicon rubber, and butadiene rubber are more preferable. By including the organic filler, in addition to the above-described effect of using the inorganic filler, it is possible to increase the toughness of the cured product of the resin composition, thereby improving the impact resistance of the semiconductor device.

Although it does not specifically limit as an inorganic filler, For example, silver, titanium oxide, a silica, mica, an alumina etc. can be mentioned, These can also contain multiple types. Thus, although the inorganic filler can be selected from a plurality of types, silica can be preferably used from the viewpoint of cost and the like. Thereby, it can be made the thing excellent in the thermal characteristic of the resin composition after hardening. Moreover, the visibility of the joining location of a base material at the time of providing a resin composition to a base material can be made favorable. As a result, alignment can be performed more easily. As the shape of the silica, there are crushed silica and spherical silica, and spherical silica is preferable.
From the viewpoint of thermal conductivity, aluminum oxide, aluminum nitride, titanium oxide, silicon nitride, boron nitride, or the like can also be used.

Further, the filler is not particularly limited, but the average particle diameter is preferably 500 nm or less, and more preferably 300 nm or less. Although it does not specifically limit as a lower limit of the average particle diameter of a filler, For example, it is 5 nm.
By including the filler having such an average particle diameter, the viscosity of the resin composition at the time of joining the substrates can be made more appropriate, and the joining can be performed satisfactorily. Moreover, aggregation of a filler can be suppressed in a resin composition, and an external appearance can be improved. Further, when light passes through the resin composition, it is possible to reduce the filler from inhibiting the transmission of visible light, and as a result, the joint portion of the terminal portion when the resin composition is applied to the substrate The visibility is further improved, the alignment is further facilitated, and the base materials can be electrically connected to each other well by the flux function.

  Although content of a filler is not specifically limited, It is preferable that it is 0.1 mass% or more and 80 mass% or less with respect to the resin composition total solid, and it is more preferable that it is 20 mass% or more and 70 mass% or less. preferable. Thereby, it is possible to improve the thermal properties of the cured resin composition while improving the visibility of the joint portion of the terminal portion when the resin composition is applied to the substrate. In addition, by setting the above range, the difference in linear expansion coefficient between the cured resin composition and the base material is reduced, and the stress generated during thermal shock can be reduced. Can be more reliably suppressed. Furthermore, since it can suppress that the elasticity modulus of the resin composition after hardening becomes high too much, the reliability of a semiconductor device rises.

(F) Other additives Moreover, the resin composition of this embodiment may contain components other than the above.
For example, the resin composition of this embodiment may contain a phenolic curing agent having a weight average molecular weight of 300 or more and 2500 or less. Thereby, the glass transition temperature of the hardened | cured material of a resin composition can be raised, and also it becomes possible to improve ion migration resistance. Moreover, moderate softness | flexibility can be provided to a resin composition. Moreover, the electrical connection between the substrates can be made better.

  Although it does not specifically limit as a phenol type hardening | curing agent, For example, a phenol novolak resin, a cresol novolak resin, a bisphenol A type novolak resin, a bisphenol F type novolak resin, a bisphenol AF type novolak resin etc. are mentioned. Among these, it is preferable to use a phenol novolac resin or a cresol novolac resin from the viewpoint of having the above-described characteristics and exhibiting effects.

  The content of the phenolic curing agent in the total solid content of the resin composition is not particularly limited, but is preferably 1% by mass or more and 30% by mass or less, and more preferably 3% by mass or more and 25% by mass or less. . By setting the content of the phenolic curing agent in the above range, the resin composition can more effectively fill the unevenness (gap) caused by a plurality of terminals on the substrate. Moreover, the glass transition temperature of the hardened | cured material of a resin composition can be raised effectively.

  Although the weight average molecular weight of a phenol type hardening | curing agent is not specifically limited, It is preferable that it is 300 or more and 2500 or less, and it is especially preferable that it is 400 or more and 2300 or less. Thereby, the glass transition temperature of the hardened | cured material of a resin composition can be raised, and also ion migration resistance can be improved efficiently. Moreover, moderate softness | flexibility can be provided to a resin composition. Further, the electrical connection between the substrates can be made better. Here, the weight average molecular weight can be measured by GPC (gel permeation chromatogram).

  Moreover, the resin composition of this embodiment may further contain a silane coupling agent. By including the silane coupling agent, the adhesion of the resin composition to a base material such as a semiconductor chip, a semiconductor wafer, a silicon substrate, a glass substrate, an organic substrate, or the like can be enhanced. As the silane coupling agent, for example, an epoxy silane coupling agent, an aromatic-containing aminosilane coupling agent and the like can be used. These may be used alone or in combination of two or more. The blending amount of the silane coupling agent may be appropriately selected, but is preferably 0.01% by mass or more and 10% by mass or less, more preferably 0.05% by mass or more, based on the total solid content of the resin composition. It is 5 mass% or less, More preferably, it is 0.1 mass% or more and 2 mass% or less.

  In addition, the resin composition according to this embodiment may further contain additives such as a plasticizer, a stabilizer, a tackifier, a lubricant, an antioxidant, an antistatic agent, and a pigment.

  In the present embodiment, a resin composition containing a thermosetting resin can be prepared by mixing and dispersing the above components. The mixing method and dispersion method of each component are not specifically limited, It can mix and disperse | distribute by a conventionally well-known method.

Moreover, in this embodiment, you may prepare the liquid resin composition by mixing each said component in a solvent or under absence of solvent.
The solvent used at this time is not particularly limited as long as it is inert to each component. For example, acetone, methyl ethyl ketone (MEK), methyl isobutyl ketone (MIBK), diisobutyl ketone (DIBK), cyclohexanone, Ketones such as diacetone alcohol (DAA); aromatic hydrocarbons such as benzene, xylene, and toluene; alcohols such as methyl alcohol, ethyl alcohol, isopropyl alcohol, and n-butyl alcohol; methyl cellosolve, ethyl cellosolve, butyl cellosolve, Cellosolves such as methyl cellosolve acetate and ethyl cellosolve acetate; N-methyl-2-pyrrolidone (NMP), tetrahydrofuran (THF), dimethylformamide (DMF), dibasic acid ester (DB ), Ethyl 3-ethoxypropionate (EEP), and dimethyl carbonate (DMC). Moreover, it is preferable that the usage-amount of a solvent is an quantity from which the solid content concentration of the component mixed with the solvent will be 10-80 mass%.

  The thickness when the thermosetting resin according to the present embodiment is formed into a film shape is not particularly limited, but is preferably 1 μm or more, more preferably 3 μm or more, and particularly preferably 5 μm or more. Moreover, it is preferable that it is 200 micrometers or less, It is more preferable that it is 150 micrometers or less, It is especially preferable that it is 100 micrometers or less. When the thickness of the resin composition is within the above range, the gap between adjacent terminals can be sufficiently filled with the resin composition. Moreover, the mechanical adhesive strength after hardening of a resin composition and the electrical connection between the terminals which oppose can fully be ensured.

Next, the manufacturing method of the resin composition containing a thermosetting resin is demonstrated.
When the resin composition used in the present embodiment is liquid at 25 ° C., for example, a thermosetting resin and other components are weighed and then mixed with a three roll or a stirrer so that each component is uniformly dispersed. By doing so, a resin composition can be produced.

In addition, when the resin composition containing the thermosetting resin is solid at 25 ° C., for example, when the thermosetting resin and other components are weighed and the filler is used, the solvent-soluble component is dissolved in the solvent. Then, the varnish can be produced by a method of mixing and dispersing this, a method of preparing each component as a master batch, or the like.
Subsequently, it can produce by apply | coating the varnish obtained above on peeling substrates, such as a polyester sheet, drying at a predetermined temperature, and volatilizing a solvent.

Subsequently, as shown in FIG. 3 c), the semiconductor chip 103 provided with the resin composition layer 110, the semiconductor wafer 100 including the terminals 101, and the terminals 101 and 102 are resin composition layers. Laminate so as to face each other through 110.
More specifically, the terminal 101 and the terminal 102 are positioned so as to correspond to each other, and the semiconductor wafer 100 and the semiconductor chip 103 are stacked via the resin composition layer 110 as shown in FIG. A laminated body is formed.

  Subsequently, in the bonding step shown in FIG. 3d), the laminate is heated to bond the terminals together.

Here, in this specification, “joining” specifically refers to the following aspects.
That is, in this specification, “joining” means that the solder spreads on the surface of the terminal to form a joining surface as shown in FIG.

In the above-mentioned Patent Document 2, in the contact step shown in paragraph 0055, a load of 20 N is applied for 2 seconds at 170 ° C., which is a relatively high temperature, so that the protruding electrode of the semiconductor chip and the electrode portion of the substrate are brought into contact with each other. Thus, a mode for obtaining a mounting body is disclosed.
Here, paragraph 0043 of the document discloses a lead-free solder of about 225 to 235 ° C. as the melting point of the solder. In the contact process in Patent Document 2, the solder melting point and the heating temperature are disclosed. Are sufficiently separated from each other, so that the solder layer does not spread as described above, and a bonding surface is not formed. As shown in FIG. 8, the solder layer is not deformed, and the solder layer only partially contacts the terminal. In this specification, such a mode is expressed as “contact” or “contact”.

In this embodiment, the bonding step is performed at a temperature below the melting point of the solder. However, in performing this operation, it is important to select a resin composition having an appropriate flux function, It is important that a compound having a proper flux function is blended in an appropriate amount as a resin composition, and at the same time, the resin components to be combined are blended with sufficient control.
For example, in Example 3 of International Publication No. 2011/007531, the second step of bringing the connecting metal electrode into contact with the connecting solder electrode is performed at a temperature of 180 ° C. In the present invention, a compound having a lower activity than the compound having the flux function shown in the Examples section of the present specification is used. For this reason, similarly to the above-mentioned Patent Document 2, wetting and spreading of the solder layer does not occur, and a bonding surface is not formed. As shown in FIG. 8, the solder layer is not deformed, and the solder layer only partially contacts the terminal.

  In Example 3 of the International Publication No. 2011/007531 pamphlet, a step of “contacting” the terminals first is performed using a flip chip bonder. In this step, conditions are set so that the position control of the flip chip bonder also “contacts”. Therefore, the terminals do not come closer to each other than the contact state, and the solder layer does not deform or spread.

Further, in one aspect of the present embodiment, for example, as illustrated in FIG. 7, when the semiconductor device is viewed from a direction orthogonal to the stacking direction of the base material, the bonding surface is the first terminal or the second terminal. The length of the surface is 90% or more. Thereby, higher connection reliability can be exhibited.
Note that the direction orthogonal to the lamination direction of the base material may be any direction selected, for example, and when the joint surface is not formed parallel to the terminal, the joint surface is used as the arc length. The length of can be defined.
The bonding surface is more preferably formed with a length of 95% or more with respect to the length of the surface of the first terminal or the second terminal, and more preferably with a length of 100%. preferable.

Further, in one aspect of the present embodiment, the bonding surface includes an alloy of a solder component that forms a solder layer and a metal component that forms the first terminal or the second terminal. As a result, the connectivity between the terminals is further improved.
For example, when a bonding surface is formed using a solder layer containing tin with respect to a terminal composed of a bump made of copper, this bonding surface includes an alloy containing copper and tin.
In the present embodiment, for example, by appropriately selecting the type and blending amount of the compound having a flux function, it is possible to form a joint surface including such an alloy.

In this embodiment, the heating temperature is 20 ° C. or lower than the melting point of the solder component constituting the solder layer 104 included in the terminal 102. In the present specification, the “heating temperature” refers to the temperature of the resin composition in the vicinity of the terminal when the temperature is raised.
Thus, by heating at a temperature 20 ° C. or more lower than the melting point of the solder component, it is possible to suppress deterioration of the resin component. The heating temperature condition is preferably set to a temperature that is 25 ° C. or more lower than the melting point of the solder component, and more preferably set to a temperature that is 30 ° C. or more lower. By adopting such temperature conditions, it is possible to further suppress the deterioration of the resin component and to suppress the protrusion of the resin.
In particular, when a semiconductor chip having a TSV structure is used, the occurrence of warpage due to the difference between the coefficient of linear expansion between the passivation film for circuit protection on the chip surface and the semiconductor chip can be reduced.
In addition, the lower limit value of the heating temperature is set to a temperature that is 40 ° C. lower than the melting point of the solder component in the aspect of the present embodiment, more preferably a temperature that is 35 ° C. lower than the melting point of the solder component, and more preferably solder. The temperature is set to 33 ° C. lower than the melting point of the components. By controlling to such a heating temperature, the wettability of the solder with respect to the terminal can be further improved, and when a semiconductor device is obtained, higher connection reliability can be exhibited.

In the present embodiment, as described above, this can be performed under a temperature condition lower than that of the conventional bonding process. Therefore, the lifetime of the heating device can be extended, and the manufacturing cost of the electronic component can be reduced. Moreover, the pot life of the resin composition to be used can be extended.
In addition, since the resin composition is hard to be thermally denatured such as curing because it is bonded at a low temperature, voids in the resin composition can be effectively reduced by appropriately setting the pressurizing conditions in a pressurized atmosphere with a fluid. Can be made.
Further, when a semiconductor chip is used as the substrate, the warpage of the semiconductor chip alone can be reduced.
Furthermore, even a solder component having a melting point that deviates from the temperature at which the terminals are joined can be applied to the semiconductor device manufacturing process, so that restrictions on the solder material that can be used in the process can be relaxed.

  Although it does not specifically limit as a method of implementing the said joining process, It can carry out using a crimping | compression-bonding apparatus, a flip chip bonder, etc. The bonding conditions are not particularly limited, but the temperature conditions are preferably performed in the above-described temperature range. The time is preferably from 0.1 second to 60 seconds, particularly preferably from 1 second to 60 seconds. The pressure is preferably 5N or more, and more preferably 10N or more. Moreover, it is preferable to set it as 100 N or less, and it is more preferable to set it as 50 N or less. Thereby, electrical connection with higher reliability can be performed. In addition, the said pressure shows the pressure at the time of pressurizing a 5-mm square chip | tip.

In addition, in the process of heating this laminated body, it can also heat, pressing a laminated body with a fluid. Thereby, generation | occurrence | production of the void in the layer 110 of a resin composition can be suppressed, and terminals can be joined with high precision.
In addition, when it implements by the method of heating with pressurizing with a fluid, as a specific applied pressure, conditions of 0.1 MPa or more and 10 MPa or less can be adopted, more preferably 0.5 MPa or more and 5 MPa or less. Conditions can be adopted.

Then, by repeating the steps from b) to d) in FIG. 2, as shown in e) in FIG. 2, a structure in which a plurality of semiconductor chips 103 are bonded on the substrate (semiconductor wafer 100) is obtained. be able to.
Thus, the structure which passed through the joining process can further perform the hardening process which hardens the layer 110 of a resin composition after the said joining process.
Although it does not specifically limit as temperature conditions in a curing process, For example, it is 100 degreeC or more, Preferably it is 120 degreeC or more, More preferably, it can be 150 degreeC or more. For example, it is 300 degrees C or less, Preferably it is 280 degrees C or less, More preferably, it can be 250 degrees C or less.
The time required for the curing step is, for example, 10 minutes or more, preferably 30 minutes or more, and more preferably 60 minutes or more. By adopting such a time condition, the resin composition can be reliably cured. The upper limit value of the time required for the curing process is not particularly limited, but is, for example, 8 hours or less.
The curing step can be performed while pressurizing the laminate with a fluid. As conditions for pressurizing, for example, conditions of 0.1 MPa or more and 10 MPa or less can be adopted, and conditions of 0.5 MPa or more and 5 MPa or less can be adopted more preferably.
As a fluid that can be used, an inert gas such as air or nitrogen is preferable.

As described above, the terminal 101 and the terminal 102 can be bonded together via the bonding portion 105. In addition, the resin composition layer 110 is cured as shown in FIG. Can be formed.
As a result, the semiconductor wafer 100 and the semiconductor chip 103 can be fixed via the insulating layer 120, and the semiconductor wafer 100 and the semiconductor chip 103 are electrically connected via the bonding portion 105. Can do.

Moreover, in this embodiment, after performing the process of FIG. 3 e), a solder reflow process is performed by heating further. Thereby, the connection between terminals can be strengthened and the connection reliability between base materials can be further improved.
As a temperature condition of this step, for example, the temperature can be 10 ° C. or more lower than the melting point of the solder component constituting the solder layer 104, and more preferably 5 ° C. lower than the melting point of the solder component constituting the solder layer 104. It can be higher than the temperature. The upper limit value of the temperature condition to be adopted is not particularly limited, but is, for example, not more than 60 ° C. higher than the melting point of the solder component constituting the solder layer 104.
For example, as the temperature condition of this step, a condition of 200 ° C. or more can be adopted, and a condition of 210 ° C. or more can be adopted. Further, the upper limit value of the temperature condition to be employed is not particularly limited, but can be set to, for example, 280 ° C. or less.

  Finally, as shown in FIG. 3F), the semiconductor device 150 can be obtained by separating the stacked body obtained above.

<Second production method>
Next, a manufacturing method of the semiconductor device 250 having a different aspect from the <first manufacturing method> will be described with reference to FIGS.

First, as shown in FIG. 4 a), a semiconductor chip 200 having a connection portion 204 in which a plurality of individual circuits (not shown) are formed and a semiconductor chip 203 having a connection portion 205 are prepared. In the present embodiment, the semiconductor chip 200 includes a terminal 201 connected to the connection unit 204, and the semiconductor chip 203 includes a terminal 202 connected to the connection unit 205.
The members constituting the terminal 201 and the terminal 202 can be appropriately selected from the terminal members shown in <First manufacturing method>.

In the present embodiment, the semiconductor chip 203 includes a terminal 202 that is coupled to the connection portion 205, and a solder layer 206 is provided at the tip of the terminal 202. Further, a resin composition layer 210 is provided so as to cover the terminals 202 and the solder layer 206.
As a method of forming the resin composition layer 210, the same method as the above <First manufacturing method> can be adopted, and the same resin composition as described above can be adopted.

Next, as shown in FIG. 4b), the semiconductor chip 203 provided with the resin composition layer 210, the semiconductor chip 200 provided with the terminals 201, and the terminals 201 and 202 are layers of the resin composition. It arrange | positions so that it may oppose through 210.
Then, the terminal 201 and the terminal 202 are positioned so as to correspond to each other to form a stacked body in which the semiconductor chip 200 and the semiconductor chip 203 are stacked via the resin composition layer 210.

Subsequently, the laminate is heated in the step shown in FIG. Regarding the heating conditions, the same conditions as in <First manufacturing method> can be employed.
By performing this heating, the semiconductor chip 200 and the semiconductor chip 203 are electrically connected via the bonding portion 207 as shown in FIG. 4C), and the resin composition layer 210 is cured. Thus, the insulating layer 220 can be formed.
Further, in FIG. 4c), as in the <first manufacturing method>, the "joining process" and the "curing process" can be performed in combination, and these processes adopt the pressurizing conditions described above. Can do. Furthermore, after performing the process of FIG. 4c), a solder reflow process is performed. Thereby, the connection reliability between base materials can be further improved.

  As will be described later, in this <second manufacturing method>, another semiconductor chip 203 can be further laminated. Therefore, in the stage shown in FIG. 4c) in which the semiconductor chip 200 and one semiconductor chip 203 are stacked, the above-described joining process and solder reflow process are not performed, and the semiconductor chip 200, 2 The joining process and the semiconductor reflow process as described above are performed at the stage shown in FIG. 5 g), which will be described later, in which the semiconductor chips 203 are stacked, or at the stage where three or more semiconductor chips 203 are stacked. You can also.

  Subsequently, as shown in FIG. 5D), a terminal 208 is provided on the connection portion 205 included in the semiconductor chip 203. The terminal 208 can be the same as the terminal 201 and the terminal 202.

Subsequently, as in the steps shown in FIGS. 5E) to 5G), the semiconductor device 250 in which three semiconductor chips are stacked is obtained by stacking and heating the semiconductor chips 203. The semiconductor chip 203 has a structure similar to that shown in FIG. 4A), and the following steps similar to those in FIGS. 4A) to 4C may be repeated.
Note that the semiconductor device 250 also has the connection portion 205 in the semiconductor chip 203 provided at the uppermost layer, so that it can be further stacked by repeating the same process.

  Conventionally, when a large number of semiconductor chips or the like are stacked in this way, the entire time required for the semiconductor device manufacturing process becomes long, and there is a problem that the resin is denatured in this process. However, since the manufacturing method of this embodiment can lower the temperature at the time of joining the terminals, for example, when performing a pressure curing step, voids in the resin composition can be effectively reduced. From such a point, according to the manufacturing method of the semiconductor device of the present embodiment, a sufficient advantage can be exhibited in the process of stacking the semiconductor chips in multiple layers.

In the present <second manufacturing method>, the semiconductor chip 203 is provided with a connection portion 205. Generally, on the side opposite to the surface of the connection portion 205 that is bonded to the semiconductor chip 200, polyimide is used. A circuit protective film composed of, for example, is applied. For this reason, conventionally, when the upper surface side of the chip is heated with a flip chip bonder or the like, the circuit protection film may thermally expand, and the semiconductor chip 203 may be convexly warped. In addition, when such warpage occurs, a gap is formed between the substrates, and electrical joining may be difficult.
In the present <second manufacturing method>, the base materials can be bonded to each other at a temperature lower than that of the conventional method, so that the above problem can be solved.

[Second Embodiment]
Next, a method for manufacturing a semiconductor device different from the first embodiment will be described.
The manufacturing method of the semiconductor device in this embodiment is as follows.
Preparing a first base material provided with a first terminal and a second base material provided with a second terminal;
Providing a layer of a resin composition on the surface of the first base material provided with the first terminal;
Laminating the first base material so that the first terminal and the second terminal face each other through the resin composition layer with respect to the second base material;
Joining the first terminal and the second terminal via solder by heating at a first temperature;
A step of performing solder reflow by further heating,
A method for manufacturing a semiconductor device, comprising:
At least one of the first terminal and the second terminal includes a solder layer on the terminal surface,
The first temperature is a temperature that is 20 ° C. or more lower than the melting point of the solder component constituting the solder layer,
In the step of joining the first terminal and the second terminal, after the first terminal and the second terminal are brought into contact with each other, the solder layer is further deformed to deform the first terminal. Forming a joint surface between the first terminal and the second terminal by bringing the terminal and the second terminal closer to each other;
The bonding surface includes an alloy of a solder component constituting the solder layer and a metal component constituting the first terminal or the second terminal.
A method for manufacturing a semiconductor device.

In the manufacturing method of the semiconductor device of the present embodiment, the lower limit value of the temperature condition for the step of bonding the first terminal and the second terminal is not particularly defined, but on the other hand, the bonding formed in the bonding step It is an essential condition that the surface contains an alloy of the solder component constituting the solder layer and the metal component constituting the first terminal or the second terminal.
By adopting such a configuration, the connectivity between the terminals can be made sufficient in the joining process, and the connection reliability when the semiconductor device is obtained can be made higher.
In addition, as a terminal, a base material, a resin composition, and a solder layer used in the present embodiment, the same ones as those in the first embodiment can be used, and the conditions in each step are also described in the first. The thing similar to what was described in this embodiment is employable.

[Method of manufacturing electronic parts]
The semiconductor device manufacturing method of each embodiment can be applied to an electronic component manufacturing method.
For example, the semiconductor devices 150 and 250 obtained as described above can be electronic components by being mounted on a substrate.

  Since the electronic component manufactured in this way can increase the integration density of the semiconductor device that can be mounted in one package, it can cope with higher functionality and miniaturization of the electronic device.

  In addition, the electronic component of this embodiment can be widely used for a mobile phone, a digital camera, a video camera, a car navigation system, a personal computer, a game machine, a liquid crystal television, a liquid crystal display, an organic electroluminescence display, a printer, etc., for example.

In the present embodiment, a method for manufacturing a semiconductor device in which semiconductor chips are stacked on a semiconductor wafer has been described. However, the present invention is not limited to this.
That is, the method of the present invention can also be applied to the manufacture of a semiconductor device obtained by connecting a semiconductor wafer and a semiconductor wafer. Similarly, the semiconductor device is formed by connecting semiconductor chips to each other, and connecting the semiconductor chip and the substrate. The present invention can also be applied in the case of manufacturing.

  EXAMPLES Hereinafter, although this invention is demonstrated in detail using an Example, this invention is not limited to description of these Examples at all.

Example 1
[Production of resin film (resin layer)]
9 g of phenol novolac resin (manufactured by Sumitomo Bakelite Co., Ltd., model number: PR-55617), 26.7 g of liquid bisphenol A type epoxy resin (manufactured by DIC Corporation, model number: EPICLON-840S), and 9 g of 4-hydroxybenzoic acid (Tokyo) Kasei Kogyo Co., Ltd.), bisphenol A type phenoxy resin 14.7 g (manufactured by Nippon Kayaku Epoxy Manufacturing Co., Ltd., model number: YP-50) and 2-phenyl-4-methylimidazole 0.1 g (Shikoku Chemicals Co., Ltd.) Company-made, model number: 2P4MZ), β- (3,4-epoxycyclohexyl) ethyltrimethoxysilane 0.5 g (manufactured by Shin-Etsu Chemical Co., Ltd., model number: KBM-403), and spherical silica filler 40 g (AD Corporation) Made by Matex, model number: SC1050, average particle size 0.25 μm), methyl ethyl ketone The resin varnish having a solid content concentration of 50% by mass was obtained.
This resin varnish was applied to a polyester film (manufactured by Toray Industries, Inc., model number: Lumirror) and dried under conditions of 100 ° C./5 min to obtain a resin film having a resin thickness of 35 μm.

[Mounting test]
An 8-inch silicon wafer on which a dicing film was formed was prepared.
On the surface opposite to the surface on which the dicing film is formed, 2924 copper bumps having a diameter of 25 μm and a height of 35 μm are formed, and a 10 μm-thick tin-silver solder component (melting point: 221 ° C.) is formed thereon. A configured solder layer is formed.

Using a vacuum laminator (manufactured by Meiki Seisakusho Co., Ltd., model number: MVLP-500 / 600-2A) under the conditions of 95 ° C./30 sec / 0.8 MPa, the above surface is applied to the 8-inch silicon wafer on the surface side on which the copper bumps are formed. A resin film was laminated.
Next, using a dicing apparatus (manufactured by DISCO Corporation, model number: DFD-6340), the (dicing film / silicon wafer / resin film) laminate was diced under the following conditions to obtain a semiconductor chip having a size of 5 mm square. .

<Dicing conditions>
Dicing size: 5mm x 5mm square Dicing speed: 10mm / sec
Spindle speed: 30000 rpm
Dicing maximum depth: 0.07mm
Dicing blade thickness: 55 μm

Separately, a silicon wafer having a predetermined pattern in which a pad having a diameter of 25 μm is formed and Ni / Au plating is formed on the pad surface is prepared, and the semiconductor chip obtained above is applied to the silicon wafer. Laminated. At this time, it arrange | positioned so that the copper bump of the said semiconductor chip may oppose through the resin film with respect to the pattern provided in the silicon wafer.
The silicon wafer and the semiconductor chip were bonded with a flip chip bonder under conditions of a stage temperature of 110 ° C., a tool temperature of 220 ° C. (actual temperature of 199 ° C.), 30 N, and a time of 10 seconds.
Then, a semiconductor device was obtained by performing a curing process under conditions of a temperature of 180 ° C., a time of 2 hours, and a pressure of 0.8 MPa, and a solder reflow process of a temperature of 220 ° C. for a time of 10 minutes.

(Example 2)
Example 1 except that the silicon wafer and the semiconductor chip were bonded with a flip chip bonder under conditions of a stage temperature of 110 ° C., a tool temperature of 200 ° C. (actual temperature of 181 ° C.), 30 N, and a time of 10 seconds. In the same manner, a resin film, a semiconductor chip, and a semiconductor device were obtained.

(Example 3)
Example 1 except that the silicon wafer and the semiconductor chip were bonded with a flip chip bonder under conditions of a stage temperature of 110 ° C., a tool temperature of 205 ° C. (actual temperature of 186 ° C.), 30 N, and a time of 10 seconds. In the same manner, a resin film, a semiconductor chip, and a semiconductor device were obtained.

Example 4
Example 1 except that the bonding of the silicon wafer and the semiconductor chip was performed using a flip chip bonder under conditions of a stage temperature of 110 ° C., a tool temperature of 210 ° C. (actual temperature of 191 ° C.), 30 N, and a time of 10 seconds. In the same manner, a resin film, a semiconductor chip, and a semiconductor device were obtained.

(Example 5)
Example 1 except that the bonding of the silicon wafer and the semiconductor chip was performed using a flip chip bonder under conditions of a stage temperature of 110 ° C., a tool temperature of 215 ° C. (actual temperature of 196 ° C.), 30 N, and a time of 10 seconds. In the same manner, a resin film, a semiconductor chip, and a semiconductor device were obtained.

(Example 6)
[Production of resin film (resin layer)]
9 g of phenol novolac resin (manufactured by Sumitomo Bakelite Co., Ltd., model number: PR-55617), 26.7 g of liquid bisphenol A type epoxy resin (manufactured by DIC Corporation, model number: EPICLON-840S), and 4.5 g of 3-hydroxybenzoic acid (Manufactured by Tokyo Chemical Industry Co., Ltd.), phenolphthaline 4.5 g (manufactured by Tokyo Chemical Industry Co., Ltd.), and 14.7 g of bisphenol A type phenoxy resin (manufactured by Nippon Kasei Epoxy Manufacturing Co., Ltd., model number: YP-50) And 0.1 g of 2-phenyl-4-methylimidazole (manufactured by Shikoku Chemicals Co., Ltd., model number: 2P4MZ) and 0.5 g of β- (3,4-epoxycyclohexyl) ethyltrimethoxysilane (Shin-Etsu Chemical Co., Ltd.) Manufactured, model number: KBM-403) and spherical silica filler 40 g (manufactured by Admatex Co., Ltd., mold) : SC1050, average particle size 0.25 [mu] m), were dissolved and dispersed in methyl ethyl ketone to obtain a solid concentration of 50 wt% of the resin varnish.
This resin varnish was applied to a polyester film (manufactured by Toray Industries, Inc., model number: Lumirror) and dried under conditions of 100 ° C./5 min to obtain a resin film having a resin thickness of 35 μm.

  Thereafter, in the same manner as in Example 4, a semiconductor chip was obtained, and the silicon wafer and the semiconductor chip were bonded to obtain a semiconductor device.

(Example 7)
[Production of resin film (resin layer)]
9 g of phenol novolac resin (manufactured by Sumitomo Bakelite Co., Ltd., model number: PR-55617), 26.7 g of liquid bisphenol A type epoxy resin (manufactured by DIC Corporation, model number: EPICLON-840S), and 9 g of sebacic acid (Tokyo Chemical Industry Co., Ltd.) Company-made), bisphenol A type phenoxy resin 14.7 g (manufactured by Nippon Kayaku Epoxy Manufacturing Co., Ltd., model number: YP-50), 2-phenyl-4-methylimidazole 0.1 g (manufactured by Shikoku Kasei Kogyo Co., Ltd.) Model number: 2P4MZ), β- (3,4-epoxycyclohexyl) ethyltrimethoxysilane 0.5 g (manufactured by Shin-Etsu Chemical Co., Ltd., model number: KBM-403), and spherical silica filler 40 g (manufactured by Admatechs, Model number: SC1050, average particle size 0.25 μm) dissolved and dispersed in methyl ethyl ketone Thus, a resin varnish having a solid content concentration of 50% by mass was obtained.
This resin varnish was applied to a polyester film (manufactured by Toray Industries, Inc., model number: Lumirror) and dried under conditions of 100 ° C./5 min to obtain a resin film having a resin thickness of 35 μm.

  Thereafter, in the same manner as in Example 4, a semiconductor chip was obtained, and the silicon wafer and the semiconductor chip were bonded to obtain a semiconductor device.

(Example 8)
[Production of resin film (resin layer)]
Liquid bisphenol A type epoxy resin 17.5 g (manufactured by DIC Corporation, model number: EPICLON-840S), naphthalene type epoxy resin 18.0 g (manufactured by DIC Corporation, model number: EPICLON HP-4700), and glutaric acid 9 g (Tokyo) Kasei Kogyo Co., Ltd.), bisphenol A type phenoxy resin 14.7 g (manufactured by Nippon Kayaku Epoxy Manufacturing Co., Ltd., model number: YP-50) and 2-phenyl-4-methylimidazole 0.1 g (Shikoku Chemicals Co., Ltd.) Company-made, model number: 2P4MZ), β- (3,4-epoxycyclohexyl) ethyltrimethoxysilane 0.5 g (manufactured by Shin-Etsu Chemical Co., Ltd., model number: KBM-403), and spherical silica filler 40 g (AD Corporation) Made by Mattex, model number: SC1050, average particle size 0.25 μm) to methyl ethyl ketone Solution-dispersed, a solid content concentration of 50 wt% of the resin varnish.
This resin varnish was applied to a polyester film (manufactured by Toray Industries, Inc., model number: Lumirror) and dried under conditions of 100 ° C./5 min to obtain a resin film having a resin thickness of 35 μm.

  Thereafter, in the same manner as in Example 4, a semiconductor chip was obtained, and the silicon wafer and the semiconductor chip were bonded to obtain a semiconductor device.

Example 9
[Production of resin film (resin layer)]
Liquid bisphenol A type epoxy resin 13.3 g (manufactured by DIC Corporation, model number: EPICLON-840S), naphthalene type epoxy resin 13.4 g (manufactured by DIC Corporation, model number: EPICLON HP-4700), and trialkyltetrahydroanhydrophthalic acid 18 g of acid (manufactured by Mitsubishi Chemical Co., Ltd., model number: YH-307), 14.7 g of bisphenol A type phenoxy resin (manufactured by Nippon Kayaku Epoxy Manufacturing Co., Ltd., model number: YP-50), and 2-phenyl-4-methyl 0.1 g of imidazole (manufactured by Shikoku Kasei Kogyo Co., Ltd., model number: 2P4MZ) and 0.5 g of β- (3,4-epoxycyclohexyl) ethyltrimethoxysilane (manufactured by Shin-Etsu Chemical Co., Ltd., model number: KBM-403) , Spherical silica filler 40 g (manufactured by Admatechs Co., Ltd., model number: SC1050, flat The particle size 0.25 [mu] m), were dissolved and dispersed in methyl ethyl ketone to obtain a solid concentration of 50 wt% of the resin varnish.
This resin varnish was applied to a polyester film (manufactured by Toray Industries, Inc., model number: Lumirror) and dried under conditions of 100 ° C./5 min to obtain a resin film having a resin thickness of 35 μm.

  Thereafter, in the same manner as in Example 4, a semiconductor chip was obtained, and the silicon wafer and the semiconductor chip were bonded to obtain a semiconductor device.

(Example 10)
[Production of resin film (resin layer)]
Liquid bisphenol A type epoxy resin 13.3 g (manufactured by DIC Corporation, model number: EPICLON-840S), naphthalene type epoxy resin 13.4 g (manufactured by DIC Corporation, model number: EPICLON HP-4700), and 4-methylhexahydro 18 g of 70/30 mixture of phthalic anhydride and hexahydrophthalic anhydride (manufactured by Shin Nippon Rika Co., Ltd., model number: MH-700) and 14.7 g of bisphenol A type phenoxy resin (manufactured by Nippon Kayaku Epoxy Manufacturing Co., Ltd., model number) : YP-50), 2-phenyl-4-methylimidazole 0.1 g (manufactured by Shikoku Kasei Kogyo Co., Ltd., model number: 2P4MZ), and β- (3,4-epoxycyclohexyl) ethyltrimethoxysilane 0.5 g ( Shin-Etsu Chemical Co., Ltd., model number: KBM-403) and spherical silica filler 40 g (stock) Company Admatechs Ltd., model number: SC1050, average particle size 0.25 [mu] m), were dissolved and dispersed in methyl ethyl ketone to obtain a solid concentration of 50 wt% of the resin varnish.
This resin varnish was applied to a polyester film (manufactured by Toray Industries, Inc., model number: Lumirror) and dried under conditions of 100 ° C./5 min to obtain a resin film having a resin thickness of 35 μm.

  Thereafter, in the same manner as in Example 4, a semiconductor chip was obtained, and the silicon wafer and the semiconductor chip were bonded to obtain a semiconductor device.

(Comparative Example 1)
Example 1 except that the silicon wafer and the semiconductor chip were bonded with a flip chip bonder under conditions of a stage temperature of 110 ° C., a tool temperature of 230 ° C. (actual temperature of 203 ° C.), 30 N, and a time of 10 seconds. In the same manner, a resin film, a semiconductor chip, and a semiconductor device were obtained.

(Comparative Example 2)
Example 1 except that the bonding of the silicon wafer and the semiconductor chip was performed using a flip chip bonder under conditions of a stage temperature of 110 ° C., a tool temperature of 260 ° C. (actual temperature of 221 ° C.), 30 N, and a time of 10 seconds. In the same manner, a resin film, a semiconductor chip, and a semiconductor device were obtained.

(Comparative Example 3)
Example 1 except that the silicon wafer and the semiconductor chip were bonded with a flip chip bonder under conditions of a stage temperature of 110 ° C., a tool temperature of 180 ° C. (actual temperature of 165 ° C.), 30 N, and a time of 10 seconds. In the same manner, a resin film, a semiconductor chip, and a semiconductor device were obtained.

(Comparative Example 4)
Example 6 Except that, when the silicon wafer and the semiconductor chip were bonded, the flip chip bonder was used under the conditions of a stage temperature of 110 ° C., a tool temperature of 180 ° C. (actual temperature of 165 ° C.), 30 N, and a time of 10 seconds. In the same manner, a resin film, a semiconductor chip, and a semiconductor device were obtained.

(Comparative Example 5)
Example 7 except that the silicon wafer and the semiconductor chip were bonded to each other at a stage temperature of 110 ° C., a tool temperature of 180 ° C. (actual temperature of 165 ° C.), 30 N, and a time of 10 seconds using a flip chip bonder. In the same manner, a resin film, a semiconductor chip, and a semiconductor device were obtained.

(Evaluation: Connectivity)
Evaluation was performed by the following method.
The connectivity of the stacked semiconductor device obtained in Example 3 was confirmed by observation of an electron micrograph (SEM image). The result is as shown in FIG. 6, and it was confirmed that good connectivity was exhibited even at a temperature sufficiently lower than the melting point of the solder component. The same was true for the other examples.
As described above, it was confirmed that even when the connection was attempted to the laminated body at a temperature sufficiently lower than the melting point of the solder component, good connectivity was shown. In each example, an alloy containing copper and tin derived from bumps and solder components was included in the joint surface.
For each example and comparative example, the connectivity of the semiconductor device is evaluated based on the following evaluation criteria. The results are as shown in Table 1.
○: Terminal coverage by solder is 90 to 100%, and there is no resin biting.
X: The terminal coverage by solder is less than 90%.

(Evaluation: Bonding reliability)
Equipment used: Multi-shaker equipment “Tokyo Maker MMS-210” manufactured by Tokyo Science Instruments Co., Ltd.
Evaluation method: After bonding a silicon wafer and a semiconductor chip with a flip chip bonder, the bonded body was placed on a 12 mm × 12 mm tray and fixed to the apparatus. Thereafter, vibration was applied at 200 rpm or 300 rpm for 10 minutes to confirm the bondability of the bonded body. The results are shown in Table 1. The code | symbol was provided on the following references | standards.
(Double-circle): Even if it processes at 300 rpm, a fracture | rupture is not seen by a junction part.
○: No breakage is observed at the joint even when treated at 200 rpm.
X: After processing at 200 rpm, a partial break is observed at the joint.

(Evaluation: Extruding resin)
When the semiconductor chip obtained by the method described in each of the above examples and comparative examples is pressed against a 20 mm × 20 mm square bare wafer using a flip chip bonder under the mounting conditions described in each of the examples and comparative examples. The maximum width of the resin protrusion spread on the bare wafer was measured.
The results are shown in Table 1. The code | symbol was provided on the following references | standards.
A: Less than 30 μm B: 30 μm or more and less than 100 μm Δ: 100 μm or more

In Examples 1 to 10, when the silicon wafer and the semiconductor chip are bonded, the copper bump and the pad are “bonded” via the solder, that is, the solder layer is wet-spread. confirmed.
On the other hand, in Comparative Examples 3 to 5, when the silicon wafer and the semiconductor chip are bonded, the copper bump and the pad are only in partial contact, and are in a “contact” state instead of “bonding”. That is, it was confirmed that the solder layer did not wet and spread and the solder layer was only partially in contact with the pad.

  According to the method for manufacturing a semiconductor device of the present invention, the first base material and the second base material can be electrically joined at a temperature lower by 20 ° C. or more than the melting point of the solder. This makes it easier to suppress thermal denaturation of the insulating resin layer interposed between the first base material and the second base material. Moreover, even if it is a case where pressurization conditions are employ | adopted at the time of solder joining, the protrusion of the resin composition from between a 1st base material and a 2nd base material can be suppressed. Further, when a semiconductor chip is used as the base material, the warpage of the semiconductor chip alone can be reduced. In addition to this, even a solder whose melting point is different from the temperature at which the terminals are joined can be applied to the semiconductor manufacturing process, so that restrictions on the solder material that can be used in the process can be relaxed.

20 electronic component 21 semiconductor chip 22 insulating portion 23 connecting portion 24 wiring pattern 25 adhesive 26 wire 30 electronic component 31 semiconductor chip 32 wiring pattern 33 conductive portion 34 conductive portion 35 insulating portion 40 substrate 60 bump 100 semiconductor wafer 101 terminal 102 terminal 103 Semiconductor chip 104 Solder layer 105 Joining part 110 Resin composition layer 120 Insulating layer 150 Semiconductor device 200 Semiconductor chip 201 Terminal 202 Terminal 203 Semiconductor chip 204 Connection part 205 Connection part 206 Solder layer 207 Joining part 208 Terminal 210 Resin composition layer 220 Insulating layer 250 Semiconductor device

According to the present invention,
At least one of the first terminal and the second terminal has a solder layer on the terminal surface,
A first base material provided with the first terminal;
A step of preparing a second substrate having a second terminal,
Providing a layer of a resin composition containing a thermosetting resin and a compound having a flux function on the surface of the first base material provided with the first terminal;
Laminating the first base material so that the first terminal and the second terminal face each other through the resin composition layer with respect to the second base material;
A bonding step of bonding the first terminal and the second terminal via solder by heating at a first temperature;
A curing step for curing the layer of the resin composition after the bonding step,
In addition to the above steps, including as engineering performing reflow soldering by further heating,
A method for manufacturing a semiconductor device, comprising:
The first temperature is a temperature that is 20 ° C. or more and 40 ° C. or less lower than the melting point of the solder component constituting the solder layer,
In the step of joining the first terminal and the second terminal, after the first terminal and the second terminal are brought into contact with each other, the solder layer is further deformed to deform the first terminal. There is provided a method for manufacturing a semiconductor device, comprising the step of forming a joint surface between the first terminal and the second terminal by bringing the terminal and the second terminal closer to each other. .

Moreover, according to the present invention,
At least one of the first terminal and the second terminal has a solder layer on the terminal surface,
A first base material provided with the first terminal;
A step of preparing a second substrate having a second terminal,
Providing a layer of a resin composition containing a thermosetting resin and a compound having a flux function on the surface of the first base material provided with the first terminal;
Laminating the first base material so that the first terminal and the second terminal face each other through the resin composition layer with respect to the second base material;
A bonding step of bonding the first terminal and the second terminal via solder by heating at a first temperature;
A curing step for curing the layer of the resin composition after the bonding step,
In addition to the above steps, including as engineering performing reflow soldering by further heating,
A method for manufacturing a semiconductor device, comprising:
It said first temperature is a temperature lower 20 ° C. or higher than the melting point of the solder component constituting the solder layer,
In the step of joining the first terminal and the second terminal, after the first terminal and the second terminal are brought into contact with each other, the solder layer is further deformed to deform the first terminal. Forming a joint surface between the first terminal and the second terminal by bringing the terminal and the second terminal closer to each other;
The bonding surface includes an alloy of a solder component constituting the solder layer and a metal component constituting the first terminal or the second terminal.
A method for manufacturing a semiconductor device is provided.

Claims (8)

Preparing a first base material provided with a first terminal and a second base material provided with a second terminal;
Providing a layer of a resin composition on the surface of the first base material provided with the first terminal;
Laminating the first base material so that the first terminal and the second terminal face each other through the resin composition layer with respect to the second base material;
Joining the first terminal and the second terminal via solder by heating at a first temperature;
A step of performing solder reflow by further heating,
A method for manufacturing a semiconductor device, comprising:
At least one of the first terminal and the second terminal includes a solder layer on the terminal surface,
The first temperature is a temperature that is 20 ° C. or more and 40 ° C. or less lower than the melting point of the solder component constituting the solder layer,
In the step of joining the first terminal and the second terminal, after the first terminal and the second terminal are brought into contact with each other, the solder layer is further deformed to deform the first terminal. A method of manufacturing a semiconductor device, comprising the step of forming a joint surface between the first terminal and the second terminal by bringing the terminal and the second terminal closer to each other.   In the step of bonding the first terminal and the second terminal, when the cross section of the semiconductor device is viewed from a direction orthogonal to the stacking direction of the first base material, the bonding surface is the first 2. The method of manufacturing a semiconductor device according to claim 1, wherein the semiconductor device is formed with a length of 90% or more with respect to the length of the surface of the second terminal or the second terminal.   In the step of bonding the first terminal and the second terminal, the bonding surface includes a solder component constituting the solder layer and a metal component constituting the first terminal or the second terminal. The manufacturing method of the semiconductor device of Claim 1 or 2 with which an alloy with is included.   The method for manufacturing a semiconductor device according to claim 1, wherein the resin composition includes a compound having a flux function. Preparing a first base material provided with a first terminal and a second base material provided with a second terminal;
Providing a layer of a resin composition on the surface of the first base material provided with the first terminal;
Laminating the first base material so that the first terminal and the second terminal face each other through the resin composition layer with respect to the second base material;
Joining the first terminal and the second terminal via solder by heating at a first temperature;
A step of performing solder reflow by further heating,
A method for manufacturing a semiconductor device, comprising:
At least one of the first terminal and the second terminal includes a solder layer on the terminal surface,
The first temperature is a temperature that is 20 ° C. or more lower than the melting point of the solder component constituting the solder layer,
In the step of joining the first terminal and the second terminal, after the first terminal and the second terminal are brought into contact with each other, the solder layer is further deformed to deform the first terminal. Forming a joint surface between the first terminal and the second terminal by bringing the terminal and the second terminal closer to each other;
The bonding surface includes an alloy of a solder component constituting the solder layer and a metal component constituting the first terminal or the second terminal.
A method for manufacturing a semiconductor device.   In the step of bonding the first terminal and the second terminal, when the cross section of the semiconductor device is viewed from a direction orthogonal to the stacking direction of the first base material, the bonding surface is the first The method for manufacturing a semiconductor device according to claim 5, wherein the length is 90% or more with respect to the length of the surface of said terminal or said second terminal.   The method for manufacturing a semiconductor device according to claim 5, wherein the resin composition includes a compound having a flux function.   The manufacturing method of an electronic component which includes the manufacturing method of the semiconductor device as described in any one of Claim 1 thru | or 7 in a process.