JP2016063056A - Semiconductor device and manufacturing method of the same - Google Patents

Abstract

PROBLEM TO BE SOLVED: To improve reliability of a semiconductor device.SOLUTION: A semiconductor device includes: a substrate provided with a semiconductor element; a lid material for encapsulating the semiconductor element; a bonding member for bonding the substrate and the lid material; and an insulating film for covering an exposed part of the bonding member.SELECTED DRAWING: Figure 1

Description

  The present invention relates to a semiconductor device and a method for manufacturing the semiconductor device.

  Conventionally, a semiconductor element is formed on the surface of a Si substrate, a substrate and a lid material are bonded via a bonding member, the device is packaged, and then separated into individual pieces by dicing or the like. Technology is known.

  An optoelectronic integrated circuit device that forms tapered through holes in the Si substrate, and forms an insulating film and metal pads (TSV: Through Silicon Via) on the side surfaces of the through holes, and draws wiring from the back side of the Si substrate. It is known (see, for example, Patent Document 1).

  However, in the conventional WLP technique, when resin bonding is performed, the exposed portion of the bonding member is not covered with an insulating film or the like, so that moisture enters the space in the package from the bonding member (see FIG. 1). As a result, wiring corrosion, dew condensation on the surface of the lid member, and the like occur, and the reliability of the semiconductor device is reduced.

  The present invention has been made in view of the above-described problems, and an object thereof is to improve the reliability of a semiconductor device.

  The semiconductor device of this embodiment includes a substrate including a semiconductor element, a lid member that seals the semiconductor element, a bonding member that bonds the substrate and the lid material, and an insulating film that covers an exposed portion of the bonding member. It is a requirement to have.

  According to the embodiment of the present invention, the reliability of a semiconductor device can be improved.

It is a figure which illustrates the conventional semiconductor device. It is a figure which illustrates the semiconductor device concerning this embodiment. It is a figure which illustrates the manufacturing method of the semiconductor device which concerns on this embodiment. It is a figure which illustrates the manufacturing method of the semiconductor device which concerns on this embodiment.

<Configuration of semiconductor device>
FIG. 2 shows a schematic configuration of the semiconductor device 100 according to the present embodiment.

  The semiconductor device 100 includes a substrate 101, a lid member 102, a bonding member 103, an insulating film 104, a semiconductor element 105, a wiring 106, and the like.

  The substrate 101 (for example, Si substrate) includes a semiconductor element 105 such as a circuit such as an LSI (Large Scale Integration), a MEMS (Micro Electro Mechanical Systems), or a sensor element. A hole 107 and a separation groove 108 are formed in the substrate 101. Since a part of the semiconductor element 105 is exposed at the bottom surface of the hole 107 having a tapered shape, the wiring is drawn out from the back side of the substrate 101 by electrically connecting the wiring portion of the semiconductor element 105 and the wiring 106. Can do. In addition, the semiconductor device 100 can be singulated by dicing the lid member 102 along the separation groove 108.

  The lid member 102 is bonded to the substrate 101 via the bonding member 103 and seals the semiconductor element 105 (packaging). A package internal space 109 is formed between the lid member 102 and the semiconductor element 105. The lid member 102 is preferably glass.

  The joining member 103 joins the substrate 101 and the lid member 102. As the bonding member 103, resin, glass frit, metal sealing material, or the like can be used. When a resin is used as the bonding member 103, any resin of a thermosetting type, a two-component mixed curing type, and a UV curing type may be used. In the case of using a thermosetting resin, the material is preferably a material having a temperature lower than or equal to the heat resistance temperature of the semiconductor element 105, and in the case of using a UV curable resin, a material that can ensure UV transparency to the lid member 102 is preferable.

  Note that when a resin is used as the bonding member 103, curing and adhesion at a low temperature or normal temperature is possible, but gas barrier properties are lowered.

  The insulating film 104 covers the exposed portion of the bonding member 103, the side surface of the hole 107, the side surface of the separation groove 108, the back surface of the substrate 101, and the like. The insulating film 104 may be a single layer film or a laminated film. By covering the exposed portion of the bonding member 103 with the insulating film 104, it is possible to prevent moisture from entering the package internal space 109 from the bonding member 103.

As a material for the insulating film 104, it is preferable to use a material having moisture permeability resistance and high electrical insulation and gas barrier properties. For example, any one or a plurality of materials of SiN, SiC, SiOC, Al ₂ O ₃ , and Ta ₂ O ₅ can be selected.

  According to the semiconductor device 100 according to the present embodiment, since the exposed portion of the bonding member 103 is covered with the insulating film 104, for example, even when resin bonding is performed, the moisture resistance of the package internal space 108 Can be improved. Thereby, since the generation | occurrence | production of wiring corrosion by the high humidity, the dew condensation on the surface of a cover material, etc. can be suppressed and device performance can be improved, the reliability of the semiconductor device 100 can be improved.

<Method for Manufacturing Semiconductor Device>
An example of a method for manufacturing the semiconductor device 100 will be described with reference to FIGS.

  First, as shown in FIG. 3A, the semiconductor element 105 is formed on the surface of the substrate 101. Next, the bonding member 103 is formed in a region excluding the package internal space 109 and the space X. The space X is a region that becomes the separation groove 108 in a later process.

  The patterning of the bonding member 103 may be performed by forming the bonding member 103 from a photosensitive material and performing photolithography, or by discharging the bonding member 103 using a dispenser and drawing a pattern.

  Next, the substrate 101 and the lid member 102 are aligned, the substrate 101 and the lid member 102 are joined via the joining member 103, and the semiconductor device 100 is sealed. After bonding, the back surface side of the substrate 101 may be polished to make the substrate 101 thinner.

  Next, as shown in FIG. 3B, a hole 107 is formed in the substrate 101 so that a part of the semiconductor element 105 (such as a wiring portion) is exposed. Further, a through hole is formed in the substrate 101 so as to overlap with the space X, and the separation groove 108 is formed by overlapping the space X and the through hole.

  After performing resist coating and patterning by photolithography, a portion of the substrate 101 that does not overlap with the resist pattern is selectively removed by ICP (Inductively Coupled Plasma) etching or the like, thereby forming the hole 107 and the through hole. . Note that when the hole 107 is formed, etching is preferably performed so that a film that can obtain a selection ratio with the substrate 101 is exposed.

  The shape of the hole 107 and the through-hole is preferably a tapered shape in order to improve the covering property at the time of wiring formation as a subsequent process. Thereby, the coverage of the insulating film 104 (or the wiring 106) can be improved. The taper angle is preferably about 55 ° to about 85 °, and more preferably about 70 °.

  Next, as shown in FIG. 3C, an insulating film 104 is formed so as to cover the exposed portion of the bonding member 103, the side and bottom surfaces of the hole 107, the side and bottom surfaces of the separation groove 108, the back surface of the substrate 101, and the like. Form.

  As a method for forming the insulating film 104, a P-CVD (Plasma-Chemical Vapor Deposition) method, ALD, which can be processed at low temperature in consideration of the glass transition point of the bonding member 103, the heat resistance of the semiconductor element 105, and the like. (Atomic Layer Deposition) method or the like is preferably used. The temperature at the time of film formation is preferably equal to or lower than the glass transition temperature of the bonding member 103 and equal to or lower than the heat resistant temperature of the semiconductor element 105.

  Next, as shown in FIG. 4A, the insulating film 104 present on the bottom surface of the hole 107 and the bottom surface of the separation groove 108 is removed. After performing resist coating and patterning by photolithography, a part of the insulating film 104 that does not overlap with the resist pattern is selectively removed by etching. By removing the insulating film 104, the wiring portion of the semiconductor element 105 is exposed.

  It is preferable to apply a spray coater, a vacuum laminate such as a dry film, or the like for the resist coating in photolithography on the high step portion (for example, the side surface of the hole 107, the side surface of the separation groove 108, etc.).

  Note that after removing a part of the insulating film 104, it is possible to form a passivation film for protecting the lead wiring in the high step portion, or to form an opening for connection with the electrode. Is also possible.

  Next, as shown in FIG. 4B, a wiring 106 (for example, a metal thin film) for drawing out the wiring portion of the semiconductor element 105 existing on the bottom surface of the hole 107 from the back surface side of the substrate 101 is formed. Specifically, after a metal thin film is formed, a resist is applied and patterned by photolithography, and then the metal thin film that does not overlap with the resist pattern is selectively removed by etching to form the wiring 106. . For resist application, it is preferable to apply a spray coater, a vacuum laminate such as a dry film, or the like.

  Note that the film covering the exposed portion of the bonding member 103 is preferably an insulating film having moisture permeability and high gas barrier properties. However, when an appropriate insulating film cannot be selected, the bonding is performed by the wiring 106. The exposed portion of the member 103 may be covered.

  Next, as shown in FIG. 4C, the lid 102 is diced using the separation groove 108 as a dicing line, and the semiconductor device 100 is singulated. In the dicing line, since the substrate 101 is removed in advance (the separation groove 108 is formed), only the lid member 102 may be diced when dividing into individual pieces. Since it is not necessary to dice the laminated structure of the substrate 101 and the lid member 102 at once, the occurrence of chipping can be suppressed and damage to the blade and the semiconductor device during dicing can be reduced. The semiconductor device 100 is completed through the above steps.

  According to the manufacturing method described above, when forming the separation groove, the substrate is etched so that the resin side wall is exposed, and the exposed portion of the resin side wall is covered with the insulating film, so that the moisture permeability of the space in the package is improved. It is possible to increase and suppress moisture permeation into the device.

  The preferred embodiment of the present invention has been described in detail above, but the present invention is not limited to the specific embodiment, and within the scope of the gist of the embodiment of the present invention described in the claims, Various modifications and changes are possible.

DESCRIPTION OF SYMBOLS 100 Semiconductor device 101 Board | substrate 102 Cover material 103 Joining member 104 Insulating film 105 Semiconductor element

Japanese translation of PCT publication No. 2002-512436

Claims (6)

A substrate comprising a semiconductor element;
A lid for sealing the semiconductor element;
A joining member that joins the substrate and the lid;
A semiconductor device having an insulating film or a metal film covering an exposed portion of the bonding member. The joining member is a resin.
The semiconductor device according to claim 1. The insulating film has moisture permeability resistance.
The semiconductor device according to claim 1. The insulating film is formed of one or a plurality of materials of SiN, SiC, SiOC, Al ₂ O ₃ , Ta ₂ O ₅ .
The semiconductor device according to claim 1. The lid is glass.
The semiconductor device according to claim 1. Forming a semiconductor element on a substrate;
A step of bonding the substrate and the lid member via a bonding member and sealing the semiconductor element;
Forming an insulating film covering the exposed portion of the bonding member.

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