JP2016051832A - Semiconductor device - Google Patents

Semiconductor device Download PDF

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Publication number
JP2016051832A
JP2016051832A JP2014176696A JP2014176696A JP2016051832A JP 2016051832 A JP2016051832 A JP 2016051832A JP 2014176696 A JP2014176696 A JP 2014176696A JP 2014176696 A JP2014176696 A JP 2014176696A JP 2016051832 A JP2016051832 A JP 2016051832A
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JP
Japan
Prior art keywords
resin
air vent
semiconductor device
resin sealing
substrate
Prior art date
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Pending
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JP2014176696A
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Japanese (ja)
Inventor
竜也 板橋
Tatsuya Itabashi
竜也 板橋
由尚 菊池
Yoshinao Kikuchi
由尚 菊池
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Sanken Electric Co Ltd
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Sanken Electric Co Ltd
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Application filed by Sanken Electric Co Ltd filed Critical Sanken Electric Co Ltd
Priority to JP2014176696A priority Critical patent/JP2016051832A/en
Publication of JP2016051832A publication Critical patent/JP2016051832A/en
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  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)

Abstract

PROBLEM TO BE SOLVED: To solve a problem that it is difficult to form multiple air vents or a large air vent on a lateral face where outer leads thicken thereby to provide the potential for failure in filling and generation of voids, which are caused by insufficient air vent, and encapsulation resin does not flow on an upper layer and a lower layer of a substrate in a balanced manner during resin encapsulation thereby to cause failure infilling and generation of voids.SOLUTION: A semiconductor device 100 where a heat sink 1 and a substrate 2 are arranged next to each other in a short direction of a resin sealed body 3 is manufactured by a manufacturing method which comprises the steps of: arranging an air vent 4 on a lateral face on a short side of the resin sealed body 3 at the time of resin sealing; and arranging a gate 5 on a lateral face on a long side of the resin sealed body 3 and away from the air vent 4.SELECTED DRAWING: Figure 1

Description

本発明は、樹脂封止した半導体装置に関し、特に樹脂注入ゲートとエアベントを選択的に配置した最適な成形方法を用いて製造された半導体装置に関する。
The present invention relates to a resin-encapsulated semiconductor device, and more particularly to a semiconductor device manufactured using an optimal molding method in which a resin injection gate and an air vent are selectively arranged.

モーター制御用などの電力用半導体素子と制御用半導体素子を内蔵する樹脂封止型半導体製品は、市場から高機能性を要求されており、従来技術で示すように樹脂封止型半導体製品の内部構造は複雑化している。(例えば、特許文献1参照)
Resin-encapsulated semiconductor products with built-in power semiconductor elements and control semiconductor elements for motor control and the like are required to have high functionality from the market. The structure is complicated. (For example, see Patent Document 1)

国際公開公報WO98−24122号International Publication No. WO98-24122

従来技術では、樹脂注入用ゲートを複数用意し、封止樹脂を2段速度で注入している。しかしながら、樹脂封止体の対向する側面にアウターリードを配置するDIP型の半導体装置においては、近年の高機能化に応えるべくアウターリードの本数が増大する傾向であり、アウターリードが密集する側面に多数のゲートやエアベント、あるいは面積の大きなゲートやエアベントを設けることが困難であり、未充填やボイドが発生するという課題がある。

更に、主に電力用半導体素子を載置する放熱板と、主に制御用半導体素子を載置する基板は、その厚みや樹脂封止体の厚み方向に対する配置の高さが異なるため、樹脂封止の際に封止樹脂が基板の上層と下層をバランスよく流動しない場合は、樹脂の合流点、即ちウェルドライン上に未充填やボイドが発生して製品の信頼性が懸念される。
In the prior art, a plurality of resin injection gates are prepared and the sealing resin is injected at a two-stage speed. However, in a DIP type semiconductor device in which outer leads are arranged on opposite side surfaces of a resin-encapsulated body, the number of outer leads tends to increase in order to meet the recent high functionality, and the outer leads are concentrated on the side surface. It is difficult to provide a large number of gates and air vents, or a gate and air vent with a large area, and there is a problem that unfilling and voids are generated.

Furthermore, since the heat sink on which the power semiconductor element is mainly mounted and the substrate on which the control semiconductor element is mainly mounted have different thicknesses and heights in the arrangement in the thickness direction of the resin sealing body, When the sealing resin does not flow between the upper layer and the lower layer of the substrate in a balanced manner at the time of stopping, unfilling or voids are generated at the resin junction, that is, the weld line, and there is a concern about the reliability of the product.

従って、本発明は、上述した課題を解決するためになされたものであり、樹脂封止の際の未充填やボイド発生を低減することができる半導体装置を提供することを目的とする。
Accordingly, the present invention has been made to solve the above-described problems, and an object thereof is to provide a semiconductor device that can reduce unfilling and void generation during resin sealing.

上述の課題を解決するために、本発明は以下に掲げる構成とした。放熱板1と、基板2と、が樹脂封止体3の短手方向に並べて配置される半導体装置100において、樹脂封止の際、樹脂封止体3の短手側側面に、エアベント4を配置し、樹脂封止体の長手側側面に、エアベントから乖離してゲート5を配置する製造方法にて製造されることを特徴とする。
In order to solve the above-described problems, the present invention is configured as follows. In the semiconductor device 100 in which the heat radiating plate 1 and the substrate 2 are arranged side by side in the short direction of the resin sealing body 3, the air vent 4 is provided on the short side surface of the resin sealing body 3 at the time of resin sealing. It arrange | positions and it manufactures with the manufacturing method which arrange | positions the gate 5 in the longitudinal side surface of the resin sealing body, separating from the air vent.

本発明は、以上のように構成されているので、樹脂封止の際の未充填やボイド発生を低減し、信頼性の高い半導体装置を提供することができる。
Since the present invention is configured as described above, it is possible to reduce unfilling and void generation during resin sealing, and to provide a highly reliable semiconductor device.

本発明の実施例1に係る半導体装置の平面概念図である。It is a plane conceptual diagram of the semiconductor device concerning Example 1 of the present invention.

以下、本発明を実施するための形態について、図を参照して詳細に説明する。なお以下の図面の記載において、同一または類似の部分には、同一または類似の符号で表している。但し、図面は模式的なものであり、寸法関係の比率等は現実のものとは異なる。したがって、具体的な寸法等は以下の説明を照らし合わせて判断するべきものである。また、図面相互間においても互いの寸法の関係や比率が異なる部分が含まれていることは勿論である。

また、以下に示す実施の形態は、この発明の技術的思想を具体化するための例示であって、この発明の実施の形態は、構成部品の材質、形状、構造、配置等を下記のものに特定するものではない。この発明の実施の形態は、要旨を逸脱しない範囲内で種々変更して実施できる。
DESCRIPTION OF EMBODIMENTS Hereinafter, embodiments for carrying out the present invention will be described in detail with reference to the drawings. In the following description of the drawings, the same or similar parts are denoted by the same or similar reference numerals. However, the drawings are schematic, and the dimensional relationship ratios and the like are different from the actual ones. Therefore, specific dimensions and the like should be determined in light of the following description. Moreover, it is a matter of course that portions having different dimensional relationships and ratios are included between the drawings.

The following embodiments are exemplifications for embodying the technical idea of the present invention, and the embodiments of the present invention are described below in terms of the material, shape, structure, arrangement, etc. of the components. It is not something specific. The embodiments of the present invention can be implemented with various modifications without departing from the scope of the invention.

以下、図面を参照して本発明の実施例1に係る半導体装置100を説明する。図1は、本発明の実施例に係る半導体装置100の平面概念図である。
A semiconductor device 100 according to Embodiment 1 of the present invention will be described below with reference to the drawings. FIG. 1 is a conceptual plan view of a semiconductor device 100 according to an embodiment of the present invention.

図1に示すように、半導体装置100は、放熱板1、基板2、樹脂封止体3から成っている。
As shown in FIG. 1, the semiconductor device 100 includes a heat radiating plate 1, a substrate 2, and a resin sealing body 3.

放熱板1は、主に電力用半導体素子を主面に載置し、他方の主面が樹脂封止体3から露出している。電力用半導体素子の発熱を樹脂封止体の外部に放熱するため、熱熱伝導性の高い材料を用いることが望ましい。例えば銅材あるいはアルミニウム材を用いてもよい。
The heat radiating plate 1 mainly has power semiconductor elements placed on the main surface, and the other main surface is exposed from the resin sealing body 3. In order to dissipate the heat generated by the power semiconductor element to the outside of the resin sealing body, it is desirable to use a material having high thermal conductivity. For example, a copper material or an aluminum material may be used.

基板2は、樹脂封止体3の内部に配置される。電気回路を有し、接合材を介して主に制御用半導体素子を主面に載置する。例えばガラスエポキシ基板を用いてもよい。
The substrate 2 is disposed inside the resin sealing body 3. An electric circuit is included, and a control semiconductor element is mainly placed on the main surface via a bonding material. For example, a glass epoxy substrate may be used.

樹脂封止体3は、横長の矩形体形状であり、樹脂成形金型とプレス装置を使用して、トランスファーモールドとして、樹脂成形されたものである。例えば、樹脂封止体3には熱硬化性エポキシ樹脂が使用される。なお図中では樹脂封止体3の外表面を破線にて表示している。

以上により、半導体装置100が完成する。
The resin sealing body 3 has a horizontally long rectangular body shape, and is resin-molded as a transfer mold using a resin molding die and a press device. For example, a thermosetting epoxy resin is used for the resin sealing body 3. In the drawing, the outer surface of the resin sealing body 3 is indicated by a broken line.

Thus, the semiconductor device 100 is completed.

次に、上述の実施例1に係る半導体装置100の効果を説明する。
Next, effects of the semiconductor device 100 according to the first embodiment will be described.

本発明の実施例1に係る半導体装置100は、請求項1によれば、封止樹脂の流れ31は、長手方向に対して並行に流動することにより、基板1の上層と下層を安定して流動することが可能であり、樹脂封止の際の未充填やボイド発生を低減し、信頼性の高い半導体装置を提供することができる。
According to the semiconductor device 100 according to the first embodiment of the present invention, according to the first aspect, the flow 31 of the sealing resin flows in parallel to the longitudinal direction, so that the upper layer and the lower layer of the substrate 1 can be stabilized. A highly reliable semiconductor device can be provided that can flow and reduce unfilling and void generation during resin sealing.

上述のように、本発明を実施するための形態を記載したが、この開示から当業者には様々な代替実施の形態、実施例が可能であることが明らかになるはずである。
As described above, the mode for carrying out the present invention has been described. From this disclosure, it should be apparent to those skilled in the art that various alternative embodiments and examples are possible.

1、基板
2、放熱板
3、樹脂封止体
31、封止樹脂の流れ
4、ゲート
5、エアベント
100、半導体装置
DESCRIPTION OF SYMBOLS 1, Board | substrate 2, Heat sink 3, Resin sealing body 31, Flow of sealing resin 4, Gate 5, Air vent 100, Semiconductor device

Claims (1)

放熱板1と、基板2と、が樹脂封止体3の短手方向に並べて配置される半導体装置100において、樹脂封止の際、樹脂封止体3の短手側側面に、エアベント4を配置し、樹脂封止体の長手側側面に、エアベントから乖離してゲート5を配置する製造方法にて製造されることを特徴とする半導体装置。   In the semiconductor device 100 in which the heat radiating plate 1 and the substrate 2 are arranged side by side in the short direction of the resin sealing body 3, the air vent 4 is provided on the short side surface of the resin sealing body 3 at the time of resin sealing. A semiconductor device manufactured by a manufacturing method in which the gate 5 is disposed apart from the air vent on the longitudinal side surface of the resin sealing body.
JP2014176696A 2014-08-31 2014-08-31 Semiconductor device Pending JP2016051832A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2014176696A JP2016051832A (en) 2014-08-31 2014-08-31 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2014176696A JP2016051832A (en) 2014-08-31 2014-08-31 Semiconductor device

Publications (1)

Publication Number Publication Date
JP2016051832A true JP2016051832A (en) 2016-04-11

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JP2014176696A Pending JP2016051832A (en) 2014-08-31 2014-08-31 Semiconductor device

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