JP2016029731A - Circuit board and sensor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a board having small floating capacitance formed between the board and a through electrode.SOLUTION: A circuit board has: a board 2 having a via hole 2c which pierces a first surface 2a and a second surface 2b opposite to the first surface 2a to be opened; a first insulation film 3 which is located on the first surface 2a of the board 2 and includes a thermally oxidized film; a third insulation film 5 which is located on an inner surface of the via hole 2c and includes a thermally oxidized film; and a conductor 7 surrounded by the third insulation film in the via hole 2c, in which a thickness of the third insulation film 5 on the inner surface of the via hole 2c is larger in comparison with a thickness of the first insulation film 3 on the first surface 2a.SELECTED DRAWING: Figure 1

Description

  The present invention relates to a wiring board, an infrared sensor, and a through electrode forming method, and more particularly to a through electrode.

  In the three-dimensional mounting package, chips, which are substrates with elements, are vertically stacked to reduce the occupation area by forming one package. And the electrical connection of the chip | tip vertical direction is performed by arrange | positioning the penetration electrode using the via hole which penetrates the board | substrates, such as a silicon wafer and die | dye, perpendicularly | vertically.

  A chip having such a through electrode includes a semiconductor substrate and a through electrode formed on the semiconductor substrate. In such a chip, the semiconductor substrate has a constant potential with respect to the circuit formed on the semiconductor substrate, and there is a potential difference between the through electrode that is electrically connected to the circuit. A leakage current may occur between Therefore, in Patent Document 1, a resin insulating layer is formed between the substrate and the through electrode or the electrode connected to the through electrode in order to prevent leakage current.

JP 2010-177237 A

  However, when a through electrode having a fine and high aspect ratio is formed using a resin insulating layer, a resin insulating layer having a sufficient thickness cannot be formed. At this time, the stray capacitance formed between the substrate and the through electrode is increased. Therefore, a substrate having a small stray capacitance formed between the substrate and the through electrode has been desired.

  SUMMARY An advantage of some aspects of the invention is to solve at least a part of the problems described above, and the invention can be implemented as the following forms or application examples.

[Application Example 1]
A wiring board according to this application example, comprising: a substrate having a via hole that opens through a first surface and a second surface facing the first surface; and the first surface of the substrate and the via hole in the via hole. An insulating film including a thermal oxide film disposed on the surface, and a conductor surrounded by the insulating film in the via hole, and the thickness of the insulating film in the first surface is larger than that in the via hole. The insulating film is thick.

  According to this application example, the via hole penetrates and opens from the first surface to the second surface of the substrate. An insulating film is provided on the first surface and the inner surface of the via hole. In the via hole, a conductor is set surrounded by an insulating film. It is possible to energize between the first surface and the second surface by the conductor. The insulating film on the surface in the via hole is thicker than the insulating film on the first surface. Therefore, since the distance between the substrate and the conductor is long, the electric stray capacitance between the substrate and the conductor can be reduced.

[Application Example 2]
In the infrared sensor according to this application example, a substrate having a via hole that opens through a first surface and a second surface opposite to the first surface, and the first surface of the substrate and the via hole An insulating film including a thermal oxide film installed on a surface; a conductor surrounded by the insulating film in the via hole; and a wiring connected to the conductor and provided on the first surface through the insulating film And an infrared detecting element electrically connected to the wiring, wherein the insulating film in the via hole is thicker than the insulating film on the first surface.

  According to this application example, the via hole penetrates and opens from the first surface to the second surface of the substrate. An insulating film is provided on the first surface and the inner surface of the via hole. A conductor is set surrounded by an insulating film. It is possible to energize between the first surface and the second surface by the conductor. On the first surface, the conductor and the infrared detection element are connected via a wiring. Thereby, the signal of an infrared detection element can be output to the 2nd surface.

  The thickness of the insulating film on the surface in the via hole is thicker than the thickness of the insulating film on the first surface. Therefore, since the distance between the substrate and the conductor is long, the electric stray capacitance between the substrate and the conductor is small. As a result, the infrared sensor can output a high-frequency component of a signal output from the infrared detection element without being attenuated.

[Application Example 3]
In the through electrode forming method according to this application example, a groove forming step of forming a groove having a closed curve in plan view on the first surface of the substrate, and thermally oxidizing the first surface and the surface in the groove A thermal oxidation step of forming an insulating film; an element circuit forming step of forming an element circuit on the first surface; a via hole forming step of forming a via hole at a location surrounded by the insulating film; and the first of the substrate. A conductor forming step of embedding a conductor in the via hole from the second surface facing the surface to the first surface, and in the thermal oxidation step, the wall of the groove portion is expanded by thermal oxidation to form the groove portion. Is filled with the insulating film.

  According to this application example, in the groove portion forming step, the groove portion whose planar view is a closed curve is formed from the first surface of the substrate. In the thermal oxidation process, the first surface and the surface in the groove are thermally oxidized to form an insulating film. The groove portion has a pair of walls facing each other. And when the wall of a groove part thermally oxidizes, a wall expand | swells because an oxygen molecule penetrates into a wall. Thereby, the groove is filled with the insulating film.

  In the element circuit formation step, an element circuit is formed on the first surface. In the via hole forming step, a via hole is formed in a place surrounded by the insulating film, and a conductor is buried in the via hole in the conductor forming step. As a result, the conductor can be energized from the first surface to the second surface, so that the signal of the element circuit can be input and output on the second surface. Then, the insulating film surrounding the via hole is formed thicker than the insulating film on the first surface. Therefore, since the distance between the substrate and the conductor is long, the electric stray capacitance between the substrate and the conductor can be reduced.

[Application Example 4]
In the through electrode forming method according to the application example, the insulating film is formed on the second surface by grinding the second surface side of the substrate, which is performed between the element circuit forming step and the conductor forming step. The method further includes an insulating film forming step.

  According to this application example, the substrate is ground and thinned. Therefore, a thin substrate on which a circuit is formed can be obtained.

[Application Example 5]
In the through electrode forming method according to the application example, a terminal forming step of forming a terminal connected to the conductor on the second surface is provided after the conductor forming step.

  According to this application example, the terminal connected to the conductor is formed on the second surface. Therefore, it is possible to facilitate external connection from the second surface using the terminal.

[Application Example 6]
In the through electrode forming method according to the application example described above, the method further includes a supporting member installation step that is performed before the insulating film forming step and attaches a supporting member to the first surface.

  According to this application example, the support member is attached to the first surface. Therefore, workability in the processing for thinning the substrate and the processing after the thinning can be improved.

[Application Example 7]
In the through electrode forming method according to the application example, the closed curve is an annular shape.

  According to this application example, the closed curve is annular. Therefore, the area where the insulating film is in contact with the conductor can be reduced as compared with the case where the closed curve has a shape other than an annular shape. Therefore, the electric stray capacitance between the substrate and the conductor can be reduced.

1A is a schematic side cross-sectional view showing a structure of a through electrode, and FIG. 1B is a schematic cross-sectional view showing a structure of a through electrode according to the first embodiment. The flowchart which shows the manufacturing method of a wiring board. The schematic diagram for demonstrating the manufacturing method of a wiring board. The schematic diagram for demonstrating the manufacturing method of a wiring board. FIG. 4A is a schematic side sectional view showing a configuration of an infrared sensor according to the second embodiment, and FIG. 5B is a schematic side sectional view showing a main part of a configuration of a sensor array. The schematic side sectional view which shows the structure of the penetration electrode and bump concerning a modification.

  DESCRIPTION OF EXEMPLARY EMBODIMENTS Hereinafter, embodiments of the invention will be described with reference to the drawings. In addition, each member in each drawing is illustrated with a different scale for each member in order to make the size recognizable on each drawing.

(First embodiment)
In this embodiment, an example of a characteristic wiring board on which a through electrode is installed and a manufacturing method thereof will be described with reference to FIGS.

(Wiring board)
FIG. 1A is a schematic side sectional view showing the structure of the through electrode, and FIG. 1B is a schematic plan sectional view showing the structure of the through electrode. FIG.1 (b) is sectional drawing along the AA line of Fig.1 (a). As shown in FIG. 1, the wiring substrate 1 includes a substrate 2. As the substrate 2, a silicon semiconductor substrate or a glass plate can be used. In this embodiment, for example, a silicon semiconductor substrate is used. An upward surface of the substrate 2 in the drawing is a first surface 2a, and a downward surface in the drawing opposite to the first surface 2a is a second surface 2b. Therefore, the first surface 2a and the second surface 2b are in a front-back relationship.

  The substrate 2 has a via hole 2c that opens through the first surface 2a and the second surface 2b. A first insulating film 3 as an insulating film is provided on the first surface 2a, and a second insulating film 4 as an insulating film is provided on the second surface 2b. A third insulating film 5 as an insulating film is provided on the wall surface of the via hole 2c. The first insulating film 3 and the third insulating film 5 are insulating films formed by thermally oxidizing the substrate 2 and are dense and highly insulating films. The third insulating film 5 is thicker than the first insulating film 3.

  A conductor 7 covered with a barrier film 6 made of a metal film such as titanium, titanium nitride or tungsten and a metal film having good conductivity such as copper is provided in contact with the via hole 2c. A through electrode 2d is constituted by the via hole 2c, the conductor 7, and the like. The conductor 7 has a columnar shape, and the barrier film 6 and the third insulating film 5 are disposed in this order in a cylindrical shape surrounding the conductor 7. The conductor 7 is made of a metal or an alloy such as gold, nickel, or copper. The conductor 7 may be completely filled in the hole space surrounded by the barrier film 6. Or you may cover in the shape of a film | membrane along the inner wall of hole space. In that case, it is desirable to embed an insulator such as resin in the hole inside the conductor film for reinforcement. The barrier film 6 has a function of preventing the conductor 7 from diffusing into the substrate 2 and improving the adhesion between the conductor 7 and the third insulating film 5.

  The film thickness of the third insulating film 5 is larger than the film thickness of the first insulating film 3. This makes it difficult for current to leak from the conductor 7 to the substrate 2. Furthermore, the stray capacitance between the substrate 2 and the conductor 7 can be reduced.

  On the first surface 2 a, the element circuit 8 is provided so as to overlap the first insulating film 3. In the element circuit 8, a plurality of wirings 9 and insulating layers 10 are stacked. And the wiring 9 of each layer is electrically connected by the via wiring 11 formed in the insulating layer 10 located between them. The element circuit 8 may be provided with an electric element (not shown). The wiring 9 is electrically connected to the conductor 7 through the barrier film 6.

  On the second surface 2 b, a barrier film 6 is disposed over the second insulating film 4, and a terminal 12 is disposed over the barrier film 6. The terminal 12 is electrically connected to the conductor 7 by a wiring 12a. Therefore, the element circuit 8 on the first surface 2a side and the terminal 12 on the second surface 2b side are electrically connected through the substrate 2 by the through electrode 2d. Further, the presence of the terminal 12 facilitates external connection.

  The conductor 7 has a shape of a straight through electrode, but may be a tapered through electrode in which the via hole 2c is tapered.

(Method for manufacturing a wiring board)
Next, the manufacturing method of the wiring board 1 described above will be described with reference to FIGS. FIG. 2 is a flowchart showing a method for manufacturing a wiring board, and FIGS. 3 and 4 are schematic diagrams for explaining the method for manufacturing a wiring board.

  In the flowchart of FIG. 2, step S <b> 1 corresponds to a groove forming process, and is a process of forming an annular groove on the first surface of the substrate. Next, the process proceeds to step S2. Step S2 corresponds to a thermal oxidation process, which is a process of thermally oxidizing the substrate to form an insulating film. Next, the process proceeds to step S3. Step S3 corresponds to an element circuit forming step, and is a step of forming an element circuit on the insulating film on the first surface side of the substrate. Next, the process proceeds to step S4. Step S4 corresponds to a support member installation step, and is a step of installing a support member that supports the substrate so as to overlap the element circuit. Next, the process proceeds to step S5.

  Step S5 corresponds to an insulating film forming step, and is a step of grinding and thinning the substrate to form a second insulating film on the second surface side of the substrate. Next, the process proceeds to step S6. Step S6 corresponds to a via hole forming step, and is a step of forming a via hole from the second surface side of the substrate. Next, the process proceeds to step S7. Step S7 corresponds to a conductor forming step, and is a step of burying and forming a conductor by disposing a barrier film in the via hole. Next, the process proceeds to step S8. Step S8 corresponds to a terminal formation step, which is a step of forming a terminal on the second insulating film of the substrate and removing an excess barrier film. Step S9 corresponds to a support member removing step, and is a step of removing the support member from the substrate. The wiring board is completed by the above manufacturing process.

  Next, the manufacturing method will be described in detail with reference to FIGS. 3 and 4 in association with the steps shown in FIG. FIG. 3A and FIG. 3B are diagrams corresponding to the groove forming process in step S1. As shown in FIG. 3A, a substrate 2 is prepared. The substrate 2 is a silicon semiconductor substrate. Next, the groove 13 is formed using a photolithography method, an etching method, or the like. The shape of the groove 13 may be a closed curve, and the closed curve is more preferably an annular shape. By forming an annular shape, the shape of the conductor 7 formed in the conductor forming step of step S7 can be a cylinder, so that the surface area of the place where the conductor 7 is in contact with the second insulating film 4 can be reduced. Therefore, the stray capacitance formed between the substrate 2 and the conductor 7 can be reduced.

Since the photolithography method and the etching method are known, detailed description thereof is omitted. As an outline description, first, a material such as a resist is applied to the substrate 2 and solidified to form a film. Next, after exposure to a predetermined shape, etching is performed to form a mask. Next, after the substrate 2 is formed into a predetermined shape by etching, the mask is removed. Etching may be dry etching or wet etching. Taking dry etching as an example, it is possible to use a Bosch process in which digging is performed while alternately repeating etching and deposition. As gases in this case, SF ₆ and O ₂ are used for etching, and C ₄ F ₈ and O ₂ are used for deposition. By using the reactive ion etching technique, the fine and high aspect ratio groove 13 can be formed.

  Although the shape of the groove 13 is not particularly limited, in the present embodiment, for example, the groove 13 is formed in a straight shape with a groove width of 3 μm to 5 μm for a fine, high aspect ratio, multiple via. The groove 13 has an annular shape, and has an inner diameter of 10 to 20 μm and an outer diameter of 13 to 25 μm. The depth of the groove 13 was 50 to 100 μm, and the aspect ratio with the inner diameter was 2 to 10. The arrangement of the grooves 13 may be a lattice pattern (also referred to as a matrix) or a staggered pattern (also referred to as a peripheral array). The pitch was 15-30 μm. In the form of a two-dimensionally arranged area array, 70,000 to 300,000 groove portions 13 were formed on one substrate 2.

  FIG. 3C is a diagram corresponding to the thermal oxidation process of step S2. The substrate 2 is thermally oxidized by leaving it in a temperature environment around 1000 ° C. in an oxygen atmosphere. As a result, an oxide film is formed on the first surface 2 a, the second surface 2 b, and the groove portion 13 of the substrate 2. When oxygen molecules enter silicon molecules, the surface of the oxide film expands. Therefore, the groove 13 is filled with silicon oxide. As a result, as shown in FIG. 3C, the first insulating film 3 is formed on the first surface 2a, and the fourth insulating film 14 is formed on the second surface 2b. Then, the third insulating film 5 in which the groove 13 is filled with the insulating film is formed.

  The third insulating film 5 is a film in which oxide films formed on the opposing side walls of the groove 13 are integrated. Accordingly, the thickness is about twice that of the oxide film formed on one surface. For example, when the thickness of the first insulating film 3 is 2 μm, the thickness of the third insulating film 5 can be about 4 μm. As a result, the third insulating film 5 is thicker than the first insulating film 3.

  FIG. 3D is a diagram corresponding to the element circuit formation step of step S3. As shown in FIG. 3D, the element circuit 8 is formed on the first insulating film 3. The element may be an integrated circuit or a sensor circuit. Circuits having various functions can be formed. The wiring 9 and the insulating layer 10 are stacked and formed, and the via wiring 11 is formed in the insulating layer 10. The element circuit 8 is formed by sequentially repeating the steps of forming the wiring 9, the insulating layer 10, and the via wiring 11.

  FIG. 3E is a diagram corresponding to the support member installation step of step S4. As shown in FIG. 3E, a glass support wafer 15 as a support member is attached to the formation surface of the element circuit 8 via an adhesive or the like. By reinforcing the substrate 2 on which the glass support wafer 15 is thinly processed, it is possible to prevent cracking and fluidity in the process flow after the subsequent thin processing. Since glass may be heated in a later step, glass having a linear expansion coefficient close to that of the substrate 2 is desirable. For example, heat resistant glass or quartz glass can be used.

  FIG. 3F to FIG. 4A are diagrams corresponding to the insulating film forming step in step S5. As shown in FIG. 3 (f), the second surface 2b side of the substrate 2 is back-ground using a back grind wheel. Back grinding is also called back grinding. Although the thickness of the board | substrate 2 is not specifically limited, In this embodiment, the board | substrate 2 is thinned to about 50-100 micrometers thickness, for example. For the back-ground surface, for example, the silicon shatter layer formed by back-grinding may be removed by a method such as dry etching, spin etching, or polishing.

Next, as shown in FIG. 4A, a second insulating film 4 is formed on the second surface 2b. As the second insulating film 4, an inorganic film such as SiO ₂ or SiN may be formed using a CVD method, or a resin material may be applied. Film formation with a resin material is performed by spin coating, spray coating, printing, or the like. The film thickness of the second insulating film 4 is 3 μm or more. The thickness of the second insulating film 4 is desirably 10 μm or more from the viewpoint of reducing parasitic capacitance. This time, a SiO ₂ film was formed by the CVD method.

FIG. 4B is a diagram corresponding to the via hole forming step of step S6. As shown in FIG. 4B, a via hole 2 c is formed inside the third insulating film 5. A via hole 2c is formed in the portion of the substrate 2 inside the third insulating film 5 from the second surface 2b side. First, a material that becomes a mask such as a resist is applied to the substrate 2 and solidified to form a film. Next, after exposing to the shape of the via hole 2c, etching is performed to form a mask. Subsequently, by etching the substrate 2, the second insulating film 4, silicon, and the first insulating film 3 are removed in this order in the shape of the via hole 2c. The second insulating film 4 and the first insulating film 3 are removed by dry etching. The etching apparatus uses an oxide film etcher, and C ₂ F ₆ , CF ₄ , and CHF ₃ are used as etching process gases. The method for removing the silicon surrounded by the third insulating film 5 by etching is the same as the method used when forming the groove 13 in the groove forming process of step S1. Next, after the via hole 2c is formed, the mask is removed.

  The order of the process of forming the second insulating film 4 and the via hole forming process of step S6 may be changed. First, after forming the via hole 2c and removing the first insulating film 3 in the via hole 2c, the second insulating film 4 may be formed. In this case, since the second insulating film 4 may be attached to the inside of the via hole 2c after the formation of the second insulating film 4, it is desirable to add an insulating film removing process again.

  FIG. 4C to FIG. 4D are diagrams corresponding to the conductor forming step in step S7. As shown in FIG. 4C, a barrier film 6 is formed on the wiring 9 of the element circuit 8 facing the opening of the via hole 2 c, the inner wall of the third insulating film 5, and the second insulating film 4. The barrier film 6 includes a barrier layer and a seed layer. The seed layer is a layer for performing the next plating step with high productivity. First, a barrier layer is formed, and then a seed layer is formed. For example, Cu can be used as the material of the seed layer. These steps can be formed by sputtering or CVD. Although the film thickness is not particularly limited, in this embodiment, for example, TiW is formed to a thickness of 10 to 100 nm in the barrier layer, and Cu is formed to a thickness of 10 to 300 nm in the seed layer.

Note that reverse sputtering may be performed before the barrier film 6 is formed for the purpose of removing the natural oxide film formed on the wiring 9 of the element circuit 8. The processing amount of reverse sputtering is equivalent to 300 nm etching in terms of SiO _2, for example.

  As shown in FIG. 4D, the via hole 2c is filled with the conductor 7 and embedded. First, a material such as a resist is applied onto the barrier film 6 and solidified to form a film. Next, after exposure to a predetermined shape, etching is performed to form a mask. Next, the substrate 2 is immersed in a plating bath and the barrier film 6 is energized, whereby the via hole 2 c is electroplated and filled with the conductor 7. Subsequently, the mask is peeled off.

  FIG. 4E and FIG. 4F are diagrams corresponding to the terminal formation step of step S8. As shown in FIGS. 4E and 4F, a terminal 12 connected to the conductor 7 is formed. First, a material such as a resist is applied onto the barrier film 6 and solidified to form a film. Next, after exposure to a predetermined shape, etching is performed to form a mask. Next, by immersing the substrate 2 in a plating bath and energizing the barrier film 6, the terminals 12 and the wirings 12a are formed by electroplating. Subsequently, the mask is peeled off. Next, the barrier film 6 is removed by etching using the conductor 7, the terminal 12 and the wiring 12a as a mask. Or after forming a part of terminal by the said construction method, by immersing in an electroless-plating bath, metal may be formed in the outermost surface of the terminal 12 or the wiring 12a, and it may be set as a terminal.

  The thickness of the terminal 12 is not particularly limited, but is set to 6 μm, for example, in the present embodiment. In this embodiment, for example, Cu is used as the material of the terminal 12. A film of a low melting point metal such as SnAg or a noble metal such as Au, Ni / Au, Ni / Pd / Au may be laminated on the outermost surface of the terminal 12. Further, the terminal 12 may be directly above the conductor 7. The step of filling the conductor 7 in the via hole 2c in the step of forming the conductor in step S7 and the step of forming the terminal 12 in the step of forming the terminal in step S8 were performed in separate steps. You may perform the plating process of the conductor 7 and the terminal 12 simultaneously. Further, it can be formed with high productivity.

  Finally, in step S9, the glass support wafer 15 supporting the substrate 2 is peeled off in the support member removing process. The wiring board is completed by the above manufacturing process.

As described above, this embodiment has the following effects.
(1) According to this embodiment, the via hole 2c is opened through the first surface 2a to the second surface 2b of the substrate 2, and the via hole 2c is filled with the conductor 7. A first insulating film 3 is provided on the first surface 2a, and a third insulating film 5 is provided in the via hole 2c. The thickness of the third insulating film 5 is thicker than the thickness of the first insulating film 3. Therefore, since the distance between the substrate 2 and the conductor 7 is long, the electric stray capacitance between the substrate 2 and the conductor 7 can be reduced.

  (2) According to the present embodiment, in the groove part forming step of step S1, the groove part 13 having a closed curve in plan view is formed from the first surface 2a of the substrate 2. In the thermal oxidation process of step S2, the first insulating film 3 and the third insulating film 5 are formed by thermally oxidizing the first surface 2a and the surface in the groove 13. The groove 13 has a pair of walls facing each other. And when the wall of the groove part 13 is thermally oxidized, the wall expands as oxygen molecules enter the wall. As a result, the groove 13 is filled with the third insulating film 5. Therefore, the third insulating film 5 can be formed thicker than the first insulating film 3. As a result, since the distance between the substrate 2 and the conductor 7 is increased, the electric stray capacitance between the substrate 2 and the conductor 7 can be reduced.

  (3) According to the present embodiment, the substrate 2 is ground and thinned in the insulating film forming step of step S5. Therefore, the thin substrate 2 on which the element circuit 8 is formed can be obtained.

  (4) According to this embodiment, the terminal 12 connected to the conductor 7 is formed on the second surface 2b. Therefore, it is possible to facilitate external connection from the second surface 2b using the terminal 12.

  (5) According to this embodiment, the glass support wafer 15 is bonded to the first surface 2a. Therefore, the workability in the processing for thinning the substrate 2 and the processing after the thinning can be improved.

  (6) According to this embodiment, the groove part 13 is formed in the annular | circular shape by planar view. Thereby, the 3rd insulating film 5 is formed in an annular | circular shape, and the conductor 7 becomes a column shape. Compared with the case where the conductor 7 has a shape other than the columnar shape, the surface area of the conductor 7 can be reduced. The smaller the area of the surface where the substrate 2 and the conductor 7 are in contact with each other, the smaller the electric stray capacitance. Therefore, the electric stray capacitance between the substrate 2 and the conductor 7 can be reduced.

  (7) According to the present embodiment, the first insulating film 3 and the third insulating film 5 include a thermal oxide film of silicon. The thermal oxide film of silicon has a dense structure and is a highly insulating film. Therefore, the first insulating film 3 and the third insulating film 5 can be insulating films in which current does not easily leak.

(Second Embodiment)
In the present embodiment, an example of an infrared detection element installed on a characteristic wiring board and an infrared sensor in which the infrared detection element is arranged will be described with reference to FIG. Note that description of the same points as in the first embodiment is omitted.

(Infrared sensor)
FIG. 5A is a schematic side sectional view showing the configuration of the infrared sensor. As shown in FIG. 5A, the infrared sensor 17 includes a sensor array 18, a circuit board 19, and a base board 20 that are stacked in this order from the top. The sensor array 18 includes a substrate 2 on which infrared detection elements 21 are arranged in a grid pattern. The irradiated infrared ray is detected by the infrared detection element 21, and the sensor array 18 outputs it to the circuit board 19. The circuit board 19 includes a control circuit 22, and the control circuit 22 drives the infrared detection element 21. Then, each signal detected by the infrared detecting element 21 is processed by the control circuit 22 to generate a video signal and output it to the base substrate 20. The base substrate 20 includes an interface circuit 23, generates an output signal to be output to the outside, and outputs the output signal to an external device. That is, the infrared sensor 17 is an infrared camera that outputs an infrared distribution as a video signal.

  FIG. 5B is a schematic cross-sectional side view of an essential part showing the configuration of the sensor array. As shown in FIG. 5B, the sensor array 18 includes a substrate 2, and an infrared detection element 21 is mounted on the substrate 2. The substrate 2 has the same form as the substrate 2 described in the first embodiment. That is, the via hole 2 c is formed in the substrate 2, and the first insulating film 3 is formed on the first surface 2 a of the substrate 2. A third insulating film 5 is formed on the surface in the via hole 2c. The first insulating film 3 and the third insulating film 5 are formed by thermal oxidation, and the third insulating film 5 is thicker than the first insulating film 3. A second insulating film 4 is provided on the second surface 2 b of the substrate 2. The through electrode 2d is configured by the via hole 2c and the conductor 7 provided in the via hole 2c.

  A lower electrode 24 is disposed on the first insulating film 3, and a pyroelectric body 25 is disposed on the lower electrode 24. Further, an upper electrode 26 is provided on the pyroelectric body 25. A capacitor 27 is constituted by the lower electrode 24, the pyroelectric body 25, the upper electrode 26, etc., and the polarization amount of the capacitor 27 changes based on the temperature.

  A fourth insulating film 28 is provided so as to cover the capacitor 27. A first contact hole 29 that communicates with the lower electrode 24 and a second contact hole 30 that communicates with the upper electrode 26 are formed in the fourth insulating film 28. On the 1st insulating film 3 and the 4th insulating film 28, the 1st wiring 33 and the 2nd wiring 34 as wiring are installed. The first wiring 33 is connected to the lower electrode 24 through the first contact hole 29. Similarly, the second wiring 34 is connected to the upper electrode 26 through the second contact hole 30.

  The second wiring 34 is connected to the conductor 7. A terminal 12 is disposed on the second surface 2b, and the terminal 12 is connected to the conductor 7 by a wiring 12a. Further, bumps 35 are provided on the terminals 12. The bump 35 has a metal film disposed on the surface of a convex portion made of resin, and the metal film is electrically connected to the terminal 12. In the circuit board 19, wirings 36 are installed at positions facing the bumps 35, and the bumps 35 are pressed against the wirings 36. Thereby, the bump 35 is electrically connected to the wiring 36. The wiring 36 is connected to the control circuit 22. Therefore, the upper electrode 26 is connected to the control circuit 22 via the second wiring 34, the conductor 7, the wiring 12 a, the terminal 12, the bump 35, and the wiring 36.

  Similarly, the lower electrode 24 is also connected to the control circuit 22 via the first wiring 33, a through electrode or wiring (not shown). The through electrode has the same structure as the through electrode 2d. Thus, since the control circuit 22 is connected to the lower electrode 24 and the upper electrode 26 of the capacitor 27, the temperature of the capacitor 27 can be estimated by detecting the amount of polarization. Since there is a correlation between the amount of infrared rays irradiated to the capacitor 27 and the temperature of the capacitor 27, the control circuit 22 estimates the amount of infrared rays irradiated to the capacitor 27 from the temperature of the capacitor 27. In addition, the order of the manufacturing process of the penetration electrode 2d is performed in the same order as in the first embodiment, and the manufacturing method of the infrared detection element 21 is publicly known, and the description is omitted.

As described above, this embodiment has the following effects.
(1) According to the present embodiment, the third insulating film 5 is thicker than the first insulating film 3. Therefore, since the distance between the substrate 2 and the conductor 7 is long, the electric stray capacitance between the substrate 2 and the conductor 7 is small. As a result, the infrared sensor 17 can output the high-frequency component of the signal output from the infrared detection element 21 without being attenuated.

  (2) According to this embodiment, the order of the manufacturing process of the penetration electrode 2d is performed in the same order as in the first embodiment. Therefore, the through electrode 2d is formed after the infrared detection element 21 is formed. The manufacturing process of the infrared detecting element 21 requires heating at 700 ° C. or higher. In the via first method, the conductor 7 is embedded in the via hole 2c before the infrared detection element 21 is formed. At this time, it is necessary to employ a material that does not easily diffuse due to heat of 700 ° C. or higher and that does not contaminate the infrared detection element 21 as the material of the conductor 7. On the other hand, the conductor 7 is generally made of a high melting point material such as tungsten, but filling the via hole 2c with the high melting point material by the CVD method is inferior in productivity. In contrast, in the method of this embodiment, since the through electrode 2d is formed after the infrared detection element 21 is formed, the through electrode 2d can be formed with high productivity.

In addition, this embodiment is not limited to embodiment mentioned above, A various change and improvement can also be added. For example, specific descriptions regarding the shape, size, number, installation position, and the like of each component illustrated in the above embodiment can be changed as appropriate. A modification will be described below.
(Modification 1)
In the first embodiment, the shape of the groove 13 in plan view is circular, and the cross-sectional shape of the through electrode 2d is circular. The shape of the groove 13 and the through electrode 2d is not limited to this, and may be other shapes. For example, the cross-sectional shape of the through electrode 2d may be a polygon such as a triangle or a quadrangle, and various shapes such as an ellipse or a rectangle may be employed. When designing the wiring on the substrate 2, it is possible to make the layout easy to design.

(Modification 2)
In the first embodiment, the photolithography method and the etching method are used in the groove forming process in step S1, but other methods may be used. For example, a method of modifying silicon by irradiating laser light, a method of forming by grinding, or the like may be used. A method that can be formed with high productivity may be employed.

(Modification 3)
In the first embodiment, the support member removing process of step S9 is performed. However, the glass support wafer 15 may be completed while being bonded. The manufacturing process may be adapted to the required specifications of the product.

(Modification 4)
In the first embodiment, the conductor 7 and the wiring 36 are electrically connected via the bump 35 in which the metal film is disposed on the surface of the convex portion made of resin. The bump may have other forms. FIG. 6 is a schematic side sectional view showing the structure of the through electrode and the bump. As shown in FIG. 6, terminals 38 are formed so as to cover the conductors 7 of the sensor array 37. A wiring 36 is installed at a location facing the terminal 38, and a bump 39 is installed on the wiring 36. Further, the bump 39 is electrically connected to the terminal 38. Copper may be used for the conductor 7, and the terminal 38 may be a film of nickel metal and gold laminated or a film of an alloy or the like mainly composed of silver. The bump 39 is preferably made of gold plated in a conical shape, and the electrical resistance can be reduced. By adopting such a configuration, it is possible to mount with good productivity and establish an electrical connection.

  DESCRIPTION OF SYMBOLS 2 ... Board | substrate, 2a ... 1st surface, 2b ... 2nd surface, 2c ... Via hole, 3 ... 1st insulating film as an insulating film, 4 ... 2nd insulating film as an insulating film, 5 ... 3rd as an insulating film Insulating film, 7 ... conductor, 12 ... terminal, 13 ... groove, 15 ... glass support wafer as support member, 17 ... infrared sensor, 21 ... infrared detector, 34 ... second wiring as wiring.

Claims (7)

A substrate having a via hole that opens through a first surface and a second surface opposite to the first surface;
An insulating film including a thermal oxide film installed on the first surface of the substrate and the surface in the via hole;
A conductor surrounded by the insulating film in the via hole,
The wiring board according to claim 1, wherein a thickness of the insulating film in the via hole is larger than a thickness of the insulating film on the first surface. A substrate having a via hole that opens through a first surface and a second surface opposite to the first surface;
An insulating film including a thermal oxide film installed on the first surface of the substrate and the surface in the via hole;
A conductor surrounded by the insulating film in the via hole;
A wiring connected to the conductor and provided on the first surface via the insulating film;
An infrared detection element electrically connected to the wiring,
The infrared sensor according to claim 1, wherein the thickness of the insulating film in the via hole is larger than the thickness of the insulating film on the first surface. A groove forming step of forming a groove having a closed curve in a plan view on the first surface of the substrate;
A thermal oxidation step of thermally oxidizing the first surface and the surface in the groove to form an insulating film;
An element circuit forming step of forming an element circuit on the first surface;
A via hole forming step of forming a via hole in a place surrounded by the insulating film;
A conductor forming step of burying and forming a conductor in the via hole from the second surface facing the first surface of the substrate to the first surface;
In the thermal oxidation step, the wall of the groove is expanded by thermal oxidation, and the groove is filled with the insulating film. It is a penetration electrode formation method according to claim 3,
The method further includes an insulating film forming step that is performed between the element circuit forming step and the conductor forming step and that forms an insulating film on the second surface by grinding the second surface side of the substrate. A through electrode forming method. It is a penetration electrode formation method according to claim 3 or 4,
After the said conductor formation process, it has a terminal formation process which forms the terminal connected to the said conductor on the said 2nd surface, The penetration electrode formation method characterized by the above-mentioned. It is a penetration electrode formation method according to claim 4 or 5,
A through electrode forming method, further comprising a support member installation step which is performed before the insulating film formation step and attaches a support member to the first surface. It is a penetration electrode formation method according to any one of claims 3 to 6,
The through electrode forming method, wherein the closed curve is annular.

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